On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
> It basically allocates registers local to a function in a nir_locals map,
> then emits all its control-flow blocks.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89580
> ---
> src/mesa/drivers/dri/i965/brw_vec4.h | 1
As a general comment, please remove the Bugzilla tags from the
commits. This is a new feature, not a bugfix. If you want to leave a
reference to the bug, pick a commit and put it there but it doesn't
need to be in all of them.
--Jason
On Mon, Jun 29, 2015 at 4:29 PM, Jason Ekstrand
On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
> New method brw_writemask_for_size() will return a writemask with the first
> 'size'
> components activated.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89580
> ---
> src/mesa/drivers/dri/i965/brw_reg.h | 9 +
> 1
On Jun 29, 2015 11:21 AM, "Francisco Jerez" wrote:
>
> Jason Ekstrand writes:
>
> > Reviewed-by: Iago Toral Quiroga
> > Reviewed-by: Topi Pohjolainen
> > ---
> > src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++
> > 1 file changed, 6 insertions(
On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
> From: Samuel Iglesias Gonsalvez
>
> These methods are essential for the implementation of the NIR->vec4 pass. They
> work similar to their fs_nir counter-parts.
>
> When processing instructions, these methods are invoked to resolve the
s I go, but it's systemic
enough that you might as well start working on fixing it before I get
done reviewing.
--Jason
On Mon, Jun 29, 2015 at 4:56 PM, Eduardo Lima Mitev wrote:
> On 06/30/2015 01:49 AM, Jason Ekstrand wrote:
>> As a general comment, please remove the Bugzilla tags f
On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
> From: Iago Toral Quiroga
>
> The same we do in the FS NIR backend, only that here we need to consider
> the number of components in the condition and adjust the swizzle
> accordingly.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.
On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
> The index into the output_reg array where to store the destination register is
> fetched from the nir_outputs map built during nir_setup_outputs stage.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89580
> ---
> src/mesa/dr
On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
> This patch makes public the is_scalar_shader_stage() method in brw_shader, and
> renames it to brw_compiler_is_scalar_shader_stage(). The plan is to later
> reuse it
> in brw_nir, to enable/disable optimization passes depending on the t
I'm not sure what I think about adding an is_scalar flag vs. having
_scalar and _vec4 versions of each function. My feeling is that once
we tweak assign_var_locations as I mentioned for vec4 outputs, we'll
find that we want to have them separate. The big thing here is that
I'd rather have _vec4 a
On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
> From: Iago Toral Quiroga
>
> For the indirect case we need to take the index delivered by
> NIR and compute the parent uniform that we are accessing (the one
> that we uploaded to a surface) and the constant offset into that
> surface.
First off, this needs a different commit message. "float-related
functions" isn't particularly descriptive. How about "various
rounding functions" because these really are all "rounding modes".
On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
> From: Antia Puentes
>
> Adds NIR ALU op
On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
> From: Antia Puentes
>
> For operations that have a predefined operand size > 0, defined in
> glsl/nir/nir_opcodes.c, NIR returns a swizzle containing zeros in the
> components from outside the source vector. However, the driver
> expect
On Fri, Jun 26, 2015 at 1:07 AM, Eduardo Lima Mitev wrote:
> This is a helper method that returns a shader instruction opcode from the
> corresponding NIR texture opcode. It will be used to keep code in
> nir_emit_texture() clean.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89580
>
On Tue, Jun 30, 2015 at 7:19 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> Reviewed-by: Topi Pohjolainen
>> ---
>> src/mesa/drivers/dri/i965/brw_fs.cpp | 8
>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/src/
On Tue, Jun 30, 2015 at 9:16 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> ---
>> src/mesa/drivers/dri/i965/brw_fs.cpp | 42
>> src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
>> src/mesa/drivers/dri/i965/brw_fs_cse.cpp |
On Fri, Jun 26, 2015 at 11:51 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Fri, Jun 26, 2015 at 8:52 AM, Francisco Jerez
>> wrote:
>>> Jason Ekstrand writes:
>>>
>>>> Reviewed-by: Topi Pohjolainen
>>>> ---
>>>
If we can avoid duplication in the texturing code, that would be
really nice. Could we do this as a refactor of the old code and then
a much smaller NIR function that calls some shared code? That's what
we did for FS and it worked ok. I looked at the layout of your code
and, after you finish rea
On Fri, Jun 26, 2015 at 1:07 AM, Eduardo Lima Mitev wrote:
> From: Samuel Iglesias Gonsalvez
>
> Avoid copying an overwritten swizzle, use the original values.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89580
> Signed-off-by: Samuel Iglesias Gonsalvez
> ---
> src/glsl/nir/nir_op
ll be fine.
--Jason
On Tue, Jun 30, 2015 at 9:29 AM, Jason Ekstrand wrote:
> Another general comment: It seems like you may have copied+pasted a
> bit much when it comes to handling arrays in the backend. In the FS
> backend, we have to multiply lots of stuff by reg->num_components
Now that we can create builders with a bigger width than their parent as
long as it's exec_all, we don't need to create the instruction manually.
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i9
don't temporarily break this
invariant in the future for instructions with exec_size higher than
the dispatch width.
Reviewed-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 +++---
src/mesa/drivers/dri/i965/brw_fs_builder.h | 4 ++--
src/mesa/drivers/dri/i965/brw_fs_cse
On Jun 30, 2015 1:05 AM, "Iago Toral" wrote:
>
> Hi Jason,
>
> On Mon, 2015-06-29 at 16:22 -0700, Jason Ekstrand wrote:
> > On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev
wrote:
> > > From: Iago Toral Quiroga
> > >
> > > This is based
On Wed, Jul 1, 2015 at 3:21 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> Now that we can create builders with a bigger width than their parent as
>> long as it's exec_all, we don't need to create the instruction manually.
>> ---
>> src/mesa/
Personally, I think this is sensible given that, in the generator, we
just copy+paste the fixed_hw_reg field. However, I'd like a second
opinion.
--Jason
On Wed, Jul 1, 2015 at 11:51 AM, Connor Abbott wrote:
> sources with file == HW_REG get all their information from the
> fixed_hw_reg field, s
---
src/glsl/nir/nir.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/src/glsl/nir/nir.c b/src/glsl/nir/nir.c
index f661249..78ff886 100644
--- a/src/glsl/nir/nir.c
+++ b/src/glsl/nir/nir.c
@@ -147,18 +147,18 @@ void nir_src_copy(nir_src *dest, const n
On Thu, Jul 2, 2015 at 3:53 AM, Iago Toral wrote:
> On Thu, 2015-07-02 at 09:33 +0200, Iago Toral wrote:
>> On Tue, 2015-06-30 at 11:53 -0700, Jason Ekstrand wrote:
>> > On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev
>> > wrote:
>> > > From: Ia
On Thu, Jul 2, 2015 at 2:54 AM, Eduardo Lima Mitev wrote:
> On 06/30/2015 06:26 PM, Jason Ekstrand wrote:
>> On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
>>> From: Samuel Iglesias Gonsalvez
>>>
>>> These methods are essential for the implementat
On Wed, Jul 1, 2015 at 11:44 PM, Iago Toral wrote:
> On Tue, 2015-06-30 at 09:30 -0700, Jason Ekstrand wrote:
>> On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
>> > From: Iago Toral Quiroga
>> >
>> > The same we do in the FS NIR backend, only th
On Fri, Jul 3, 2015 at 10:23 AM, Antía Puentes wrote:
> Hi Jason,
>
> On mar, 2015-06-30 at 14:18 -0700, Jason Ekstrand wrote:
>> On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
>> > From: Antia Puentes
>> >
>> > For operations that have
On Fri, Jul 3, 2015 at 12:58 AM, Iago Toral wrote:
> On Thu, 2015-07-02 at 09:31 +0200, Iago Toral wrote:
>> On Tue, 2015-06-30 at 11:32 -0700, Jason Ekstrand wrote:
>> > I'm not sure what I think about adding an is_scalar flag vs. having
>> > _scalar and _vec
On Fri, Jul 3, 2015 at 12:32 AM, Iago Toral wrote:
> On Thu, 2015-07-02 at 10:11 -0700, Jason Ekstrand wrote:
>> On Wed, Jul 1, 2015 at 11:44 PM, Iago Toral wrote:
>> > On Tue, 2015-06-30 at 09:30 -0700, Jason Ekstrand wrote:
>> >> On Fri, Jun 26, 2015
On Jul 9, 2015 7:57 AM, "Francisco Jerez" wrote:
>
> We were passing src0 alpha and oMask in reverse order. There seems to
> be no good way to pass them in the correct order to the new-style
> LOAD_PAYLOAD (how surprising) because src0 alpha is per-channel while
> oMask is not. Just split src0 a
On Fri, Jul 10, 2015 at 5:25 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Jul 9, 2015 7:57 AM, "Francisco Jerez" wrote:
>>>
>>> We were passing src0 alpha and oMask in reverse order. There seems to
>>> be no good way t
On Fri, Jul 10, 2015 at 9:53 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Fri, Jul 10, 2015 at 5:25 AM, Francisco Jerez
>> wrote:
>>> Jason Ekstrand writes:
>>>
>>>> On Jul 9, 2015 7:57 AM, "Francisco Jerez" wrote:
&
On Fri, Jul 10, 2015 at 8:53 AM, Eduardo Lima Mitev wrote:
> On 06/30/2015 06:58 PM, Jason Ekstrand wrote:
>> On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
>>> This patch makes public the is_scalar_shader_stage() method in brw_shader,
>>
On Wed, Jul 8, 2015 at 11:54 PM, Eduardo Lima Mitev wrote:
> On 06/30/2015 06:51 PM, Jason Ekstrand wrote:
>> On Fri, Jun 26, 2015 at 1:06 AM, Eduardo Lima Mitev wrote:
>>> The index into the output_reg array where to store the destination register
>>> is
>>&
On Wed, Jul 1, 2015 at 1:07 AM, Alejandro Piñeiro wrote:
> On 01/07/15 01:37, Jason Ekstrand wrote:
>> If we can avoid duplication in the texturing code, that would be
>> really nice. Could we do this as a refactor of the old code and then
>> a much smaller NIR function t
On Mon, Jul 13, 2015 at 3:00 AM, Alejandro Piñeiro wrote:
> On 01/07/15 01:37, Jason Ekstrand wrote:
>> If we can avoid duplication in the texturing code, that would be
>> really nice. Could we do this as a refactor of the old code and then
>> a much smaller NIR function t
Now that the old GLSL IR visitor code is gone, having the remap is silly.
---
src/mesa/drivers/dri/i965/brw_fs.h | 12 +--
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 18 +---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 135 ++-
3 files changed, 75 inserti
On Jul 13, 2015 7:14 AM, "Alejandro Piñeiro" wrote:
>
>
>
> On 13/07/15 14:05, Jason Ekstrand wrote:
> > On Mon, Jul 13, 2015 at 3:00 AM, Alejandro Piñeiro
wrote:
> >> On 01/07/15 01:37, Jason Ekstrand wrote:
> >>> If we can avoid duplication
On Jul 13, 2015 6:04 AM, "Francisco Jerez" wrote:
>
> Jason Ekstrand writes:
>
> > Now that the old GLSL IR visitor code is gone, having the remap is
silly.
> > ---
> > src/mesa/drivers/dri/i965/brw_fs.h | 12 +--
> > src/mesa/drivers/dri/
On Jul 13, 2015 7:17 AM, "Jason Ekstrand" wrote:
>
>
> On Jul 13, 2015 7:14 AM, "Alejandro Piñeiro" wrote:
> >
> >
> >
> > On 13/07/15 14:05, Jason Ekstrand wrote:
> > > On Mon, Jul 13, 2015 at 3:00 AM, Alejandro Piñeiro <
apin
On Mon, Jul 13, 2015 at 9:09 AM, Alejandro Piñeiro wrote:
>
>
> On 13/07/15 16:26, Jason Ekstrand wrote:
>>
>>
>>
>> > > > Go ahead and make it a cpp file if you have to.
>> > >
>> > > Ok, thanks.
>> > >
&g
27;s
>> own can of worms.
>>
>
> Sure, it would be a pile of work, but I think it should be quite
> straightforward in principle. We could just punt fixed_hw_reg and
> replace it with an ARF file and a fixed-GRF file using the same fields
> normal regististers use. For i
On Jul 15, 2015 11:20 PM, "Iago Toral" wrote:
>
> On Wed, 2015-07-15 at 11:02 -0700, Connor Abbott wrote:
> > On Wed, Jul 15, 2015 at 7:49 AM, Iago Toral wrote:
> > > Hi,
> > >
> > > when we sent the patches for the new nir->vec4 backend we mentioned
that
> > > we had a few dEQP tests that would
in this case). Most other send instructions use mlen but that may not
be needed tour CS_TERMINATE.
--Jason
> Signed-off-by: Jordan Justen
> Cc: Jason Ekstrand
> ---
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
On Jul 16, 2015 4:35 PM, "Jordan Justen" wrote:
>
> On 2015-07-16 13:59:45, Jason Ekstrand wrote:
> >On Jul 16, 2015 2:00 PM, "Jordan Justen"
> >wrote:
> >>
> >> This prevents an assertion failure in brw_fs_live_va
On Jul 16, 2015 5:03 PM, "Jordan Justen" wrote:
>
> On 2015-07-16 14:37:59, Jason Ekstrand wrote:
> >On Jul 16, 2015 4:35 PM, "Jordan Justen"
> >wrote:
> > >
> >> On 2015-07-16 13:59:45, Jason Ekstrand wrot
Both are
Reviewed-by: Jason Ekstrand
On Jul 16, 2015 5:12 PM, "Jordan Justen" wrote:
> This prevents an assertion failure in brw_fs_live_variables.cpp,
> fs_live_variables::setup_one_write: Assertion `var < num_vars' failed.
>
> Signed-off-by: Jordan Justen
>
R-B me too
On Jul 16, 2015 5:19 PM, "Kenneth Graunke" wrote:
> From: Connor Abbott
>
> Reviewed-by: Kenneth Graunke
> ---
> src/glsl/nir/nir.h | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
> index e9a506c..0db1fc3 100644
> --- a/
R-B me too
On Jul 16, 2015 5:19 PM, "Kenneth Graunke" wrote:
> From: Connor Abbott
>
> Reviewed-by: Kenneth Graunke
> ---
> src/glsl/nir/nir.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
> index 0db1fc3..62cdbd4 100644
> --- a/src/glsl/nir
wice, corrupting the list.
> - Comment changes.
>
> Cc: Jason Ekstrand
> Signed-off-by: Kenneth Graunke
> ---
> src/glsl/nir/nir.c | 62
++
> src/glsl/nir/nir.h | 3 +++
> 2 files changed, 65 insertions(+)
>
> Nothing
A few comments below. Mostly just asking for explanation.
1-3 are
Reviewed-by: Jason Ekstrand
Obviously, don't merge 4/4 until it actually has users.
--Jason
On Thu, Jul 16, 2015 at 8:35 AM, Francisco Jerez wrote:
> This lowering pass implements an algorithm to expand SIMDN
> i
through the payload depth. */
> - sources[length] = fs_reg(brw_vec8_grf(payload.source_depth_reg, 0));
> - }
> - length++;
> - }
>
> - if (payload.dest_depth_reg)
> - sources[length++] = fs_reg(brw_vec8_grf(payload.dest_depth_reg, 0));
> + /*
On Sat, Jul 18, 2015 at 7:34 AM, Francisco Jerez wrote:
> So that it's left uninitialized by LOAD_PAYLOAD, we only need to
> reserve space for it in the message since it will be initialized
> implicitly by the generator.
> ---
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 7 ---
> 1 file c
I *think* this is sane. I compared it against the current SIMD16 and
SIMD8 code and it looks like it does the right thing. However, it's
not a direct translation and I don't know the gen4 texturing code, so
I can't really call it reviewed.
Acked-by: Jason Ekstrand
Ken, coul
On Sat, Jul 18, 2015 at 7:34 AM, Francisco Jerez wrote:
> This should match the set of cases in which we currently call fail()
> or no16() from the emit_texture_*() methods and the ones in which
> emit_texture_gen4() enables the SIMD16 workaround.
>
> Hint for reviewers: It's not a big deal if I h
On Sat, Jul 18, 2015 at 7:34 AM, Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 66
> +---
> 1 file changed, 49 insertions(+), 17 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> b/src/mesa/drivers/dri/i965/brw_f
I made a few minor nitpick comments on a couple of patches and I
didn't feel like I could fully review 08/12. Other than the few nits,
patches 1-7 and 9-12 are
Reviewed-by: Jason Ekstrand
On Sat, Jul 18, 2015 at 7:34 AM, Francisco Jerez wrote:
> This is now dead code.
> ---
> sr
On Wed, Jul 22, 2015 at 12:31 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> A few comments below. Mostly just asking for explanation.
>>
>> 1-3 are
>>
>> Reviewed-by: Jason Ekstrand
>>
>> Obviously, don't merge 4/4 until it actu
On Wed, Jul 22, 2015 at 12:41 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Sat, Jul 18, 2015 at 7:34 AM, Francisco Jerez
>> wrote:
>>> ---
>>> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 66
>>> +---
>&g
On Wed, Jul 22, 2015 at 12:43 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Sat, Jul 18, 2015 at 7:34 AM, Francisco Jerez
>> wrote:
>>> So that it's left uninitialized by LOAD_PAYLOAD, we only need to
>>> reserve space for it in
On Wed, Jul 22, 2015 at 12:54 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Thu, Jul 16, 2015 at 8:41 AM, Francisco Jerez
>> wrote:
>>> The only non-trivial thing it still has to do is figure out where to
>>> take the src/dst depth values f
On Wed, Jul 22, 2015 at 12:55 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Sat, Jul 18, 2015 at 7:34 AM, Francisco Jerez
>> wrote:
>>> This should match the set of cases in which we currently call fail()
>>> or no16() from the emit_textu
On Wed, Jul 22, 2015 at 4:26 AM, Eduardo Lima Mitev wrote:
> On 07/13/2015 01:38 PM, Jason Ekstrand wrote:
>> On Fri, Jul 10, 2015 at 8:53 AM, Eduardo Lima Mitev wrote:
>>> On 06/30/2015 06:58 PM, Jason Ekstrand wrote:
>>>> On Fri, Jun 26, 2015 at 1:06 AM, E
On Tue, Jul 21, 2015 at 9:38 AM, Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 63
> +++-
> 1 file changed, 55 insertions(+), 8 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> i
On Wed, Jul 22, 2015 at 10:02 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Tue, Jul 21, 2015 at 9:38 AM, Francisco Jerez
>> wrote:
>>> ---
>>> src/mesa/drivers/dri/i965/brw_fs.cpp | 63
>>> +++-
>&
On Wed, Jul 22, 2015 at 10:16 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Wed, Jul 22, 2015 at 10:02 AM, Francisco Jerez
>> wrote:
>>> Jason Ekstrand writes:
>>>
>>>> On Tue, Jul 21, 2015 at 9:38 AM, Francisco Jerez
>&g
This needs a *lot* more commentary. These calculations are extremely
tricky and there are almost no comments. For instance, you are
turning a 2D offset on a tiled surface into a new 2D address into the
raw view of the surface. Nowhere do you explain what the "raw"
surface looks like and how its
On Tue, Jul 21, 2015 at 9:38 AM, Francisco Jerez wrote:
> Define bitfield packing, unpacking and type conversion operations in
> terms of which the image format conversion code will be implemented.
> These don't directly know about image formats: The packing and
> unpacking functions take a 4-tupl
This all looks correct as far as I can tell. However, I'm very
concerned about the number of checks such as
has_matching_typed_format() that are built-in to the compiler (via
surface_builder) where we then go on to do something that is highly
dependant on state setup doing the exact same check (no
On Tue, Jul 21, 2015 at 9:38 AM, Francisco Jerez wrote:
> v2: Move the image_params array back to brw_stage_prog_data.
> ---
> src/mesa/drivers/dri/i965/brw_fs.h | 1 +
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 50
> +++-
> 2 files changed, 43 insertions(+),
On Tue, Jul 21, 2015 at 9:38 AM, Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 149
> +++
> 1 file changed, 149 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index 31
On Tue, Jul 21, 2015 at 9:38 AM, Francisco Jerez wrote:
> Reviewed-by: Paul Berry
I'm sure that Paul still thinks this patch does what the commit
message says. However, does the r-b really still apply to the rest of
it?
> ---
> src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
> 1 file chan
05/20] i965/fs: Import surface message builder helper functions.
> [PATCH 06/20] i965/fs: Import image access validity checks.
The above are all
Reviewed-by: Jason Ekstrand
> [PATCH 07/20] i965/fs: Import image memory offset calculation code.
As I said in the e-mail, this needs a *lo
On Wed, Jul 22, 2015 at 10:05 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Wed, Jul 22, 2015 at 12:31 AM, Francisco Jerez
>> wrote:
>>> Jason Ekstrand writes:
>>>
>>>> A few comments below. Mostly just asking for explanation
On Wed, Jul 22, 2015 at 4:37 AM, Eduardo Lima Mitev wrote:
> On 07/13/2015 01:57 PM, Jason Ekstrand wrote:
>> On Wed, Jul 8, 2015 at 11:54 PM, Eduardo Lima Mitev wrote:
>>> On 06/30/2015 06:51 PM, Jason Ekstrand wrote:
>>>> On Fri, Jun 26, 2015 at 1:06 AM, E
On Thu, Jul 23, 2015 at 1:01 AM, Eduardo Lima Mitev wrote:
> On 07/23/2015 05:20 AM, Jason Ekstrand wrote:
>> On Wed, Jul 22, 2015 at 4:37 AM, Eduardo Lima Mitev wrote:
>>> On 07/13/2015 01:57 PM, Jason Ekstrand wrote:
>>>> On Wed, Jul 8, 2015 at 11:54 PM, E
On Thu, Jul 23, 2015 at 3:55 AM, Francisco Jerez wrote:
> Francisco Jerez writes:
>
>> Jason Ekstrand writes:
>>
>>> On Wed, Jul 22, 2015 at 10:05 AM, Francisco Jerez
>>> wrote:
>>>> Jason Ekstrand writes:
>>>>
>>&
On Thu, Jul 23, 2015 at 4:42 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Tue, Jul 21, 2015 at 9:38 AM, Francisco Jerez
>> wrote:
>>> v2: Move the image_params array back to brw_stage_prog_data.
>>> ---
>>> src/mesa/drivers/dri/i96
This moves the calculations to near other stuff. Can't we make
emit_image_load/store() take both dims and is_array parameters and
have it do the adjustment?
--Jason
On Thu, Jul 23, 2015 at 10:33 AM, Francisco Jerez wrote:
> Accounting for the padding required for 1D arrays in certain cases.
> --
On Thu, Jul 23, 2015 at 3:16 AM, Eduardo Lima Mitev wrote:
> The NIR->vec4 pass will be activated if both the following conditions are met:
>
> * INTEL_USE_NIR environment variable is defined and is positive (1 or true)
> * The stage is vertex shader (support for geometry shaders and
> ARB_verte
You seem to switch back and forth between "uniforms" and
"this->uniforms". It would be nice to be consistent.
On Thu, Jul 23, 2015 at 3:16 AM, Eduardo Lima Mitev wrote:
> From: Iago Toral Quiroga
>
> This is based on similar code existing in vec4_visitor. It builds the
> uniform register file i
On Thu, Jul 23, 2015 at 3:16 AM, Eduardo Lima Mitev wrote:
> The upcoming introduction of NIR->vec4 pass will require that some NIR
> lowering
> passes are enabled/disabled depending on the type of shader (scalar vs.
> vector).
>
> With this patch we pass a 'is_scalar' variable to the process of
On Thu, Jul 23, 2015 at 3:16 AM, Eduardo Lima Mitev wrote:
> Similar to fs_nir backend, a nir_local_values map will be filled with
> newly allocated registers as the load_const instrinsic instructions are
> processed. Later, get_nir_src() will fetch the registers from this map
> for sources that a
On Oct 10, 2015 12:09 PM, "Matt Turner" wrote:
>
> On Sat, Oct 10, 2015 at 11:47 AM, Rob Clark wrote:
> > From: Rob Clark
> >
> > Needed in NIR too, so move out of mesa/main/imports.c
> >
> > Signed-off-by: Rob Clark
> > ---
> > src/glsl/Makefile.am | 1 +
> > src/mesa/main/imports.c
Can we tweak the commit message a bit:
glsl: move builtin vector types to glsl_types.cpp
builtin_types.CPP contains a lot more than just vec4_type and friends and
you're not moving all of them.
On Oct 10, 2015 11:48 AM, "Rob Clark" wrote:
>
> From: Rob Clark
>
> First step at untangling NIR's
On Oct 12, 2015 1:26 AM, "Iago Toral" wrote:
>
> On Fri, 2015-10-09 at 07:09 -0700, Jason Ekstrand wrote:
> > ---
> > src/glsl/nir/glsl_to_nir.cpp | 40 -
> > src/glsl/nir/nir.c | 66
On Oct 13, 2015 8:26 AM, "Emil Velikov" wrote:
>
> On 10 October 2015 at 19:47, Rob Clark wrote:
> > From: Rob Clark
> >
> > Add missing enum to gl_system_value_name() and move VARYING_SLOT_MAX /
> > FRAG_RESULT_MAX / etc into shader_enums.h as suggested by Emil.
> >
> > v2: add STATIC_ASSERT()'
On Wed, Oct 14, 2015 at 1:41 AM, Pohjolainen, Topi
wrote:
> On Wed, Oct 14, 2015 at 11:25:40AM +0300, Pohjolainen, Topi wrote:
>> On Sat, Oct 10, 2015 at 08:09:01AM -0700, Jason Ekstrand wrote:
>> > This commit removes all dependence on GL state by getting rid of the
>>
On Oct 14, 2015 10:48 PM, "Pohjolainen, Topi"
wrote:
>
> On Wed, Oct 14, 2015 at 11:53:37AM -0700, Jason Ekstrand wrote:
> > On Wed, Oct 14, 2015 at 1:41 AM, Pohjolainen, Topi
> > wrote:
> > > On Wed, Oct 14, 2015 at 11:25:40AM +0300, Pohjolainen, Topi wrote:
On Thu, Oct 15, 2015 at 6:03 AM, Neil Roberts wrote:
> Ping, could you please push this patch? It's a pain to use the optimise
> debug output without it. Thanks.
Pushed! Sorry that took so long. I was off doing other things.
> Reviewed-by: Neil Roberts
Thanks.
> - Neil
&
tch, we'll no longer be marking the right number of UBO's
as used (as per the other two) but since NumBufferInterfaceBlocks is
probably bigger than NumShaderStorageBlocks, it should be safe to do
the other two first.
In any case, all three are
Reviewed-by: Jason Ekstrand
> ---
nir_variable_create already inserts it in the right list for us so
inserting it again causes a linked list corruption.
---
src/mesa/program/prog_to_nir.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c
index f
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 34 ++
src/mesa/drivers/dri/i965/brw_vs.c | 34 --
2 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/b
This patch applies on top of my previous series to shuffle a bunch of
the compiler code around.
On Thu, Oct 15, 2015 at 12:05 PM, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vec4.cpp | 34
> ++
> src/mesa/drivers/dri/i965/brw_v
true;
> } else if (src_end_ip <= ip || inst->dst.equals(inst->src[0])) {
> if (scan_inst->can_do_saturate()) {
> + if (scan_inst->dst.type != inst->dst.type) {
Please add an
asse
On Wed, Oct 14, 2015 at 11:30 AM, Matt Turner wrote:
> Make them members of fs_inst/vec4_instruction for use elsewhere.
>
> Also fix the fs version to check that dst.type == src[1].type and for
> !saturate.
Reviewed-by: Jason Ekstrand
> ---
> src/mesa/drivers/d
On Wed, Oct 14, 2015 at 6:56 PM, Eduardo Lima Mitev wrote:
> We recently added support for GL_BGRA internal format when validating
> combination of format+type+internal_format in Tex(Sub)ImageXD calls
> (to fix https://bugs.freedesktop.org/show_bug.cgi?id=92265).
>
> However, the current implement
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