On Thu, Aug 24, 2017 at 4:20 AM, Nicolai Hähnle wrote:
> Patches 2-4:
>
> Reviewed-by: Nicolai Hähnle
>
>
> On 23.08.2017 22:44, Marek Olšák wrote:
>>
>> From: Marek Olšák
>>
>> Not sure yet if we wanna do this on CIK and VI too.
Any reason why we only do this for SI?
Alex
>> ---
>> src/amd
On Tue, Oct 23, 2018 at 1:06 PM Liu, Leo wrote:
>
> JPEG was added after DRM version 3.26
>
> Signed-off-by: Leo Liu
> Fixes: 4558758c51749(amd/common: add vcn jpeg ip info query)
> Cc: Boyuan Zhang
> Cc: Alex Smith
Reviewed-by: Alex Deucher
> ---
> src/amd/commo
rc/gallium/drivers/radeonsi/si_get.c | 1 +
> src/gallium/drivers/radeonsi/si_pipe.c | 3 ++-
> src/gallium/drivers/radeonsi/si_state.c | 1 +
> src/gallium/drivers/radeonsi/si_state_binning.c | 1 +
> 12 files changed, 26 insertions(+), 3 deletions(-)
Reviewed-by:
On Tue, Aug 14, 2018 at 3:05 AM Naveen Naidu wrote:
>
> Hello Everyone,
>
> I am Naveen a Junior year computer science undergrad from India. I really
> apologize for disturbing you people. But I have been going through the
> available projects for the XorgEVoC internship program and the project
On Tue, Apr 27, 2021 at 1:35 PM Simon Ser wrote:
>
> On Tuesday, April 27th, 2021 at 7:31 PM, Lucas Stach
> wrote:
>
> > > Ok. So that would only make the following use cases broken for now:
> > >
> > > - amd render -> external gpu
> > > - amd video encode -> network device
> >
> > FWIW, "only"
On Wed, Apr 28, 2021 at 6:31 AM Christian König
wrote:
>
> Am 28.04.21 um 12:05 schrieb Daniel Vetter:
> > On Tue, Apr 27, 2021 at 02:01:20PM -0400, Alex Deucher wrote:
> >> On Tue, Apr 27, 2021 at 1:35 PM Simon Ser wrote:
> >>> On Tuesday, April 27th, 2021 at 7
21 um 14:26 schrieb Daniel Vetter:
> > > > > On Wed, Apr 28, 2021 at 02:21:54PM +0200, Daniel Vetter wrote:
> > > > > > On Wed, Apr 28, 2021 at 12:31:09PM +0200, Christian König wrote:
> > > > > > > Am 28.04.21 um 12:05 schrieb Dani
On Sat, May 1, 2021 at 6:27 PM Marek Olšák wrote:
>
> On Wed, Apr 28, 2021 at 5:07 AM Michel Dänzer wrote:
>>
>> On 2021-04-28 8:59 a.m., Christian König wrote:
>> > Hi Dave,
>> >
>> > Am 27.04.21 um 21:23 schrieb Marek Olšák:
>> >> Supporting interop with any device is always possible. It depend
What sort of problem are you having? You should be able to click on
"Register" at the top right and then create an account. You will need
a valid email to do so.
Alex
On Thu, Jul 11, 2024 at 6:25 AM Riza Dindir wrote:
>
> Hello
>
> I wanted to report a problem with firefox and mesa via
> http
On Thu, Apr 28, 2016 at 8:58 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> Unused. All texture imports use LINEAR_ALIGNED regardless of what
> the DDX does.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r600/evergreen_state.c | 33
> +---
06eabff
Series is:
Reviewed-by: Alex Deucher
> ---
> src/gallium/winsys/radeon/drm/radeon_drm_cs.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
> b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
> in
i?id=95203
> Fixes: b87856d25d1 ("st/omx: Fix resource leak on OMX_ErrorNone")
> Cc: Andy Furniss
> Cc: Robert Foss
> Signed-off-by: Emil Velikov
> ---
> What an embarassing bug - missing brackets. Andy can you confirm that it
> resolves the issue ?
Reviewed-by: Alex D
On Tue, May 3, 2016 at 10:52 AM, Leo Liu wrote:
> Stacking frames is for driver that's capable to do dual instances
> encoding. Such feature is not enabled for B frames currently.
>
> Signed-off-by: Leo Liu
> Cc: "11.1 11.2"
Reviewed-by: Alex Deucher
> ---
27;t been measured yet.
>
> Texture uploads still use 2 copies (user memory -> linear, linear -> tiled).
> Merging those 2 copies into 1 is not done in this series.
>
> Please review and opinions on the DCC issue are welcome,
Have you looked at using SDMA for buffer clears as
On Thu, May 5, 2016 at 12:17 PM, Marek Olšák wrote:
> On Thu, May 5, 2016 at 5:57 PM, Alex Deucher wrote:
>> On Wed, May 4, 2016 at 7:43 PM, Marek Olšák wrote:
>>> Hi,
>>>
>>> This patch series completely rewrites texture copying with SDMA for CIK &
On Thu, May 5, 2016 at 1:03 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> This allows resolving RGBA into RGBX.
> This should improve HL2 Lost Coast performance.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r600/r600_blit.c | 3 ++-
> 1 file changed, 2 inse
3 support
> vl/dri3: handle PresentCompleteNotify event
> vl/dri3: implement functions for get and set timestamp
> st/vdpau: add dri3 support
For the series:
Reviewed-by: Alex Deucher
>
> configure.ac | 7 +-
> src/gallium/auxiliary/Makefile.s
On Thu, May 12, 2016 at 1:53 AM, Axel Davy wrote:
> Another comment:
>
> What would solve your DRI_PRIME issues would also be
> dma-buf fences.
>
> While I believe thread_submit should be a bit better (because
> it avoids a card stall waiting for another card to finish), dma-buf
> fences make the
Signed-off-by: Alex Deucher
---
include/pci_ids/radeonsi_pci_ids.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/pci_ids/radeonsi_pci_ids.h
b/include/pci_ids/radeonsi_pci_ids.h
index 4df8e9d..94e4fac 100644
--- a/include/pci_ids/radeonsi_pci_ids.h
+++ b/include/pci_ids
Signed-off-by: Alex Deucher
---
include/pci_ids/radeonsi_pci_ids.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/pci_ids/radeonsi_pci_ids.h
b/include/pci_ids/radeonsi_pci_ids.h
index 94e4fac..20c1583 100644
--- a/include/pci_ids/radeonsi_pci_ids.h
+++ b/include/pci_ids
er to create screen.
>
> Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
> ---
> src/gallium/state_trackers/va/context.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/gallium/state_trackers/va/context.c
> b/src/gallium/state_trackers/v
This patch set adds powergating support for the gfx block
on Carrizo. Also fixes a few issues with powergating setup
on older asics. Powergating improves idle powersaving.
Alex Deucher (7):
drm/amdgpu/gfx7: expand cp jt size to handle GDS as well
drm/radeon/gfx7: expand cp jt size to handle
This implements powergating support for CZ/ST asics.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 132 --
1 file changed, 126 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd
The size needs to handle the CP JT and GDS.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index ba192a3..5c88c1c 100644
--- a/drivers/gpu/drm/radeon
So they can be shared with other asics.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 22 --
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 7fcde08
The size needs to handle the CP JT and GDS.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 7f18a53..d58425e 100644
Fix the logic for enabling/disabling.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 0508cef
This sets up the CP jump table and GDS buffer and sets the
PG state registers.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 133 --
1 file changed, 128 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b
Add some new GFX powergating flags.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/amd_shared.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/amd_shared.h
b/drivers/gpu/drm/amd/include/amd_shared.h
index 6080951..147b2eb 100644
--- a/drivers/gpu
From: Tom St Denis
Based on Alex's patches this enables GFX PG on CZ.
Tested with xonotic-glx/glxgears/supertuxkart and idle desktop.
Also read-back registers via umr for verificiation that the bits
are truly enabled.
Signed-off-by: Tom St Denis
Reviewed-by: Alex Deucher
Signed-off-by:
How do we deal with drive by fixes? E.g., some random user submits a
fix but doesn't want to create a gitlab account just to submit a fix?
Whoever reviews the patch should submit an MR?
Alex
On Mon, Dec 9, 2019 at 6:07 PM Dylan Baker wrote:
>
> Hi everyone,
>
> I think its time we discussed whe
usually make it through. If we are proposing to
do away with the mailing list, what is the plan for non-patch
discussions? Opening issues in gitlab?
Alex
>
> Dylan
>
> Quoting Alex Deucher (2019-12-10 07:30:43)
> > How do we deal with drive by fixes? E.g., some random user submi
What does the name matter? The name is the least of your worries.
What if their patch uses a patented algorithm? Does anyone check for
that? The whole Signed-off-by thing just just hazing for newbs.
Someone took the time to write and submit a patch. We trust they did
the right thing and didn't
The mesa process has switched to using merge requests.
The steps for creating a MR are:
1*) Click "fork" in the Meso repo to create a private repo where
you'll push branches for MRs.
2) git push your branch into your private repo
3) The "git push" command printed a link to create a MR for that
bra
On Tue, Mar 26, 2019 at 2:44 PM Liu, Leo wrote:
>
> VCN supports this profile as well as UVD, so add it
>
> Signed-off-by: Leo Liu
> CC:
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeon/radeon_vcn_dec.c | 1 +
> 1 file changed, 1 insertion(+)
>
> di
Acked-by: Alex Deucher
On Mon, May 13, 2019 at 4:01 PM Liu, Leo wrote:
>
> Ping...
>
> On 5/9/19 2:10 PM, Liu, Leo wrote:
> > Since the using output optimization is only for back buffer case
> >
> > Signed-off-by: Leo Liu
> > ---
> > src/gallium/a
> -CHIP_CEDAR,
> +CHIP_CEDAR,/* Evergreen */
Could also make this /* GFX4 (Evergreen) */
> CHIP_REDWOOD,
> CHIP_JUNIPER,
> @@ -73,17 +73,17 @@ enum radeon_family {
> CHIP_TURKS,
> CHIP_CAICOS,
> -CHIP_CAYMAN,
> +CHIP_CAYMAN, /* North
On Tue, Jun 11, 2019 at 10:43 AM Samuel Pitoiset
wrote:
>
> On VegaM, the visible VRAM size is equal to the VRAM size, which
> means only two heaps are exposed.
FWIW, this is not VegaM specific. The vram size could be equal to the
visible vram size on any asic depending on whether the platform
s
On Fri, Nov 30, 2012 at 2:48 AM, Dave Airlie wrote:
> the critical error would use driverName.
>
> Found by internal RH coverity scan.
>
> Signed-off-by: Dave Airlie
Reviewed-by: Alex Deucher
> ---
> src/glx/dri_glx.c | 5 -
> 1 file changed, 4 insertions(+), 1 de
Reviewed-by: Alex Deucher
Also, should probably also make a note to apply this to the stable
branches. While you are at it can you also check and see if radeon
needs a similar fix?
Alex
___
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http
On Tue, Dec 4, 2012 at 12:50 PM, Tobias Droste wrote:
> Anyone interested? ;-)
>
> I would just push it, but I don't have the rights to do so.
Looks reasonable to me.
Reviewed-by: Alex Deucher
>
> Am Do, 29. November 2012, 17:02:28 schrieben Sie:
>> Fixes c
On Wed, Dec 5, 2012 at 12:22 PM, Stefan Dösinger wrote:
> On 12/05/12 15:23, Alex Deucher wrote:
>> Also, should probably also make a note to apply this to the stable
>> branches. While you are at it can you also check and see if radeon
>> needs a similar fix?
> From t
On Thu, Dec 6, 2012 at 1:21 PM, Vincent Lejeune wrote:
> Sorry for the inconvenience.
> I think the r600g backend work because of this patch, which switch MUL and
> MUL_IEEE definition :
> http://lists.freedesktop.org/archives/mesa-dev/2012-November/030748.html
>
> The rationale behind the patch
On Thu, Dec 6, 2012 at 1:27 PM, Alex Deucher wrote:
> On Thu, Dec 6, 2012 at 1:21 PM, Vincent Lejeune wrote:
>> Sorry for the inconvenience.
>> I think the r600g backend work because of this patch, which switch MUL and
>> MUL_IEEE definition :
>> http://lists.freede
On Thu, Dec 6, 2012 at 2:37 PM, Michel Dänzer wrote:
> On Don, 2012-12-06 at 10:52 -0800, Tom Stellard wrote:
>> On Thu, Dec 06, 2012 at 07:25:55PM +0100, Michel Dänzer wrote:
>> > On Don, 2012-12-06 at 09:05 -0800, Tom Stellard wrote:
>> > > On Thu, Dec 06, 2012 at 05:08:07PM +0100, Michel Dänzer
On Sat, Dec 8, 2012 at 8:55 AM, Henri Verbeet wrote:
> On 6 December 2012 21:34, Tom Stellard wrote:
>> I asked idr about this on IRC and he said that IEEE rules are required for
>> GLSL >= 1.30 and they are compliant, but not required for GLSL < 1.30.
>> stringfellow added that the d3d9 spec req
>> > I would just push it, but I don't have the rights to do so.
>>
>> Looks reasonable to me.
>>
>> Reviewed-by: Alex Deucher
>>
>> > Am Do, 29. November 2012, 17:02:28 schrieben Sie:
>> >> Fixes compiler warning:
>> >>
s good to me.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r600/r600_buffer.c | 30 +++---
> 1 file changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_buffer.c
> b/src/gallium/drivers/r600/r600_buffer.c
&
On Mon, Dec 17, 2012 at 2:28 PM, wrote:
> From: Jerome Glisse
>
> This bring r600g allmost inline with closed source driver when
> it comes to flushing and synchronization pattern.
>
> v2-v4: history lost somewhere in outer space
> v5: Fix compute size of flushing, use define for flags, update
>
On Fri, Jan 4, 2013 at 5:19 PM, wrote:
> From: Jerome Glisse
>
> The design is to take advantage of the fact that kernel will emit
> semaphore when buffer is referenced by different ring. So the only
> thing we need to enforce synchronization btw dma and gfx/compute
> ring is to make sure that w
tial
> thinking. Everything just works.
>
> Two notes for reviewers:
> * The hangs I used to have were caused by a silly bug in my initial
> implementation.
> * I don't know what I should set to CP_DMA_ENGINE on Evergreen, so I se
On Wed, Jan 9, 2013 at 2:09 AM, Vinson Lee wrote:
> Fixes resource leak defect reported by Coverity.
>
> Signed-off-by: Vinson Lee
Pushed. thanks!
> ---
> src/gallium/drivers/r600/r600_asm.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/gallium/drivers/r600/r600_asm.c
> b/src/
On Fri, Jan 11, 2013 at 6:37 AM, smoki wrote:
> Piglit passes more fbo tests on rv280, 14/28 before and now 28/33.
> Also should fix bug:
> https://bugs.freedesktop.org/show_bug.cgi?id=27704
Does this regress anything in piglit? It's been a while since I
looked at this code, I think the issue ma
On Thu, Jan 17, 2013 at 12:32 PM, Michel Dänzer wrote:
> On Don, 2013-01-17 at 18:02 +0100, Michel Dänzer wrote:
>> On Don, 2013-01-17 at 17:56 +0100, Marek Olšák wrote:
>> > Forking r600g was obviously a bad idea, because now radeonsi is just
>> > as horrible as r600g used to be.
>>
>> What do yo
On Fri, Jan 18, 2013 at 10:40 AM, Marek Olšák wrote:
> On Fri, Jan 18, 2013 at 2:46 PM, Christian König
> wrote:
>> Am 17.01.2013 23:54, schrieb Alex Deucher:
>>
>>> On Thu, Jan 17, 2013 at 12:32 PM, Michel Dänzer
>>> wrote:
>>>>
>>>
On Fri, Jan 18, 2013 at 10:45 AM, Alex Deucher wrote:
> On Fri, Jan 18, 2013 at 10:40 AM, Marek Olšák wrote:
>> On Fri, Jan 18, 2013 at 2:46 PM, Christian König
>> wrote:
>>> Am 17.01.2013 23:54, schrieb Alex Deucher:
>>>
>>>> On Thu, Jan 17
On Thu, Jan 24, 2013 at 2:10 PM, Paul Berry wrote:
> When possible, glReadPixels calls are performed using the hardware
> blitter. However, according to the Ivy Bridge PRM, Vol1 Part4,
> section 1.2.1.2 (Graphics Data Size Limitations):
>
> The BLT engine is capable of transferring very large
ling opencl or r600-llvm-compiler, llvm_wrapper.cpp will be
> built, but the IPO library won't be added to LLVM_LIBS. This was
> causing unresolved symbol errors when buiding with this configuration.
>
> https://bugs.freedesktop.org/show_bug.cgi?id=59831
confirmed this fixes th
On Thu, Jan 31, 2013 at 9:34 AM, Michel Dänzer wrote:
> On Don, 2013-01-31 at 02:14 -0800, Jose Fonseca wrote:
>> - Original Message -
>> > On Mit, 2013-01-30 at 08:35 -0800, Jose Fonseca wrote:
>> > >
>> > > - Original Message -
>> > > > For another example (which I suspect is mor
On Tue, Dec 13, 2011 at 4:18 PM, Christoph Bumiller
wrote:
> On 12/13/2011 09:58 PM, Jose Fonseca wrote:
>>
>>
>> - Original Message -
>>> On 12/13/2011 09:11 PM, Jose Fonseca wrote:
- Original Message -
> This is an updated version of the patch set I sent to the
On Fri, Dec 16, 2011 at 7:20 PM, James Cloos wrote:
> And while I'm asking about library paths, I compiled mesa with gallium
> planning on using r600g, but everything looks for r600_dri.so; never
> for r600g_dri.so. I had to add a symlink.
>
> Is there an env I should set to prefer r600g over r60
On Thu, Dec 22, 2011 at 9:35 AM, Vadim Girlin wrote:
> If glUniform1i and friends are going to dump data directly in
> driver-allocated, the pointers have to be updated when the storage
> moves. This should fix the regressions seen with commit 7199096.
>
> I'm not sure if this is the only place t
On Mon, Jan 2, 2012 at 10:59 PM, Ian Romanick wrote:
> On 01/02/2012 08:27 AM, Alex Deucher wrote:
>>
>> On Thu, Dec 22, 2011 at 9:35 AM, Vadim Girlin
>> wrote:
>>>
>>> If glUniform1i and friends are going to dump data directly in
>>> driver-all
On Thu, Jan 5, 2012 at 11:10 AM, Andre Maasikas wrote:
> On Thu, Jan 5, 2012 at 4:58 PM, Marek Olšák wrote:
>> On Thu, Jan 5, 2012 at 9:13 AM, Vadim Girlin wrote:
>>> Rendering in two-sided mode is performed in separate passes for front and
>>> back faces, corresponding colors are selected by se
On Thu, Jan 5, 2012 at 3:06 PM, Roland Scheidegger wrote:
> Am 05.01.2012 17:27, schrieb Alex Deucher:
>> On Thu, Jan 5, 2012 at 11:10 AM, Andre Maasikas wrote:
>>> On Thu, Jan 5, 2012 at 4:58 PM, Marek Olšák wrote:
>>>> On Thu, Jan 5, 2012 at 9:13 AM, Vadim Gir
On Wed, Jan 11, 2012 at 3:30 PM, Matt Turner wrote:
> Signed-off-by: Matt Turner
FWIW, a number of these extensions are supported on older hw as well
(e.g., r300), although I guess that hw is not GL3 capable.
Alex
> ---
> docs/GL3.txt | 78
> +---
2012/1/23 Christian König :
> On 22.01.2012 17:24, Dave Airlie wrote:
>>
>> 2012/1/22 Christian König:
>>>
>>> On 22.01.2012 16:46, Dave Airlie wrote:
2012/1/22 Christian König:
>
> Sorry, but that looks really ugly and pretty much unmaintainable, cause
> you
> constantly
On Mon, Jan 30, 2012 at 3:23 PM, Marek Olšák wrote:
> This also significantly improves the RV670 flush by using the CB1 flush
> *always* and also DEST_BASE_0_ENA, which appears to magically fix some tests.
> I am not entirely sure, but it's possible that RV670 flushing is fixed
> completely.
> ---
tting rid of the register mask is a prerequisite
> for that.
>
> There are no piglit regressions. Tested with RV670, RV730, and REDWOOD.
Looks good.
Reviewed-by: Alex Deucher
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. Flushing CB1_DEST_BASE was not enough, DEST_BASE_0 must be
> flushed as well. This fixes 21 piglit tests on RV670. The flushing seems to
> be fixed finally, but the piglit results are not yet up to par with RV730.
>
> All this code has been tested on RV670, RV730, and REDWOOD.
&g
On Thu, Feb 2, 2012 at 6:46 AM, Lauri Kasanen wrote:
>> The first patch fixes a bug where the depth filters may have used an old
>> depth buffer.
>> The second adds safeguards suggested by Michael Dänzer.
>>
>> Could they both be applied to the stable 8.0 tree too?
>
> Hi list
>
> Ping on the abo
2012/2/6 Christian König :
> Outputs should be treated in the same way as
> inputs and temporaries here.
>
> Signed-off-by: Christian König
Looks good. Should probably go to the 8.0 stable branch as well?
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r600/r6
; if (ptex->target == PIPE_TEXTURE_CUBE) {
> if (chipc >= R700)
> size = layer_size * 8;
> --
> 1.7.4.1
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> http://lists.
2011/9/1 Christian König :
> Sampling worked out of the box, but this make them work as surface as well.
>
> Signed-off-by: Christian König
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r600/evergreen_state.c | 4
> src/gallium/drivers/r600/r600_state.c
On Sun, Sep 25, 2011 at 7:09 AM, Benjamin Bellec wrote:
> Hello,
>
> In src/gallium/drivers/r600/r600_pipe.c I saw this :
>
> /* Render targets. */
> case PIPE_CAP_MAX_RENDER_TARGETS:
> /* FIXME some r6xx are buggy and can only do 4 */
> return 8;
>
> The last line of R6xx_R7
gt; - evergreen_hw_context.c
>
> I can postpone or discard the commit "r600g: move all files from
> winsys/r600 into drivers/r600", but I'd like to push the other 5
> commits if there are no concerns.
They look good to me.
Reviewed-by: Alex Deucher
>
> Cheers,
>
On Wed, Oct 5, 2011 at 10:57 AM, Tom Stellard wrote:
> Reduction instructions can't share an instruction group with other
> instructions, so we need to check for them when trying to merge
> instruction groups.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r6
2011/10/13 Mathias Fröhlich :
>
> Hi Jose,
>
> On Thursday, October 13, 2011 20:18:25 Jose Fonseca wrote:
>> We should also acquire/release the mutex on every entry point on that file
>> for consistency, but it would make no difference, given that pbuffers
>> can't be resized like normal windows ar
On Wed, Oct 19, 2011 at 8:50 PM, Eric Anholt wrote:
> For the MapRenderbuffer() code (See
> http://cgit.freedesktop.org/~anholt/mesa/log/?h=rbmap for the current
> work, which has glReadPixels() converted so far and tested on gen6 with
> only one regression in the tip commit), I need to be able to
On Thu, Oct 20, 2011 at 12:01 PM, Alex Deucher wrote:
> On Wed, Oct 19, 2011 at 8:50 PM, Eric Anholt wrote:
>> For the MapRenderbuffer() code (See
>> http://cgit.freedesktop.org/~anholt/mesa/log/?h=rbmap for the current
>> work, which has glReadPixels() converted so far an
On Thu, Oct 20, 2011 at 12:59 PM, Dave Airlie wrote:
> On Thu, Oct 20, 2011 at 5:59 PM, Roland Scheidegger
> wrote:
>> Am 20.10.2011 18:10, schrieb Dave Airlie:
>
> So, Radeon maintainers, what do you think? And, does anyone else want
> to test it on the other drivers? I caught two
2011/10/20 Eric Anholt :
> On Thu, 20 Oct 2011 10:35:31 +0200, Michel Dänzer wrote:
>> On Mit, 2011-10-19 at 17:50 -0700, Eric Anholt wrote:
>> > So, Radeon maintainers, what do you think? And, does anyone else want
>> > to test it on the other drivers? I caught two bugs in my r300 testing
>> >
On Fri, Oct 21, 2011 at 1:31 PM, Kurt Roeckx wrote:
> On Wed, Oct 19, 2011 at 05:50:29PM -0700, Eric Anholt wrote:
>> I think it would be much better to just ditch DRI1 at this point, since
>> KMS and DRI2 are quite well established, and are relied on by shipping
>> desktop environments.
>
> Does
On Wed, Nov 2, 2011 at 5:40 PM, Eric Anholt wrote:
> Fixes gcc set-but-unused-variable warning.
Reviewed-by: Alex Deucher
> ---
> .../drivers/dri/radeon/radeon_common_context.c | 18 +-
> 1 files changed, 13 insertions(+), 5 deletions(-)
>
> diff --git
On Fri, Nov 4, 2011 at 1:24 PM, Vadim Girlin wrote:
> There is no need to duplicate semantic mapping which is done in hw, so get
> rid of r600_find_vs_semantic_index.
>
> TGSI name/sid pair is mapped to the 8-bit semantic index for SPI.
Pushed. Thanks! Note that the hw can use semantic ids for
On Fri, Nov 4, 2011 at 5:53 PM, Marek Olšák wrote:
> FYI, this commit completely breaks RV670. glxgears is completely
> black, other apps are either black or rendered incorrectly (mostly
> one-colored, the clear color I guess).
I knew I should have tested 6xx before I pushed. Reverted for now.
On Sat, Nov 5, 2011 at 1:10 AM, Vadim Girlin wrote:
> On Fri, 2011-11-04 at 22:53 +0100, Marek Olšák wrote:
>> FYI, this commit completely breaks RV670. glxgears is completely
>> black, other apps are either black or rendered incorrectly (mostly
>> one-colored, the clear color I guess).
>>
>
> Tha
to the
> src/mesa/drivers/dri/r200/server directory.
>
> This patch removes the dangling symlink.
Reviewed-by: Alex Deucher
> ---
> src/mesa/drivers/dri/r200/server/radeon.h | 1 -
> 1 files changed, 0 insertions(+), 1 deletions(-)
> delete mode 12 src/mesa/drivers/
On Wed, Nov 9, 2011 at 2:16 AM, Kenneth Graunke wrote:
> Ian,
>
> I just tried running Cogs (from the Humble Indie Bundle 3) and discovered a
> terrible regression: it continually keeps recompiling fragment shader 19
> over and over again.
>
> It looks like it was caused by commit 71990969 ("mesa:
On Tue, Nov 15, 2011 at 8:58 AM, Jose Fonseca wrote:
>
>
> - Original Message -
>> On 11/13/2011 03:06 AM, Vadim Girlin wrote:
>> > Hi,
>> >
>> > I found some problem with glsl_to_tgsi: remove_output_reads
>> > function.
>> > It's replacing outputs with temps, producing incorrect results w
On Tue, Nov 15, 2011 at 9:43 AM, Jose Fonseca wrote:
>
>
> - Original Message -
>> On Tue, Nov 15, 2011 at 8:58 AM, Jose Fonseca
>> wrote:
>> >
>> >
>> > - Original Message -
>> >> On 11/13/2011 03:06 AM, Vadim Girlin wrote:
>> >> > Hi,
>> >> >
>> >> > I found some problem with gl
On Thu, Jun 14, 2012 at 6:09 PM, Marek Olšák wrote:
> It helps on R7xx.
For the series:
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r600/r600_hw_context.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/r600/r600
On Fri, Jun 15, 2012 at 11:16 AM, Miguel Ramos wrote:
> 2012/6/15 Marek Olšák :
>> On Fri, Jun 15, 2012 at 3:15 PM, Miguel Lopes Santos Ramos
>> wrote:
>>> Hi all,
>>>
>>> I'm trying to learn to program radeons in assembly in Linux and
>>> already got help once in this mailing list.
>>>
>>> I'm p
On Thu, Jun 21, 2012 at 10:37 AM, Miguel Lopes Santos Ramos
wrote:
> 2012/6/21 Alex Deucher :
>> If you just want to play with simple shaders and setting up the 3D
>> pipeline, radeondemo is an easy place to start:
>> http://cgit.freedesktop.org/~airlied/radeondemo
&g
other hand
> we are doing less exports, which are very costly.
>
> v2: fix various piglit regressions
>
> Signed-off-by: Vadim Girlin
> Signed-off-by: Jerome Glisse
For the series:
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r600/evergreen_state.c | 10
On Tue, Jun 26, 2012 at 7:34 PM, Vadim Girlin wrote:
> Use r600_resource_texture::flished_depth_texture for GPU access, and
> allocate it in the VRAM. For transfers we'll allocate untiled texture in the
> GTT and store it in the r600_transfer::staging.
>
> Improves performance when flushed depth t
On Wed, Jun 27, 2012 at 1:17 PM, Marek Olšák wrote:
> On Wed, Jun 27, 2012 at 5:37 PM, Tom Stellard wrote:
>> Some packets require the shader type bit (bit 1) to be set when
>> used for compute shaders. The pkt_flag will be initialized to
>> RADEON_CP_PACKET3_COMPUTE_MODE for any struct r600_com
On Wed, Jun 27, 2012 at 1:26 PM, Tom Stellard wrote:
> On Wed, Jun 27, 2012 at 07:17:37PM +0200, Marek Olšák wrote:
>> On Wed, Jun 27, 2012 at 5:37 PM, Tom Stellard wrote:
>> > Some packets require the shader type bit (bit 1) to be set when
>> > used for compute shaders. The pkt_flag will be ini
tted patch "r600g: improve
> flushed depth texture handling v2" from Vadim Girlin.
>
> The series fixes 23 depth-stencil piglit tests on r600g.
For the series:
Reviewed-by: Alex Deucher
>
> Marek Olšák (22):
> mesa: remove assertions that do not allow compressed
On Fri, Jul 13, 2012 at 8:11 PM, Jerome Glisse wrote:
> On Fri, Jul 13, 2012 at 8:08 PM, Marek Olšák wrote:
>> Hi Jerome,
>>
>> I couldn't open the patch, because freedesktop.org doesn't seem to
>> work for me today, it always times out.
>>
>> Anyway, non-working code shouldn't be merged into Mes
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