On Fri, Nov 22, 2013 at 8:52 AM, Axel Davy wrote:
> On 11/22/2013 01:16 AM, Kristian Høgsberg wrote:
>> I'm not sold on the nested compositor for this use case. It
>> introduces another context switch between the game and the main
>> compositor and more input and output lag. Instead I think we n
On Thu, Jun 5, 2014 at 2:39 PM, Bruno Jimenez wrote:
> On Tue, 2014-06-03 at 08:55 -0400, Alex Deucher wrote:
>> On Mon, Jun 2, 2014 at 7:34 PM, Bruno Jimenez wrote:
>> > On Mon, 2014-06-02 at 16:16 -0400, Alex Deucher wrote:
>> >> On Sat, May 31, 2014 at 7:13 A
On Tue, Jun 10, 2014 at 3:23 PM, Tom Stellard wrote:
> On Tue, Jun 10, 2014 at 08:36:05PM +0200, Bruno Jimenez wrote:
>> On Tue, 2014-06-10 at 14:10 -0400, Tom Stellard wrote:
>> > On Thu, Jun 05, 2014 at 08:39:29PM +0200, Bruno Jimenez wrote:
>> > >
>> > > With a couple of changes, it applied cle
x.)
>
> I would like to reiterate my disclaimers from the v1 commit... I don't know
> much about r600, don't have the hw, and was just going on the advice of Alex
> Deucher and Jerome Glisse. I largely copied how clipvertex was handled.
This looks good to me.
Reviewed-b
un. The r600g change has been reviewed and tested, and
> now pushed. So all ARB_viewport_array-supporting drivers should be good now.
Thanks for sticking with it.
Reviewed-by: Alex Deucher
>
> docs/GL3.txt | 2 +-
> docs/relnotes/10.3.html
ng,
> Tobias did a regression comparison to an earlier run and found no regressions.
Reviewed-by: Alex Deucher
>
> src/gallium/drivers/r600/r600_shader.c | 17 +
> 1 file changed, 17 insertions(+)
>
> diff --git a/src/gallium/drivers/r600/r600_shader.c
> b/src/gal
On Thu, Jul 3, 2014 at 11:46 AM, Aaron Watry wrote:
> On Thu, Jul 3, 2014 at 9:56 AM, Tom Stellard wrote:
>> On Wed, Jul 02, 2014 at 04:34:24PM -0500, Aaron Watry wrote:
>>> Previously, we were assuming that kernel metadata nodes only had 1 operand.
>>>
>>> Kernels which have attributes can have
On Mon, Jul 7, 2014 at 9:40 PM, Marek Olšák wrote:
> From: Marek Olšák
>
You might want to mention the bug URL that this fixes when you push.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/si_hw_context.c | 1 +
> 1 file changed, 1 insertion(+)
>
> dif
On Wed, Jul 9, 2014 at 8:38 AM, Christian König wrote:
> From: Christian König
>
> Signed-off-by: Christian König
CC stable?
Alex
> ---
> src/gallium/drivers/radeonsi/si_dma.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_dma.c
>
On Thu, Jul 17, 2014 at 6:01 AM, Michel Dänzer wrote:
> In order to try and improve X(Shm)PutImage performance with glamor, I
> implemented support for write-combined CPU mappings of BOs in GTT.
>
> This did provide a nice speedup, but to my surprise, using VRAM instead
> of write-combined GTT tur
and saves
> two instructions per sqrt emitted.
>
> It would be good if someone could test this on Cayman since it uses
> a slightly different codepath.
Reviewed-by: Alex Deucher
>
> src/gallium/drivers/r600/r600_pipe.c | 2 +-
> src/gallium/drivers/r600/r600_shader.c
On Tue, Jul 22, 2014 at 11:54 PM, Michel Dänzer wrote:
> On 21.07.2014 17:07, Christian König wrote:
>> Am 19.07.2014 03:15, schrieb Michel Dänzer:
>>> On 19.07.2014 00:47, Christian König wrote:
Am 18.07.2014 05:07, schrieb Michel Dänzer:
>>> [PATCH 5/5] drm/radeon: Use VRAM for indirect
On Wed, Jul 23, 2014 at 4:48 AM, Glenn Kennard wrote:
> Requires Evergreen or later
Reviewed-by: Alex Deucher
> ---
> Passes ARB_texture_query_lod piglits, no other regressions,
> tested on radeon 6670.
>
> docs/GL3.txt | 2 +-
> src/gallium/dri
On Wed, Jul 23, 2014 at 5:10 AM, Glenn Kennard wrote:
> Fixes fs-imulExtended, fs-imulExtended-only-msb, fs-umulExtended,
> fs-umulExtended-only-msb piglit tests.
> ---
> Tested on radeon 6670
Reviewed-by: Alex Deucher
>
> src/gallium/drivers/r600/r600_shader.c | 12
On Wed, Jul 23, 2014 at 5:36 AM, Glenn Kennard wrote:
> ---
> Together with separate MUL_HI/UMUL_HI patch this passes piglit
> ARB_gpu_shader5 integer tests.
>
> This patch trivially depends on r600g-Implement-GL_ARB_texture_query_lod
> for the TGSI_OPCODE_LODQ table entries.
ARB_sample_shading which isn't implemented yet in r600.
>
> Passes samplemaskin-basic piglit, no regressions, on radeon 6670
Reviewed-by: Alex Deucher
>
> docs/GL3.txt | 2 +-
> src/gallium/drivers/r600/evergreen_state.c | 10 ++--
>
On Wed, Jul 23, 2014 at 7:16 AM, Glenn Kennard wrote:
> Signed-off-by: Glenn Kennard
> ---
> This patch depends on Ilia Mirkin's "nvc0: add BPTC format support"
> and Neil Robert's core BPTC support patches.
Reviewed-by: Alex Deucher
>
> src/gallium
On Wed, Jul 23, 2014 at 5:57 PM, Ian Romanick wrote:
> On 07/22/2014 12:09 PM, Neil Roberts wrote:
>> diff --git a/src/mesa/main/texcompress.c b/src/mesa/main/texcompress.c
>> index 9dbfe9f..b708b49 100644
>> --- a/src/mesa/main/texcompress.c
>> +++ b/src/mesa/main/texcompress.c
>> @@ -235,6 +235,
On Thu, Jul 24, 2014 at 12:05 PM, Jan Vesely wrote:
>
> On Thu, 2014-07-24 at 17:07 +0200, Marek Olšák wrote:
>> Sorry, GL 3.1 actually only requires 1024 vec4s. The UBO extension
>> spec contains a mistake.
>>
>> Marek
>>
>> On Thu, Jul 24, 2014 at 4:55 PM, Marek Olšák wrote:
>> > OpenGL 3.1 req
On Thu, Jul 24, 2014 at 6:28 PM, wrote:
> From: Jerome Glisse
>
> The ucode we got for hawaii does not support 0x1000 special nop
> packet type 3 and this leads to gpu reading invalid memory. As packet
> type 2 still exist just use packet type 2.
>
> Note this only partialy fix hawaii issues
On Sat, Jul 26, 2014 at 6:44 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> This fixes piglit spec/!OpenGL 3.1/minmax.
>
> Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r300/r300_context.c | 4 +++-
> src/g
On Sat, Jul 26, 2014 at 6:59 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> This was just a guess - and it worked!
Reviewed-by: Alex Deucher
>
> Cc: mesa-sta...@lists.freedesktop.org
> ---
> src/gallium/drivers/radeon/r600_pipe_common.c | 8 +++-
> 1 file cha
On Fri, Jul 25, 2014 at 6:52 PM, Marek Olšák wrote:
> From: Marek Olšák
Reviewed-by: Alex Deucher
>
> ---
> src/gallium/drivers/radeon/r600_pipe_common.c | 6 --
> src/gallium/drivers/radeon/r600_pipe_common.h | 21 +++--
> src/gallium/drivers/rad
On Fri, Jul 25, 2014 at 6:52 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> This fixes the checkerboard pattern in glxgears and anything that triggers
> fast color clear.
>
> num_channels is always <= 8, but Hawaii has 16 pipes.
Reviewed-by: Alex Deucher
> ---
>
On Fri, Jul 25, 2014 at 9:30 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> This fixes "piglit/bin/arb_transform_feedback2-draw-auto instanced".
>
> Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/si_state_dr
t; of 2, because it wasn't bumped last time when a new packet was added there.
>
> Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
> src/gallium/drivers/radeonsi/si_state_draw.c | 14 +-
&g
On Thu, Jul 31, 2014 at 5:43 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> And clean up the function comment a little.
>
> Signed-off-by: Michel Dänzer
Applied the series to my 3.17 tree.
Alex
> ---
> drivers/gpu/drm/radeon/r600.c| 13 +--
> drivers/gpu/drm/radeon/radeon
On Mon, Jun 3, 2013 at 11:41 AM, Brian Paul wrote:
> On Mon, Jun 3, 2013 at 7:26 AM, Alex Deucher wrote:
>>
>> On Mon, Jun 3, 2013 at 3:22 AM, Siavash Eliasi
>> wrote:
>> > Hello dear mesa developers,
>> >
>> > What is current status of hw_gl
On Mon, Jul 22, 2013 at 1:42 PM, Paul Berry wrote:
> On 21 July 2013 23:14, Ian Romanick wrote:
>>
>> On 07/19/2013 11:48 AM, Paul Berry wrote:
>>>
>>> (TL;DR: geometry shaders are humming along, but because of a hitch I've
>>> run into, I'm going to change gears and implement GLSL 1.50-style
>>>
On Fri, Aug 2, 2013 at 5:30 AM, Andreas Boll wrote:
> Cc: "9.2" mesa-sta...@lists.freedesktop.org
Reviewed-by: Alex Deucher
> ---
> docs/relnotes/9.2.html |1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/docs/relnotes/9.2.html b/docs/relnotes/9.2.h
On Thu, Aug 8, 2013 at 1:34 PM, Marek Olšák wrote:
> On Thu, Aug 8, 2013 at 6:57 PM, Christian König
> wrote:
>> Am 08.08.2013 16:33, schrieb Marek Olšák:
>>>
>>> On Thu, Aug 8, 2013 at 3:09 PM, Christian König
>>> wrote:
Am 08.08.2013 14:38, schrieb Marek Olšák:
> .On Thu, A
Cayman and trinity systems still seem to suffer from
stability problems with GPUVM. This also fixes compute
on these asics. It can still be enabled for testing
by setting env var RADEON_VA=true.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=65958
Signed-off-by: Alex Deucher
CC: &quo
On Sat, Aug 10, 2013 at 11:09 AM, Christian König
wrote:
> Am 10.08.2013 15:53, schrieb Marek Olšák:
>
>> The RCU approach sounds good, but you can never know if 16 is enough.
>> We should release the buffer once it is full and allocate a new one.
>> The cache bufmgr in the winsys will assure ther
On Wed, Aug 14, 2013 at 11:25 PM, Marek Olšák wrote:
> (This should be applied before MSAA, which will need to be rebased.)
>
> It moves all sampler view descriptors to a buffer.
> It supports partial resource updates and it can also unbind resources
> (required for FMASK texturing).
>
> The buffe
have
> CMASK RAM, I had to take a guess based on the presence of HiZ.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r300/r300_chipset.c | 8
> src/gallium/drivers/r300/r300_chipset.h | 2 ++
> src/gallium/drivers/r300/r300_screen.c | 5 -
On Wed, Aug 21, 2013 at 12:33 PM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> They are defined as constant 0.0/0.0/1.0.
>
> Three more little piglits.
>
> Cc: mesa-sta...@lists.freedesktop.org
> Signed-off-by: Michel Dänzer
Reviewed-by: Alex Deucher
> ---
>
On Sat, Aug 24, 2013 at 5:44 AM, Christian König
wrote:
> Am 24.08.2013 03:30, schrieb Vadim Girlin:
>
>> Currently llvm backend always exports at least one color in pixel
>> shader even if no color buffers are enabled. With depth/stencil exports
>> this can result in the following code:
>>
>> EXP
IBs need to be a multiple of 4 dwords on r6xx asics
to avoid a hw bug.
Signed-off-by: Alex Deucher
CC: "9.2"
CC: "9.1"
---
src/gallium/drivers/r600/r600_hw_context.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/src/gallium/drivers/r600/r600_hw_cont
IBs need to be a multiple of 4 dwords on r6xx asics
to avoid a hw bug. Also align IBs to 8 DW to align
with the fetch size of the CP.
v2: apply to all asics, increase alignment to 8
Signed-off-by: Alex Deucher
CC: "9.2"
CC: "9.1"
---
src/gallium/drivers/r600/r6
Align IBs to 8 DW to align with the fetch
size of the CP.
Signed-off-by: Alex Deucher
CC: "9.2"
CC: "9.1"
---
src/gallium/drivers/radeonsi/r600_hw_context.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/r600_hw_cont
On Fri, Sep 6, 2013 at 4:04 PM, Marek Olšák wrote:
> The CP_STRMOUT_CNTL register was moved again.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeon/r600_cs.h | 14 +
> src/gallium/drivers/radeon/r600_streamout.c | 46
>
alignment is already handled in the gallium driver, but that
patch can be removed not that it's done in the winsys.
Signed-off-by: Alex Deucher
---
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 30 +++
1 file changed, 30 insertions(+)
diff --git a/src/gallium/w
This is now handled in the winsys.
Signed-off-by: Alex Deucher
---
src/gallium/drivers/r600/r600_pipe.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_pipe.c
b/src/gallium/drivers/r600/r600_pipe.c
index 2be5910..c684e6b 100644
--- a/src/gallium
On Sat, Sep 7, 2013 at 7:38 AM, Christian König wrote:
> Am 06.09.2013 23:00, schrieb Alex Deucher:
>
>> This aligns the gfx, compute, and dma IBs to 8 DW boundries.
>> This aligns the the IB to the fetch size of the CP for optimal
>> performance. Additionally, r6xx hard
On Wed, Sep 11, 2013 at 5:41 AM, Christian König
wrote:
> From: Christian König
>
> Signed-off-by: Christian König
For the series:
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeon/radeon_uvd.c |4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
&g
On Sun, Sep 22, 2013 at 9:48 AM, 罗勇刚(Yonggang Luo)
wrote:
> What I need to do for that.
You'd need to port the radeon drm kernel module to vxWorks to start with.
> Is that I need to port LLVM to vxWorks?
You only need llvm for compute (OpenCL) for r600g at the moment.
Alex
>
> --
> 此
On Thu, Sep 26, 2013 at 12:19 PM, Michel Dänzer wrote:
> On Don, 2013-09-26 at 03:35 +0200, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> The function r600_choose_tiling is new and needs a review.
>>
>> The only change in functionality is that it enables 2D tiling for compressed
>> textures on SI
creation of invalid
> [PATCH 3/3] radeonsi: implement 3D transfers
For the series:
Reviewed-by: Alex Deucher
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
On Thu, Feb 21, 2013 at 6:52 PM, Vadim Girlin wrote:
> v4: implement exact computation taking into account wavefront size
>
> Signed-off-by: Vadim Girlin
> ---
> src/gallium/drivers/r600/r600_asm.c| 44 +--
> src/gallium/drivers/r600/r600_asm.h| 24 --
> src/gallium/drivers
;
> Candidate for 9.1
>
> Signed-off-by: Jerome Glisse
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r600/evergreen_state.c | 10 +-
> src/gallium/drivers/r600/r600_pipe.h | 4 +++-
> src/gallium/drivers/r600/r600_state.c| 1 +
> src/
On Sat, Feb 23, 2013 at 8:27 PM, Vinson Lee wrote:
> Fixes resource leak defect reported by Coverity.
>
> Signed-off-by: Vinson Lee
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/si_state.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/
he CP DMA for R600-R700 and use streamout or async DMA instead.
I don't know what the deal is with TF2. It apparently still has
issues even if CP DMA is disabled which would use streamout or async
DMA depending on the kernel and asic.
Alex
>
> Marek
>
> On Fri, Feb 22, 2013
On Wed, Feb 27, 2013 at 6:11 PM, Marek Olšák wrote:
> Any driver can implement this simple and efficient optimization.
> Team Fortress 2 hits it always. The DISCARD_RANGE codepath is not even used
> with TF2 anymore, so we avoid a ton of useless buffer copies.
With this patch applied are you stil
ailed to
work correctly in those circumstances). Maybe a env var to
selectively enable it? I'm not pressed either way, just seems a shame
not to use it.
Alex
>
> Marek
>
> On Thu, Feb 28, 2013 at 12:46 AM, Alex Deucher wrote:
>> On Wed, Feb 27, 2013 at 6:11 PM, Marek O
On Thu, Feb 28, 2013 at 11:11 AM, Marek Olšák wrote:
> On Thu, Feb 28, 2013 at 4:26 PM, Alex Deucher wrote:
>> On Thu, Feb 28, 2013 at 4:05 AM, Marek Olšák wrote:
>>> TF2 doesn't use CP DMA with this patch at all, so I'm not seeing any
>>> issue obviously.
here we will overwrite a correct entry because
> the bo handle was the same as a flinked name.
Reviewed-by: Alex Deucher
Should probably got to stable branches as well.
Alex
> ---
> src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 8
> 1 file changed, 4 insertions(+), 4 deletions
It's that time of year again. The X.Org foundation is looking for
volunteers to organize the Google Summer of Code application for the
X.Org foundation. Historically the X.Org GSoC application has
encompassed not just X, but the entire open source graphics ecosystem
(mesa, X, kernel, wayland, etc.
index for those elements,
> which would be visible as intermittent distorted triangles.
>
> NOTE: This is a candidate for the 9.1 branch.
>
> Signed-off-by: Michel Dänzer
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/si_state_draw.c | 10 --
&
On Tue, Mar 12, 2013 at 4:23 PM, Tom Stellard wrote:
> From: Tom Stellard
>
> v2:
> - Only dump shaders when env variable is set.
A couple of comments below, other than that, looks good.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeon/radeon_llvm_util.c
ivers to pass a
> more a more detailed description of the hardware to compiler frontends.
>
> v2:
> - Adapt to libclc changes
for the series:
Reviewed-by: Alex Deucher
> ---
> src/gallium/docs/source/screen.rst |8 +-
> src/gallium/drivers/r
On Wed, Mar 13, 2013 at 3:51 PM, Christoph Bumiller
wrote:
> Second attempt, 2 years ago no one replied or cared ...
>
> We really need to know about these on nvc0 because there are only 8
> fixed hardware locations that can be overwritten by sprite coordinates,
> and one location that represents
On Thu, Mar 21, 2013 at 7:38 AM, Christian König
wrote:
> From: Christian König
>
> Signed-off-by: Christian König
> ---
> src/gallium/drivers/radeonsi/radeonsi_shader.c | 57
> +++-
> 1 file changed, 45 insertions(+), 12 deletions(-)
>
> diff --git a/src/gallium/drivers/
On Thu, Mar 21, 2013 at 12:09 PM, Christian König
wrote:
> Am 21.03.2013 15:10, schrieb Alex Deucher:
>
>> On Thu, Mar 21, 2013 at 7:38 AM, Christian König
>> wrote:
>>>
>>> From: Christian König
>>>
>>> Signed-off-by: Chris
On Thu, Mar 21, 2013 at 12:59 PM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> This helps minimize confusion / effort when moving between branches or
> helping others.
Reviewed-by: Alex Deucher
>
> Signed-off-by: Michel Dänzer
> ---
> src/gallium/drivers
On Fri, Mar 22, 2013 at 5:54 AM, Christian König
wrote:
> Am 21.03.2013 17:20, schrieb Alex Deucher:
>
>> On Thu, Mar 21, 2013 at 12:09 PM, Christian König
>> wrote:
>>>
>>> Am 21.03.2013 15:10, schrieb Alex Deucher:
>>>
>>>> On
On Mon, Mar 25, 2013 at 12:01 PM, wrote:
> From: Jerome Glisse
>
> Same as on r600, trace cs execution by writting cs offset after each
> states, this allow to pin point lockup inside command stream and
> narrow down the scope of lockup investigation.
>
> Signed-off-by: Jerome Glisse
> ---
> s
also go to the 9.1 branch.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/r600/r600_query.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_query.c
> b/src/gallium/drivers/r600/r600_query.c
> index 0335189
On Wed, Mar 27, 2013 at 7:25 AM, Michel Dänzer wrote:
> On Mit, 2013-03-27 at 12:02 +0100, Christian König wrote:
>> Am 26.03.2013 18:03, schrieb Michel Dänzer:
>> > On Die, 2013-03-26 at 17:37 +0100, Christian König wrote:
>> >> Am 26.03.2013 15:56, schrieb Michel Dänzer:
>> >>> On Die, 2013-03-2
As some of you may know, the X.Org Foundation was accepted as a GSoC
Project for 2013. If you would be interested in participating as
either a mentor or a student, please sign up here:
http://www.google-melange.com/gsoc/homepage/google/gsoc2013
For students, you can see some potential projects id
or the series:
Reviewed-by: Alex Deucher
> ---
> src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 11 +++
> src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 17 +
> src/gallium/winsys/radeon/drm/radeon_winsys.h |3 +++
> 3 files changed, 31
On Fri, Apr 12, 2013 at 4:26 AM, Christian König
wrote:
> From: Christian König
>
> Since we now have UVD support we should enable them by default.
>
> Signed-off-by: Christian König
Reviewed-by: Alex Deucher
> ---
> configure.ac |6 +++---
> 1 file changed, 3 in
On Sun, Apr 14, 2013 at 2:36 PM, Marek Olšák wrote:
> The R600 ISA documentation only says that the DX10 variants of MIN and MAX
> use DX10 handling of NaNs. It does not say anything about the non-DX10
> variants.
The difference is the NaN behavior. The dx10 versions of MIN/MAX are
NaN safe. Th
On Sun, Apr 14, 2013 at 12:55 PM, Marek Olšák wrote:
> I think the hardware doesn't care what the border color type is. I think the
> border color is "fetched" from the sampler state, which should be a memcpy.
> If no texels are fetched from the texture, the border color is copied to the
> destina
On Sun, Apr 14, 2013 at 6:04 PM, Roland Scheidegger wrote:
> Am 14.04.2013 23:44, schrieb Alex Deucher:
>> On Sun, Apr 14, 2013 at 2:36 PM, Marek Olšák wrote:
>>> The R600 ISA documentation only says that the DX10 variants of MIN and MAX
>>> use DX10 handling of NaN
On Tue, Apr 16, 2013 at 2:46 AM, Vadim Girlin wrote:
> On 04/15/2013 11:22 PM, Martin Andersson wrote:
>>
>> There is a hardware bug on Cayman where a BREAK/CONTINUE followed by
>> LOOP_STARTxxx for nested loops may put the branch stack into a state
>> such that ALU_PUSH_BEFORE doesn't work as exp
On Tue, Apr 16, 2013 at 12:40 AM, Vadim Girlin wrote:
> Signed-off-by: Vadim Girlin
Should probably be marked for the 9.1 branch as well.
Reviewed-by: Alex Deucher
> ---
> src/gallium/include/state_tracker/st_api.h | 1 +
> src/gallium/state_trackers/dri/common/dri_c
On Tue, Nov 26, 2013 at 1:22 PM, Siavash Eliasi wrote:
In general, when you fix problems in prior patches, you should
integrate the fix into the original patch(es) where the problems were,
update the commit message to note what bugs were fixed and then
re-send the patch set. That prevents broken
On Tue, Dec 3, 2013 at 3:33 PM, Andreas Hartmetz wrote:
> Reduce scope of variables and divide the code more clearly into
> sections dealing with one thing.
> ---
> src/gallium/drivers/radeonsi/si_state.c | 38
> +++--
> 1 file changed, 22 insertions(+), 16 deletions(
On Tue, Dec 3, 2013 at 3:33 PM, Andreas Hartmetz wrote:
> ---
> src/gallium/drivers/radeonsi/si_state.c | 28 +++-
> 1 file changed, 27 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_state.c
> b/src/gallium/drivers/radeonsi/si_state.c
> inde
On Tue, Dec 3, 2013 at 3:33 PM, Andreas Hartmetz wrote:
> ---
> src/gallium/drivers/radeon/r600_texture.c | 84
> +--
> 1 file changed, 68 insertions(+), 16 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_texture.c
> b/src/gallium/drivers/radeon/r600_te
On Tue, Dec 3, 2013 at 5:59 PM, Matt Turner wrote:
> On Tue, Dec 3, 2013 at 2:56 PM, Alex Deucher wrote:
>> On Tue, Dec 3, 2013 at 3:33 PM, Andreas Hartmetz wrote:
>>> Reduce scope of variables and divide the code more clearly into
>>> sections dealing with one thin
On Tue, Dec 3, 2013 at 11:38 PM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> Signed-off-by: Michel Dänzer
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/radeonsi_pipe.c | 1 -
> src/gallium/drivers/radeonsi/radeonsi_shader.c | 5 +
> 2 files
d paste leftover from r600g.
Alex
>
>
> 2013/12/4 Alex Deucher
>>
>> On Tue, Dec 3, 2013 at 11:38 PM, Michel Dänzer wrote:
>> > From: Michel Dänzer
>> >
>> > Signed-off-by: Michel Dänzer
>>
>> Reviewed-by: Alex Deucher
>>
>&g
On Mon, Dec 2, 2013 at 9:46 PM, Tom Stellard wrote:
> From: Tom Stellard
>
> CC: "9.2" "10.0"
For the series:
Reviewed-by: Alex Deucher
> ---
> .../r300/compiler/tests/radeon_compiler_regalloc_tests.c | 11
> +--
> 1 file changed,
On Mon, Dec 9, 2013 at 11:02 AM, Tom Stellard wrote:
> Hi,
>
> The first two patches register the R600EmitClauseMarkers and
> AMDGPUCFGStructurizer passes, so that -print-*-all will now work with
> them. The third patch is a cleanup of Processors.td and the fourth
> patch adds the wavefront size
On Tue, Dec 17, 2013 at 6:49 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> This may fix the GPU crashes.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/si_state.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/src/gallium/drivers/rade
On Tue, Dec 17, 2013 at 7:54 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> Also needed for the DB in-place decompression according to hw docs.
Makes sense.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/si_state.c | 11 ---
> 1 file changed,
On Wed, Dec 18, 2013 at 1:11 PM, Niels Ole Salscheider
wrote:
> Signed-off-by: Niels Ole Salscheider
Reviewed-by: Alex Deucher
> ---
> src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 20 +---
> 1 file changed, 5 insertions(+), 15 deletions(-)
>
> diff -
On Sun, Jan 5, 2014 at 6:53 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> NUM_BANKS is not constant on CIK.
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/si_state.c | 23
> +++
> src/gallium/winsys/radeon/drm/rad
On Mon, Jan 6, 2014 at 10:15 AM, Bruno Jiménez wrote:
> ---
> src/gallium/drivers/r600/compute_memory_pool.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/src/gallium/drivers/r600/compute_memory_pool.c
> b/src/gallium/drivers/r600/compute_memory_pool.c
> index 7a7b057..62d1a5c
On Mon, Jan 6, 2014 at 10:15 AM, Bruno Jiménez wrote:
> In this case, NULL checks are added to compute_memory_grow_pool,
> so it returns -1 when it fails. This makes necesary
> to handle such cases in compute_memory_finalize_pending
> when it is needed to grow the pool
Same comment as 2/5. Pleas
hich will map well to ARB_viewport_array.
>
> Also, we don't need to write SC_WINDOW_OFFSET with this commit, because it's
> disabled everywhere.
Just one small comment below, otherwise:
Reviewed-by: Alex Deucher
> ---
> src/gallium/drivers/radeonsi/si_state.c | 54
7;s harmless because the function is
> never called through the incorrectly typed pointer.
>
> Signed-off-by: Ian Romanick
> Cc: Alex Deucher
> Cc: Marek Olšák
For the series:
Reviewed-by: Alex Deucher
> ---
> src/mesa/drivers/dri/radeon/radeon_common.c | 3 +--
> 1
On Fri, Jan 17, 2014 at 6:19 AM, Lucas Stach wrote:
> Use same names as the kernel, makes it easier to identify
> connectors in the common case.
>
> Signed-off-by: Lucas Stach
Reviewed-by: Alex Deucher
If there are no other comments, I'll apply this later today.
> --
On Fri, Jan 24, 2014 at 5:18 PM, Ian Romanick wrote:
> From: Ian Romanick
>
> Otherwise an application that requested an OpenGL ES 1.x context would
> actually get a desktop OpenGL context.
>
> Signed-off-by: Ian Romanick
> Cc: "9.1 9.2 10.0"
patches 4-7
On Fri, Jan 24, 2014 at 9:17 AM, Alex Deucher wrote:
> On Fri, Jan 17, 2014 at 6:19 AM, Lucas Stach wrote:
>> Use same names as the kernel, makes it easier to identify
>> connectors in the common case.
>>
>> Signed-off-by: Lucas Stach
>
> Reviewed-by: Alex D
On Mon, Jan 27, 2014 at 9:05 AM, Tom Stellard wrote:
> From: Tom Stellard
>
> This is necessary to prevent the next SURFACE_SYNC packet from
> hanging the GPU.
>
> https://bugs.freedesktop.org/show_bug.cgi?id=73418
>
> CC: "9.2" "10.0"
Reviewed-by:
On Mon, Jan 27, 2014 at 3:08 PM, Brian Paul wrote:
> From: Brian Paul
>
> Otherwise, ctx was a garbage value.
>
> CC: "10.0"
For the series:
Reviewed-by: Alex Deucher
> ---
> src/mesa/drivers/dri/r200/r200_context.c | 5 +++--
> 1 file changed, 3 inse
On Mon, Mar 31, 2014 at 2:43 PM, Ilia Mirkin wrote:
> On Mon, Mar 31, 2014 at 2:39 PM, Benjamin Bellec wrote:
>> Hi,
>>
>> Correct me if I'm wrong, it looks like EXT_draw_buffers2 (OpenGL 3.0) is
>> not enabled on Radeon HD2900 (R600 codename) due to hardware limitation.
>> I have no R600 card to
On Wed, Apr 2, 2014 at 9:09 AM, Leo Liu wrote:
> From: Leo Liu
>
> This reverts commit 96e8b916a7a39a9ba58e92d1ad77b5501de63ac7.
> In the case of VCE encoding with raw YUV file, CPU load directly
> to VRAM is faster than combination of CPU writing to GTT and
> then blit to VRAM with GPU.
Why was
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