On Wed, Jul 23, 2014 at 5:10 AM, Glenn Kennard <glenn.kenn...@gmail.com> wrote:
> Fixes fs-imulExtended, fs-imulExtended-only-msb, fs-umulExtended,
> fs-umulExtended-only-msb piglit tests.
> ---
> Tested on radeon 6670
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
>
> src/gallium/drivers/r600/r600_shader.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_shader.c
> b/src/gallium/drivers/r600/r600_shader.c
> index db928f3..6ba9c0f 100644
> --- a/src/gallium/drivers/r600/r600_shader.c
> +++ b/src/gallium/drivers/r600/r600_shader.c
> @@ -6666,8 +6666,8 @@ static struct r600_shader_tgsi_instruction
> r600_shader_tgsi_instruction[] = {
> {TGSI_OPCODE_TEX2, 0, FETCH_OP_SAMPLE, tgsi_tex},
> {TGSI_OPCODE_TXB2, 0, FETCH_OP_SAMPLE_LB, tgsi_tex},
> {TGSI_OPCODE_TXL2, 0, FETCH_OP_SAMPLE_L, tgsi_tex},
> - {TGSI_OPCODE_IMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported},
> - {TGSI_OPCODE_UMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported},
> + {TGSI_OPCODE_IMUL_HI, 0, ALU_OP2_MULHI_INT, tgsi_op2_trans},
> + {TGSI_OPCODE_UMUL_HI, 0, ALU_OP2_MULHI_UINT, tgsi_op2_trans},
> {TGSI_OPCODE_TG4, 0, FETCH_OP_GATHER4, tgsi_unsupported},
> {TGSI_OPCODE_LAST, 0, ALU_OP0_NOP, tgsi_unsupported},
> };
> @@ -6861,8 +6861,8 @@ static struct r600_shader_tgsi_instruction
> eg_shader_tgsi_instruction[] = {
> {TGSI_OPCODE_TEX2, 0, FETCH_OP_SAMPLE, tgsi_tex},
> {TGSI_OPCODE_TXB2, 0, FETCH_OP_SAMPLE_LB, tgsi_tex},
> {TGSI_OPCODE_TXL2, 0, FETCH_OP_SAMPLE_L, tgsi_tex},
> - {TGSI_OPCODE_IMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported},
> - {TGSI_OPCODE_UMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported},
> + {TGSI_OPCODE_IMUL_HI, 0, ALU_OP2_MULHI_INT, tgsi_op2_trans},
> + {TGSI_OPCODE_UMUL_HI, 0, ALU_OP2_MULHI_UINT, tgsi_op2_trans},
> {TGSI_OPCODE_TG4, 0, FETCH_OP_GATHER4, tgsi_tex},
> {TGSI_OPCODE_LAST, 0, ALU_OP0_NOP, tgsi_unsupported},
> };
> @@ -7057,8 +7057,8 @@ static struct r600_shader_tgsi_instruction
> cm_shader_tgsi_instruction[] = {
> {TGSI_OPCODE_TEX2, 0, FETCH_OP_SAMPLE, tgsi_tex},
> {TGSI_OPCODE_TXB2, 0, FETCH_OP_SAMPLE_LB, tgsi_tex},
> {TGSI_OPCODE_TXL2, 0, FETCH_OP_SAMPLE_L, tgsi_tex},
> - {TGSI_OPCODE_IMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported},
> - {TGSI_OPCODE_UMUL_HI, 0, ALU_OP0_NOP, tgsi_unsupported},
> + {TGSI_OPCODE_IMUL_HI, 0, ALU_OP2_MULHI_INT, cayman_mul_int_instr},
> + {TGSI_OPCODE_UMUL_HI, 0, ALU_OP2_MULHI_UINT, cayman_mul_int_instr},
> {TGSI_OPCODE_TG4, 0, FETCH_OP_GATHER4, tgsi_tex},
> {TGSI_OPCODE_LAST, 0, ALU_OP0_NOP, tgsi_unsupported},
> };
> --
> 1.8.3.2
>
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