On Wed, Dec 18, 2013 at 1:11 PM, Niels Ole Salscheider
<niels_...@salscheider-online.de> wrote:
> Signed-off-by: Niels Ole Salscheider <niels_...@salscheider-online.de>
Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>
> ---
> src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 20 +++++---------------
> 1 file changed, 5 insertions(+), 15 deletions(-)
>
> diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
> b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
> index acb12b2..d8ad297 100644
> --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
> +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
> @@ -482,22 +482,12 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs
> *rcs, unsigned flags, ui
> /* pad DMA ring to 8 DWs to meet CP fetch alignment requirements
> * r6xx, requires at least 4 dw alignment to avoid a hw bug.
> */
> - if (flags & RADEON_FLUSH_COMPUTE) {
> - if (cs->ws->info.chip_class <= SI) {
> - while (rcs->cdw & 7)
> - OUT_CS(&cs->base, 0x80000000); /* type2
> nop packet */
> - } else {
> - while (rcs->cdw & 7)
> - OUT_CS(&cs->base, 0xffff1000); /* type3
> nop packet */
> - }
> + if (cs->ws->info.chip_class <= SI) {
> + while (rcs->cdw & 7)
> + OUT_CS(&cs->base, 0x80000000); /* type2 nop
> packet */
> } else {
> - if (cs->ws->info.chip_class <= SI) {
> - while (rcs->cdw & 7)
> - OUT_CS(&cs->base, 0x80000000); /* type2
> nop packet */
> - } else {
> - while (rcs->cdw & 7)
> - OUT_CS(&cs->base, 0xffff1000); /* type3
> nop packet */
> - }
> + while (rcs->cdw & 7)
> + OUT_CS(&cs->base, 0xffff1000); /* type3 nop
> packet */
> }
> break;
> case RING_UVD:
> --
> 1.8.5.1
>
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