Before d31f98a272e429d and 56e2bdbca36a20 we had a sigle index space for UBOs
and SSBOs, so NumBufferInterfaceBlocks would contain the combined number of
blocks, not just one kind. This means that for shader programs using both
UBOs and SSBOs, we were setting num_ssbos and num_ubos to a larger numb
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 05f3f63..7afcd5b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/
---
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 0025f36..ea1e3e7 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/
https://bugs.freedesktop.org/show_bug.cgi?id=92467
Bug ID: 92467
Summary: Program for dumping images crashes at OSMesa library
giving floating exception in Linux(OpenSuse 13.2 and
Centos 6.6)
Product: Mesa
Version
On Sun, 2015-10-04 at 18:45 +1100, Timothy Arceri wrote:
> This is more optimal as it means we no longer have to upload the same
> set
> of Atomic Buffer Object surfaces to all stages in the program.
>
> This also fixes a bug where since commit c0cd5b var->data.binding was
> being used as a replac
Ping
On Sun, Oct 11, 2015 at 3:09 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> I'll let drivers figure out how to do it.
> ---
> src/gallium/docs/source/screen.rst | 2 ++
> src/gallium/drivers/freedreno/freedreno_screen.c | 1 +
> src/gallium/drivers/i915/i915_screen.c
On 3 October 2015 at 12:19, Emil Velikov wrote:
> On 3 October 2015 at 02:12, Marek Olšák wrote:
>> I'm not sure if this is correct or if we should just return NULL in
>> this case like the "case" statement above that does.
>>
> Actually I was thinking about bailing out when the requested attribu
On 11 October 2015 at 12:49, Mauro Rossi wrote:
> i965_compile_FILES need to be built, in order to avoid following building
> errors:
>
> target SharedLib: i915_dri
> (out/target/product/x86/obj/SHARED_LIBRARIES/i915_dri_intermediates/LINKED/i915_dri.so)
> external/mesa/src/mesa/drivers/dri/i965
On 12 October 2015 at 16:36, Chih-Wei Huang wrote:
> Signed-off-by: Chih-Wei Huang
> ---
> src/mesa/Android.libmesa_dricore.mk | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/mesa/Android.libmesa_dricore.mk
> b/src/mesa/Android.libmesa_dricore.mk
> index 2e308b8..fe
Alejandro Piñeiro writes:
> ---
>
> This patch implements the idea proposed by Francisco Jerez. With this
> change, even adding the new condition pointed by Matt Turner on the
> "2/5 i965/vec4: adding vec4_cmod_propagation optimization", the shader-db
> numbers remain the same. So this patch woul
Ping, could you please push this patch? It's a pain to use the optimise
debug output without it. Thanks.
Reviewed-by: Neil Roberts
- Neil
Jason Ekstrand writes:
> This has the better name to use. Aparently, sh->Name is usually 0.
> ---
> src/glsl/nir/glsl_to_nir.cpp | 2 +-
> 1 file changed,
On 10/14/2015 06:54 PM, Eric Anholt wrote:
Brian Paul writes:
---
src/mesa/main/blend.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/blend.c b/src/mesa/main/blend.c
index d225f3d..f14949f 100644
--- a/src/mesa/main/blend.c
+++ b/src/mesa/main/blend.c
@@
On 10/14/2015 06:57 PM, Eric Anholt wrote:
Brian Paul writes:
We can skip to the end of _mesa_update_state_locked() if only the
_NEW_LINE flag is set since none of the derived state depends on it
(just like _NEW_CURRENT_ATTRIB). Note that we still call the
ctx->Driver.UpdateState() function,
Silences 5 warnings of the type:
state_tracker/st_cb_program.c: In function 'st_new_program':
state_tracker/st_cb_program.c:108:7: warning: passing argument 1 of
'_mesa_init_gl_program' from incompatible pointer type [enabled by default]
return _mesa_init_gl_program(&prog->Base, target, id);
---
src/glsl/ast_to_hir.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index cd40fe3..ede02d9 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -2017,6 +2017,9 @@ ast_expression::has_sequence_subexpression() const
On 15 October 2015 at 14:27, Brian Paul wrote:
> Silences 5 warnings of the type:
> state_tracker/st_cb_program.c: In function 'st_new_program':
> state_tracker/st_cb_program.c:108:7: warning: passing argument 1 of
> '_mesa_init_gl_program' from incompatible pointer type [enabled by default]
>
Instead of just running a couple of the possible optimisations in one
single iteration, it now runs the whole loop again after lowering the
load payloads. According to shader-db this gives:
total instructions in shared programs: 6493365 -> 6493289 (-0.00%)
instructions in affected programs: 16
> -Original Message-
> From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> Sent: Wednesday, October 07, 2015 1:53 PM
> To: Predut, Marius
> Cc: mesa-dev@lists.freedesktop.org
> Subject: Re: [Mesa-dev] [PATCH] i915/aa: fixing anti-aliasing bug for thinnest
> width lines
>
> On Mon,
Thanks a lot.
Tested-by: Marek Olšák
Marek
On Thu, Oct 15, 2015 at 5:16 AM, Timothy Arceri wrote:
> This was only being done in one of the two process methods.
>
> Fixes issue with samplers using the array size of a previous record.
>
> Cc: Marek Olšák
> Cc: Jason Ekstrand
> ---
> src/glsl/
On Oct 14, 2015 10:48 PM, "Pohjolainen, Topi"
wrote:
>
> On Wed, Oct 14, 2015 at 11:53:37AM -0700, Jason Ekstrand wrote:
> > On Wed, Oct 14, 2015 at 1:41 AM, Pohjolainen, Topi
> > wrote:
> > > On Wed, Oct 14, 2015 at 11:25:40AM +0300, Pohjolainen, Topi wrote:
> > >> On Sat, Oct 10, 2015 at 08:09:
On Thu, Oct 15, 2015 at 6:03 AM, Neil Roberts wrote:
> Ping, could you please push this patch? It's a pain to use the optimise
> debug output without it. Thanks.
Pushed! Sorry that took so long. I was off doing other things.
> Reviewed-by: Neil Roberts
Thanks.
> - Neil
>
> Jason Ekstrand w
Any comment or is this okay with people? Given, "(1-t)*a + t*b", the
original code didn't return b for t=1 because it's "floating-point".
Marek
On Sun, Oct 11, 2015 at 3:29 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> The previous version has precision issues. This can be a problem
> with tes
Fixes assertion failure with new piglit
arb_draw_buffers_blend-state_set_get test.
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/main/dlist.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/dlist.c b/src/mesa/main/dlist.c
index fdb839c..2b65b2e 100644
--- a/
---
src/mesa/main/dlist.c | 46 ++
1 file changed, 46 insertions(+)
diff --git a/src/mesa/main/dlist.c b/src/mesa/main/dlist.c
index e8059c7..fdb839c 100644
--- a/src/mesa/main/dlist.c
+++ b/src/mesa/main/dlist.c
@@ -9741,6 +9741,46 @@ print_list(struct
On Sun, Oct 11, 2015 at 03:29:43AM +0200, Marek Olšák wrote:
> From: Marek Olšák
>
> This removes "v_mov v0, 0" which typically occurs before exports.
>
Reviewed-by: Tom Stellard
> Totals:
> SGPRS: 345216 -> 344552 (-0.19 %)
> VGPRS: 197684 -> 197132 (-0.28 %)
> Code Size: 7390408 -> 7375376
On Sun, Oct 11, 2015 at 03:29:44AM +0200, Marek Olšák wrote:
> From: Marek Olšák
>
Reviewed-by: Tom Stellard
> No difference according to shader-db.
> ---
> src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/
On Sun, Oct 11, 2015 at 03:29:45AM +0200, Marek Olšák wrote:
> From: Marek Olšák
>
Reviewed-by: Tom Stellard
> No difference according to shader-db. (with the new S_ABS_I32 pattern)
> ---
> .../drivers/radeon/radeon_setup_tgsi_llvm.c| 60
> ++
> 1 file changed, 50
On Sun, Oct 11, 2015 at 03:29:47AM +0200, Marek Olšák wrote:
> From: Marek Olšák
>
Reviewed-by: Tom Stellard
> The increase in VGPRs in unfortunate, but the decrease in the scratch size
> is always welcome.
>
> Totals:
> SGPRS: 344552 -> 344368 (-0.05 %)
> VGPRS: 197132 -> 197552 (0.21 %)
> C
On Thu, Oct 15, 2015 at 02:19:09PM +, Predut, Marius wrote:
> > -Original Message-
> > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com]
> > Sent: Wednesday, October 07, 2015 1:53 PM
> > To: Predut, Marius
> > Cc: mesa-dev@lists.freedesktop.org
> > Subject: Re: [Mesa-dev] [PATC
On Thu, Oct 15, 2015 at 12:18 AM, Iago Toral Quiroga wrote:
> Before d31f98a272e429d and 56e2bdbca36a20 we had a sigle index space for UBOs
> and SSBOs, so NumBufferInterfaceBlocks would contain the combined number of
> blocks, not just one kind. This means that for shader programs using both
> UB
On Sun, Oct 11, 2015 at 03:29:48AM +0200, Marek Olšák wrote:
> From: Marek Olšák
>
I don't think we should globally enable this until we are sure it does not
introduce any illegal transforms.
> Required for 1/sqrt ==> rsq.
I think the arcp fast-math flag for instruction is supposed to allow th
Am 15.10.2015 um 16:44 schrieb Marek Olšák:
> Any comment or is this okay with people? Given, "(1-t)*a + t*b", the
> original code didn't return b for t=1 because it's "floating-point".
>
> Marek
>
> On Sun, Oct 11, 2015 at 3:29 AM, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> The previous ver
On Thu, 2015-10-15 at 08:06 -0700, Jason Ekstrand wrote:
> On Thu, Oct 15, 2015 at 12:18 AM, Iago Toral Quiroga
> wrote:
> > Before d31f98a272e429d and 56e2bdbca36a20 we had a sigle index space for
> > UBOs
> > and SSBOs, so NumBufferInterfaceBlocks would contain the combined number of
> > block
On 15/10/15 14:38, Francisco Jerez wrote:
> Alejandro Piñeiro writes:
>
>> ---
>>
>> This patch implements the idea proposed by Francisco Jerez. With this
>> change, even adding the new condition pointed by Matt Turner on the
>> "2/5 i965/vec4: adding vec4_cmod_propagation optimization", the sha
Link with libmesa_dricore to get '_mesa_uint_array_min_max'
from sse_minmax.c if defined USE_SSE41.
Signed-off-by: Chih-Wei Huang
---
src/gallium/targets/dri/Android.mk | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/targets/dri/Android.mk
b/src/gallium/targets/dri/Android.mk
in
Here are some patches to fix building errors on
Android 6.0 Marshmallow.
Tested OK with Android-x86 marshmallow-x86 branch.
Chih-Wei Huang (3):
nv50/ir: use C++11 standard std::unordered_map if possible
android: gallium_dri: fix a linking error
nouveau: nv30: include the header of ffs proto
Note Android version before Lollipop is not supported.
Signed-off-by: Chih-Wei Huang
---
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
b/src/gallium/
It fixes a building error of the android 6.0 64-bit target.
Signed-off-by: Chih-Wei Huang
---
src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c
b/src/gallium/drivers/nouveau/nv30/nvfx_vertprog.c
On Wed, Oct 14, 2015 at 12:51 AM, Alejandro Piñeiro
wrote:
> On 13/10/15 23:36, Matt Turner wrote:
>> The good news is that, unless I've done something wrong, this doesn't
>> affect any shaders in shader-db on ILK or HSW (I only tested those
>> two, but I expect the results are the same everywhere
On Wed, Oct 14, 2015 at 2:11 PM, Alejandro Piñeiro wrote:
> This include the same tests coming from test_fs_cmod_propagation, (non
> vector glsl types included) plus some new with vec4 types, inspired on
> the regressions found while the optimization was a work in progress.
>
> Additionally, the c
On Sat, Oct 10, 2015 at 4:24 AM, Alejandro Piñeiro wrote:
> The complete way to do this would be parse INTEL_DEBUG and
> print the output if DEBUG_VS (or a new one) is present
> (see intel_debug.c).
>
> But that seems like an overkill for the unit tests, that
> after all, the most common use case
This patch and the nv30 one are both
Reviewed-by: Ilia Mirkin
I guess adding a cc: stable makes sense for these too? Or are further
fixes required that would make building 11.0.x impractical?
On Thu, Oct 15, 2015 at 11:46 AM, Chih-Wei Huang
wrote:
> Note Android version before Lollipop is not
On Sat, Oct 10, 2015 at 4:24 AM, Alejandro Piñeiro wrote:
> ---
>
> I found this useful while I was using INTEL_DEBUG=optimizer after
> changing how the ifs are emitted. And after all, that info is
> also included by brw_disasm.c
Definitely.
> I assumed that at the vec4_visitor we would not need
On Sat, Oct 10, 2015 at 4:24 AM, Alejandro Piñeiro wrote:
> This series implements a vec4 equivalent to fs_cmod_propagation optimization.
>
> The last two commits are not really needed for the optimization, are just
> nice-to-have (imho) that I added while implementing the optimization.
>
> Alejan
nir_variable_create already inserts it in the right list for us so
inserting it again causes a linked list corruption.
---
src/mesa/program/prog_to_nir.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c
index f
2015-10-16 0:11 GMT+08:00 Ilia Mirkin :
> This patch and the nv30 one are both
>
> Reviewed-by: Ilia Mirkin
Thank you for the review.
> I guess adding a cc: stable makes sense for these too? Or are further
> fixes required that would make building 11.0.x impractical?
Ah, yes. They apply to 11.0
Reviewed-by: Matt Turner
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
From: Rob Clark
I noticed the FD_MESA_DEBUG=help numeric flags output was looking kinda
funny.
Signed-off-by: Rob Clark
---
src/gallium/auxiliary/util/u_debug.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_debug.c
b/src/gallium/auxilia
Signed-off-by: Ilia Mirkin
---
v1 -> v2: Take Michel's suggestion to include mesa in the st list, append others
configure.ac | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index 217281f..0a33290 100644
--- a/configure.ac
+++ b/config
Reviewed-by: Marek Olšák
Marek
On Thu, Oct 15, 2015 at 7:32 PM, Rob Clark wrote:
> From: Rob Clark
>
> I noticed the FD_MESA_DEBUG=help numeric flags output was looking kinda
> funny.
>
> Signed-off-by: Rob Clark
> ---
> src/gallium/auxiliary/util/u_debug.c | 6 +++---
> 1 file changed, 3 in
Roland was on PTO.
IMO, the change makes sense from a numeric accuracy POV.
I fear this might cause some slowdown with llvmpipe (two muls intead of
one), but hopefully it won't be significant. The accuracy issue could
cause glitches to llvmpipe too.
Jose
On 15/10/15 15:44, Marek Olšák wrot
On 15/10/15 16:20, Roland Scheidegger wrote:
Am 15.10.2015 um 16:44 schrieb Marek Olšák:
Any comment or is this okay with people? Given, "(1-t)*a + t*b", the
original code didn't return b for t=1 because it's "floating-point".
Marek
On Sun, Oct 11, 2015 at 3:29 AM, Marek Olšák wrote:
From: M
Before, if make_texture() or st_create_texture_sampler_view() failed
we silently no-op'd the glDrawPixels. Now, set GL_OUT_OF_MEMORY.
This also allows us to un-nest a bunch of code.
---
src/mesa/state_tracker/st_cb_drawpixels.c | 74 +--
1 file changed, 40 insertions(+
Whenever we got a glColor, glNormal, glTexCoord, etc. call outside a
glBegin/End pair, we'd immediately map a vertex buffer to begin
accumulating vertex data. In some cases, such as with display lists,
this led to excessive vertex buffer mapping. For example, if we have
a display list such as:
g
So that we can use it directly from the mesa/gallium state tracker.
---
src/mesa/main/texstore.c | 40
src/mesa/main/texstore.h | 11 +++
2 files changed, 31 insertions(+), 20 deletions(-)
diff --git a/src/mesa/main/texstore.c b/src/mesa/main/texst
If we didn't find a gallium surface format that exactly matched the
glDrawPixels format/type combination, we used some other 32-bit packed
RGBA format and swizzled the whole image in the mesa texstore/format code.
That slow path can be avoided in some common cases by using the
pipe_samper_view's s
---
src/mesa/state_tracker/st_cb_drawpixels.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c
b/src/mesa/state_tracker/st_cb_drawpixels.c
index 7e8633e..e4d3580 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/st
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 34 ++
src/mesa/drivers/dri/i965/brw_vs.c | 34 --
2 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i965/b
This patch applies on top of my previous series to shuffle a bunch of
the compiler code around.
On Thu, Oct 15, 2015 at 12:05 PM, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_vec4.cpp | 34
> ++
> src/mesa/drivers/dri/i965/brw_vs.c | 34
>
Hi Brian!
I'm a new Mesa developer in Intel's OTC graphics team (although not new
to open source, I've been a Linux kernel developer for the last seven
years).
I heard that you're responsible for updating mesa3d.org documentation
against the docs in the Mesa source code repo. I noticed the docs a
On 10/15/2015 01:18 PM, Sarah Sharp wrote:
Hi Brian!
Hi Sarah,
I'm a new Mesa developer in Intel's OTC graphics team (although not new
to open source, I've been a Linux kernel developer for the last seven
years).
I heard that you're responsible for updating mesa3d.org documentation
against
On 15/10/15 18:19, Matt Turner wrote:
> On Sat, Oct 10, 2015 at 4:24 AM, Alejandro Piñeiro
> wrote:
>> This series implements a vec4 equivalent to fs_cmod_propagation optimization.
>>
>> The last two commits are not really needed for the optimization, are just
>> nice-to-have (imho) that I adde
From: Ian Romanick
Previously we could create a renderbuffer with format
MESA_FORMAT_R8G8B8A8_UNORM, convert that renderbuffer to an EGLImage,
then FAIL to convert the EGLImage back to a renderbuffer because
reasons. Just use the same check in
intel_image_target_renderbuffer_storage that brw_ren
On 15 October 2015 at 18:55, Ilia Mirkin wrote:
> Signed-off-by: Ilia Mirkin
> ---
>
> v1 -> v2: Take Michel's suggestion to include mesa in the st list, append
> others
>
Was meaning to suggest the latter :-)
IIRC Matt felt against these a while back, while personally I'm
ambivalent if we have
On Wed, Oct 14, 2015 at 11:30 AM, Matt Turner wrote:
> NIR considers bcsel to produce and consume unsigned types, leading to
> SEL instructions operating on unsigned types when the data is really
> floating-point. Previous to this patch, saturate propagation would
> happily transform
>
>(+f0)
On Wed, Oct 14, 2015 at 11:30 AM, Matt Turner wrote:
> Make them members of fs_inst/vec4_instruction for use elsewhere.
>
> Also fix the fs version to check that dst.type == src[1].type and for
> !saturate.
Reviewed-by: Jason Ekstrand
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp
On Thu, Oct 15, 2015 at 01:34:54PM -0600, Brian Paul wrote:
> On 10/15/2015 01:18 PM, Sarah Sharp wrote:
> >1. What's the process for pushing updated documentation to the site?
>
> All the website pages are found in the git docs/ directory. Changes are
> submitted as patches and reviewed like cod
On Thu, 2015-10-15 at 07:27 -0600, Brian Paul wrote:
Reviewed-by: Timothy Arceri
> ---
> src/glsl/ast_to_hir.cpp | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> index cd40fe3..ede02d9 100644
> --- a/src/glsl/ast_to_hir.cpp
> +++ b
On Tue, Oct 13, 2015 at 12:15 PM, Emil Velikov wrote:
> On 13 October 2015 at 16:37, Rob Clark wrote:
>> On Tue, Oct 13, 2015 at 11:22 AM, Emil Velikov
>> wrote:
>>> Hi Rob,
>>>
>>> On 10 October 2015 at 19:47, Rob Clark wrote:
From: Rob Clark
Move glsl_types into NIR, now that
Hi all,
The X.Org board is solicting further proposals to organize XDC
somewhere in Europe. The board has already received a proposal for
Helsinki and plans to vote on that in the next meeting on the 29th
Oct, but if there is anyone else interested in hosting XDC we'd very
much like to hear about
Often, shader inputs/outputs are required to be aligned to vec4 slots
for one reason or another. When working with the scalar backend, we
want to count the number of scalar components, yet still respect the
vec4 packing rules as required.
The new "hybrid" type_size_4x() function pads everything o
The scalar VS backend has never handled float[] and vec2[] outputs
correctly (my original code was broken). Outputs need to be padded
out to vec4 slots.
In fs_visitor::nir_setup_outputs(), we tried to process each vec4 slot
by looping from 0 to ALIGN(type_size_scalar(type), 4) / 4. However,
this
VS, GS, and FS continue doing the same thing they did before. We can
simplify the FS code a bit because it is always scalar.
Compute shaders now assert that there are no outputs instead of doing
a loop over 0 outputs.
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
---
src
On Thursday, October 15, 2015 03:17:19 PM Kenneth Graunke wrote:
> VS, GS, and FS continue doing the same thing they did before. We can
> simplify the FS code a bit because it is always scalar.
>
> Compute shaders now assert that there are no outputs instead of doing
> a loop over 0 outputs.
>
>
Marek made core Mesa call ProgramStringNotify(), which solves this
properly. The hack is no longer needed.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_vs.c | 12
1 file changed, 12 deletions(-)
Thanks, Marek!
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c
b
On Thu, Oct 15, 2015 at 2:01 PM, Ian Romanick wrote:
> From: Ian Romanick
>
> Previously we could create a renderbuffer with format
> MESA_FORMAT_R8G8B8A8_UNORM, convert that renderbuffer to an EGLImage,
> then FAIL to convert the EGLImage back to a renderbuffer because
> reasons. Just use the s
On Thu, Oct 15, 2015 at 3:27 PM, Sarah Sharp
wrote:
> On Thu, Oct 15, 2015 at 01:34:54PM -0600, Brian Paul wrote:
> > On 10/15/2015 01:18 PM, Sarah Sharp wrote:
> > >1. What's the process for pushing updated documentation to the site?
> >
> > All the website pages are found in the git docs/ direc
On Monday, October 12, 2015 02:55:32 PM Kenneth Graunke wrote:
> +void
> +fs_visitor::emit_gs_input_load(const fs_reg &dst,
> + const nir_src &vertex_src,
> + unsigned input_offset,
> + unsigned num_components
Hi Christian,
I'm glad to see Thierry's work revived. Hopefully this will soon be
the basis of many more drivers.
On 11 October 2015 at 16:09, Christian Gmeiner
wrote:
> This commit adds a generic renderonly driver library, which fullfille
> the requirements for tegra and etnaviv. As a result it
On Thu, Oct 15, 2015 at 6:17 PM, Kenneth Graunke wrote:
> Often, shader inputs/outputs are required to be aligned to vec4 slots
> for one reason or another. When working with the scalar backend, we
> want to count the number of scalar components, yet still respect the
> vec4 packing rules as requ
Cc: Francisco Jerez
---
src/glsl/link_uniforms.cpp | 77 +-
1 file changed, 49 insertions(+), 28 deletions(-)
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index 647aa2b..2a1da07 100644
--- a/src/glsl/link_uniforms.cpp
+++ b/src/
Reviewed-by: Tapani Pälli
Reviewed-by: Ian Romanick
---
src/glsl/nir/nir_types.cpp | 6 ++
src/glsl/nir/nir_types.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/src/glsl/nir/nir_types.cpp b/src/glsl/nir/nir_types.cpp
index da9807f..965f423 100644
--- a/src/glsl/nir/nir_types.cpp
Cc: Francisco Jerez
Cc: Jason Ekstrand
---
src/glsl/nir/nir_lower_atomics.c | 22 --
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/src/glsl/nir/nir_lower_atomics.c b/src/glsl/nir/nir_lower_atomics.c
index 6f9ecc0..46e1376 100644
--- a/src/glsl/nir/nir_lower_
This series is just a resend of the remaining unreviewed AoA v7 patches.
This time round I've Cc'd those with the with the most knowledge about the
code each change touches in the hope of finally wrapping this up.
Patches 2-5 are the unreviewed patches.
Thanks,
Tim
_
Reviewed-by: Samuel Iglesias Gonsálvez
---
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 3f9afd1..c1f3d0d 100644
--- a/src/mesa/drivers/dri/i965/in
Cc: Francisco Jerez
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 44 --
src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 2 ++
2 files changed, 30 insertions(+), 16 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/br
Cc: Dave Airlie
---
src/glsl/ast_function.cpp | 43 ++-
src/glsl/lower_subroutine.cpp | 2 +-
2 files changed, 39 insertions(+), 6 deletions(-)
diff --git a/src/glsl/ast_function.cpp b/src/glsl/ast_function.cpp
index c5c5cae..e4e4a3f 100644
--- a/src/
Reviewed-by: Ian Romanick
---
docs/GL3.txt | 4 ++--
docs/relnotes/11.1.0.html | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 6503e2a..f8e2680 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -149,7 +149,7 @@ GL 4.2, GLSL 4.20:
Reviewed-by: Matt Turner
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Hi Christian,
Mostly minor suggestions I'm afraid. Things just look too good for
anything serious.
On 11 October 2015 at 16:09, Christian Gmeiner
wrote:
> This commit adds tegra support, which uses the renderonly driver
> library.
>
> Signed-off-by: Christian Gmeiner
> ---
> configure.ac
On Thu, Oct 15, 2015 at 7:09 PM, Emil Velikov wrote:
> Hi Christian,
>
> I'm glad to see Thierry's work revived. Hopefully this will soon be
> the basis of many more drivers.
>
> On 11 October 2015 at 16:09, Christian Gmeiner
> wrote:
>> This commit adds a generic renderonly driver library, which
Signed-off-by: Glenn Kennard
---
See also additional texture view piglit test case posted to piglit ml,
which tests cases with layer>0. Notably softpipe and llvmpipe fail that
case but i965/hsw, nv50/nvc0 and r600g pass.
docs/GL3.txt | 2 +-
docs/relnotes/11.1.0.ht
On Thu, Oct 15, 2015 at 7:53 PM, Glenn Kennard wrote:
> Signed-off-by: Glenn Kennard
> ---
> See also additional texture view piglit test case posted to piglit ml,
> which tests cases with layer>0. Notably softpipe and llvmpipe fail that
> case but i965/hsw, nv50/nvc0 and r600g pass.
>
> docs/GL
---
docs/index.html | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/index.html b/docs/index.html
index 138447f..e28c63d 100644
--- a/docs/index.html
+++ b/docs/index.html
@@ -28,7 +28,7 @@ This is a bug-fix release.
This is a bug-fix release.
NOTE: It is anticipated th
you gotta give me something in the commit msg to have any idea what
I'm reading here :-)
why does process_parameters move?
is there a piglit for subroutine/arrays?
Dave.
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On Fri, 2015-10-16 at 11:44 +1000, Dave Airlie wrote:
> you gotta give me something in the commit msg to have any idea what
> I'm reading here :-)
>
> why does process_parameters move?
Because we need actual_parameters processed earlier so we can use it
with match_subroutine_by_name() to get the
On 16.10.2015 02:55, Ilia Mirkin wrote:
> Signed-off-by: Ilia Mirkin
> ---
>
> v1 -> v2: Take Michel's suggestion to include mesa in the st list, append
> others
Reviewed-by: Michel Dänzer
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast
Interesting it doesn't work with llvmpipe, I thought there were tests
for this using some other state tracker...
My guess is that (for llvmpipe) in prepare_shader_sampling() and
lp_setup_set_fragment_sampler_views() we miss adjusting the mip offsets
since we only do that if it's an array target, bu
https://bugs.freedesktop.org/show_bug.cgi?id=92278
Kai Huuhko changed:
What|Removed |Added
CC||kai.huu...@gmail.com
--
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On Wed, Oct 14, 2015 at 6:56 PM, Eduardo Lima Mitev wrote:
> We recently added support for GL_BGRA internal format when validating
> combination of format+type+internal_format in Tex(Sub)ImageXD calls
> (to fix https://bugs.freedesktop.org/show_bug.cgi?id=92265).
>
> However, the current implement
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