There seems to be some 'extra includes', not sure if you want to start
going through them at this same time? As example sampler.cpp does not
need to include glsl/ir_visitor.h since it comes with glsl/ir.h.
Anyway nice cleanup, series is
Reviewed-by: Tapani Pälli
On 10/01/2015 12:35 AM, Brian
https://bugs.freedesktop.org/show_bug.cgi?id=92183
Vinson Lee changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Resolution|FIXED
Hi,
The series is:
Reviewed-by: Mathias Fröhlich
Thanks for taking more care of multithread behavior!
Mathias
On Wednesday, September 30, 2015 18:59:44 Tom Stellard wrote:
> This fixes a race condition in the glx-multithreaded-shader-compile
> test.
>
> v2:
> - Replace gallivm_init_llvm_{
2015-10-01 3:33 GMT+02:00 Ian Romanick :
> The two lines that just have () are only supported on i965, nvc0, and
> radeonsi. It's not really that clear.
>
Yep, this part I understood, once you understand it's hierarchical,
everything becomes clearer ;)
Also, a guy on GitHub helped me to underst
When writing to a column of a row-major matrix, each component of the
vector is stored to non-consecutive memory addresses, so we generate
one instruction per component.
This patch skips the disabled components in the writemask, saving some
store instructions plus avoid storing wrong data on each
Hi,
On 10/01/2015 06:07 AM, Michel Dänzer wrote:
On 01.10.2015 04:35, Marek Olšák wrote:
[...]
For your issue, the only way is to remove loading ~/.drirc from Mesa,
I think that would be the proverbial "throwing out the baby with the
bathwater". :)
making driconf useless. Do we really car
On 01.10.2015 05:44, Michel Dänzer wrote:
On 01.10.2015 04:11, Marek Olšák wrote:
From: Marek Olšák
This can cause incorrect address calculations and hangs.
v2: do it properly
Cc: mesa-sta...@lists.freedesktop.org
Tested-and-Reviewed-by: Christian König
---
src/gallium/drivers/radeonsi/si
On 28 September 2015 at 18:59, Kyle Brenneman wrote:
> Rearranged the GLX_ALIAS macro in glextensions.h so that it will pick up
> the renames from glx_mangle.h.
>
> Fixed the alias attribute for glXGetProcAddress when USE_MGL_NAMESPACE is
> defined.
>
> v2: Add a comment clarifying why GLX_ALIAS n
Hello list,
The candidate for the Mesa 10.6.9 is now available. Currently we have:
- 16 queued
- 18 nominated (outstanding)
- and 2 rejected/obsolete patches
The present queue covers KDE crashes with i965, regression in Unreal
ournament with gallium drivers, fixes for Redway3D Flat (Demo) and
These arrays provide backends with separate index spaces for UBOS and SSBOs.
---
src/glsl/linker.cpp | 35 +++
src/glsl/standalone_scaffolding.cpp | 9 +
src/mesa/main/mtypes.h | 6 ++
3 files changed, 50 insertions(+)
dif
Currently, these arrays in gl_shader and gl_shader_program hold both
UBOs and SSBOs, so this looks like a better name. We were already
using NumBufferInterfaceBlocks in gl_shader_program, so this makes
things more consistent as well.
In a later patch we will add {Num}UniformBlocks and
{Num}ShaderS
The compiler has a lot of code to implement UBOs that uses UniformBlocks
intensively in multiples places. When we implemented SSBOs, which need
to go pretty much through the same process, we had two options:
1) Rework all this code (and other parts of the frontend that use this
array) to accomodat
On Thu, 2015-10-01 at 09:41 +0200, Samuel Iglesias Gonsalvez wrote:
> When writing to a column of a row-major matrix, each component of the
> vector is stored to non-consecutive memory addresses, so we generate
> one instruction per component.
>
> This patch skips the disabled components in the wr
Fixes Piglit compiler test:
shader-storage-block-array-dynamic-indexing.frag
Signed-off-by: Tapani Pälli
---
src/glsl/ast_array_index.cpp | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/src/glsl/ast_array_index.cpp b/src/glsl/ast_array_index.cpp
index d
Reviewed-by: Samuel Iglesias Gonsálvez
On 01/10/15 13:54, Tapani Pälli wrote:
> Fixes Piglit compiler test:
> shader-storage-block-array-dynamic-indexing.frag
>
> Signed-off-by: Tapani Pälli
> ---
> src/glsl/ast_array_index.cpp | 14 --
> 1 file changed, 8 insertions(+), 6 d
On Thu, 2015-10-01 at 08:28 +0300, Tapani Pälli wrote:
> Patch adds missing type (used with NV_read_depth) so that it gets
> handled correctly. Also add type to _mesa_problem output to aid
> debugging.
>
> Signed-off-by: Tapani Pälli
> ---
> src/mesa/main/pack.c | 4 +++-
> 1 file changed, 3 ins
The result of POW for a negative base is undefined. Even when the result
is multiplied by zero (which is the case here whenever the base is
negative), the Inf and NaNs can propagate past that.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91342
Signed-off-by: Daniel Scharrer
Cc: "10.6 11
On 10/01/2015 01:03 AM, Tapani Pälli wrote:
There seems to be some 'extra includes', not sure if you want to start
going through them at this same time?
Right, I'm not too concerned with that now.
-Brian
___
mesa-dev mailing list
mesa-dev@lists.free
On Wed, Sep 30, 2015 at 7:37 PM, Marek Olšák wrote:
> On Wed, Sep 30, 2015 at 10:43 PM, Rob Clark wrote:
>> From: Rob Clark
>>
>> Not actually working yet, ie. doesn't even compile yet, but an idea.
>>
>> Initial motivation was for drm_gralloc/pipe, which is essentially a sort
>> of mini state-t
On 09/30/2015 02:58 PM, Ian Romanick wrote:
From: Ian Romanick
Signed-off-by: Ian Romanick
Suggested-by: Brian Paul
---
src/mesa/tnl_dd/t_dd_dmatmp.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/tnl_dd/t_dd_dmatmp.h b/src/mesa/tnl_dd/t_dd_dmatmp.h
in
Hi Rob,
I believe that Marek managed to nicely explain how things work.
Ideally you'll be able to get on the same boat (i.e. the Android C
runtime/linker won't give you the finger). Regardless some comments
inline.
On 30 September 2015 at 21:43, Rob Clark wrote:
> From: Rob Clark
>
> Not actual
On Thu, Oct 1, 2015 at 3:53 PM, Rob Clark wrote:
> On Wed, Sep 30, 2015 at 7:37 PM, Marek Olšák wrote:
>> On Wed, Sep 30, 2015 at 10:43 PM, Rob Clark wrote:
>>> From: Rob Clark
>>>
>>> Not actually working yet, ie. doesn't even compile yet, but an idea.
>>>
>>> Initial motivation was for drm_gr
On 30 September 2015 at 19:59, Tom Stellard wrote:
> This fixes a race condition in the glx-multithreaded-shader-compile
> test.
>
> v2:
> - Replace gallivm_init_llvm_{begin,end}() with gallivm_init_llvm_targets().
>
Thanks for sticking with my suggestion Tom.
Fwiw the series is:
Reviewed-by: E
On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> Previously, we had a bunch of code in each stage to figure out how many
> slots we needed in stage_prog_data.param. This code was mostly identical
> across the stages and had been copied and pasted around. Unfortunately,
> this meant that
Reviewed-by: Iago Toral Quiroga
On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> That way, if we do the usual thing of multiplying vector_elements by
> matrix_columns we get the actual number of components in the type as per
> component_slots().
>
> While we're at it, we also switch to
Reviewed-by: Iago Toral Quiroga
On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> The next commit will add code to codegen_vs_prog that requires the NIR
> shader to be there in all cases. It doesn't hurt anything to just move it
> from brw_vs_emit to its only caller.
> ---
> src/mesa/d
On Thu, Oct 1, 2015 at 7:52 AM, Iago Toral wrote:
> On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
>> Previously, we had a bunch of code in each stage to figure out how many
>> slots we needed in stage_prog_data.param. This code was mostly identical
>> across the stages and had been cop
On Thu, 2015-10-01 at 07:58 -0700, Jason Ekstrand wrote:
> On Thu, Oct 1, 2015 at 7:52 AM, Iago Toral wrote:
> > On Wed, 2015-09-30 at 18:41 -0700, Jason Ekstrand wrote:
> >> Previously, we had a bunch of code in each stage to figure out how many
> >> slots we needed in stage_prog_data.param. Thi
On Wed, Sep 30, 2015 at 12:35 PM, Jason Ekstrand wrote:
> On Wed, Sep 30, 2015 at 8:11 AM, Connor Abbott wrote:
>> This will replace direct usage of nir_instrs_equal() in the CSE pass,
>> which reduces an O(n^2) algorithm with an effectively O(n) one. It'll
>> also be useful for implementing GVN
intel_tiling_supports_non_msrt_mcs() and
intel_miptree_is_fast_clear_capable() are not used outside of
intel_mipmap_tree.c.
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++--
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 +-
2 files changed, 3 insertions(+), 7 deletions(-)
diff -
There are three types of fast clears:
a. fast depth clears
b. fast singlesample color clears
c. fast multisample color clears
Function intel_miptree_is_fast_clear_capable() checks if a miptree
supports fast clears of type (b).
Rename the function to disambiguate what it does:
old: intel_mi
Chad Versace (2):
i965/mt: Declare some functions as static
i965: Fix intel_miptree_is_fast_clear_capable()
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 28 ---
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 +-
2 files changed, 22 insertions(+), 12 deletion
On Thu, Oct 1, 2015 at 8:14 AM, Connor Abbott wrote:
> On Wed, Sep 30, 2015 at 12:35 PM, Jason Ekstrand wrote:
>> On Wed, Sep 30, 2015 at 8:11 AM, Connor Abbott wrote:
>>> This will replace direct usage of nir_instrs_equal() in the CSE pass,
>>> which reduces an O(n^2) algorithm with an effectiv
On Thu, Oct 01, 2015 at 03:40:45PM +0100, Emil Velikov wrote:
> On 30 September 2015 at 19:59, Tom Stellard wrote:
> > This fixes a race condition in the glx-multithreaded-shader-compile
> > test.
> >
> > v2:
> > - Replace gallivm_init_llvm_{begin,end}() with
> > gallivm_init_llvm_targets().
>
On Thu, Oct 1, 2015 at 8:20 AM, Chad Versace wrote:
> intel_tiling_supports_non_msrt_mcs() and
> intel_miptree_is_fast_clear_capable() are not used outside of
> intel_mipmap_tree.c.
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++--
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6
On 10/01/2015 03:17 PM, Iago Toral wrote:
On Thu, 2015-10-01 at 08:28 +0300, Tapani Pälli wrote:
Patch adds missing type (used with NV_read_depth) so that it gets
handled correctly. Also add type to _mesa_problem output to aid
debugging.
Signed-off-by: Tapani Pälli
---
src/mesa/main/pack.c |
On Thu, Oct 1, 2015 at 10:30 AM, Emil Velikov wrote:
> Hi Rob,
>
> I believe that Marek managed to nicely explain how things work.
> Ideally you'll be able to get on the same boat (i.e. the Android C
> runtime/linker won't give you the finger). Regardless some comments
> inline.
>
> On 30 Septembe
According to the Intel Software Development Manual:
Streaming loads may be weakly ordered and may appear to software to
execute out of order with respect to other memory operations.
Software must explicitly use fences (e.g. MFENCE) if it needs to
preserve order among streaming loads or
On Wednesday, September 30, 2015 12:58:09 AM Kenneth Graunke wrote:
> Discuss :)
NAK on patches 3-5. It turns out they break if the outermost array
index is non-constant. I've got two new patches that replace them.
signature.asc
Description: This is a digitally signed message part.
___
On Thu, Oct 1, 2015 at 7:09 AM, Iago Toral Quiroga wrote:
> These arrays provide backends with separate index spaces for UBOS and SSBOs.
> ---
> src/glsl/linker.cpp | 35 +++
> src/glsl/standalone_scaffolding.cpp | 9 +
> src/mesa/main/mtyp
get_io_offset() already walks the dereference chain and discovers
whether or not we have an indirect; we can just return that rather than
computing it a second time. This means moving the call a bit earlier.
More importantly, I'm about to introduce special handling for the
outermost array index,
Geometry and tessellation shaders process multiple vertices; their
inputs are arrays indexed by the vertex number. While GLSL makes
this look like a normal array, it can be very different behind the
scenes.
On Intel hardware, all inputs for a particular vertex are stored
together - as if they wer
On 2015-10-01 10:11:33, Matt Turner wrote:
> According to the Intel Software Development Manual:
How about a more specific doc location?
According to the Intel Software Development Manual (Volume 1: Basic
Architecture, 12.10.3 Streaming Load Hint Instruction):
>Streaming loads may be weakly
On 10/01/2015 09:50 AM, Tapani Pälli wrote:
> On 10/01/2015 03:17 PM, Iago Toral wrote:
>> On Thu, 2015-10-01 at 08:28 +0300, Tapani Pälli wrote:
>>> Patch adds missing type (used with NV_read_depth) so that it gets
NV_read_depth_stencil?
>>> handled correct
On Thu, Oct 1, 2015 at 3:12 PM, Ian Romanick wrote:
> I'm just
> wondering because Mesa doesn't support that extension. How is this even
> being hit?
See 81d2fd91a90 (mesa: add NV_read_{depth,stencil,depth_stencil} extensions)
___
mesa-dev mailing list
On Fri, Aug 7, 2015 at 9:31 AM, Neil Roberts wrote:
> Adds nir_src_is_dynamically_uniform which returns true if the source
> is known to be dynamically uniform. This will be used in a later patch
> to add a workaround for cases that only work with dynamically uniform
> sources. Note that the funct
From: Rob Clark
Signed-off-by: Rob Clark
---
Drop the idea of more ambitious re-arrangement if libs, but keep the
pipe-loader refactoring. With this at least drm_gralloc could still
dlopen() gallium_dri.so and then use the pipe-loader API to figure
out which pipe driver to load and hand back a
On Thu, Oct 1, 2015 at 8:36 AM, Daniel Scharrer wrote:
> The result of POW for a negative base is undefined. Even when the result
> is multiplied by zero (which is the case here whenever the base is
> negative), the Inf and NaNs can propagate past that.
>
> Bugzilla: https://bugs.freedesktop.org/s
https://bugs.freedesktop.org/show_bug.cgi?id=92221
Bug ID: 92221
Summary: Unintended code changes in _mesa_base_tex_format
commit
Product: Mesa
Version: git
Hardware: All
OS: All
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=92221
Nanley Chery changed:
What|Removed |Added
CC||el...@igalia.com,
|
On 2015-10-01 21:45, Ilia Mirkin wrote:
> On Thu, Oct 1, 2015 at 8:36 AM, Daniel Scharrer wrote:
>> The result of POW for a negative base is undefined. Even when the result
>> is multiplied by zero (which is the case here whenever the base is
>> negative), the Inf and NaNs can propagate past that.
https://bugs.freedesktop.org/show_bug.cgi?id=92221
Mark Janes changed:
What|Removed |Added
CC||nanleych...@gmail.com
--
You are receiving
https://bugs.freedesktop.org/show_bug.cgi?id=92221
--- Comment #1 from Mark Janes ---
Nanley, should there have been a piglit failure associated with ASTC
functionality that was disabled?
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bu
https://bugs.freedesktop.org/show_bug.cgi?id=92221
--- Comment #2 from Nanley Chery ---
(In reply to Mark Janes from comment #1)
> Nanley, should there have been a piglit failure associated with ASTC
> functionality that was disabled?
Not at the moment. The tests are still on the list and haven'
It doesn't modify it.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_context.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 8ae3666..c46dbe2 100644
--- a/src/mesa
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #8 from Mauro Rossi ---
Hi Ilia,
Sorry I noticed my previous sentence was not clear,
I have performed the test by disabling EGL_KHR_gl_colorspace, independently
frome Chih-Wei attempt with MESA_EXTENSION_OVERRIDE, by applying the fol
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #9 from Mauro Rossi ---
>> Hi Ilia,
My greeting also to Ilia, but you are Marek
Sorry
Mauro
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.
Reviewed-by: Matt Turner
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Ping
On Tue, Sep 29, 2015 at 2:37 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> Required by ARB_sample_shading for drivers that don't want a shader variant
> in st/mesa.
> ---
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freed
To clarify, the effect on drivers not exposing this cap is nil right?
On Thu, Oct 1, 2015 at 6:24 PM, Marek Olšák wrote:
> Ping
>
> On Tue, Sep 29, 2015 at 2:37 AM, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> Required by ARB_sample_shading for drivers that don't want a shader variant
>> in st
On Fri, Oct 2, 2015 at 12:26 AM, Ilia Mirkin wrote:
> To clarify, the effect on drivers not exposing this cap is nil right?
Yes.
Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
On Mon, Sep 28, 2015 at 8:38 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> This is only a half of the work. The next patch will handle
> gl_SampleID/SamplePos, which is the other half of ARB_sample_shading.
> ---
> src/mesa/state_tracker/st_atom_rasterizer.c | 8
> src/mesa/state_track
Reviewed-by: Ilia Mirkin
On Mon, Sep 28, 2015 at 8:38 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> ---
> src/mesa/state_tracker/st_atom_shader.c | 8 +++-
> src/mesa/state_tracker/st_program.c | 4 +++-
> 2 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/sta
Reviewed-by: Ilia Mirkin
On Mon, Sep 28, 2015 at 8:37 PM, Marek Olšák wrote:
> From: Marek Olšák
>
> Required by ARB_sample_shading for drivers that don't want a shader variant
> in st/mesa.
> ---
> src/gallium/docs/source/screen.rst | 9 +
> src/gallium/drivers/freedreno
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #10 from Emil Velikov ---
In the few moments that android-x86 was up I've noticed a very interesting
commit [1]. In case you don't have a local copy, it enables a workaround
#10194508, as seen here [2].
Not sure if the android-x86 ve
On Fri, Aug 7, 2015 at 9:31 AM, Neil Roberts wrote:
> If a non-const sample number is given to interpolateAtSample it will
> now generate an indirect send message with the sample ID similar to
> how non-const sampler array indexing works. Previously non-const
> values were ignored and instead it e
https://bugs.freedesktop.org/show_bug.cgi?id=92221
--- Comment #3 from Nanley Chery ---
The code that was added was previously removed with this refactoring commit:
99b1f4751f97631011b64fabcb57acf6beae01ac
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the a
Signed-off-by: Ilia Mirkin
---
src/mesa/program/hash_table.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/program/hash_table.h b/src/mesa/program/hash_table.h
index e85a836..d0a2abf 100644
--- a/src/mesa/program/hash_table.h
+++ b/src/mesa/program/hash_table.h
@@ -249,6 +249,7 @@
Signed-off-by: Ilia Mirkin
---
src/glsl/link_uniforms.cpp | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index 47d49c8..740b0a4 100644
--- a/src/glsl/link_uniforms.cpp
+++ b/src/glsl/link_uniforms.cpp
@@ -1131,15
Signed-off-by: Ilia Mirkin
---
src/mesa/drivers/dri/i965/brw_program.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_program.c
b/src/mesa/drivers/dri/i965/brw_program.c
index fee96a8..0e4b823 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/
Can't say I'm a big fan of doing essentially the same thing with
different methods, but well it's coming from GL, and if it helps some
drivers...
Acked-by: Roland Scheidegger
Am 02.10.2015 um 00:24 schrieb Marek Olšák:
> Ping
>
> On Tue, Sep 29, 2015 at 2:37 AM, Marek Olšák wrote:
>> From: Mar
---
src/mesa/drivers/dri/i965/brw_fs.h | 8 +++
src/mesa/drivers/dri/i965/brw_fs_nir.cpp| 32 -
src/mesa/drivers/dri/i965/brw_shader.cpp| 1 +
src/mesa/drivers/dri/i965/brw_shader.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4.h
---
src/mesa/drivers/dri/i965/brw_cs.h| 3 +--
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/gen7_cs_state.c | 7 +++
3 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_cs.h
b/src/mesa/drivers/dri/i965/brw_cs.h
in
Setting up binding tables really has little to do with the actual process
of turning shaders into instructions; it's more part of setting up
prog_data. This commit moves it out of the visitors and with the rest of
the prog_data setup stuff.
---
src/mesa/drivers/dri/i965/brw_cs.c| 20 +
This really has nothing to do with the backend compiler and we'd like to
eventually be able to set this up earlier in the compile process.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 12 +---
src/mesa/drivers/dri/i965/brw_shader.cpp | 17 +
src/mesa/drivers/dri
As of now, uniform setup is more-or-less unified between vec4 and fs and no
longer requires the fs_visitor. This makes uniform setup more of a
language/API thing than a backend compiler thing. This commit moves
setting up the stage_prog_data.params arrays to the same place as we set up
the rest o
---
src/glsl/nir/glsl_to_nir.cpp | 4 ++--
src/glsl/nir/nir.c | 3 ---
src/glsl/nir/nir.h | 16
src/glsl/nir/nir_lower_gs_intrinsics.c | 2 +-
4 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/src/glsl/nir/glsl_to
This commit also adds code to glsl_to_nir and prog_to_nir to fill it out.
---
src/glsl/nir/glsl_to_nir.cpp | 18 ++
src/glsl/nir/nir.c | 1 +
src/glsl/nir/nir.h | 34 ++
src/mesa/program/prog_to_nir.c | 13 +
4
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 8
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 8
src/mesa/drivers/dri/i965/brw_wm_iz.cpp| 3 +--
3 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/drivers/dri/i
---
src/glsl/nir/glsl_to_nir.cpp| 8 ++--
src/glsl/nir/glsl_to_nir.h | 3 ++-
src/mesa/drivers/dri/i965/brw_nir.c | 3 +--
3 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/src/glsl/nir/glsl_to_nir.cpp b/src/glsl/nir/glsl_to_nir.cpp
index f874582..ba08e17 100644
-
This series does a bunch of code-shuffling with the end objective of
getting the gl_* data structures out of the backend compiler. Now that we
have NIR, we would like the compiler to be a NIR -> binary translator and
not be loaded full of mesa and GL-specific stuff. This series gets us 95%
of the
The texunit variable we create and assign in nir_emit_texture gets passed
through two more layers of function calls before it gets to its sole use in
rescale_texcoord. The best part is that we already pass the sampler into
rescale_texcoord so we can just look it up there.
---
src/mesa/drivers/dri
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 29 ++--
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 8
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 +-
3 files changed, 19 insertions(+), 20 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cp
It doesn't exist for anything other than an assert that, as far as I can
tell, isn't possible to trip. Soon, we will remove prog from the visitor
entirely and this will become even more impossible to hit.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 18 --
src/mesa/drivers
On Oct 1, 2015 12:18 PM, "Matt Turner" wrote:
>
> On Fri, Aug 7, 2015 at 9:31 AM, Neil Roberts wrote:
> > Adds nir_src_is_dynamically_uniform which returns true if the source
> > is known to be dynamically uniform. This will be used in a later patch
> > to add a workaround for cases that only wor
https://bugs.freedesktop.org/show_bug.cgi?id=92231
Bug ID: 92231
Summary: [swrast] piglit gl-1.0-beginend-coverage regression
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
On Thu, Oct 01, 2015 at 08:20:07AM -0700, Chad Versace wrote:
> There are three types of fast clears:
> a. fast depth clears
> b. fast singlesample color clears
> c. fast multisample color clears
> Function intel_miptree_is_fast_clear_capable() checks if a miptree
> supports fast clears of ty
https://bugs.freedesktop.org/show_bug.cgi?id=92231
Tapani Pälli changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Ping, could someone ack/review this? If not, I will revert the patches
that caused this for now and figure out alternative solution with more
time for packed varyings. It is one of the CTS tests that will fail with
revert and nothing else gets hurt since it's a corner-case with SSO. I
think cur
On Thu, 2015-10-01 at 14:01 -0400, Ilia Mirkin wrote:
> On Thu, Oct 1, 2015 at 7:09 AM, Iago Toral Quiroga wrote:
> > These arrays provide backends with separate index spaces for UBOS and SSBOs.
> > ---
> > src/glsl/linker.cpp | 35
> > +++
> > src
Reviewed-by: Iago Toral Quiroga
On Thu, 2015-10-01 at 20:19 -0400, Ilia Mirkin wrote:
> Signed-off-by: Ilia Mirkin
> ---
> src/mesa/program/hash_table.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/mesa/program/hash_table.h b/src/mesa/program/hash_table.h
> index e85a836..d0a2a
On Thu, 2015-10-01 at 20:22 -0400, Ilia Mirkin wrote:
> Signed-off-by: Ilia Mirkin
> ---
> src/glsl/link_uniforms.cpp | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
> index 47d49c8..740b0a4 100644
> --- a/s
Reviewed-by: Iago Toral Quiroga
On Thu, 2015-10-01 at 20:27 -0400, Ilia Mirkin wrote:
> Signed-off-by: Ilia Mirkin
> ---
> src/mesa/drivers/dri/i965/brw_program.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_program.c
> b/src/mesa/drivers/dri/i965/brw
93 matches
Mail list logo
