On Sun, Aug 9, 2015 at 11:55 PM, Oded Gabbay wrote:
> On Mon, Aug 10, 2015 at 9:52 AM, Jason Ekstrand wrote:
>> For those of you tracking the big-endian stuff, I've pushed a couple
>> patches to a branch:
>>
>> http://cgit.freedesktop.org/~jekstrand/mesa/log/?h=wip/be-fixes
>>
>> I've removed the
https://bugs.freedesktop.org/show_bug.cgi?id=91591
Jose Fonseca changed:
What|Removed |Added
CC||matts...@gmail.com
Assignee|jfo
On Mon, Aug 10, 2015 at 7:58 AM, Jason Ekstrand wrote:
> On Sun, Aug 9, 2015 at 3:11 AM, Oded Gabbay wrote:
>> On Sun, Aug 9, 2015 at 2:43 AM, Jason Ekstrand wrote:
>>> On Sat, Aug 8, 2015 at 3:14 PM, Oded Gabbay wrote:
On Sun, Aug 9, 2015 at 12:26 AM, Jason Ekstrand
wrote:
>>>
https://bugs.freedesktop.org/show_bug.cgi?id=91474
Marek Chalupa changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On Mon, Aug 10, 2015 at 12:07 AM, Oded Gabbay wrote:
> On Mon, Aug 10, 2015 at 7:58 AM, Jason Ekstrand wrote:
>> On Sun, Aug 9, 2015 at 3:11 AM, Oded Gabbay wrote:
>>> On Sun, Aug 9, 2015 at 2:43 AM, Jason Ekstrand wrote:
On Sat, Aug 8, 2015 at 3:14 PM, Oded Gabbay wrote:
> On Sun, Au
On Mon, Aug 10, 2015 at 10:30 AM, Jason Ekstrand wrote:
> On Mon, Aug 10, 2015 at 12:07 AM, Oded Gabbay wrote:
>> On Mon, Aug 10, 2015 at 7:58 AM, Jason Ekstrand wrote:
>>> On Sun, Aug 9, 2015 at 3:11 AM, Oded Gabbay wrote:
On Sun, Aug 9, 2015 at 2:43 AM, Jason Ekstrand
wrote:
>
On Mon, Aug 10, 2015 at 12:41 AM, Oded Gabbay wrote:
> On Mon, Aug 10, 2015 at 10:30 AM, Jason Ekstrand wrote:
>> On Mon, Aug 10, 2015 at 12:07 AM, Oded Gabbay wrote:
>>> On Mon, Aug 10, 2015 at 7:58 AM, Jason Ekstrand
>>> wrote:
On Sun, Aug 9, 2015 at 3:11 AM, Oded Gabbay wrote:
> O
This is done so that following patch can use it to verify dimenstions
for multisample variants of glTex*Storage.
Signed-off-by: Tapani Pälli
---
src/mesa/main/texstorage.c | 22 +-
src/mesa/main/texstorage.h | 3 +++
2 files changed, 24 insertions(+), 1 deletion(-)
diff --g
Signed-off-by: Tapani Pälli
---
src/mesa/main/teximage.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index 3ea7b2a..c6fd0be 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -5639,9
Hello;
Here's bunch of changes to texture storage. I have a branch to enable
GL_OES_texture_storage_multisample_2d_array and I extracted changes not
directly related to extension itself and I see generic to OpenGL ES 3.1.
Hopefully I haven't overlapped too much with your work here Marta,
sorry if
Signed-off-by: Tapani Pälli
---
src/mesa/main/teximage.c | 28
1 file changed, 28 insertions(+)
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index fc69387..3ea7b2a 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -5782,6 +57
Signed-off-by: Tapani Pälli
---
src/mesa/main/multisample.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/multisample.c b/src/mesa/main/multisample.c
index 490bad5..aac5a15 100644
--- a/src/mesa/main/multisample.c
+++ b/src/mesa/main/multisample.c
@@ -164
> -Original Message-
> From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On
> Behalf Of Ilia Mirkin
> Sent: Friday, August 7, 2015 9:56 PM
> To: Matt Turner
> Cc: mesa-dev@lists.freedesktop.org
> Subject: Re: [Mesa-dev] [PATCH v2] gles/es3.1: Implement
> glMemoryBarrierByRegion
Before, if we encountered an array format of 0 on a BE system, we would
flip all the channels even though it's an invalid format. This would
result in a mostly invalid format with a swizzle of or . Instead,
we should just return 0 if the array format stashed in the format info is
invalid
On Fri, Aug 07, 2015 at 09:14:01PM +0100, Chris Wilson wrote:
> Reuse the common upload bo for the temporary blitter storage to try and
> minimise resource usage.
>
> Caveats: this may impose a read-read relationship on the buffer between
> the blitter and render engines, and may add stalls on old
On Mon, Aug 10, 2015 at 10:40:29AM +0200, Daniel Vetter wrote:
> On Fri, Aug 07, 2015 at 09:14:01PM +0100, Chris Wilson wrote:
> > Reuse the common upload bo for the temporary blitter storage to try and
> > minimise resource usage.
> >
> > Caveats: this may impose a read-read relationship on the b
On Mon, 2015-08-10 at 11:06 +0300, Tapani Pälli wrote:
> This is done so that following patch can use it to verify dimenstions
> for multisample variants of glTex*Storage.
>
> Signed-off-by: Tapani Pälli
> ---
> src/mesa/main/texstorage.c | 22 +-
> src/mesa/main/texstorage.h
From: Michel Dänzer
Fixes Gallium based DRI drivers failing to load on big endian hosts
because they can't find any matching fbconfigs.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71789
Signed-off-by: Michel Dänzer
---
src/gallium/state_trackers/dri/dri2.c | 26 +
On 08/10/2015 12:04 PM, Timothy Arceri wrote:
On Mon, 2015-08-10 at 11:06 +0300, Tapani Pälli wrote:
This is done so that following patch can use it to verify dimenstions
for multisample variants of glTex*Storage.
Signed-off-by: Tapani Pälli
---
src/mesa/main/texstorage.c | 22
On Fri, Aug 07, 2015 at 09:13:06PM +0100, Chris Wilson wrote:
> GCC's read access for single bits in a bitfield is reasonable (just a
> move + flag comparison), so let's save some cachelines by packing the
> write-once/read-many booleans together.
>
>text data bss dec hex
https://bugs.freedesktop.org/show_bug.cgi?id=91596
Bug ID: 91596
Summary: EGL_KHR_gl_colorspace (v2) causes problem with
Android-x86 GUI
Product: Mesa
Version: git
Hardware: All
OS: other
Status:
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #1 from Mauro Rossi ---
Created attachment 117608
--> https://bugs.freedesktop.org/attachment.cgi?id=117608&action=edit
dmesg, NOTE: segfaults are due to an independent problem
--
You are receiving this mail because:
You are the Q
https://bugs.freedesktop.org/show_bug.cgi?id=91596
--- Comment #2 from Mauro Rossi ---
Created attachment 117609
--> https://bugs.freedesktop.org/attachment.cgi?id=117609&action=edit
dumpsys SurfaceFlinger
--
You are receiving this mail because:
You are the QA Contact for the bug.
You are the
On 08/10/2015 11:06 AM, Tapani Pälli wrote:
Hello;
Here's bunch of changes to texture storage. I have a branch to enable
GL_OES_texture_storage_multisample_2d_array and I extracted changes not
directly related to extension itself and I see generic to OpenGL ES 3.1.
Hopefully I haven't overlapp
Please never use "long" in Mesa. It only has 32 bits on 32-bit
systems. uint64_t is generally used for all unsigned 64-bit variables
and "llu" or "ull" is the number suffix. Also, the 64-bit ctz is ctzll
and a proper HAVE macro should be added for it too.
The general idea is nice, thanks.
The num
From: Rob Clark
These extensions allow reading depth/stencil for GLES contexts, which is
useful for tools like apitrace.
Signed-off-by: Rob Clark
---
I have a patch, which I will send out after some cleanup, that makes
apitrace able to dump depth/stencil buffers with GLES, thanks to this
extens
From: Marta Lofstedt
GL_ARB_compute_shader is limited for GLSL version 430.
This enables for GLSL ES version 310.
V2: Updated error string to also include GLSL 3.10
Signed-off-by: Marta Lofstedt
---
src/glsl/glsl_parser.yy | 5 ++---
src/glsl/glsl_parser_extras.h | 5 +
2 files chan
On 07/08/15 23:13, Chris Wilson wrote:
Just a couple of functions for removing an element from one list and
adding to another (perhaps even the same list, just at the head or
tail).
Used in future patches.
Signed-off-by: Chris Wilson
---
src/util/list.h | 27 +--
1 f
If we go with this patch perhaps it would be good to remove
supports_simd16_3src entirely from brw_device_info and any code that is
referring to it in order to avoid carrying around useless code.
Currently it seems like it would be quite easy to add a new
brw_device_info and forget to add supports_
From: Marta Lofstedt
Signed-off-by: Marta Lofstedt
---
src/mesa/main/get_hash_params.py | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index 7dc92f1..66c47de 100644
--- a/src/mesa/main/get_ha
On 07/08/15 23:13, Chris Wilson wrote:
Since the workaround bo is used strictly as a write-only buffer, we need
only allocate one per screen and use the same one from all contexts.
(The caveat here is during extension initialisation, where we write into
and read back register values from the buf
On 10/08/15 14:25, Martin Peres wrote:
On 07/08/15 23:13, Chris Wilson wrote:
Since the workaround bo is used strictly as a write-only buffer, we need
only allocate one per screen and use the same one from all contexts.
(The caveat here is during extension initialisation, where we write into
This patch has the wrong name also the MAX_VERTEX_ATTRIB_STRIDE was missing and
this needs to go under a GLES 3.1 label.
I have sent a replacement patch for this:
http://patchwork.freedesktop.org/patch/56761/
/Marta
> -Original Message-
> From: mesa-dev [mailto:mesa-dev-boun...@lists.fr
On Mon, Aug 10, 2015 at 02:25:41PM +0300, Martin Peres wrote:
> On 07/08/15 23:13, Chris Wilson wrote:
> >Since the workaround bo is used strictly as a write-only buffer, we need
> >only allocate one per screen and use the same one from all contexts.
> >
> >(The caveat here is during extension init
Jason Ekstrand writes:
> @@ -151,8 +153,10 @@ _mesa_snorm_to_snorm(int x, unsigned src_bits, unsigned
> dst_bits)
>return -MAX_INT(dst_bits);
> else if (src_bits < dst_bits)
>return EXTEND_NORMALIZED_INT(x, src_bits - 1, dst_bits - 1);
> - else
> + else if (src_bits > dst
On 07/08/15 23:13, Chris Wilson wrote:
Moving the test to the screen places it alongside the other global HW
feature tesst that want to be shared between contexts.
Signed-off-by: Chris Wilson
Cc: Kenneth Graunke
Seems like a good idea and I am also much more comfortable with this as
the wor
On 07/08/15 23:13, Chris Wilson wrote:
Similarly to the pipelined SO_OFFSET check, this moves the global HW
compatability check to the screen next to the other global checks.
Reviewed-by: Martin Peres
Signed-off-by: Chris Wilson
---
src/mesa/drivers/dri/i965/intel_extensions.c | 68 +
Since the introduction of new gl_shader_stages in
commit a2af956963b6bc4d29f37485e44c98008d2ef077
Author: Fabian Bieler
Date: Fri Mar 7 10:19:09 2014 +0100
mesa: add tessellation shader enums
the translation table for the stage into the HW binding table edit
command was broken, and so we
On Mon, Aug 10, 2015 at 12:49:47PM +0100, Chris Wilson wrote:
> Since the introduction of new gl_shader_stages in
>
> commit a2af956963b6bc4d29f37485e44c98008d2ef077
> Author: Fabian Bieler
> Date: Fri Mar 7 10:19:09 2014 +0100
>
> mesa: add tessellation shader enums
>
> the translation t
"X rendering calls made prior to glXWaitX are guaranteed to be
executed before GL rendering calls made after glXWaitX."
The goal is to implement that without adding a round-trip to the
Xserver. Adding one using XSync() is easy, but we can piggy-back
another, the DRI2GetBuffers request made to upda
On 07/08/15 23:13, Chris Wilson wrote:
Combining the multiple access checks into a few batches and a single
serialising read can reduce detection times from around 100us to 70us on
a fast Haswell system.
Signed-off-by: Chris Wilson
Cc: Kenneth Graunke
---
src/mesa/drivers/dri/i965/intel_scre
On 07/08/15 23:13, Chris Wilson wrote:
intel_update_winsys_renderbuffer_miptree() will release the existing
miptree when wrapping a new DRI2 buffer, so we can remove the early
release and so prevent a NULL mt dereference should importing the new
DRI2 name fail for any reason. (Reusing the old DRI
On Mon, 2015-08-10 at 13:04 +0200, Marta Lofstedt wrote:
> From: Marta Lofstedt
>
> GL_ARB_compute_shader is limited for GLSL version 430.
> This enables for GLSL ES version 310.
>
> V2: Updated error string to also include GLSL 3.10
>
> Signed-off-by: Marta Lofstedt
> ---
> src/glsl/glsl_par
On 07/08/15 23:13, Chris Wilson wrote:
Upcoming patches eliminate the intel_batchbuffer interface and one of
the minor changes that causes a lot of churn is the removal of the
header, along with the occassional need to now call intel_reg.h
themselves. This patch moves the individual includes into
On Mon, Aug 10, 2015 at 03:18:09PM +0300, Martin Peres wrote:
> On 07/08/15 23:13, Chris Wilson wrote:
> >intel_update_winsys_renderbuffer_miptree() will release the existing
> >miptree when wrapping a new DRI2 buffer, so we can remove the early
> >release and so prevent a NULL mt dereference shoul
10-12 are:
Reviewed-by: Martin Peres
On 07/08/15 23:13, Chris Wilson wrote:
In order to reduce future churn, rename the intel_batchbuffer struct.
Signed-off-by: Chris Wilson
---
src/mesa/drivers/dri/i965/brw_batch.h | 4 ++--
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
On 10/08/15 15:26, Chris Wilson wrote:
On Mon, Aug 10, 2015 at 03:18:09PM +0300, Martin Peres wrote:
On 07/08/15 23:13, Chris Wilson wrote:
intel_update_winsys_renderbuffer_miptree() will release the existing
miptree when wrapping a new DRI2 buffer, so we can remove the early
release and so pre
On Mon, Aug 10, 2015 at 03:37:24PM +0300, Martin Peres wrote:
> 10-12 are:
>
> Reviewed-by: Martin Peres
One thing to consider, do we want to do a s/typedef/struct brw_batch/
cleanup after the transition is complete?
brw_batch vs struct brw_batch ?
brw_bo vs struct brw_bo ?
-Chris
--
Chris Wi
On 10/08/15 15:45, Chris Wilson wrote:
On Mon, Aug 10, 2015 at 03:37:24PM +0300, Martin Peres wrote:
10-12 are:
Reviewed-by: Martin Peres
One thing to consider, do we want to do a s/typedef/struct brw_batch/
cleanup after the transition is complete?
brw_batch vs struct brw_batch ?
brw_bo vs
On Mon, Aug 10, 2015 at 10:43 AM, Jason Ekstrand wrote:
> On Mon, Aug 10, 2015 at 12:41 AM, Oded Gabbay wrote:
>> On Mon, Aug 10, 2015 at 10:30 AM, Jason Ekstrand
>> wrote:
>>> On Mon, Aug 10, 2015 at 12:07 AM, Oded Gabbay wrote:
On Mon, Aug 10, 2015 at 7:58 AM, Jason Ekstrand
wrot
On 07/08/15 23:13, Chris Wilson wrote:
To further reduce churn when replacing the buffer object implementation,
wrap the existing drm_intel_bo_reference/drm_intel_bo_unreference.
Signed-off-by: Chris Wilson
---
src/mesa/drivers/dri/i965/brw_batch.h | 12 +++
src/mesa/dri
On Mon, Aug 10, 2015 at 03:17:26PM +0300, Martin Peres wrote:
> >+static int
> >+intel_detect_pipelined_oacontrol(struct intel_screen *screen,
> >+ struct detect_pipelined_register *detect)
> > {
> > if (screen->devinfo->gen < 6 || screen->devinfo->gen >= 8)
> >
On 10/08/15 16:00, Chris Wilson wrote:
On Mon, Aug 10, 2015 at 03:17:26PM +0300, Martin Peres wrote:
+static int
+intel_detect_pipelined_oacontrol(struct intel_screen *screen,
+ struct detect_pipelined_register *detect)
{
if (screen->devinfo->gen < 6 || s
On Mon, Aug 10, 2015 at 04:08:07PM +0300, Martin Peres wrote:
>
>
> On 10/08/15 16:00, Chris Wilson wrote:
> >On Mon, Aug 10, 2015 at 03:17:26PM +0300, Martin Peres wrote:
> >>>+static int
> >>>+intel_detect_pipelined_oacontrol(struct intel_screen *screen,
> >>>+ s
Am 10.08.2015 um 07:00 schrieb Jason Ekstrand:
> On Sun, Aug 9, 2015 at 6:46 AM, Roland Scheidegger wrote:
>> Am 09.08.2015 um 12:11 schrieb Oded Gabbay:
>>> On Sun, Aug 9, 2015 at 2:43 AM, Jason Ekstrand wrote:
On Sat, Aug 8, 2015 at 3:14 PM, Oded Gabbay wrote:
> On Sun, Aug 9, 2015 at
Am 10.08.2015 um 07:03 schrieb Jason Ekstrand:
> This better ensures that the src_bits == dst_bits case gets optimized away.
> ---
> src/mesa/main/format_utils.h | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/main/format_utils.h b/src/mesa/main/format_ut
https://bugs.freedesktop.org/show_bug.cgi?id=91591
--- Comment #8 from Roland Scheidegger ---
What a mess...
I found some reference that for c++ you need to define __STDC_LIMIT_MACROS
before including to make it work. Dunno though if that's the problem
here. Also, do we need to include ?
Otherwi
On 07/08/15 23:13, Chris Wilson wrote:
When processing the packed fields, it often much easier to pass around
verb missing after "it"?
the dword value (as would be seen by hardware) than it is manipulating
the bitfield. By aliasing the bitfield with a uint32_t member, we can
treat the value a
https://bugs.freedesktop.org/show_bug.cgi?id=91591
--- Comment #9 from Jose Fonseca ---
(In reply to Roland Scheidegger from comment #8)
> I found some reference that for c++ you need to define __STDC_LIMIT_MACROS
> before including to make it work. Dunno though if that's the
> problem here.
We
On Aug 10, 2015 4:14 AM, "Neil Roberts" wrote:
>
> If we go with this patch perhaps it would be good to remove
> supports_simd16_3src entirely from brw_device_info and any code that is
> referring to it in order to avoid carrying around useless code.
> Currently it seems like it would be quite eas
https://bugs.freedesktop.org/show_bug.cgi?id=91591
--- Comment #10 from Roland Scheidegger ---
(In reply to Jose Fonseca from comment #9)
> Anwyay, roundeven_test.c is a C file, so I don't believe that's the problem.
Well the last build failure showed a failure with glsl_types.cpp - only the
pre
From: Rob Clark
Signed-off-by: Rob Clark
---
src/gallium/docs/source/screen.rst | 1 +
src/gallium/drivers/freedreno/freedreno_screen.c | 1 +
src/gallium/drivers/i915/i915_screen.c | 1 +
src/gallium/drivers/ilo/ilo_screen.c | 1 +
src/gallium/drivers/llvmpi
From: Rob Clark
Punch it through mesa and gallium, plus implementation in freedreno to
serve as an example. Radeon should be able to do a similar thing with
no-op packets. Not sure about other drivers.
Plan to use this extension from apitrace, to emit call and frame #'s
for draw commands, so I
From: Rob Clark
Signed-off-by: Rob Clark
---
src/mapi/glapi/gen/GREMEDY_string_marker.xml | 18 ++
src/mapi/glapi/gen/Makefile.am | 1 +
src/mapi/glapi/gen/gl_API.xml| 2 ++
src/mesa/main/dd.h | 6 ++
src/mesa/main/d
From: Rob Clark
Writes string to cmdstream in payload of a no-op packet.
Signed-off-by: Rob Clark
---
src/gallium/drivers/freedreno/freedreno_context.c | 27 +++
src/gallium/drivers/freedreno/freedreno_screen.c | 2 +-
2 files changed, 28 insertions(+), 1 deletion(-)
dif
On Fri, Aug 7, 2015 at 10:09 AM, Ian Romanick wrote:
> I know we've talked about this about 100 times, but something in the
> back of my mind tells me that we have a pre-existing race. What happens
> if the p_atomic_dec_zero happens on thread A while thread B is between
> the _mesa_lookup_renderb
https://bugs.freedesktop.org/show_bug.cgi?id=91591
--- Comment #11 from Matt Turner ---
Created attachment 117615
--> https://bugs.freedesktop.org/attachment.cgi?id=117615&action=edit
patch
Try this -- defines __STDC_LIMIT_MACROS before including limits.h.
--
You are receiving this mail beca
Since 4d7e0fa8c731776 this file is generated by the configure script.
---
src/gallium/targets/opencl/.gitignore | 1 +
1 file changed, 1 insertion(+)
create mode 100644 src/gallium/targets/opencl/.gitignore
diff --git a/src/gallium/targets/opencl/.gitignore
b/src/gallium/targets/opencl/.gitigno
On Mon, Aug 10, 2015 at 09:09:41AM -0700, Jason Ekstrand wrote:
> On Aug 10, 2015 4:14 AM, "Neil Roberts" wrote:
> >
> > If we go with this patch perhaps it would be good to remove
> > supports_simd16_3src entirely from brw_device_info and any code that is
> > referring to it in order to avoid car
On 08/10/2015 02:06 AM, Tapani Pälli wrote:
This is done so that following patch can use it to verify dimenstions
for multisample variants of glTex*Storage.
Signed-off-by: Tapani Pälli
---
src/mesa/main/texstorage.c | 22 +-
src/mesa/main/texstorage.h | 3 +++
2 files c
On Mon, Aug 10, 2015 at 1:02 PM, Rob Clark wrote:
> From: Rob Clark
>
> These extensions allow reading depth/stencil for GLES contexts, which is
> useful for tools like apitrace.
>
> Signed-off-by: Rob Clark
> ---
> I have a patch, which I will send out after some cleanup, that makes
> apitrace
Reviewed-by: Marek Olšák
Marek
On Mon, Aug 10, 2015 at 11:44 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> Fixes Gallium based DRI drivers failing to load on big endian hosts
> because they can't find any matching fbconfigs.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71789
From: Ian Romanick
On many CPU-limited applications, this is *the* hot path. The idea is
to generate per-API versions of brw_draw_prims that elide some checks.
This patch removes render-mode and "is everything in VBOs" checks from
core-profile contexts.
On my IVB laptop (which may have experien
https://bugs.freedesktop.org/show_bug.cgi?id=91591
--- Comment #12 from Jose Fonseca ---
if __STDC_LIMIT_MACROS is indeed the problem, then it must be defined globally
in configure.ac.
Defining in rounding.h won't be effective if by any reason limits.h is included
before rounding.h is (ie, the t
https://bugs.freedesktop.org/show_bug.cgi?id=91468
Krzysztof A. Sobiecki changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=91591
Matt Turner changed:
What|Removed |Added
Attachment #117615|0 |1
is obsolete|
On Mon, Aug 10, 2015 at 9:49 AM, Ben Widawsky wrote:
> On Mon, Aug 10, 2015 at 09:09:41AM -0700, Jason Ekstrand wrote:
>> On Aug 10, 2015 4:14 AM, "Neil Roberts" wrote:
>> >
>> > If we go with this patch perhaps it would be good to remove
>> > supports_simd16_3src entirely from brw_device_info an
On Mon, Aug 10, 2015 at 4:35 AM, Neil Roberts wrote:
> Jason Ekstrand writes:
>
>> @@ -151,8 +153,10 @@ _mesa_snorm_to_snorm(int x, unsigned src_bits, unsigned
>> dst_bits)
>>return -MAX_INT(dst_bits);
>> else if (src_bits < dst_bits)
>>return EXTEND_NORMALIZED_INT(x, src_bit
On Mon, Aug 3, 2015 at 5:22 PM, Jason Ekstrand wrote:
> The analysis code was already there and running, we just weren't doing
> anything with the result of it yet.
> ---
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 13 +
> 1 file changed, 13 insertions(+)
>
> diff --git a/src/mesa/
On Mon, Aug 3, 2015 at 5:22 PM, Jason Ekstrand wrote:
> On BDW+, the negation source modifier on NOT, AND, OR, and XOR, is actually
> a boolean negate and not an integer negate. However, NIR's soruce
> modifiers are the integer version. We have to resolve it with a MOV prior
> to emitting the ac
Many piglit tests (if using fast copy blit in Mesa) failed earlier
because I missed adding this condition. Fast copy blit is currently
enabled for use only with Yf/Ys tiling.
Signed-off-by: Anuj Phogat
---
src/mesa/drivers/dri/i965/intel_blit.c | 6 --
1 file changed, 4 insertions(+), 2 dele
On Mon, Aug 10, 2015 at 5:49 AM, Martin Peres
wrote:
> On 10/08/15 15:45, Chris Wilson wrote:
>>
>> On Mon, Aug 10, 2015 at 03:37:24PM +0300, Martin Peres wrote:
>>>
>>> 10-12 are:
>>>
>>> Reviewed-by: Martin Peres
>>
>> One thing to consider, do we want to do a s/typedef/struct brw_batch/
>> cle
https://bugs.freedesktop.org/show_bug.cgi?id=91591
--- Comment #14 from Jose Fonseca ---
Comment on attachment 117618
--> https://bugs.freedesktop.org/attachment.cgi?id=117618
patch
Review of attachment 117618:
-
Looks great.
Re
On Mon, Aug 10, 2015 at 11:16 AM, Matt Turner wrote:
> On Mon, Aug 3, 2015 at 5:22 PM, Jason Ekstrand wrote:
>> On BDW+, the negation source modifier on NOT, AND, OR, and XOR, is actually
>> a boolean negate and not an integer negate. However, NIR's soruce
>> modifiers are the integer version.
This condition restricts the use of fast copy blit to cases
where starting pixel of src and dst is oword (16 byte) aligned.
Many piglit tests (if using fast copy blit in Mesa) failed earlier
because I missed adding this condition.Fast copy blit is currently
enabled for use only with Yf/Ys tiling.
On Mon, Aug 3, 2015 at 5:22 PM, Jason Ekstrand wrote:
> This is a quick little series that fixes a bunch of piglit regressions with
> vec4 NIR on ILK- and BDW+. With this series, vec4 NIR has (I think) zero
> regressions versus non-NIR on all intel platforms. I haven't yet tested
> NIR with vec4
On Fri, Jul 31, 2015 at 10:05 AM, Jason Ekstrand wrote:
> The following 5 patches contain a few register allocation cleanups and
> performance improvements. Chris Wilson noticed that setting up register
> sets on i965 calls reralloc an absurd number of times. I did a little
> hacking and found o
On Fri, Jul 31, 2015 at 10:05 AM, Jason Ekstrand wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
> index 211f
On Mon, Aug 10, 2015 at 11:19 AM, Jason Ekstrand wrote:
> On Mon, Aug 10, 2015 at 11:16 AM, Matt Turner wrote:
>> On Mon, Aug 3, 2015 at 5:22 PM, Jason Ekstrand wrote:
>>> On BDW+, the negation source modifier on NOT, AND, OR, and XOR, is actually
>>> a boolean negate and not an integer negate.
---
src/gallium/state_trackers/clover/core/kernel.cpp | 7 +++
src/gallium/state_trackers/clover/core/sampler.cpp | 12
src/gallium/state_trackers/clover/core/sampler.hpp | 1 +
3 files changed, 20 insertions(+)
diff --git a/src/gallium/state_trackers/clover/core/kernel.cpp
b
Should this patch be cc'd to stable branches?
Without it, the compiler crashes on invalid inputs, instead of
generating an error.
This patch applies cleanly to 10.5 and 10.6.
-Mark
Renaud Gaubert writes:
> This is done by returning an rvalue of type void in the
> ast_function_expression::hi
---
src/gallium/drivers/r600/evergreen_compute.c | 25 ++
src/gallium/drivers/r600/evergreen_state.c | 30 --
src/gallium/drivers/r600/evergreend.h| 5 +
src/gallium/drivers/r600/r600_pipe.h | 7 +-
src/gallium/drivers/r600/r6
---
src/gallium/state_trackers/clover/llvm/invocation.cpp | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp
b/src/gallium/state_trackers/clover/llvm/invocation.cpp
index 86859af..50c4557 100644
--- a/src/gallium/state_trackers/clove
---
src/gallium/drivers/r600/evergreen_compute.c | 101 ---
src/gallium/drivers/r600/evergreen_state.c | 44 +++-
src/gallium/drivers/r600/r600_pipe.h | 4 +-
src/gallium/drivers/radeon/r600_texture.c| 1 +
4 files changed, 109 insertions(+), 41 d
On Sat, Aug 8, 2015 at 4:04 AM, Francisco Jerez wrote:
> Jason Ekstrand writes:
>
>> On Wed, May 13, 2015 at 9:43 AM, Francisco Jerez
>> wrote:
>>> v2: Add SKL support.
>>> ---
>>> src/mesa/drivers/dri/i965/brw_context.h | 2 +
>>> src/mesa/drivers/dri/i965/brw_surface_formats.c |
---
src/gallium/drivers/r600/evergreen_compute.c | 21 +
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_compute.c
b/src/gallium/drivers/r600/evergreen_compute.c
index d89e3de..8b27a66 100644
--- a/src/gallium/drivers/r600/ever
On Mon, Aug 10, 2015 at 11:30 AM, Matt Turner wrote:
> On Mon, Aug 10, 2015 at 11:19 AM, Jason Ekstrand wrote:
>> On Mon, Aug 10, 2015 at 11:16 AM, Matt Turner wrote:
>>> On Mon, Aug 3, 2015 at 5:22 PM, Jason Ekstrand wrote:
On BDW+, the negation source modifier on NOT, AND, OR, and XOR, i
On Mon, Aug 10, 2015 at 11:37 AM, Jason Ekstrand wrote:
> On Mon, Aug 10, 2015 at 11:30 AM, Matt Turner wrote:
>> On Mon, Aug 10, 2015 at 11:19 AM, Jason Ekstrand
>> wrote:
>>> On Mon, Aug 10, 2015 at 11:16 AM, Matt Turner wrote:
On Mon, Aug 3, 2015 at 5:22 PM, Jason Ekstrand
wrote
On Mon, Aug 10, 2015 at 10:12 AM, Ian Romanick wrote:
> From: Ian Romanick
>
> On many CPU-limited applications, this is *the* hot path. The idea is
> to generate per-API versions of brw_draw_prims that elide some checks.
> This patch removes render-mode and "is everything in VBOs" checks from
>
---
src/mesa/drivers/dri/i965/brw_vec4.h | 4 ++--
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 0c13d43..24bf354 100644
--- a/src/
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