In order to reduce future churn, rename the intel_batchbuffer struct.
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
src/mesa/drivers/dri/i965/brw_batch.h | 4 ++--
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/brw_state_batch.c | 6 ++----
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 4 ++--
src/mesa/drivers/dri/i965/intel_batchbuffer.h | 4 ++--
5 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_batch.h
b/src/mesa/drivers/dri/i965/brw_batch.h
index c38b92a..c05f9b0 100644
--- a/src/mesa/drivers/dri/i965/brw_batch.h
+++ b/src/mesa/drivers/dri/i965/brw_batch.h
@@ -41,7 +41,7 @@ enum brw_gpu_ring {
BLT_RING,
};
-struct intel_batchbuffer {
+typedef struct brw_batch {
/** Current batchbuffer being queued up. */
brw_bo *bo;
/** Last BO submitted to the hardware. Used for glFinish(). */
@@ -64,7 +64,7 @@ struct intel_batchbuffer {
uint32_t *map_next;
int reloc_count;
} saved;
-};
+} brw_batch;
#ifdef __cplusplus
}
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index ce0ea94..cd8ea50 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1023,7 +1023,7 @@ struct brw_context
*/
uint32_t reset_count;
- struct intel_batchbuffer batch;
+ brw_batch batch;
bool no_batch_wrap;
struct {
diff --git a/src/mesa/drivers/dri/i965/brw_state_batch.c
b/src/mesa/drivers/dri/i965/brw_state_batch.c
index d785c89..22dfbe5 100644
--- a/src/mesa/drivers/dri/i965/brw_state_batch.c
+++ b/src/mesa/drivers/dri/i965/brw_state_batch.c
@@ -40,14 +40,12 @@ brw_track_state_batch(struct brw_context *brw,
int size,
int index)
{
- struct intel_batchbuffer *batch = &brw->batch;
-
if (!brw->state_batch_list) {
/* Our structs are always aligned to at least 32 bytes, so
* our array doesn't need to be any larger
*/
brw->state_batch_list = ralloc_size(brw, sizeof(*brw->state_batch_list)
*
- batch->bo->size / 32);
+ brw->batch.bo->size / 32);
}
brw->state_batch_list[brw->state_batch_count].offset = offset;
@@ -124,7 +122,7 @@ __brw_state_batch(struct brw_context *brw,
uint32_t *out_offset)
{
- struct intel_batchbuffer *batch = &brw->batch;
+ brw_batch *batch = &brw->batch;
uint32_t offset;
assert(size < batch->bo->size);
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 44512be..ca65390 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -112,7 +112,7 @@ static void
do_batch_dump(struct brw_context *brw)
{
struct drm_intel_decode *decode;
- struct intel_batchbuffer *batch = &brw->batch;
+ brw_batch *batch = &brw->batch;
int ret;
decode = drm_intel_decode_context_alloc(brw->intelScreen->deviceID);
@@ -290,7 +290,7 @@ throttle(struct brw_context *brw)
static int
do_flush_locked(struct brw_context *brw)
{
- struct intel_batchbuffer *batch = &brw->batch;
+ brw_batch *batch = &brw->batch;
int ret = 0;
if (brw->has_llc) {
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
index 48d6f5a..5ca3bf3 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
@@ -32,7 +32,7 @@ extern "C" {
*/
#define BATCH_RESERVED 152
-struct intel_batchbuffer;
+struct brw_batch;
struct brw_context;
enum brw_gpu_ring;
@@ -154,7 +154,7 @@ static inline void
intel_batchbuffer_advance(struct brw_context *brw)
{
#ifdef DEBUG
- struct intel_batchbuffer *batch = &brw->batch;
+ brw_batch *batch = &brw->batch;
unsigned int _n = USED_BATCH(*batch) - batch->emit;
assert(batch->total != 0);
if (_n != batch->total) {
