On 15.10.2014 20:24, Marek Olšák wrote:
With so many cache managers, memory usage might be a bigger problem.
Usually when a cache manager fails to allocate a new buffer, it clears
the cache and tries again. This is not so useful when there are a lot
of them, because the other managers aren't cle
Kenneth Graunke writes:
> Consider GLSL code such as:
>
>const ivec2 offsets[] =
> ivec2[](ivec2(-1, -1), ivec2(-1, 0), ivec2(-1, 1),
> ivec2(0, -1), ivec2(0, 0), ivec2(0, 1),
> ivec2(1, -1), ivec2(1, 0), ivec2(1, 1));
>
>ivec2 offset = offsets[];
>
>
https://bugs.freedesktop.org/show_bug.cgi?id=84566
--- Comment #24 from Iago Toral ---
Jason, what do you think we should do for GL_COLOR_INDEX + GL_BITMAP?
Currently this is handled as a special case in the texstore.c ubyte path
(store_ubyte_texture), specifically, the special case handles extr
Emil Velikov writes:
> The kernel files are built into a separate static library and
> all the functions that require it are already wrapped in ifdef
> USE_VC4_SIMULATOR. Don't forget the header file :)
I'm probably going to be using a bunch of this code for dumping of debug
traces on non-simula
---
src/glsl/README | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/glsl/README b/src/glsl/README
index 0a0afcc..2f93f12 100644
--- a/src/glsl/README
+++ b/src/glsl/README
@@ -8,7 +8,7 @@ passed straight through. See glcpp/*
2) lex and yacc-based parser
https://bugs.freedesktop.org/show_bug.cgi?id=81680
--- Comment #43 from Ernst Sjöstrand ---
Commit?
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The radeonsi LLVM backend handles this very poorly too. It seems to do
the same thing that i965 does.
Marek
On Thu, Oct 16, 2014 at 2:32 AM, Kenneth Graunke wrote:
> Consider GLSL code such as:
>
>const ivec2 offsets[] =
> ivec2[](ivec2(-1, -1), ivec2(-1, 0), ivec2(-1, 1),
>
Signed-off-by: Topi Pohjolainen
---
src/mesa/main/uniform_query.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/uniform_query.cpp b/src/mesa/main/uniform_query.cpp
index f5787a9..e71b46f 100644
--- a/src/mesa/main/uniform_query.cpp
+++ b/src/mesa/main/uniform
Here is some basis for supporting double precision floats on i965 hw.
On IVB this gives (details below):
piglit-run.py --include-tests "ARB_gpu_shader_fp64" tests/all.py /tmp/foo
[32/32] crash: 2, fail: 5, pass: 24, skip: 1
This sits on top of Dave Airlie's and Ilia Mirkin's f
Signed-off-by: Topi Pohjolainen
Signed-off-by: Tapani P\344lli
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
i
Unfortunately the safety assertion needs to be dropped as the
amount occupied by different types of uniforms is not the same
anymore.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/src/
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index e2e942c..bec7418 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
++
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 187470c..ddef818 100644
--- a/src/mesa/drivers/dri/i965/brw
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 13 -
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.c
This is used to determine how many registers an instruction reads and
writes as well as for offseting register region into a desired component.
Signed-off-by: Topi Pohjolainen
Signed-off-by: Tapani P\344lli
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_reg.h | 2 ++
1 file c
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs.h | 4 +++-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 8 ++--
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 943e6
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_reg.h | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h
b/src/mesa/drivers/dri/i965/brw_reg.h
index cf2ef13..7cf748f 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/dri
TODO: 3-src operations
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 39 +
1 file changed, 39 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 92f19e2..a5e3475 1006
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index c352631..fa3fc41 100644
--- a/src/mesa/drivers/dri/i965/brw_
Signed-off-by: Topi Pohjolainen
Signed-off-by: Tapani P\344lli
Signed-off-by: Abdiel Janulgue
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 8
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 +++
src/mesa/drivers/dri/i965/
TODO: Prevent double precision being split between push and pull. Perhaps
it would be easiest just to force them into pull.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dr
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs.h| 1 +
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 29 +++
2 files changed, 30 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
in
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 43
src/mesa/drivers/dri/i965/brw_fs.h | 3 +++
2 files changed, 46 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 717
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_eu.h | 4
src/mesa/drivers/dri/i965/brw_eu_emit.c | 24
2 files changed, 28 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index 22d5a0a..2d2
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_defines.h| 1 +
src/mesa/drivers/dri/i965/brw_fs.h | 5 ++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 96 ++
3 files changed, 102 insertions(+)
diff --git a/src/mesa/drivers/dri/
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_defines.h| 2 ++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 45 ++
2 files changed, 47 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defi
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_defines.h| 1 +
src/mesa/drivers/dri/i965/brw_fs.h | 3 +++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 32 ++
3 files changed, 36 insertions(+)
diff --git a/src/mesa/drivers/dri/
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_defines.h| 2 +
src/mesa/drivers/dri/i965/brw_fs.h | 5 +++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 52 ++
3 files changed, 59 insertions(+)
diff --git a/src/mesa/drivers/dri/
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 36
src/mesa/drivers/dri/i965/brw_shader.h | 2 ++
2 files changed, 38 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cp
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 2 ++
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 8 +++-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
b/src
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_eu_emit.c| 6 ++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 7 ---
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_em
On Thu, Oct 16, 2014 at 03:24:12PM +0300, Topi Pohjolainen wrote:
> Here is some basis for supporting double precision floats on i965 hw.
> On IVB this gives (details below):
>
> piglit-run.py --include-tests "ARB_gpu_shader_fp64" tests/all.py /tmp/foo
> [32/32] crash: 2, fail: 5, pass: 24, skip:
On Thu, Oct 16, 2014 at 8:24 AM, Topi Pohjolainen
wrote:
> Here is some basis for supporting double precision floats on i965 hw.
> On IVB this gives (details below):
>
> piglit-run.py --include-tests "ARB_gpu_shader_fp64" tests/all.py /tmp/foo
> [32/32] crash: 2, fail: 5, pass: 24, skip: 1
This s
On 16/10/14 09:39, Eric Anholt wrote:
> Emil Velikov writes:
>
>> The kernel files are built into a separate static library and
>> all the functions that require it are already wrapped in ifdef
>> USE_VC4_SIMULATOR. Don't forget the header file :)
>
> I'm probably going to be using a bunch of th
On Oct 16, 2014 5:24 AM, "Topi Pohjolainen"
wrote:
>
> Signed-off-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index e2e
On 10/01/2014 12:00 PM, Neil Roberts wrote:
> Previously the CreateContext method of __DriverApiRec took a set of arguments
> to describe the attribute values from the window system API's
> CreateContextAttribs function. As more attributes get added this could quickly
> get unworkable and every new
From: Marek Olšák
We must convert it to boolean from the DX9 float encoding that Gallium
specifies.
Later, we should probably define that FACE should be 0 or ~0 if native
integers are supported.
Cc: 10.2 10.3
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 14 +-
1 file changed,
https://bugs.freedesktop.org/show_bug.cgi?id=84566
--- Comment #25 from Kenneth Graunke ---
I thought we killed color indexing with fire a while back. Did we miss some?
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From: Marek Olšák
This deduplicates some code.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 21f4cb8..a6ce033 100644
--- a/src/m
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_state.c | 1 +
src/gallium/drivers/radeonsi/si_state.h | 2 ++
src/gallium/drivers/radeonsi/si_state_draw.c | 38 +++-
3 files changed, 24 insertions(+), 17 deletions(-)
diff --git a/src/gallium/drivers/ra
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 6f2fb7b..cd78f66 100644
--- a/src/gallium/drivers/radeonsi/si_s
From: Marek Olšák
The values are hardcoded in the LLVM backend, but the TGSI definitions are
going to be changed with tessellation, e.g. TGSI_PROCESSOR_COMPUTE will be
increased by 2.
We'll use VS for LS and HS, because there's nothing special about them
from the LLVM backend point of view, even
From: Marek Olšák
It seemed like the function needed a context pointer. Let's remove it
to make it less confusing.
---
src/gallium/drivers/radeonsi/si_pm4.c| 5 -
src/gallium/drivers/radeonsi/si_pm4.h| 1 -
src/gallium/drivers/radeonsi/si_state.c | 14 +++---
s
From: Marek Olšák
st/mesa and gallium expect the DX9 format, so this is useless.
---
src/gallium/drivers/radeonsi/si_shader.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
i
From: Marek Olšák
I'll need indexed loads without the meta data flag for tessellation later.
Also rename load_const to buffer_load_const to distinguish it from indexed
const loads.
---
src/gallium/drivers/radeonsi/si_shader.c | 68 +---
1 file changed, 36 insertions(+
From: Marek Olšák
---
src/gallium/drivers/radeonsi/sid.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/sid.h
b/src/gallium/drivers/radeonsi/sid.h
index 3241725..c4d4afd 100644
--- a/src/gallium/drivers/radeonsi/sid.h
+++ b/src/gallium/
From: Marek Olšák
With 5 shader stages and various combinations of enabled and disabled shaders,
the maximum number of outputs in one shader doesn't have to be equal to
the maximum number of inputs in the following shader.
---
src/gallium/auxiliary/gallivm/lp_bld_limits.h| 2 ++
src/gallium/
On 10/01/2014 12:00 PM, Neil Roberts wrote:
> This adds the framework for the GLX flush control extension. It is advertised
> if the DRI driver implements the new __DRI2_FLUSH_CONTROL extension. The GLX
> attributes are converted to the appropriate DRI attributes.
> ---
> src/glx/dri2_glx.c |
On 10/01/2014 12:00 PM, Neil Roberts wrote:
> Implementing the extension just involves copying the release behaviour value
> from the context config to the GL context's constants. The upper layers of
> Mesa handles the actual flushing.
> ---
> src/mesa/drivers/dri/i965/brw_context.c | 20
Patches 1, 2, and 8 are
Reviewed-by: Ian Romanick
I sent out comments that affect the other five in the series. The
comment on patch 3 affects patches 3, 4, and, trivially, 7.
On 10/01/2014 12:00 PM, Neil Roberts wrote:
> Here's a series of patches to implement GL_KHR_flush_control and
> GLX_A
Yeah... I recall observing this when I was doing other bool related
optimization work, but I never got around to fixing it.
Reviewed-by: Ian Romanick
On 10/15/2014 08:51 PM, Kenneth Graunke wrote:
> Previously, we generated an extra CMP instruction:
>
>cmp.ge.f0(8) g4<1>D g2<0,1,
On 10/15/2014 08:51 PM, Kenneth Graunke wrote:
> Nothing uses the vector_elements temporary variable.
That's weird... was vector_elements ever used?
Either way, the changes are pretty straightforward.
Reviewed-by: Ian Romanick
> Setting this->result.file is dead because we overwrite this->resu
On 10/15/2014 08:51 PM, Kenneth Graunke wrote:
> Previously, we generated an extra CMP instruction:
>
>cmp.ge.f0(8)g6<1>D g1<0,4,1>F 0F
>cmp.nz.f0(8)nullg6<4,4,1>D 0D
>(+f0) sel(8)g5<1>F g1.4<0,4,1>Fg2<0,4,1>F
>
> The first opera
A while back, Matt made the uniform upload functions simply upload
ctx->Const.UniformBooleanTrue for boolean values instead of 0/1, which
removed the need to convert it later. We also set UniformBooleanTrue to
1.0f for drivers which want to treat booleans as 0.0/1.0f.
Nothing ever sets these, so
https://bugs.freedesktop.org/show_bug.cgi?id=81680
--- Comment #44 from Marek Olšák ---
The patch was rejected. Christian said he would take a look at the issue.
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On 10/16/2014 08:33 AM, bugzilla-dae...@freedesktop.org wrote:
*Comment # 25
I thought we killed color indexing with fire a while back. Did we miss some?
You can't kill glBitmap (in a non-core context, anyway). Strictly
speaking these aren't color indexed textures, but still hit all the same
On Thursday, October 16, 2014 11:40:39 AM Andres Gomez wrote:
> ---
> src/glsl/README | 16
> 1 file changed, 8 insertions(+), 8 deletions(-)
Pushed, thanks!
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Reviewed-by: Tapani Pälli
On 10/16/2014 07:28 PM, Kenneth Graunke wrote:
A while back, Matt made the uniform upload functions simply upload
ctx->Const.UniformBooleanTrue for boolean values instead of 0/1, which
removed the need to convert it later. We also set UniformBooleanTrue to
1.0f for dr
On Thu, Oct 16, 2014 at 07:29:10AM -0700, Jason Ekstrand wrote:
>On Oct 16, 2014 5:24 AM, "Topi Pohjolainen"
>wrote:
>>
>> Signed-off-by: Topi Pohjolainen
>> ---
>> src/mesa/drivers/dri/i965/brw_fs.cpp | 5 -
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>
Reviewed-by: Marek Olšák
Marek
On Thu, Oct 16, 2014 at 8:58 AM, Michel Dänzer wrote:
> From: Michel Dänzer
>
> The trick is to generate a unique buffer usage value for each possible
> combination of domains and flags, with only one bit set each for the
> domains and flags. This ensures pb_chec
Ian Romanick writes:
> I'm a little bit skeptical of this. _mesa_make_current doesn't call
> intelMakeCurrent. intelMakeCurrent calls _mesa_make_current, and it
> calls _mesa_make_current much later in this function. By the time
> _mesa_make_current is called, a bunch of driver state has been
On Thu, Oct 16, 2014 at 09:50:44AM -0400, Ilia Mirkin wrote:
> On Thu, Oct 16, 2014 at 8:24 AM, Topi Pohjolainen
> wrote:
> > Here is some basis for supporting double precision floats on i965 hw.
> > On IVB this gives (details below):
> >
> > piglit-run.py --include-tests "ARB_gpu_shader_fp64" tes
On Thu, Oct 16, 2014 at 1:25 PM, Pohjolainen, Topi
wrote:
> On Thu, Oct 16, 2014 at 09:50:44AM -0400, Ilia Mirkin wrote:
>> On Thu, Oct 16, 2014 at 8:24 AM, Topi Pohjolainen
>> wrote:
>> > Here is some basis for supporting double precision floats on i965 hw.
>> > On IVB this gives (details below)
https://bugs.freedesktop.org/show_bug.cgi?id=81680
--- Comment #45 from Christian König ---
(In reply to Marek Olšák from comment #44)
> The patch was rejected. Christian said he would take a look at the issue.
I unfortunately got distracted by something else. Feel free to commit the
workaround
https://bugs.freedesktop.org/show_bug.cgi?id=84566
--- Comment #26 from Jason Ekstrand ---
(In reply to Iago Toral from comment #24)
> Jason, what do you think we should do for GL_COLOR_INDEX + GL_BITMAP?
>
> Currently this is handled as a special case in the texstore.c ubyte path
> (store_ubyte
https://bugs.freedesktop.org/show_bug.cgi?id=84566
--- Comment #27 from Jason Ekstrand ---
(In reply to Iago Toral from comment #23)
> (In reply to Jason Ekstrand from comment #21)
> > (In reply to Iago Toral from comment #19)
> > > Jason, for conversions where we cannot use a fast path in the ma
On 10/16/2014 08:33 AM, Marek Olšák wrote:
From: Marek Olšák
With 5 shader stages and various combinations of enabled and disabled shaders,
the maximum number of outputs in one shader doesn't have to be equal to
the maximum number of inputs in the following shader.
---
src/gallium/auxiliary/g
On Thu, Oct 16, 2014 at 9:01 AM, Ian Romanick wrote:
> On 10/15/2014 08:51 PM, Kenneth Graunke wrote:
>> Previously, we generated an extra CMP instruction:
>>
>>cmp.ge.f0(8)g6<1>D g1<0,4,1>F 0F
>>cmp.nz.f0(8)nullg6<4,4,1>D 0D
>>(+f0) sel(8)g5<
On Wed, Oct 15, 2014 at 8:51 PM, Kenneth Graunke wrote:
> Previously, we generated an extra CMP instruction:
>
>cmp.ge.f0(8)g6<1>D g1<0,4,1>F 0F
>cmp.nz.f0(8)nullg6<4,4,1>D 0D
>(+f0) sel(8)g5<1>F g1.4<0,4,1>Fg2<0,4,1>F
>
> The fir
Reviewed-by: Matt Turner
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On Thu, Oct 16, 2014 at 8:40 PM, Roland Scheidegger wrote:
> On 10/16/2014 08:33 AM, Marek Olšák wrote:
>>
>> From: Marek Olšák
>>
>> With 5 shader stages and various combinations of enabled and disabled
>> shaders,
>> the maximum number of outputs in one shader doesn't have to be equal to
>> the
Looks correct to me. I agree a boolean face var would be nice. Last time
looking at it it seemed a bit non trivial (because the face var isn't
just used in glsl fragment shaders).
Roland
On 10/16/2014 08:33 AM, Marek Olšák wrote:
From: Marek Olšák
We must convert it to boolean from the DX9
https://bugs.freedesktop.org/show_bug.cgi?id=81680
Marek Olšák changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
Before, we used the a signed d-word for booleans and the immedates we
emitted varried between signed and unsigned. This commit changes the type
to unsigned (I think that makes more sense) and makes immediates more
consistent. This allows copy propagation to work better cleans up some
instructions
On Thursday, October 16, 2014 03:40:31 PM Jason Ekstrand wrote:
> Before, we used the a signed d-word for booleans and the immedates we
> emitted varried between signed and unsigned. This commit changes the type
> to unsigned (I think that makes more sense) and makes immediates more
> consistent.
On Thu, Oct 16, 2014 at 3:40 PM, Jason Ekstrand wrote:
> Before, we used the a signed d-word for booleans and the immedates we
> emitted varried between signed and unsigned. This commit changes the type
> to unsigned (I think that makes more sense) and makes immediates more
> consistent. This al
v2:
- Drop dependency on LLVM >= 3.5.1
---
src/gallium/drivers/r600/evergreen_compute.c | 167 +
.../drivers/r600/evergreen_compute_internal.h | 12 +-
src/gallium/drivers/r600/r600_llvm.c | 71 ++---
src/gallium/drivers/r600/r600_llvm.h
v2:
- Drop dependency on LLVM >= 3.5.1
- Rename si_create_shader() to si_shader_binary_read()
---
src/gallium/drivers/radeonsi/si_compute.c | 79 ++-
src/gallium/drivers/radeonsi/si_pipe.c| 4 ++
src/gallium/drivers/radeonsi/si_shader.c | 104 ++-
This adds a query which allows drivers to access the config
information of a specific function within the LLVM generated ELF
binary. This makes it possible for the driver to handle ELF
binaries with multiple kernels / global functions.
---
src/gallium/drivers/radeon/r600_pipe_common.h | 8
https://bugs.freedesktop.org/show_bug.cgi?id=84566
--- Comment #28 from Iago Toral ---
(In reply to Kenneth Graunke from comment #25)
> I thought we killed color indexing with fire a while back. Did we miss some?
I see multiple references to GL_COLOR_INDEX in src/mesa/main and at least these
pi
https://bugs.freedesktop.org/show_bug.cgi?id=84566
--- Comment #29 from Iago Toral ---
(In reply to Jason Ekstrand from comment #26)
> (In reply to Iago Toral from comment #24)
> > Jason, what do you think we should do for GL_COLOR_INDEX + GL_BITMAP?
> >
> > Currently this is handled as a specia
On 10/16/2014 12:55 PM, Marek Olšák wrote:
On Thu, Oct 16, 2014 at 8:40 PM, Roland Scheidegger wrote:
On 10/16/2014 08:33 AM, Marek Olšák wrote:
From: Marek Olšák
With 5 shader stages and various combinations of enabled and disabled
shaders,
the maximum number of outputs in one shader doesn
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