For the series (1-3)
Tested-by: Dieter Nützel
Are these numbers OK?
Triangle,Radeon RX 580 Series (POLARIS10 / DRM 3.25.0 /
4.16.0-rc1-1.g7262353-default+, LLVM 7.0.0),3.1 Mesa 18.1.0-devel
(git-a8cc051d2e),1920,1080,YES,Off,5240,6,0,314471
Or should I retest without this series?
Diet
Yup, most definitely. I just have one more thing to test before
sending out a V2. I've toyed around with arrays and sets and
stuff to see if there are better options than a linked list.
At least for now the answer is: "no, there isn't", but I'm gonna
test u_vector for this use later today to see if
For the subject, instead of 'address', what about something like:
i965/blorp: Update the fast clear value buffer
On 2018-03-08 08:49:05, Rafael Antognolli wrote:
> On Gen10, whenever we do a fast clear, blorp will update the clear color
> state buffer for us, as long as we set the clear color add
Hi,
On Wednesday, 14 March 2018 22:28:28 CET Brian Paul wrote:
> Reviewed-by: Brian Paul
Thanks, pushed!
best
Mathias
___
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mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
This commit adds a new instruction type to NIR for handling derefs.
Nothing uses it yet but this adds the data structure as well as all of
the code to validate, print, clone, and [de]serialize them.
Cc: Rob Clark
Cc: Connor Abbott
---
This is not tested beyond compile testing. I'm sending it
https://bugs.freedesktop.org/show_bug.cgi?id=105464
--- Comment #6 from Clément Guérin ---
I can confirm that the tessellation demo is broken without Philip's patch on
mesa 03e37ec6d7 and llvm-svn 327550 on R9 Fury.
--
You are receiving this mail because:
You are the assignee for the bug.
You a
Code looks good. I'm not able to test it, but it's isolated within #defined(
__APPLE__).
Thanks for the contribution.
Reviewed-by: Bruce Cherniak
> On Mar 14, 2018, at 6:19 PM, Jeremy Huddleston Sequoia
> wrote:
>
> From: Apple SWE
>
> The implementation for bootstrapping SWR on Darwin t
> Is a mix really warranted here? Could just use
> return result && !(isaNaN || isbNaN) (since the other mix part is just
> false I think mix is a bit overkill, albeit it might not really make a
> difference).
> Actually I think it should be simplified, you don't need to check both
> vars for NaN (
We don't currently build SWR on OS X, I've had difficulty building Mesa on OS X
in general.
But, I'd be very interesting in learning. Thanks for the patch.
Reviewed-by: Bruce Cherniak
> On Mar 14, 2018, at 6:19 PM, Jeremy Huddleston Sequoia
> wrote:
>
> From: Apple SWE
>
> sched_yield is
On Wed, Mar 14, 2018 at 8:44 PM, Connor Abbott wrote:
> On Wed, Mar 14, 2018 at 6:07 PM, Rob Clark wrote:
>> On Wed, Mar 14, 2018 at 7:42 PM, Connor Abbott wrote:
>>> On Wed, Mar 14, 2018 at 5:05 PM, Rob Clark wrote:
On Wed, Mar 14, 2018 at 4:58 PM, Connor Abbott wrote:
> FWIW, the wa
-p option now takes hex format pci-id of target architecture.
Signed-off-by: Dongwon Kim
---
run.c | 35 +--
1 file changed, 25 insertions(+), 10 deletions(-)
diff --git a/run.c b/run.c
index 69e64c7..3db97ec 100644
--- a/run.c
+++ b/run.c
@@ -356,7 +356,8 @@ con
On Wed, Mar 14, 2018 at 6:07 PM, Rob Clark wrote:
> On Wed, Mar 14, 2018 at 7:42 PM, Connor Abbott wrote:
>> On Wed, Mar 14, 2018 at 5:05 PM, Rob Clark wrote:
>>> On Wed, Mar 14, 2018 at 4:58 PM, Connor Abbott wrote:
FWIW, the way I imagined doing this was something like:
1. Add
What about a subject like this?
i965/miptree: Add new clear color BO for winsys aux buffers
On 2018-03-08 08:49:03, Rafael Antognolli wrote:
> Add an extra BO to store clear color when we receive the aux buffer from
> the window system. Since we have no control over the aux buffer size in
> this
Sent from my iPhone...
> On Mar 14, 2018, at 16:41, Matt Turner wrote:
>
> Subject should have a swr prefix or similar.
>
> On Wed, Mar 14, 2018 at 4:19 PM, Jeremy Huddleston Sequoia
> wrote:
>> From: Apple SWE
>
> Explain?
I didn’t author it. Author is an Apple Employee in SWE who does
Since the intermediate states of active_stages are not used,
i.e. active_stages is read only after all stages were set into it,
just set its value before compiling the shaders.
This will allow to conditionally run certain passes based on what
other shaders are being used, e.g. a certain pass might
---
src/intel/vulkan/anv_pipeline.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 9cfd16df2a..cb34f3be77 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
On 2018-03-08 08:49:01, Rafael Antognolli wrote:
> We always want to update the fast clear color during a fast clear on
> i965. On anv, we doing that before a resolve, but by adding support to
s/we/we are/ ?
Patches 5 - 9:
Reviewed-by: Jordan Justen
> blorp, we can do a similar thing and update
On Wed, Mar 14, 2018 at 5:07 PM, Jeremy Sequoia wrote:
>> Please don't push code to maintained drivers without going through the
>> mailing list. I feel like I shouldn't have to say that.
>
> In the past there hasn’t been much care about code in __APPLE__, so I figured
> it want that big of a dea
On Thu, 2018-03-15 at 09:37 +1000, Dave Airlie wrote:
> On 15 March 2018 at 09:29, Andres Gomez wrote:
> > It is only used for dri3 and xcb-dri3 and xcb-present were already
> > mandating the minimal version, which is incoherent with the xcb one.
>
> We are in the middle of a thread discussing th
On Wed, Mar 14, 2018 at 7:42 PM, Connor Abbott wrote:
> On Wed, Mar 14, 2018 at 5:05 PM, Rob Clark wrote:
>> On Wed, Mar 14, 2018 at 4:58 PM, Connor Abbott wrote:
>>> FWIW, the way I imagined doing this was something like:
>>>
>>> 1. Add nir_deref_instr and nir_deref_type_pointer. At this point,
On Wed, Mar 14, 2018 at 5:05 PM, Rob Clark wrote:
> On Wed, Mar 14, 2018 at 4:58 PM, Connor Abbott wrote:
>> FWIW, the way I imagined doing this was something like:
>>
>> 1. Add nir_deref_instr and nir_deref_type_pointer. At this point, just
>> make everything assert if the base deref isn't a nir
Subject should have a swr prefix or similar.
On Wed, Mar 14, 2018 at 4:19 PM, Jeremy Huddleston Sequoia
wrote:
> From: Apple SWE
Explain?
>
> The implementation for bootstrapping SWR on Darwin targets is based on the
> Linux version.
> Instead of reading the output of /proc/cpuinfo, sysctlbyn
On 15 March 2018 at 09:29, Andres Gomez wrote:
> It is only used for dri3 and xcb-dri3 and xcb-present were already
> mandating the minimal version, which is incoherent with the xcb one.
We are in the middle of a thread discussing this area already,
probably don't need
this patch at this stage. L
From: Apple SWE
sched_yield is used but the include reference on Darwin is missing. This patch
conditionally guards on Darwin/OSX to import sched.h first.
Reviewed-by: Jeremy Huddleston Sequoia
Signed-off-by: Jeremy Huddleston Sequoia
---
src/gallium/drivers/swr/swr_fence.cpp | 4
1 file
From: Apple SWE
The implementation for bootstrapping SWR on Darwin targets is based on the
Linux version.
Instead of reading the output of /proc/cpuinfo, sysctlbyname is used to
determine the
physical identifiers, processor identifiers, core counts and thread-processor
affinities.
With this p
It is only used for dri3 and xcb-dri3 and xcb-present were already
mandating the minimal version, which is incoherent with the xcb one.
This also makes configure.ac more homogeneous with other modules, like
dri2 or glx, which also need xcb but get the minimal version from
xcb-dri2 or xcb-glx, resp
On Tue, Feb 27, 2018 at 12:13:52PM -0800, Jason Ekstrand wrote:
> > diff --git a/src/intel/vulkan/anv_nir_lower_multiview.c
> > b/src/intel/vulkan/anv_nir_lower_multiview.c
> > index d2aefdee62..365a70d757 100644
> > --- a/src/intel/vulkan/anv_nir_lower_multiview.c
> > +++ b/src/intel/vulkan/anv_ni
https://bugs.freedesktop.org/show_bug.cgi?id=105442
Axel Davy changed:
What|Removed |Added
Summary|Hang when running nine ff |Hang when running nine ff
The view_index is encoded in the remainder of dividing instance id by
the number of views in the view mask (n). In the general case (handled
by the else clause), there is a need to map from 0..n-1 into the
number of the view being masked. For that a map is encoded.
In the case only the first n bit
If view mask has only one bit set, view index is effectively a
constant, so doesn't need to be passed to the next stages, just always
set it.
Part of this was in the original patch that added
anv_nir_lower_multiview.c but disabled.
v2: Fixed comment style.
---
src/intel/vulkan/anv_nir_lower_mul
https://bugs.freedesktop.org/show_bug.cgi?id=105442
Axel Davy changed:
What|Removed |Added
QA Contact|dri-devel@lists.freedesktop |mesa-dev@lists.freedesktop.
I see. Because user will be putting PCI_ID instead if a specific device
variant is required. I shouldn't have been confused in the first
place :-).
Thanks,
On Wed, Mar 14, 2018 at 04:03:05PM -0700, Kenneth Graunke wrote:
> On Wednesday, March 14, 2018 3:43:18 PM PDT Dongwon Kim wrote:
> > Yeah, t
On Wed, Mar 14, 2018 at 4:58 PM, Connor Abbott wrote:
> FWIW, the way I imagined doing this was something like:
>
> 1. Add nir_deref_instr and nir_deref_type_pointer. At this point, just
> make everything assert if the base deref isn't a nir_deref_var. This
> will be a bit of a flag-day, but also
On Wednesday, March 14, 2018 3:43:18 PM PDT Dongwon Kim wrote:
> Yeah, thought about that (checking name then -> try to parse it as PCI-ID)
> but didn't implement it because it won't work when there are multiple
> different PCI-ID bound to same 'name' (e.g. want to use a specific PCI-ID
> hsw). But
Thanks for the review, Ken
I agree on most of your proposals.
I will upload another version shortly.
On Wed, Mar 14, 2018 at 03:10:25PM -0700, Kenneth Graunke wrote:
> On Monday, February 26, 2018 2:17:05 PM PDT Dongwon Kim wrote:
> > extraction of linked binary program to a file using glGetProgra
Yeah, I am using "intel_run" script that lets "run" use intel_stub
layer instead. Pretty useful..
On Wed, Mar 14, 2018 at 02:54:08PM -0700, Kenneth Graunke wrote:
> On Monday, February 12, 2018 5:26:15 PM PDT Dongwon Kim wrote:
> > Add a new option, '--pciid' to override a pci id of the target arc
Yeah, thought about that (checking name then -> try to parse it as PCI-ID)
but didn't implement it because it won't work when there are multiple
different PCI-ID bound to same 'name' (e.g. want to use a specific PCI-ID
hsw). But wait a minite I think the opposite way (check if it's PCI-ID
first
Hi Emil, all,
I think we've closed the last of the Mesa 18.0 blocker bugs. It looks
like there are some patches nominated for the 18.0 branch still (fixing
some of those issues), but assuming things are merged, I think we're
ready to release.
I checked with Mark and Jason on IRC and they seemed
On Friday, March 9, 2018 2:28:36 PM PDT Dongwon Kim wrote:
> Optional binding of variables can be processed before linking shader
> objects for creating shader program. It is activated by adding lines
> with a keyword "BindAttribLoc" followed by name and index as,
>
> "BindAttribLoc name_str1 "
>
On Monday, February 26, 2018 2:17:05 PM PDT Dongwon Kim wrote:
> extraction of linked binary program to a file using glGetProgramBinary.
> This file is intended to be loaded by glProgramBinary in the graphic
> application running on the target system.
>
> To enable this feature, a new option '--bi
On Monday, February 12, 2018 5:26:15 PM PDT Dongwon Kim wrote:
> Add a new option, '--pciid' to override a pci id of the target arch
> to support cross-architecture shader compilation. Not like "-p" option,
> it is for accepting any GFX devices supported by the driver.
>
> Setting both "-p" and "-
On Monday, February 12, 2018 5:26:15 PM PDT Dongwon Kim wrote:
> Add a new option, '--pciid' to override a pci id of the target arch
> to support cross-architecture shader compilation. Not like "-p" option,
> it is for accepting any GFX devices supported by the driver.
>
> Setting both "-p" and "-
Reviewed-by: Brian Paul
On Wed, Mar 14, 2018 at 2:47 PM, wrote:
> From: Mathias Fröhlich
>
> Hi,
>
> Seems that the big patch did break something.
> Below the fix.
>
> please review
>
> best
>
> Mathias
>
>
>
>
> The original approach did optimize away a bit too many fields.
> Restablish the
On 15 March 2018 at 03:25, Daniel Stone wrote:
> Hi,
>
> On 14 March 2018 at 13:04, Rob Clark wrote:
>> I'm not sure everyone wants to be updating their dri3 in a forced
>> march setting, this allows a nicer approach, esp when you want
>> to build on distro that aren't brand new.
>
> I don't have
FWIW, the way I imagined doing this was something like:
1. Add nir_deref_instr and nir_deref_type_pointer. At this point, just
make everything assert if the base deref isn't a nir_deref_var. This
will be a bit of a flag-day, but also very mechanical. It'll also help
us catch cases where we don't h
From: Mathias Fröhlich
Hi,
Seems that the big patch did break something.
Below the fix.
please review
best
Mathias
The original approach did optimize away a bit too many fields.
Restablish the pointer into the original array and correctly feed that
one.
Bugzilla: https://bugs.freedesktop
https://bugs.freedesktop.org/show_bug.cgi?id=105506
--- Comment #5 from Jason Ekstrand ---
I recommend you file a bug against the validation layers as at least the first
of the two comments Bas made should be invalid. The second is valid but does
not do what you want.
--
You are receiving this
All,
Connor and I along with several others have been discussing for a while
changing the way NIR dereferences work. In particular, adding a new
nir_deref_instr type where the first one in the chain takes a variable and
is followed by a series of instructions which take another deref
instruction
For the series
Tested-by: Dieter Nützel
on Polaris 20 (RX580) with several Wine-staging (Nine) apps, but I've to
note, that I do NOT have Guild Wars 2 and Torchlight...
Dieter
Am 13.03.2018 23:09, schrieb Axel Davy:
An incorrect formula was used to compute bound_samplers_mask_vs.
Since s i
https://bugs.freedesktop.org/show_bug.cgi?id=105506
Bas Nieuwenhuizen changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On Wed, 2018-03-14 at 16:02 +, Emil Velikov wrote:
[...]
>
> Just double-checking:
> I would suspect you're not suggesting removing the existing email/poke scheme?
Partially. The "announce" mail for the pre-branching period will still
happen, pointing to the "Metabug" in which to add the WIP
Hello Thomas,
is this useful even after '[Mesa-dev] [PATCH 0/2] V2: Use hash table
cloning in copy propagation' landed?
I've running both together with Dave's '[Mesa-dev] [PATCH] radv/winsys:
replace bo list searchs with a hash table.' patch.
Dieter
Am 24.01.2018 08:33, schrieb Thomas Hell
Pushed! Thanks.
Marek
On Tue, Feb 20, 2018 at 8:30 AM, Guillaume Charifi
wrote:
> ---
> src/mesa/state_tracker/st_cb_blit.c | 76
> +
> 1 file changed, 26 insertions(+), 50 deletions(-)
>
> diff --git a/src/mesa/state_tracker/st_cb_blit.c
> b/src/mesa/state
On Tue, Mar 13, 2018 at 5:30 AM, Daniel Stone wrote:
> Hi Mario,
>
> On 12 March 2018 at 20:45, Mario Kleiner wrote:
>> This way the wayland server can signal support for these formats
>> to wayland EGL clients. This is currently used by nouveau for 10
>> bpc support.
>>
>> Tested with glmark2-wa
Emil Velikov wrote:
From: Emil Velikov
Instead of indirectly pulling the wayland headers everywhere, use
forward declarations and #include only as needed.
Should effectively fix build errors like the following:
make[5]: Entering directory
'/.../src/gallium/state_trackers/omx/tizonia'
CC
On Tue, Jan 09, 2018 at 11:17:01PM -0800, Scott D Phillips wrote:
> Removes a place where gtt mapping is used.
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
This patch is
Reviewed-by: Nanley Chery
> diff --git a/src/mesa/driv
https://bugs.freedesktop.org/show_bug.cgi?id=105507
--- Comment #2 from Daniel Stone ---
You could place any orphaned wl_buffers on an per-surface list instead, and
spin at destruction until that emptied. I won't have the time to look into it
myself for a while though.
Johan - which test hits th
https://bugs.freedesktop.org/show_bug.cgi?id=105507
Emil Velikov changed:
What|Removed |Added
CC||dan...@fooishbar.org
--- Comment #1 from
From: Emil Velikov
Instead of indirectly pulling the wayland headers everywhere, use
forward declarations and #include only as needed.
Should effectively fix build errors like the following:
make[5]: Entering directory
'/.../src/gallium/state_trackers/omx/tizonia'
CC h264dprc.lo
In fil
On Tue, 2018-03-13 at 23:09 +0100, Axel Davy wrote:
> An incorrect formula was used to compute bound_samplers_mask_vs.
> Since s is above always 8 for vs and the variable is encoded on 8
> bits,
> it was always 0.
> This resulted in commiting the samplers every call when
> there was at least one te
On 13 March 2018 at 19:20, Dylan Baker wrote:
> Quoting Andy Furniss (2018-03-06 15:12:37)
>> make[5]: Entering directory
>> '/mnt/sdc1/Gits/mesa/src/gallium/state_trackers/omx/tizonia'
>>CC h264dprc.lo
>> In file included from h264dprc.c:45:0:
>> ../../../../../src/egl/drivers/dri2/egl_
Hi,
On 14 March 2018 at 13:04, Rob Clark wrote:
> I'm not sure everyone wants to be updating their dri3 in a forced
> march setting, this allows a nicer approach, esp when you want
> to build on distro that aren't brand new.
I don't have that much of an opinion on whether the dependency should
b
There are a couple of ways we can get the fusing information from the
kernel :
- Through DRM_I915_GETPARAM with the SLICE_MASK/SUBSLICE_MASK
parameters
- Through the new DRM_IOCTL_I915_QUERY by requesting the
DRM_I915_QUERY_TOPOLOGY_INFO
The second method is more accurate and also gi
Already available with the autotools build.
Signed-off-by: Lionel Landwerlin
---
src/intel/dev/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/dev/meson.build b/src/intel/dev/meson.build
index 3346fe60c07..9369fd3c0da 100644
--- a/src/intel/dev/meson.bui
This commit is meant to be replaced with a proper bump from drm-next.
---
include/drm-uapi/i915_drm.h | 146 +++-
1 file changed, 145 insertions(+), 1 deletion(-)
diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 7f28eea4035..9dfe
This will be reused to store values reported by the kernel. The main
use case will be for use as the input values of the metric sets
equations for the INTEL_performance_queries extension. By storing this
information in the gen_device_info we make this non GL specific so
this can be reused by Vulkan
Some equations of the CNL metrics started to use operators we haven't
defined yet, just add those.
Signed-off-by: Lionel Landwerlin
---
src/mesa/drivers/dri/i965/brw_oa.py | 15 +++
1 file changed, 15 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_oa.py
b/src/mesa/drivers
We want to store values coming from the kernel but as a first step, we
can generate mask values out the numbers already stored in the
gen_device_info masks.
Signed-off-by: Lionel Landwerlin
---
src/intel/dev/gen_device_info.c | 43 +
src/intel/dev/gen_devi
Hi all,
Here a v2 to enable perf queries on CNL.
It moves some of the data stored into the brw_context into
gen_device_info. The makes it reusable by other API (Vulkan) if they
develop perf queries capabilities in the future.
One of the patch is quite big, you can look at this series on my
githu
With the introduction of asymmetric slices in CNL, we cannot rely on
the previous SUBSLICE_MASK getparam to tell userspace what subslices
are available.
We introduce a new uAPI in the kernel driver to report exactly what
part of the GPU are fused and require this to be available on Gen10+.
Prior
Quoting Nanley Chery (2018-03-14 17:14:15)
> On Mon, Mar 12, 2018 at 10:52:55AM -0700, Scott D Phillips wrote:
> > Rename the (un)map_gtt functions to (un)map_map (map by
> > returning a map) and add new functions (un)map_tiled_memcpy that
> > return a shadow buffer populated with the intel_tiled_m
On Mon, Mar 12, 2018 at 10:52:55AM -0700, Scott D Phillips wrote:
> Rename the (un)map_gtt functions to (un)map_map (map by
> returning a map) and add new functions (un)map_tiled_memcpy that
> return a shadow buffer populated with the intel_tiled_memcpy
> functions.
>
> Tiling/detiling with the cpu
For the series:
Reviewed-by: Marek Olšák
You can push the series now if you want to. That would be simplest.
Marek
On Wed, Mar 14, 2018 at 12:10 PM, Dylan Baker wrote:
> Signed-off-by: Dylan Baker
>
> ---
>
> Marek, can you either squash this into your other patch or push this along
> with
Hi,
On Wednesday, 14 March 2018 15:51:03 CET Brian Paul wrote:
> FWIW, I'd like to see this sooner rather than later too. I spent
> several hours yesterday trying to update our build script to
> build/install XCB 1.13 on Fedora, Ubuntu, etc. without totally succeeding.
I did just rebuild the 1
Quoting Dylan Baker (2018-03-14 09:42:36)
> Quoting Rob Clark (2018-03-14 06:04:58)
> > Similar to previous patch, make xcb 1.13 optional.
> >
> > Signed-off-by: Rob Clark
> > ---
> > meson.build | 11 ---
> > 1 file changed, 8 insertions(+), 3 deletions(-)
> >
> > diff --git a/meson.bu
Quoting Rob Clark (2018-03-14 06:04:58)
> Similar to previous patch, make xcb 1.13 optional.
>
> Signed-off-by: Rob Clark
> ---
> meson.build | 11 ---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/meson.build b/meson.build
> index c201644c372..0e2f73e67b6 100644
>
https://bugs.freedesktop.org/show_bug.cgi?id=105510
Clayton Craft changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On 14 March 2018 at 01:03, Marek Olšák wrote:
> From: Marek Olšák
>
> Cc: 18.0 17.3 17.2
> ---
> configure.ac | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/configure.ac b/configure.ac
> index 621dc32..e29ce68 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -2601,20 +2601
https://bugs.freedesktop.org/show_bug.cgi?id=105396
--- Comment #2 from James Legg ---
https://patchwork.freedesktop.org/patch/208935/ fixes it for me on my RX 480,
but I haven't had any reviews on that patch yet and I'm not sure if I'm heading
in the right direction. It would also be good to tes
Signed-off-by: Dylan Baker
Cc: 18.0 17.3 17.2
Cc: Emil Vilikov
---
Emil, I don't know what the appropriate thing to do is here, this is the meson
equivalent of Marek's first patch, but this doesn't make any sense on master.
meson.build | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Signed-off-by: Dylan Baker
---
Marek, can you either squash this into your other patch or push this along with
that?
meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
index 51b470253f5..e21ac74a1e3 100644
--- a/meson.build
+++ b/meson.bui
On 14 March 2018 at 14:51, Brian Paul wrote:
> On 03/14/2018 08:40 AM, Rob Clark wrote:
>>
>> On Wed, Mar 14, 2018 at 10:29 AM, Emil Velikov
>> wrote:
>>>
>>> On 14 March 2018 at 13:04, Rob Clark wrote:
From: Dave Airlie
I'm not sure everyone wants to be updating their dri3
https://bugs.freedesktop.org/show_bug.cgi?id=105510
Bug ID: 105510
Summary: Unable to build swrAVX@sha/rasterizer_core_threads.cpp
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
Keywords: r
Quoting Dylan Baker (2018-03-13 19:45:37)
> Wrap it in parens and it can span multiple lines
>
> On March 13, 2018 5:40:15 PM PDT, Rob Clark wrote:
>
> On Tue, Mar 13, 2018 at 7:47 PM, Rob Clark wrote:
> On Tue, Mar 13, 2018 at 7:27 PM, Rob Clark
> wrote:
> On Tue, M
On 14 March 2018 at 11:20, Andres Gomez wrote:
> Hi,
>
> On Mon, 2018-03-12 at 18:02 +, Emil Velikov wrote:
>> Hi Andres,
>>
>> On 12 March 2018 at 15:57, Andres Gomez wrote:
>> >
>
> [...]
>
>> >
>> > 18.1 example:
>> >
>> >1. Create a Metabug for the 18.1 branch point.
>> >2. Announ
On 14/03/18 16:08, Daniel Schürmann wrote:
>
> On 14.03.2018 16:03, Alejandro Piñeiro wrote:
>> On 14/03/18 15:55, Daniel Schürmann wrote:
>>> Not sure, if I'm asked here :)
>>> As AMD_gcn_shader seems to be the only extension without new
>>> capability,
>>> I am fine with just handling it as if.
>
On Tue, Mar 13, 2018 at 04:54:27PM -0700, Matt Turner wrote:
> On Mon, Mar 12, 2018 at 9:24 PM, Dave Airlie wrote:
> > This is the main code for the soft fp64 work. It's mostly Elie's
> > code with a bunch of changes by me.
> >
> > This patchset has all the glsl lowering code. (using float64.glsl,
Samuel sent out a patch to fix this already which I've reviewed. Feel free
to merge it. I gave him comments on the second so maybe best to leave that
one be.
That said, I do sort-of like your macro...
On Wed, Mar 14, 2018 at 8:08 AM, Rob Clark wrote:
> These opcodes don't care about src/dst t
These opcodes don't care about src/dst type, only src/dst size.
Signed-off-by: Rob Clark
---
src/compiler/spirv/vtn_alu.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
index f0b69b38f83..1ca1f951200
On 14.03.2018 16:03, Alejandro Piñeiro wrote:
On 14/03/18 15:55, Daniel Schürmann wrote:
Not sure, if I'm asked here :)
As AMD_gcn_shader seems to be the only extension without new capability,
I am fine with just handling it as if.
Well, I was exactly asking this, if everybody involved is fine
On 14/03/18 15:55, Daniel Schürmann wrote:
> Not sure, if I'm asked here :)
> As AMD_gcn_shader seems to be the only extension without new capability,
> I am fine with just handling it as if.
Well, I was exactly asking this, if everybody involved is fine with
this. Bonus points to get a review to
https://bugs.freedesktop.org/show_bug.cgi?id=105506
--- Comment #3 from Turo Lamminen ---
Created attachment 138108
--> https://bugs.freedesktop.org/attachment.cgi?id=138108&action=edit
vktrace trace
--
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Cont
Hi!
When recording command buffer I get error:
Program received signal SIGBUS, Bus error.
anv_state_stream_alloc (stream=stream@entry=0x9dbf9dd8, size=64,
alignment=alignment@entry=32) at vulkan/anv_allocator.c:913
913 VG_NOACCESS_WRITE(&sb->block, stream->block);
0 in anv_state_stre
On Mon, 2018-03-12 at 15:48 +, Emil Velikov wrote:
> On 12 March 2018 at 14:20, Andres Gomez wrote:
[...]
> > On Tue, 2018-03-06 at 19:34 +, Emil Velikov wrote:
> >
> > [...]
> >
> > > A few other ideas that were also came to mind:
> > >
> > > - Round robin - where me/Igalia team wil
Not sure, if I'm asked here :)
As AMD_gcn_shader seems to be the only extension without new capability,
I am fine with just handling it as if.
Additionally, we might want to rename it to gcn_shader to be consistent
(or add the vendor names to all capabilities).
Do you want to introduce one field
https://bugs.freedesktop.org/show_bug.cgi?id=105507
Bug ID: 105507
Summary: Crash when destroying a newly resized EGLsurface with
wayland egl (dri2)
Product: Mesa
Version: 17.3
Hardware: x86-64 (AMD64)
OS: L
On March 14, 2018 03:42:04 Samuel Iglesias Gonsálvez
wrote:
We don't need anymore the source and destination's data type, just
their bitsize.
Signed-off-by: Samuel Iglesias Gonsálvez
---
src/compiler/spirv/spirv_to_nir.c | 4 ++--
src/compiler/spirv/vtn_alu.c | 30 ++--
This introduces new vec8 and vec16 instructions (which are the only
instructions taking more than 4 sources), in order to construct 8 and 16
component vectors.
nir_build_alu() is a bit ugly.. perhaps re-work to take an array of
src's? Current approach should be something the compiler could inline
Refactor things so there isn't so much typing involved to add new
things.
Also drops a pointless conditional (out of bounds rows or columns
already returns error_type in all paths.. might as well drop it
rather than make the check more convoluted in the next patch by
adding the vec8/vec16 case).
Not used in GL but 8 and 16 component vectors exist in OpenCL.
Signed-off-by: Rob Clark
---
OpenCL committee: "Sure everyone switched to scalar instruction sets,
but let's double down on the vec4" :-P
src/compiler/builtin_type_macros.h | 4 +++-
src/compiler/glsl_types.cpp| 8 +++
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