Re: [Mesa-dev] Shader Interface Matching

On 12/03/2015 09:03 AM, Timothy Arceri wrote: On Thu, 2015-12-03 at 08:46 +0200, Tapani Pälli wrote: On 12/03/2015 05:58 AM, Timothy Arceri wrote: Hi All, I recently pushed a couple of piglit tests [1] and [2] that test for matching of blocks and structs based on location rather than name w

Re: [Mesa-dev] Shader Interface Matching

On Thu, 2015-12-03 at 08:46 +0200, Tapani Pälli wrote: > > On 12/03/2015 05:58 AM, Timothy Arceri wrote: > > Hi All, > > > > I recently pushed a couple of piglit tests [1] and [2] that test > > for > > matching of blocks and structs based on location rather than name > > when > > an explicit loca

Re: [Mesa-dev] Shader Interface Matching

On 12/03/2015 05:58 AM, Timothy Arceri wrote: Hi All, I recently pushed a couple of piglit tests [1] and [2] that test for matching of blocks and structs based on location rather than name when an explicit location is given. The test pass on Nvidia but fail in current Mesa. However I just ca

[Mesa-dev] [Bug 92850] Segfault loading War Thunder

https://bugs.freedesktop.org/show_bug.cgi?id=92850 --- Comment #34 from Michel Dänzer --- The gcc manual has a list of all -f... options enabled by -O2. You can try bisecting that list to find the individual -f... option which triggers the problem. -- You are receiving this mail because: You ar

[Mesa-dev] [Bug 92850] Segfault loading War Thunder

https://bugs.freedesktop.org/show_bug.cgi?id=92850 Tapani Pälli changed: What|Removed |Added CC|lem...@gmail.com| -- You are receiving this mail because:

[Mesa-dev] [Bug 92850] Segfault loading War Thunder

https://bugs.freedesktop.org/show_bug.cgi?id=92850 --- Comment #33 from bellamort...@gmail.com --- -O2 segfaults -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. ___ mesa-dev mailing list mes

[Mesa-dev] Shader Interface Matching

Hi All, I recently pushed a couple of piglit tests [1] and [2] that test for matching of blocks and structs based on location rather than name when an explicit location is given. The test pass on Nvidia but fail in current Mesa. However I just came across this in section 7.4.1 (Shader Interface

[Mesa-dev] [Bug 92850] Segfault loading War Thunder

https://bugs.freedesktop.org/show_bug.cgi?id=92850 --- Comment #32 from bellamort...@gmail.com --- -fno-strict-aliasing with -O3 still segfaults. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug.

[Mesa-dev] [Bug 92850] Segfault loading War Thunder

https://bugs.freedesktop.org/show_bug.cgi?id=92850 --- Comment #31 from bellamort...@gmail.com --- Sorry, here's the full list. CFLAGS="-march=bdver2 -O1 -pipe -fstack-protector-strong --param=ssp-buffer-size=4" CXXFLAGS="-march=bdver2 -O1 -pipe -fstack-protector-strong --param=ssp-buffer-size=4"

Re: [Mesa-dev] [PATCH 1/9] gallium/radeon: remove DBG_TEXMIP

On 03.12.2015 04:34, Marek Olšák wrote: > From: Marek Olšák > > we don't need 2 flags for dumping texture info The series is Reviewed-by: Michel Dänzer -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X

Re: [Mesa-dev] [PATCH] travis: Initial import of travis instructions.

On 03.12.2015 06:01, Jose Fonseca wrote: > On 02/12/15 03:39, Michel Dänzer wrote: >> On 02.12.2015 07:06, Jose Fonseca wrote: >>> On 28/11/15 21:06, Emil Velikov wrote: On 25 November 2015 at 07:20, Jose Fonseca wrote: > BTW, I setup Mesa with Appveyor (like Travis for Windows)

[Mesa-dev] [Bug 92850] Segfault loading War Thunder

https://bugs.freedesktop.org/show_bug.cgi?id=92850 --- Comment #30 from Michel Dänzer --- Is -fno-strict-aliasing included in the final flags passed to the compiler? If not, does adding that help? -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee f

[Mesa-dev] [Bug 92850] Segfault loading War Thunder

https://bugs.freedesktop.org/show_bug.cgi?id=92850 --- Comment #29 from bellamort...@gmail.com --- Well that was quick. Not done testing it yet. First test run was done with -march=bdver2 and -O0. That worked. Second one was done with -march=bdver2 and -O1. That worked. Orginally I was using -

[Mesa-dev] [Bug 92850] Segfault loading War Thunder

https://bugs.freedesktop.org/show_bug.cgi?id=92850 Michel Dänzer changed: What|Removed |Added Component|Drivers/Gallium/radeonsi|Mesa core Assignee|dri-devel@l

[Mesa-dev] [Bug 93089] mesa fails to check for gcc atomic primitives before using them

https://bugs.freedesktop.org/show_bug.cgi?id=93089 --- Comment #6 from Jonathan Gray --- I added support for the gnu binary integer constant extension to gcc specifically for the intel driver in Mesa. We've also changed the behaviour of the sync builtins with PIC on i386 to not clobber ebx as we

Re: [Mesa-dev] [PATCH 3/3] draw: fix clipping of layer/vp index outputs

The series LGTM. Reviewed-by: Brian Paul Just minor whitespace nits below. On 12/02/2015 05:35 PM, srol...@vmware.com wrote: From: Roland Scheidegger This was just plain broken. It used always the value from v0 (for vp_index) but would pass the value from the provoking vertex to later stag

Re: [Mesa-dev] [RFC PATCH] nir: Add byte_extract operation.

Matt Turner writes: > Two shaders that appear in Unigine benchmarks (Heaven and Valley) unpack > three bytes from an integer and convert each into a float: > >float((val >> 16u) & 0xffu) >float((val >> 8u) & 0xffu) >float((val >> 0u) & 0xffu) > > Instead of shifting, masking, and ty

[Mesa-dev] [PATCH 1/3] llvmpipe: use provoking vertex for layer/viewport

From: Roland Scheidegger d3d10 actually requires using provoking (first) vertex. GL is happy with any vertex (as long as we say it's undefined in the corresponding queries). Up to now we actually used vertex 0 for viewport index, and vertex 1 for layer (for tris), which really didn't make sense (

[Mesa-dev] [PATCH 2/3] softpipe: use provoking vertex for layer

From: Roland Scheidegger Same as for llvmpipe, albeit softpipe only really handles multiple layers, not multiple viewports/scissors. --- src/gallium/drivers/softpipe/sp_setup.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/softpipe/sp_setup.c b/src/

[Mesa-dev] [PATCH 3/3] draw: fix clipping of layer/vp index outputs

From: Roland Scheidegger This was just plain broken. It used always the value from v0 (for vp_index) but would pass the value from the provoking vertex to later stages - but only if there was a corresponding fs input, otherwise the layer/vp index would get lost completely (as it would try to inte

[Mesa-dev] [PATCH 14/26] i965: Add Gen8+ tessellation evaluation shader state (3DSTATE_DS).

Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen8_ds_state.c | 66 +++ 1 file changed, 59 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_ds_state.c b/src/mesa/drivers/dri/i965/gen8_ds_state.c index 4ce4ab3..a79e8aa 100644 --

[Mesa-dev] [PATCH 13/26] i965: Add tessellation shader push constant support.

Based on a patch by Chris Forbes. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_context.h | 2 +- src/mesa/drivers/dri/i965/brw_state.h| 2 ++ src/mesa/drivers/dri/i965/brw_state_upload.c | 2 ++ src/mesa/drivers/dri/i965/gen7_ds_state.c| 29 +++

[Mesa-dev] [PATCH 26/26] NOT YET. i965: Enable ARB_tessellation_shader on Gen8+.

TODO: - Handle missing TCS (GL only) - Handle SSO mix-and-match TCS/TES bugs. Almost! Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/int

[Mesa-dev] [PATCH 05/26] i965: Set core tessellation-related limits

From: Chris Forbes Signed-off-by: Chris Forbes Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_context.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index cf8c6a2

[Mesa-dev] [PATCH 23/26] i965: Make brw_set_message_descriptor() non-static.

I want to use this directly from brw_vec4_generator.cpp. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_eu.h | 8 src/mesa/drivers/dri/i965/brw_eu_emit.c | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/sr

[Mesa-dev] [PATCH 01/26] nir: Add a writemask to store intrinsics.

Tessellation control shaders need to be careful when writing outputs. Because multiple threads can concurrently write the same output variables, we need to only write the exact components we were told. Traditionally, for sub-vector writes, we've read the whole vector, updated the temporary, and wr

[Mesa-dev] [PATCH 09/26] i965: URB allocations for tessellation

From: Chris Forbes Signed-off-by: Chris Forbes --- src/mesa/drivers/dri/i965/brw_context.h | 17 +++- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 8 ++ src/mesa/drivers/dri/i965/gen7_urb.c | 162 +-- 3 files changed, 157 insertions(+), 30 deletions(-) The URB

[Mesa-dev] [PATCH 12/26] i965: Add tessellation shader sampler support.

Based on code by Chris Forbes and Fabian Bieler. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_context.h | 2 +- src/mesa/drivers/dri/i965/brw_sampler_state.c | 46 +++ src/mesa/drivers/dri/i965/brw_state.h | 2 ++ src/mesa/drivers/dri/i

[Mesa-dev] [PATCH 10/26] i965: Add tessellation shader VUE map code.

Based on a patch by Chris Forbes, but largely rewritten by Ken. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_compiler.h | 20 ++- src/mesa/drivers/dri/i965/brw_vue_map.c | 98 ++-- 2 files changed, 111 insertions(+), 7 deletions(-) Note that

[Mesa-dev] [PATCH 02/26] nir: Use writemasked store_vars in glsl_to_nir.

Instead of performing the read-modify-write cycle in glsl->nir, we can simply emit a partial writemask. For locals, nir_lower_vars_to_ssa will do the equivalent read-modify-write cycle for us, so we continue to get the same SSA values we had before. Because glsl_to_nir calls nir_lower_outputs_to_

[Mesa-dev] [PATCH 17/26] i965: Implement get_nir_src_imm() helpers.

Normally, get_nir_src() won't return an immediate value - it moves it to a temporary VGRF. There are consumers of get_nir_src() that rely on this, and are unprepared to handle immediate values. This patch introduces new helpers which return immediates for single component constant values, and VGR

[Mesa-dev] [PATCH 25/26] i965: Implement gl_PatchVerticesIn by baking it into brw_tcs_prog_key.

The hardware provides us no decent way of getting at the number of input vertices in the patch topology from the tessellation control shader. It's actually very surprising - normally this sort of information would be available in the thread payload. For the precompile, we guess that the number of

[Mesa-dev] [PATCH 16/26] i965: Add Gen8+ tessellation control shader state (3DSTATE_HS).

Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen8_hs_state.c | 64 --- 1 file changed, 51 insertions(+), 13 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_hs_state.c b/src/mesa/drivers/dri/i965/gen8_hs_state.c index 62e714d..38e2235 100644 -

[Mesa-dev] [PATCH 22/26] i965: Add tessellation evaluation shaders

The TES is essentially a post-tessellator VS, which has access to the entire TCS output patch, and a special gl_TessCoord input. Otherwise, they're very straightforward. This patch implements SIMD8 tessellation evaluation shaders for Gen8+. The tessellator can generate a lot of geometry, so opera

[Mesa-dev] [PATCH 20/26] i965: Don't hardcode g1 for URB handles in fs_visitor::emit_urb_writes().

Tessellation evaluation shaders will use g4 instead. For now, make an fs_reg called urb_handle and use that in place of hardcoding g1. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src

[Mesa-dev] [PATCH 11/26] i965: Add tessellation shader surface support.

This is brw_gs_surface_state.c copy and pasted twice with search and replace. brw_binding_table.c code is similarly copy and pasted. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/Makefile.sources| 2 + src/mesa/drivers/dri/i965/brw_binding_tables.c| 54 sr

[Mesa-dev] [PATCH 19/26] i965: Implement a get_nir_vertex_index_src() helper.

Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4.h | 1 + src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 13 + 2 files changed, 14 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index e7293af..dfe9853

[Mesa-dev] [PATCH 24/26] i965: Add tessellation control shaders.

The TCS is the first tessellation shader stage, and the most complicated. It has access to each of the control points in the input patch, and computes a new output patch. There is one logical invocation per output control point; all invocations run in parallel, and can communicate by reading and

[Mesa-dev] [PATCH 06/26] i965: Add backend structures for tess stages

From: Chris Forbes Signed-off-by: Chris Forbes Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_compiler.h | 18 src/mesa/drivers/dri/i965/brw_context.c | 2 ++ src/mesa/drivers/dri/i965/brw_context.h | 44 src/mesa/drivers

[Mesa-dev] [PATCH 00/26] i965: Tessellation shaders for Gen8+!

Hello, Here's an implementation of GL_ARB_tessellation_shader (part of GL 4.0) for Intel Gen8+ hardware (Broadwell and Skylake). Unigine Heaven works, GPUTest/TessMark works, and almost all Piglit tests are passing. Shadow of Mordor also works, with one extra patch to fix implicit int/uint conve

[Mesa-dev] [PATCH 15/26] i965: Add Gen7+ tessellation engine state (3DSTATE_TE).

Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen7_te_state.c | 36 --- 1 file changed, 28 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_te_state.c b/src/mesa/drivers/dri/i965/gen7_te_state.c index 95a5e98..2650fa5 100644 --

[Mesa-dev] [PATCH 18/26] i965: Implement a get_nir_indirect_src() helper.

Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4.h | 2 ++ src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 12 2 files changed, 14 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index 0150bb9..e7293af

[Mesa-dev] [PATCH 21/26] i965: Make fs_visitor::emit_urb_writes set EOT for TES as well.

Tessellation evaluation shaders work almost identically to vertex shaders - we have a set of URB writes at the end of the program, and the last one should terminate it. Geometry shaders really are the special case, where multiple EmitVertex() calls trigger URB writes in the middle of the program.

[Mesa-dev] [PATCH 08/26] i965: Add brw_device_info::min_ds_entries field.

From the 3DSTATE_URB_DS documentation: "Project: IVB, HSW If Domain Shader Thread Dispatch is Enabled then the minimum number of handles that must be allocated is 10 URB entries." "Project: BDW+ If Domain Shader Thread Dispatch is Enabled then the minimum number of handles that must be alloca

[Mesa-dev] [PATCH 03/26] i965: Create new files for HS/DS/TE state upload code.

For now, this just splits the existing code to disable these stages into separate atoms/files. We can then replace it with real code. v2: Bump the render atoms in this patch so it compiles (in my branch, I'd bumped it in an earlier patch). 61 seems to be the minimum that works, which doe

[Mesa-dev] [PATCH 07/26] i965: Add state bits for tess stages

From: Chris Forbes Signed-off-by: Chris Forbes Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_context.h | 10 ++ src/mesa/drivers/dri/i965/brw_draw.c | 7 +-- src/mesa/drivers/dri/i965/brw_state_dump.c | 6 ++ src/mesa/drivers/dri/i965/brw_state

[Mesa-dev] [PATCH 04/26] i965: Request lowering of gl_TessLevel* from float[] to vec4s.

Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_context.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 7e2fdcb..cf8c6a2 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src

Re: [Mesa-dev] [PATCH] i965: Implement get_nir_src_imm() helpers.

On Wednesday, December 02, 2015 10:54:39 AM Connor Abbott wrote: > On Wed, Dec 2, 2015 at 3:26 AM, Kenneth Graunke wrote: > > Normally, get_nir_src() won't return an immediate value - it moves it to > > a temporary VGRF. There are consumers of get_nir_src() that rely on > > this, and are unprepar

[Mesa-dev] [PATCH 7/7] nvc0: expose a group of performance metrics for SM30 (Kepler)

This allows to monitor these performance metrics through GL_AMD_performance_monitor. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_query.c | 8 +++- src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c | 2 +- 2 files changed, 8 insertions(+), 2 deleti

[Mesa-dev] [PATCH 1/7] nvc0: fix the comment that describe MP counters storage on Kepler

Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c | 5 + 1 file changed, 5 insertions(+) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c index 7962143..7f63d38 100644 --- a/src/galliu

[Mesa-dev] [PATCH 2/7] nvc0: add missing HW SM perf counters for SM30 (Kepler)

SM30 is the compute capability version for GK104/GK106/GK107. This also introduces a new signal group selection called UNK0F. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c | 6 ++ src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.h | 3 +++ src/galliu

[Mesa-dev] [PATCH 3/7] nvc0: remove wrong inst_issued HW SM perf counter on Kepler

inst_issued is performance metric not a hardware event on Kepler (SM30). It will be re-introduced in an upcoming patch. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c | 2 -- src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.h | 1 - 2 files changed, 3 del

[Mesa-dev] [PATCH 4/7] nvc0: remove old performance metrics support on Kepler

These performance metrics will be re-introduced in an upcoming patch that will follow the same design as Fermi. Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/nvc0/nvc0_query_hw_sm.c| 31 -- .../drivers/nouveau/nvc0/nvc0_query_hw_sm.h| 6 - 2 file

[Mesa-dev] [PATCH 6/7] nvc0: re-introduce performance metrics for SM30 (Kepler)

This implements more performance metrics than the previous support, but some other metrics still need to be figured out. Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/nvc0/nvc0_query_hw_metric.c| 176 - .../drivers/nouveau/nvc0/nvc0_query_hw_metric.h| 17 ++

[Mesa-dev] [PATCH 5/7] nvc0: remove useless counting operations for MP counters

Those bits were related to old performance metrics support. Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/nvc0/nvc0_query_hw_sm.c| 106 + 1 file changed, 5 insertions(+), 101 deletions(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c b/sr

Re: [Mesa-dev] [PATCH] nir: Optimize useless comparisons against true/false.

On Wed, Dec 2, 2015 at 1:34 PM, Jason Ekstrand wrote: > On Tue, Dec 1, 2015 at 4:16 PM, Matt Turner wrote: >> --- >> I add the true/false variables for clarity since there are some existing >> optimizations using ~0 where it actually has nothing to do with true. >> >> I could take it or leave it.

Re: [Mesa-dev] [PATCH] nir: Optimize useless comparisons against true/false.

On Tue, Dec 1, 2015 at 4:16 PM, Matt Turner wrote: > --- > I add the true/false variables for clarity since there are some existing > optimizations using ~0 where it actually has nothing to do with true. > > I could take it or leave it. We obviously can't use them for feq and > friends. Maybe itru

Re: [Mesa-dev] [PATCH v2] nv50/ir: add memory barriers support for GK110

On Wed, Dec 2, 2015 at 4:27 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 20 > > 1 file changed, 20 insertions(+) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp > b/s

[Mesa-dev] [PATCH v2] nv50/ir: add memory barriers support for GK110

Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 20 1 file changed, 20 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp index 053df8b.

Re: [Mesa-dev] [PATCH] nv50/ir: add memory barriers support for GK110

On Wed, Dec 2, 2015 at 4:13 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 21 > + > 1 file changed, 21 insertions(+) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp > b/s

[Mesa-dev] [PATCH] nv50/ir: add memory barriers support for GK110

Signed-off-by: Samuel Pitoiset --- .../drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 21 + 1 file changed, 21 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp index 053df8b.

[Mesa-dev] [RFC PATCH] nir: Add byte_extract operation.

Two shaders that appear in Unigine benchmarks (Heaven and Valley) unpack three bytes from an integer and convert each into a float: float((val >> 16u) & 0xffu) float((val >> 8u) & 0xffu) float((val >> 0u) & 0xffu) Instead of shifting, masking, and type converting like this: shr(8)

Re: [Mesa-dev] [PATCH] travis: Initial import of travis instructions.

On 02/12/15 03:39, Michel Dänzer wrote: On 02.12.2015 07:06, Jose Fonseca wrote: On 28/11/15 21:06, Emil Velikov wrote: On 25 November 2015 at 07:20, Jose Fonseca wrote: BTW, I setup Mesa with Appveyor (like Travis for Windows) https://ci.appveyor.com/project/jrfonseca/mesa I'll try to

Re: [Mesa-dev] [PATCH v3] nv50/ir: do not call textureMask() for surface ops

On Wed, Dec 2, 2015 at 3:10 PM, Samuel Pitoiset wrote: > That texture mask thing doesn't seem to be needed for surface ops, so > just as nve4+, let do that only for texture ops. > > This fixes a segfault with 'test_surface_st' from > gallium/tests/trivial/compute.c on Fermi because this test uses

[Mesa-dev] [PATCH v3] nv50/ir: do not call textureMask() for surface ops

That texture mask thing doesn't seem to be needed for surface ops, so just as nve4+, let do that only for texture ops. This fixes a segfault with 'test_surface_st' from gallium/tests/trivial/compute.c on Fermi because this test uses sustp. Signed-off-by: Samuel Pitoiset --- src/gallium/drivers/

Re: [Mesa-dev] [PATCH v2] nv50/ir: do not call textureMask() for surface ops

On 12/02/2015 12:46 AM, Ilia Mirkin wrote: On Tue, Dec 1, 2015 at 6:26 PM, Samuel Pitoiset wrote: While we are it, apply the same change for Tesla. Does tesla even have surface ops? I don't see anything in envydis... Please don't add code that doesn't need to be there. I'm not sure if Tes

[Mesa-dev] [PATCH 8/9] radeonsi: print framebuffer info into ddebug logs

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 1 + src/gallium/drivers/radeon/r600_texture.c | 3 +-- src/gallium/drivers/radeonsi/si_debug.c | 25 + 3 files changed, 27 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/ra

[Mesa-dev] [PATCH 7/9] gallium/radeon: print more info about HTILE

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 8 src/gallium/drivers/radeon/r600_texture.c | 11 +-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe

[Mesa-dev] [PATCH 1/9] gallium/radeon: remove DBG_TEXMIP

From: Marek Olšák we don't need 2 flags for dumping texture info --- src/gallium/drivers/radeon/r600_pipe_common.c | 1 - src/gallium/drivers/radeon/r600_pipe_common.h | 2 +- src/gallium/drivers/radeon/r600_texture.c | 3 +-- 3 files changed, 2 insertions(+), 4 deletions(-) diff --git a/sr

[Mesa-dev] [PATCH 3/9] gallium/radeon: move printing texture info into a separate function

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 92 +-- 1 file changed, 51 insertions(+), 41 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 3e7f191..a64683c 100644 --- a/src/gal

[Mesa-dev] [PATCH 6/9] gallium/radeon: print more info about CMASK

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 4 src/gallium/drivers/radeon/r600_texture.c | 15 --- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe

[Mesa-dev] [PATCH 5/9] gallium/radeon: rename fmask::pitch -> pitch_in_pixels

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 2 +- src/gallium/drivers/radeon/r600_texture.c | 6 +++--- src/gallium/drivers/radeonsi/si_state.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common

[Mesa-dev] [PATCH 9/9] radeonsi: dump init_config IBs

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_debug.c | 19 +++ 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_debug.c b/src/gallium/drivers/radeonsi/si_debug.c index b2b1010..0a4e0f9 100644 --- a/src/gallium/drivers/radeon

[Mesa-dev] [PATCH 2/9] gallium/radeon: remove unused r600_texture::pitch_override

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.h | 1 - src/gallium/drivers/radeon/r600_texture.c | 1 - 2 files changed, 2 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 25a7e41..9f2d50c 1006

[Mesa-dev] [PATCH 4/9] gallium/radeon: print more information about textures

From: Marek Olšák --- src/gallium/drivers/radeon/r600_texture.c | 48 +++ 1 file changed, 43 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index a64683c..c787cfb 100644 --- a/src/gall

Re: [Mesa-dev] [PATCH] i965: Implement get_nir_src_imm() helpers.

On Wed, Dec 2, 2015 at 7:54 AM, Connor Abbott wrote: > On Wed, Dec 2, 2015 at 3:26 AM, Kenneth Graunke wrote: >> Normally, get_nir_src() won't return an immediate value - it moves it to >> a temporary VGRF. There are consumers of get_nir_src() that rely on >> this, and are unprepared to handle i

Re: [Mesa-dev] [RFC PATCH shader-db 2/2] run: request a debug context

On Wed, Dec 2, 2015 at 1:30 PM, Marek Olšák wrote: > On Wed, Dec 2, 2015 at 7:25 PM, Ilia Mirkin wrote: >> On Wed, Dec 2, 2015 at 1:15 PM, Marek Olšák wrote: >>> On Wed, Dec 2, 2015 at 6:45 PM, Ilia Mirkin wrote: On Mon, Nov 9, 2015 at 2:02 PM, Ilia Mirkin wrote: > On Mon, Nov 9, 2015

Re: [Mesa-dev] [RFC PATCH shader-db 2/2] run: request a debug context

On Wed, Dec 2, 2015 at 7:25 PM, Ilia Mirkin wrote: > On Wed, Dec 2, 2015 at 1:15 PM, Marek Olšák wrote: >> On Wed, Dec 2, 2015 at 6:45 PM, Ilia Mirkin wrote: >>> On Mon, Nov 9, 2015 at 2:02 PM, Ilia Mirkin wrote: On Mon, Nov 9, 2015 at 1:56 PM, Matt Turner wrote: > On Mon, Nov 9, 2015

Re: [Mesa-dev] [RFC PATCH shader-db 2/2] run: request a debug context

On Wed, Dec 2, 2015 at 1:15 PM, Marek Olšák wrote: > On Wed, Dec 2, 2015 at 6:45 PM, Ilia Mirkin wrote: >> On Mon, Nov 9, 2015 at 2:02 PM, Ilia Mirkin wrote: >>> On Mon, Nov 9, 2015 at 1:56 PM, Matt Turner wrote: On Mon, Nov 9, 2015 at 10:46 AM, Ilia Mirkin wrote: > On Mon, Nov 9, 201

Re: [Mesa-dev] [RFC PATCH shader-db 2/2] run: request a debug context

On Wed, Dec 2, 2015 at 6:45 PM, Ilia Mirkin wrote: > On Mon, Nov 9, 2015 at 2:02 PM, Ilia Mirkin wrote: >> On Mon, Nov 9, 2015 at 1:56 PM, Matt Turner wrote: >>> On Mon, Nov 9, 2015 at 10:46 AM, Ilia Mirkin wrote: On Mon, Nov 9, 2015 at 1:35 PM, Matt Turner wrote: > On Sun, Nov 8, 201

Re: [Mesa-dev] [PATCH] i965: Implement get_nir_src_imm() helpers.

On Wed, Dec 2, 2015 at 7:54 AM, Connor Abbott wrote: > On Wed, Dec 2, 2015 at 3:26 AM, Kenneth Graunke wrote: >> Normally, get_nir_src() won't return an immediate value - it moves it to >> a temporary VGRF. There are consumers of get_nir_src() that rely on >> this, and are unprepared to handle i

[Mesa-dev] [Bug 93089] mesa fails to check for gcc atomic primitives before using them

https://bugs.freedesktop.org/show_bug.cgi?id=93089 --- Comment #5 from Matt Turner --- I think if OpenBSD insists on compiling current software with an 8 year old compiler, they should expect to implement some widely available features in their fork... -- You are receiving this mail because: Yo

[Mesa-dev] [PATCH 2/2] automake: Fix typo in MSVC2008 compat flags.

It should be MSVC2008_COMPAT_CFLAGS and not MSVC2008_COMPAT_CXXFLAGS. This is why the recent util_blitter breakage went unnoticed on autotools builds. --- src/gallium/auxiliary/Makefile.am | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/Makefile.am b/src

[Mesa-dev] [PATCH 1/2] ttn: Whitelist from -Werror=declaration-after-statement.

nir is the exception among gallium/auxiliary -- we don't need to compile it with MSVC2008 yet. --- src/gallium/auxiliary/nir/tgsi_to_nir.c | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c index 86c2ffa..5fef5

Re: [Mesa-dev] [RFC PATCH shader-db 2/2] run: request a debug context

On Mon, Nov 9, 2015 at 2:02 PM, Ilia Mirkin wrote: > On Mon, Nov 9, 2015 at 1:56 PM, Matt Turner wrote: >> On Mon, Nov 9, 2015 at 10:46 AM, Ilia Mirkin wrote: >>> On Mon, Nov 9, 2015 at 1:35 PM, Matt Turner wrote: On Sun, Nov 8, 2015 at 8:53 PM, Ilia Mirkin wrote: > st/mesa only print

Re: [Mesa-dev] [PATCH 1/2] configure.ac: Refuse to build with Sun C compiler.

On 12/ 2/15 01:04 AM, Roland Mainz wrote: On Wed, Dec 2, 2015 at 12:38 AM, Alan Coopersmith wrote: On 12/ 1/15 03:07 PM, Jose Fonseca wrote: https://bugs.freedesktop.org/show_bug.cgi?id=93189 --- configure.ac | 7 +++ 1 file changed, 7 insertions(+) diff --git a/configure.ac b/confi

Re: [Mesa-dev] [PATCH] i965: Implement get_nir_src_imm() helpers.

On Wed, Dec 2, 2015 at 3:26 AM, Kenneth Graunke wrote: > Normally, get_nir_src() won't return an immediate value - it moves it to > a temporary VGRF. There are consumers of get_nir_src() that rely on > this, and are unprepared to handle immediate values. > > This patch introduces new helpers whic

Re: [Mesa-dev] [PATCH v2 0/1] Do not require all components to apply opt_vector_float()

On Wed, 2015-12-02 at 16:43 +0100, Juan A. Suarez Romero wrote: > This patch, based on Matt suggestion, replaces the former two ones, > as it gets > better results. This patch replaces the ones sent in http://lists.freedesktop.org/archives/mesa-dev/2015-November/101448.htm l entitled "[PATCH 0/2

[Mesa-dev] [PATCH v2 0/1] Do not require all components to apply opt_vector_float()

This patch, based on Matt suggestion, replaces the former two ones, as it gets better results. Basically, so far opt_vector_float() is only applied when the 4 components of the register are written with MOV. This patch changes the behaviour so it doesn't require to write the 4 components to apply

[Mesa-dev] [PATCH v2 1/1] i965: add opportunistic behaviour to opt_vector_float()

opt_vector_float() transforms several scalar MOV operations to a single vectorial MOV. This is done when those MOV covers all the components of the destination register. So something like: mov vgrf3.0.xy:D, 0D mov vgrf3.0.w:D, 1065353216D mov vgrf3.0.z:D, 0D is transformed in: mov vgrf3.0:F, [0

Re: [Mesa-dev] [PATCH 2/2] i965: run brw_vec4 optimizations in loop

On Wed, 2015-11-25 at 16:16 -0800, Matt Turner wrote: > I had a look at a helped shader from shader-db (borderlands-2/3701) > > Its vec4 IR at the time we call opt_vector_float() contains: > >    0: mov vgrf2.0.x:D, 1073741824D >    1: mov vgrf3.0.xy:D, 0D >    2: mov vgrf3.0.w:D, 1065353216D >  

Re: [Mesa-dev] [PATCH 2/2] i965: Add INTEL_DEBUG=perf information for GS recompiles.

On Tue, Dec 01, 2015 at 11:38:06PM -0800, Kenneth Graunke wrote: > Surprisingly, this didn't exist at all. I compared this to the equivalent in brw_wm.c. Both patches: Reviewed-by: Topi Pohjolainen > > Signed-off-by: Kenneth Graunke > --- > src/mesa/drivers/dri/i965/brw_gs.c | 58 >

Re: [Mesa-dev] [PATCH] i965: use _Shader to get fragment program when updating surface state

Tapani Pälli writes: > Atomic counters and Images were using ctx::Shader that does not take in > to account program pipeline changes, ctx::_Shader must be used for SSO to > work. Commit c0347705 already changed ubo's to use this. > > Fixes failures seen with following Piglit test: > arb_sep

[Mesa-dev] [Bug 93089] mesa fails to check for gcc atomic primitives before using them

https://bugs.freedesktop.org/show_bug.cgi?id=93089 --- Comment #4 from Jonathan Gray --- No. And it seems gcc only started supporting C11 atomics in 4.9. libdrm currently checks for gcc __sync builtins, libatomic-ops and Solaris atomic.h -- You are receiving this mail because: You are the QA

[Mesa-dev] [PATCH] i965: use _Shader to get fragment program when updating surface state

Atomic counters and Images were using ctx::Shader that does not take in to account program pipeline changes, ctx::_Shader must be used for SSO to work. Commit c0347705 already changed ubo's to use this. Fixes failures seen with following Piglit test: arb_separate_shader_object-atomic-count

Re: [Mesa-dev] [PATCH] glsl: remove useless null checks and make match_explicit_outputs_to_inputs() static

On Wed, 2015-12-02 at 11:48 +0200, Juha-Pekka Heikkila wrote: > match_explicit_outputs_to_inputs() cannot get null inputs and if it > ever did > triggering first null check would later in the function cause > segfault. I had to go over my changes to figure out what I'd done wrong here as I was su

Re: [Mesa-dev] [PATCH v3] mesa: enable enums for OES_geometry_shader

> -Original Message- > From: ibmir...@gmail.com [mailto:ibmir...@gmail.com] On Behalf Of Ilia > Mirkin > Sent: Tuesday, December 1, 2015 5:34 PM > To: Lofstedt, Marta > Cc: Marta Lofstedt; mesa-dev@lists.freedesktop.org > Subject: Re: [PATCH v3] mesa: enable enums for OES_geometry_shader >

[Mesa-dev] [Bug 93089] mesa fails to check for gcc atomic primitives before using them

https://bugs.freedesktop.org/show_bug.cgi?id=93089 --- Comment #3 from Jose Fonseca --- Does OpenBSD supply stdatomic.h? I wonder if we should start using it on all platforms that supply it. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for th

Re: [Mesa-dev] [PATCH v2] mesa/version: Update gl_extensions::Version during version override

Thanks Nanley, This works fine! Reviewed-by: Marta Lofstedt > -Original Message- > From: mesa-dev [mailto:mesa-dev-boun...@lists.freedesktop.org] On > Behalf Of Nanley Chery > Sent: Tuesday, December 1, 2015 9:22 PM > To: mesa-dev@lists.freedesktop.org > Cc: Chery, Nanley G; 11.1; Emil

[Mesa-dev] [PATCH] glsl: remove useless null checks and make match_explicit_outputs_to_inputs() static

match_explicit_outputs_to_inputs() cannot get null inputs and if it ever did triggering first null check would later in the function cause segfault. Signed-off-by: Juha-Pekka Heikkila CC: timothy.arc...@collabora.com --- src/glsl/linker.cpp | 10 +- 1 file changed, 1 insertion(+), 9 del

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