From: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/drivers/radeon/r600_pipe_common.h | 2 +-
src/gallium/drivers/radeon/r600_texture.c | 6 +++---
src/gallium/drivers/radeonsi/si_state.c | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h
b/src/gallium/drivers/radeon/r600_pipe_common.h
index 9f2d50c..b6009d2 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -172,7 +172,7 @@ struct r600_fmask_info {
unsigned offset;
unsigned size;
unsigned alignment;
- unsigned pitch;
+ unsigned pitch_in_pixels;
unsigned bank_height;
unsigned slice_tile_max;
unsigned tile_mode_index;
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index c787cfb..37cac91 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -336,7 +336,7 @@ void r600_texture_get_fmask_info(struct r600_common_screen
*rscreen,
out->slice_tile_max -= 1;
out->tile_mode_index = fmask.tiling_index[0];
- out->pitch = fmask.level[0].nblk_x;
+ out->pitch_in_pixels = fmask.level[0].nblk_x;
out->bank_height = fmask.bankh;
out->alignment = MAX2(256, fmask.bo_alignment);
out->size = fmask.bo_size;
@@ -608,10 +608,10 @@ r600_print_texture_info(struct r600_texture *rtex, FILE
*f)
(rtex->surface.flags & RADEON_SURF_SCANOUT) != 0);
if (rtex->fmask.size)
- fprintf(f, " FMask: offset=%u, size=%u, alignment=%u,
pitch=%u, "
+ fprintf(f, " FMask: offset=%u, size=%u, alignment=%u,
pitch_in_pixels=%u, "
"bankh=%u, slice_tile_max=%u, tile_mode_index=%u\n",
rtex->fmask.offset, rtex->fmask.size,
rtex->fmask.alignment,
- rtex->fmask.pitch, rtex->fmask.bank_height,
+ rtex->fmask.pitch_in_pixels, rtex->fmask.bank_height,
rtex->fmask.slice_tile_max,
rtex->fmask.tile_mode_index);
if (rtex->cmask.size)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 209b940..5b71389 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1912,7 +1912,7 @@ static void si_initialize_color_surface(struct si_context
*sctx,
color_attrib |=
S_028C74_FMASK_BANK_HEIGHT(fmask_bankh);
}
if (sctx->b.chip_class >= CIK) {
- color_pitch |=
S_028C64_FMASK_TILE_MAX(rtex->fmask.pitch / 8 - 1);
+ color_pitch |=
S_028C64_FMASK_TILE_MAX(rtex->fmask.pitch_in_pixels / 8 - 1);
}
}
}
@@ -2701,7 +2701,7 @@ si_create_sampler_view_custom(struct pipe_context *ctx,
S_008F1C_TYPE(si_tex_dim(texture->target,
state->target,
0));
view->fmask_state[4] = S_008F20_DEPTH(depth - 1) |
- S_008F20_PITCH(tmp->fmask.pitch - 1);
+
S_008F20_PITCH(tmp->fmask.pitch_in_pixels - 1);
view->fmask_state[5] =
S_008F24_BASE_ARRAY(state->u.tex.first_layer) |
S_008F24_LAST_ARRAY(last_layer);
view->fmask_state[6] = 0;
--
2.1.4
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