Re: [Mesa-dev] [PATCH 1/2] nir: add two-sided-color lowering pass

On Fri, Sep 18, 2015 at 10:29 AM, Eric Anholt wrote: > Rob Clark writes: > >> From: Rob Clark >> >> Signed-off-by: Rob Clark >> --- > >> +static bool >> +nir_lower_two_sided_color_block(nir_block *block, void *void_state) >> +{ >> + lower_2side_state *state = void_state; >> + nir_builder *b

Re: [Mesa-dev] [PATCH v5 00/70] ARB_shader_storage_buffer_object (mesa, i965)

On Thu, Sep 10, 2015 at 03:35:16PM +0200, Iago Toral Quiroga wrote: > Hi, > > this is the latest version of the ARB_shader_storage_buffer_object > implementation. A good part of the frontend bits for this are already in > master, but this adds some more missing pieces, specifically std430 and > me

Re: [Mesa-dev] [PATCH v5 23/70] glsl: refactor parser processing of an interface block definition

On Thu, Sep 10, 2015 at 03:35:39PM +0200, Iago Toral Quiroga wrote: > From: Samuel Iglesias Gonsalvez I'd be more specific in the subject and say: 'glsl: Move interface block processing to glsl_parser_extras.cpp 'Refactor' can mean many different things. Maybe even clarify in the commit messa

Re: [Mesa-dev] [PATCH v5 54/70] glsl: First argument to atomic functions must be a buffer variable

On Thu, Sep 10, 2015 at 03:36:10PM +0200, Iago Toral Quiroga wrote: > v2: > - Add ssbo_in the names of the static functions so it is clear that this > is specific to SSBO atomics. > --- > src/glsl/ast_function.cpp | 37 + > 1 file changed, 37 insertions(+)

[Mesa-dev] radeonsi bug in fmask calculation?

Hi Marek, You weren't on IRC, and I'll forget if I don't write this down now. Take a look at the code at: http://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/radeonsi/si_shader.c#n2352 fmask_ptr = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_RESOURCE); fmask_ptr = build_in

Re: [Mesa-dev] [PATCH v3] i965/vec4: Change types as needed to propagate source modifiers using current instruction

On 18/09/15 20:00, Jason Ekstrand wrote: > > > On Sep 18, 2015 10:09 AM, "Alejandro Piñeiro" > wrote: > > > > SEL and MOV instructions, as long as they don't have source > modifiers, are > > just copying bits around. So those kind of instruction could be > propagate

Re: [Mesa-dev] [PATCH 1/2] nir: add two-sided-color lowering pass

Rob Clark writes: > From: Rob Clark > > Signed-off-by: Rob Clark > --- > +static bool > +nir_lower_two_sided_color_block(nir_block *block, void *void_state) > +{ > + lower_2side_state *state = void_state; > + nir_builder *b = &state->b; > + > + nir_foreach_instr_safe(block, instr) { > +

Re: [Mesa-dev] [PATCH v5 40/70] nir: Implement __intrinsic_load_ssbo

On Thu, Sep 10, 2015 at 03:35:56PM +0200, Iago Toral Quiroga wrote: > v2: > - Fix ssbo loads with boolean variables. > > Reviewed-by: Connor Abbott > --- > src/glsl/nir/glsl_to_nir.cpp| 80 > - > src/glsl/nir/nir_intrinsics.h | 2 +- > src/

Re: [Mesa-dev] [PATCH v4 0/6] nouveau: add support for vaapi

On Fri, Sep 18, 2015 at 4:29 PM, Julien Isorce wrote: > > > On 17 September 2015 at 17:52, Ilia Mirkin wrote: >> >> On Wed, Sep 16, 2015 at 8:22 AM, Julien Isorce >> wrote: >> > I added below version4 updates. It works for all codecs expect h264. >> > Video is visible but lot of blockiness. >> >

Re: [Mesa-dev] [PATCH v4 0/6] nouveau: add support for vaapi

On 17 September 2015 at 17:52, Ilia Mirkin wrote: > On Wed, Sep 16, 2015 at 8:22 AM, Julien Isorce > wrote: > > I added below version4 updates. It works for all codecs expect h264. > > Video is visible but lot of blockiness. > > Can someone with a Radeon confirm that "LIBVA_DRIVER_NAME=gallium m

[Mesa-dev] [Bug 79783] Distorted output in obs-studio where other vendors "work"

https://bugs.freedesktop.org/show_bug.cgi?id=79783 --- Comment #8 from Ilia Mirkin --- (In reply to gregory.hainaut from comment #5) > Here the dump of the ASM (TGSI?). (Generated with the hack to disable flat > optimization) TGSI (which is DX9-ish assembly type code, but extended well beyond)

Re: [Mesa-dev] [PATCH v5 38/70] i965/nir/vec4: Implement nir_intrinsic_store_ssbo

On Thu, Sep 10, 2015 at 03:35:54PM +0200, Iago Toral Quiroga wrote: > --- > src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 148 > + > 1 file changed, 148 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp > b/src/mesa/drivers/dri/i965/brw_vec4_ni

Re: [Mesa-dev] [PATCH v5 28/70] glsl: add std430 interface packing support to ssbo related operations

On Thu, Sep 10, 2015 at 03:35:44PM +0200, Iago Toral Quiroga wrote: > From: Samuel Iglesias Gonsalvez > > v2: > - Get interface packing information from interface's type, not the variable > type. > - Simplify is_std430 condition in emit_access() for readability (Jordan) > - Add a commment explai

Re: [Mesa-dev] [PATCH v5 29/70] glsl: a shader storage buffer must be smaller than the maximum size allowed

On Thu, Sep 10, 2015 at 03:35:45PM +0200, Iago Toral Quiroga wrote: > From: Samuel Iglesias Gonsalvez > > Otherwise, generate a link time error as per the > ARB_shader_storage_buffer_object spec. > > v2: > - Fix error message (Jordan) > > Signed-off-by: Samuel Iglesias Gonsalvez > Reviewed-by:

Re: [Mesa-dev] [PATCH 3/9] nir: Report progress from lower_vec_to_movs().

On Friday, September 18, 2015 10:55:34 AM Jason Ekstrand wrote: > Um, why? I'm sure you have some reason but I don't immediately see how a > progress flag from lower_vec_to_movs is useful. Some of the others > definitely are. > --Jason Sorry, I should have explained in at least one of the patche

Re: [Mesa-dev] [PATCH] mesa: move GL_APPLE_object_purgeable functions to new file

On Tuesday, September 15, 2015 09:23:59 PM Brian Paul wrote: > Move this code out of bufferobj.c since it's not strongly connected to > buffer objects. > --- > src/mapi/glapi/gen/gl_genexec.py | 1 + > src/mesa/Makefile.sources| 2 + > src/mesa/main/bufferobj.c| 378 ---

Re: [Mesa-dev] [PATCH v5 26/70] glsl: Add parser/compiler support for std430 interface packing qualifier

On Thu, Sep 10, 2015 at 03:35:42PM +0200, Iago Toral Quiroga wrote: > From: Samuel Iglesias Gonsalvez > > v2: > - Fix a missing check in has_layout() > > Signed-off-by: Samuel Iglesias Gonsalvez > Reviewed-by: Jordan Justen > --- > src/glsl/ast.h | 1 + > src/glsl/ast_to_hi

Re: [Mesa-dev] [PATCH 4/6] nir/lower_tex: support for lowering RECT textures

On Friday, September 18, 2015 12:36:21 PM Rob Clark wrote: > On Fri, Sep 18, 2015 at 11:22 AM, Kenneth Graunke > wrote: > > On Friday, September 18, 2015 10:55:07 AM Rob Clark wrote: > >> From: Rob Clark > >> > >> v2: comments/suggestions from Ilia and Eric, split out get_texture_size() > >> hel

Re: [Mesa-dev] [PATCH 5/6] nir/lower_tex: add support to clamp texture coords

On Friday, September 18, 2015 12:24:37 PM Rob Clark wrote: > On Fri, Sep 18, 2015 at 11:55 AM, Kenneth Graunke > wrote: > > On Friday, September 18, 2015 10:55:08 AM Rob Clark wrote: > >> From: Rob Clark > >> > >> Some hardware needs to clamp texture coordinates to [0.0, 1.0] in the > >> shader

Re: [Mesa-dev] [PATCH v3] i965/vec4: Change types as needed to propagate source modifiers using current instruction

On Sep 18, 2015 10:09 AM, "Alejandro Piñeiro" wrote: > > SEL and MOV instructions, as long as they don't have source modifiers, are > just copying bits around. So those kind of instruction could be propagated > even if there are type mismatches. This is needed because NIR generates > integer SEL

Re: [Mesa-dev] [PATCH 3/9] nir: Report progress from lower_vec_to_movs().

Um, why? I'm sure you have some reason but I don't immediately see how a progress flag from lower_vec_to_movs is useful. Some of the others definitely are. --Jason On Sep 18, 2015 10:37 AM, "Kenneth Graunke" wrote: > Signed-off-by: Kenneth Graunke > --- > src/glsl/nir/nir.h

Re: [Mesa-dev] [PATCH 3/3] nir: rename nir_lower_samplers.c{pp,}

On Sep 18, 2015 12:40 PM, "Emil Velikov" wrote: > > Thanks for the review/testing guys. > > Just noticed that some typos/strange wording > > On 17 September 2015 at 16:25, Emil Velikov wrote: > > With the only C++ function having it's own wrapper we can 'demote' this > s/it's/its/ > > > file to a

[Mesa-dev] [Bug 79783] Distorted output in obs-studio where other vendors "work"

https://bugs.freedesktop.org/show_bug.cgi?id=79783 --- Comment #7 from gregory.hain...@gmail.com --- After further investigation, the issue comes from the deadcode optimization of the input (in the IR tree). Just disabling the optimization fixes my basic testcase (see a quick patch below). It rem

Re: [Mesa-dev] [PATCH 3/3] nir: rename nir_lower_samplers.c{pp,}

Thanks for the review/testing guys. Just noticed that some typos/strange wording On 17 September 2015 at 16:25, Emil Velikov wrote: > With the only C++ function having it's own wrapper we can 'demote' this s/it's/its/ > file to a normal C one. This allows us to get rid of extern C { > support C

Re: [Mesa-dev] [PATCH 2/2] clover: implement clCreateImage?D w/ clCreateImage

Serge Martin writes: > remplace clCreateImage2D and clCreateImage3D implementation with call to > clCreateImage > --- > src/gallium/state_trackers/clover/api/memory.cpp | 92 > +--- > 1 file changed, 32 insertions(+), 60 deletions(-) > > diff --git a/src/gallium/state_tracke

Re: [Mesa-dev] [PATCH] nir/build: add nir_vec() helper

Except for the thing Ilia pointed out, Reviewed-by: Connor Abbott On Fri, Sep 18, 2015 at 1:24 PM, Rob Clark wrote: > From: Rob Clark > > Signed-off-by: Rob Clark > --- > src/glsl/nir/nir_builder.h| 18 ++ > src/glsl/nir/nir_lower_load_const_to_scalar.c |

Re: [Mesa-dev] [PATCH 1/2] clover: implement clCreateImage

Serge Martin writes: > --- > src/gallium/state_trackers/clover/api/memory.cpp | 117 > +-- > 1 file changed, 107 insertions(+), 10 deletions(-) > > diff --git a/src/gallium/state_trackers/clover/api/memory.cpp > b/src/gallium/state_trackers/clover/api/memory.cpp > index 1ef

Re: [Mesa-dev] [PATCH] nir/build: add nir_vec() helper

On Fri, Sep 18, 2015 at 1:24 PM, Rob Clark wrote: > From: Rob Clark > > Signed-off-by: Rob Clark > --- > src/glsl/nir/nir_builder.h| 18 ++ > src/glsl/nir/nir_lower_load_const_to_scalar.c | 15 +-- > src/glsl/nir/nir_lower_tex.c |

[Mesa-dev] [PATCH] nir/build: add nir_vec() helper

From: Rob Clark Signed-off-by: Rob Clark --- src/glsl/nir/nir_builder.h| 18 ++ src/glsl/nir/nir_lower_load_const_to_scalar.c | 15 +-- src/glsl/nir/nir_lower_tex.c | 18 +- 3 files changed, 20 insertions(+), 31 de

Re: [Mesa-dev] [PATCH 3/6] mesa/formats: add MESA_LAYOUT_LATC

On Fri, Aug 28, 2015 at 7:50 AM, Nanley Chery wrote: > From: Nanley Chery > > This enables us to predicate statments on a compressed format being > a type of LATC format. Also, remove the comment that lists the enum > (which was getting a tad long). > > Signed-off-by: Nanley Chery > --- > src/

[Mesa-dev] [Bug 92000] Requesting a New Account

https://bugs.freedesktop.org/show_bug.cgi?id=92000 Daniel Stone changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Mesa-dev] [Bug 92001] New account request

https://bugs.freedesktop.org/show_bug.cgi?id=92001 Daniel Stone changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

Re: [Mesa-dev] [PATCH 4/6] nir/lower_tex: support for lowering RECT textures

On Fri, Sep 18, 2015 at 11:22 AM, Kenneth Graunke wrote: > On Friday, September 18, 2015 10:55:07 AM Rob Clark wrote: >> From: Rob Clark >> >> v2: comments/suggestions from Ilia and Eric, split out get_texture_size() >> helper so we can use it in the next commit for clamping RECT textures. >> >>

Re: [Mesa-dev] [PATCH 5/6] nir/lower_tex: add support to clamp texture coords

On Fri, Sep 18, 2015 at 11:55 AM, Kenneth Graunke wrote: > On Friday, September 18, 2015 10:55:08 AM Rob Clark wrote: >> From: Rob Clark >> >> Some hardware needs to clamp texture coordinates to [0.0, 1.0] in the >> shader to emulate GL_CLAMP. This is added to lower_tex_proj since, in >> the cas

Re: [Mesa-dev] [PATCH 5/5] i965: Maximum allowed size of SEND messages is 15 (4 bits)

On Friday, September 18, 2015 10:08:52 AM Iago Toral Quiroga wrote: > Until now we only used MRFs 1..15 for regular SEND messages, so the > message length could not possibly exceed the maximum size. Now that > we allow to use MRF registers 1..23 in gen6, we need to be careful > not to build message

Re: [Mesa-dev] [PATCH] i965/vec4/nir: Remove all "this->" snippets

On Friday, September 18, 2015 10:30:12 AM Eduardo Lima Mitev wrote: > For consistency, either we have all class members dereferenced, or none. > In this case, very few are so lets get rid of all. > --- > src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 31 > +++--- > 1 file ch

[Mesa-dev] [Bug 92000] Requesting a New Account

https://bugs.freedesktop.org/show_bug.cgi?id=92000 --- Comment #5 from Kenneth Graunke --- Sounds good to me. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. ___ mesa-dev mailing list mesa-

Re: [Mesa-dev] [PATCH 5/6] nir/lower_tex: add support to clamp texture coords

On Friday, September 18, 2015 10:55:08 AM Rob Clark wrote: > From: Rob Clark > > Some hardware needs to clamp texture coordinates to [0.0, 1.0] in the > shader to emulate GL_CLAMP. This is added to lower_tex_proj since, in > the case of projected coords, the clamping needs to happen *after* > pr

[Mesa-dev] [Bug 92001] New account request

https://bugs.freedesktop.org/show_bug.cgi?id=92001 --- Comment #3 from Brian Paul --- OK by me. Antia has done quite a bit of work on the i965 driver. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. _

Re: [Mesa-dev] [PATCH 03/12] i965/fs: Disable SIMD16 when a sampler message would be too long

Francisco Jerez writes: > NAK, these cases are already handled without disabling SIMD16 by > lowering the SIMD16 message into SIMD8 halves. You just need to add a > case to get_lowered_simd_width() so that the SIMD lowering pass knows > what the maximum execution size is for your new sampler mess

[Mesa-dev] [PATCH 9/9] nir: Report progress from nir_normalize_cubemap_coords().

This also required adding a struct. Signed-off-by: Kenneth Graunke --- src/glsl/nir/nir.h | 2 +- src/glsl/nir/nir_normalize_cubemap_coords.c | 28 +--- 2 files changed, 22 insertions(+), 8 deletions(-) diff --git a/src/glsl/nir/nir.h b/src/glsl

[Mesa-dev] [PATCH 7/9] nir: Report progress from nir_lower_system_values().

Signed-off-by: Kenneth Graunke --- src/glsl/nir/nir.h | 2 +- src/glsl/nir/nir_lower_system_values.c | 27 ++- 2 files changed, 19 insertions(+), 10 deletions(-) diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h index 460b79c..8a6a75f 100644 --- a/

[Mesa-dev] [PATCH 3/9] nir: Report progress from lower_vec_to_movs().

Signed-off-by: Kenneth Graunke --- src/glsl/nir/nir.h | 2 +- src/glsl/nir/nir_lower_vec_to_movs.c | 16 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h index 31c0c27..0950289 100644 --- a/src/glsl/nir/nir

[Mesa-dev] [PATCH 2/9] nir/lower_vec_to_movs: Add a state struct

From: Jason Ekstrand While we're here, we also fix up a couple of potential ralloc-parenting bugs. In particular, we were calling nir_src_copy with the shader as the mem context instead of the instruction. v2 (Ken): Rebase. Reviewed-by: Eduardo Lima Mitev [v1] --- src/glsl/nir/nir_lower_vec_

[Mesa-dev] [PATCH 6/9] nir: Report progress in nir_split_var_copies().

Signed-off-by: Kenneth Graunke --- src/glsl/nir/nir.h | 2 +- src/glsl/nir/nir_split_var_copies.c | 15 --- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h index 2721d0c..460b79c 100644 --- a/src/glsl/nir/nir.h

[Mesa-dev] [PATCH 5/9] nir: Report progress in nir_lower_locals_to_regs().

Signed-off-by: Kenneth Graunke --- src/glsl/nir/nir.h | 2 +- src/glsl/nir/nir_lower_locals_to_regs.c | 18 +++--- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h index b72cdc2..2721d0c 100644 --- a/src/glsl

[Mesa-dev] [PATCH 4/9] nir: Report progress from nir_remove_dead_variables().

Signed-off-by: Kenneth Graunke --- src/glsl/nir/nir.h | 2 +- src/glsl/nir/nir_remove_dead_variables.c | 15 +++ 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h index 0950289..b72cdc2 100644 --- a/src/glsl/

[Mesa-dev] [PATCH 1/9] nir: Make nir_lower_globals_vars_to_local report progress.

Signed-off-by: Kenneth Graunke --- src/glsl/nir/nir.h| 2 +- src/glsl/nir/nir_lower_global_vars_to_local.c | 6 +- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h index 83e3153..31c0c27 100644 --- a/src/glsl/ni

[Mesa-dev] [PATCH 8/9] nir: Add braces around multi-line loop.

This was correct but not our usual style. Signed-off-by: Kenneth Graunke --- src/glsl/nir/nir_normalize_cubemap_coords.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/glsl/nir/nir_normalize_cubemap_coords.c b/src/glsl/nir/nir_normalize_cubemap_coords.c index ca68bd7.

Re: [Mesa-dev] [PATCH 00/12] i965: Add support for 16x MSAA on SKL+

On Thu, Sep 17, 2015 at 05:00:02PM +0100, Neil Roberts wrote: > I ran the series through Piglit but there are some issues. > > The texelFetch test appears to be broken for sample counts > 10 and > needs this patch to work: > > http://patchwork.freedesktop.org/patch/59485/ > > The accuracy tests

Re: [Mesa-dev] [PATCH 4/6] nir/lower_tex: support for lowering RECT textures

On Friday, September 18, 2015 10:55:07 AM Rob Clark wrote: > From: Rob Clark > > v2: comments/suggestions from Ilia and Eric, split out get_texture_size() > helper so we can use it in the next commit for clamping RECT textures. > > Signed-off-by: Rob Clark > --- > src/glsl/nir/nir.h

[Mesa-dev] [PATCH v3] i965/vec4: Change types as needed to propagate source modifiers using from instruction

SEL and MOV instructions, as long as they don't have source modifiers, are just copying bits around. So those kind of instruction could be propagated even if there are type mismatches. This is needed because NIR generates integer SEL and MOV instructions whenever it doesn't know what else to gener

Re: [Mesa-dev] [PATCH 3/6] nir/lower_tex: support projector lowering per sampler type

On Friday, September 18, 2015 10:55:06 AM Rob Clark wrote: > From: Rob Clark > > Some hardware, such as adreno a3xx, supports txp on some but not all > sampler types. In this case we want more fine grained control over > which texture projectors get lowered. > > v2: split out nir_lower_tex_opti

[Mesa-dev] [PATCH v3] i965/vec4: Change types as needed to propagate source modifiers using current instruction

SEL and MOV instructions, as long as they don't have source modifiers, are just copying bits around. So those kind of instruction could be propagated even if there are type mismatches. This is needed because NIR generates integer SEL and MOV instructions whenever it doesn't know what else to gener

Re: [Mesa-dev] [PATCH 02/12] i965: Program 16x MSAA sample positions.

On Thu, Sep 17, 2015 at 05:00:04PM +0100, Neil Roberts wrote: > This is the standard pattern used by the other 3D graphics API. > > BDW has slots for these values, but they aren't actually used until > SKL. Even though the documentation for BDW says they must be zero, it > doesn't seem to cause an

[Mesa-dev] [PATCH 6/6] freedreno/ir3: lower txp/clamp in NIR

From: Rob Clark Signed-off-by: Rob Clark --- .../drivers/freedreno/ir3/ir3_compiler_nir.c | 56 -- 1 file changed, 30 insertions(+), 26 deletions(-) diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir

[Mesa-dev] [PATCH 2/6] nir/lower_tex: split out project_src() helper

From: Rob Clark Split this out to reduce noise in later patches. Signed-off-by: Rob Clark --- src/glsl/nir/nir_lower_tex.c | 146 +++ 1 file changed, 77 insertions(+), 69 deletions(-) diff --git a/src/glsl/nir/nir_lower_tex.c b/src/glsl/nir/nir_lower_te

[Mesa-dev] [PATCH 1/6] nir: rename nir_lower_tex_projector

From: Rob Clark Since the following patches will add additional tex-lowering related functionality, which doesn't make sense to split out into a separate pass (as they would require duplication of the projector lowering logic), let's give this pass a more generic name. Signed-off-by: Rob Clark

[Mesa-dev] [PATCH 3/6] nir/lower_tex: support projector lowering per sampler type

From: Rob Clark Some hardware, such as adreno a3xx, supports txp on some but not all sampler types. In this case we want more fine grained control over which texture projectors get lowered. v2: split out nir_lower_tex_options struct to make it easier to add the additional parameters coming in t

[Mesa-dev] [PATCH 5/6] nir/lower_tex: add support to clamp texture coords

From: Rob Clark Some hardware needs to clamp texture coordinates to [0.0, 1.0] in the shader to emulate GL_CLAMP. This is added to lower_tex_proj since, in the case of projected coords, the clamping needs to happen *after* projection. v2: comments/suggestions from Ilia and Eric, use txs to get

[Mesa-dev] [PATCH 4/6] nir/lower_tex: support for lowering RECT textures

From: Rob Clark v2: comments/suggestions from Ilia and Eric, split out get_texture_size() helper so we can use it in the next commit for clamping RECT textures. Signed-off-by: Rob Clark --- src/glsl/nir/nir.h | 7 + src/glsl/nir/nir_lower_tex.c | 62 +

[Mesa-dev] [PATCH 0/6] nir texture lowering

From: Rob Clark Few cleanups in RECT and clamp lowering, in particular clamping for RECT textures happens in the texture's native dimensions rather than forcing RECT->2D lowering. Rob Clark (6): nir: rename nir_lower_tex_projector nir/lower_tex: split out project_src() helper nir/lower_tex

Re: [Mesa-dev] [PATCH 03/12] i965/fs: Disable SIMD16 when a sampler message would be too long

Neil Roberts writes: > The maximum message length for a send message is 11. Some of the > sampler message types have more than 5 arguments which means when they > are doubled to accomodate the SIMD16 register size then the message is > too long. This is important for the ld2dms_w message which wi

Re: [Mesa-dev] [PATCH 01/12] i965: Handle 16x MSAA in IMS dimension munging code.

On Thu, Sep 17, 2015 at 05:00:03PM +0100, Neil Roberts wrote: > From: Kenneth Graunke > > Signed-off-by: Kenneth Graunke > Reviewed-by: Neil Roberts > --- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 ++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/src/mesa/

Re: [Mesa-dev] [PATCH v2] i965: fix textureGrad for cubemaps

On Fri, 2015-09-18 at 15:02 +0300, Tapani Pälli wrote: > Fixes bugs exposed by commit > 2b1cdb0eddb73f62e4848d4b64840067f1f70865 in: >ES3-CTS.gtf.GL3Tests.shadow.shadow_execution_frag > > No regressions observed in deqp, CTS or Piglit. > > v2: address review feedback from Iago Toral: >- m

Re: [Mesa-dev] [PATCH] st/xa: Fixups for PIPE_FORMAT_R8_UNORM A8 usage v2.

On 17/09/15 13:24, Thomas Hellstrom wrote: Check for PIPE_FORMAT_R8_UNORM when setting up the copy shader. Also re-enable the dest alpha blending with A8 destination that actually turned out to be correct. Verified using rendercheck that the composite operators overreverse, in, out, atop, atopre

[Mesa-dev] [PATCH v2] i965: fix textureGrad for cubemaps

Fixes bugs exposed by commit 2b1cdb0eddb73f62e4848d4b64840067f1f70865 in: ES3-CTS.gtf.GL3Tests.shadow.shadow_execution_frag No regressions observed in deqp, CTS or Piglit. v2: address review feedback from Iago Toral: - move rho calculation to else branch - optimize dx and dy calculation

Re: [Mesa-dev] [PATCH] i965/vec4/nir: Remove all "this->" snippets

On Fri, 2015-09-18 at 10:30 +0200, Eduardo Lima Mitev wrote: > For consistency, either we have all class members dereferenced, or > none. > In this case, very few are so lets get rid of all. > --- I kind of like seeing this-> but I like consistency more and majority rules so ... Reviewed-by: Timo

Re: [Mesa-dev] [PATCH] i965/fs: Fix comparison between signed and unsigned integer expressions

Reviewed-by: Tapani Pälli On 09/18/2015 12:05 PM, Iago Toral Quiroga wrote: brw_fs_visitor.cpp: In member function 'void fs_visitor::emit_urb_writes()': brw_fs_visitor.cpp:977:58: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] --- src/mesa/drivers/dri/i9

[Mesa-dev] [Bug 86265] Error while running gazebo in ROS Hydro

https://bugs.freedesktop.org/show_bug.cgi?id=86265 Daniel Stone changed: What|Removed |Added Component|Version control |Mesa core Version|unspecified

[Mesa-dev] New stable-branch 10.6 candidate pushed

Hello list, The candidate for the Mesa 10.6.8 is now available. Currently we have: - 22 queued - 14 nominated (outstanding) - and 2 rejected/obsolete patches The present queue consists mostly of nouveau fixes, although we have the odd i965, llvmpipe (big endian) and gbm bugfix. Take a look a

Re: [Mesa-dev] mesa-10.6: LLVM/Clang v3.7 fixes (gallivm)

On 14 September 2015 at 10:36, Sedat Dilek wrote: > On Thu, Sep 10, 2015 at 4:18 PM, Emil Velikov > wrote: >> On 4 September 2015 at 19:57, Sedat Dilek wrote: >>> Hi, >>> >>> I compiled a toolchain based on LLVM/Clang v3.7.0 today and tested it >>> with an updated version of my Linux Graphics d

[Mesa-dev] [Bug 92000] Requesting a New Account

https://bugs.freedesktop.org/show_bug.cgi?id=92000 Daniel Stone changed: What|Removed |Added Component|New Accounts|Other Assignee|sitewranglers@li

[Mesa-dev] [Bug 92001] New account request

https://bugs.freedesktop.org/show_bug.cgi?id=92001 Daniel Stone changed: What|Removed |Added Component|New Accounts|Other Assignee|sitewranglers@li

[Mesa-dev] [PATCH] i965/fs: Fix comparison between signed and unsigned integer expressions

brw_fs_visitor.cpp: In member function 'void fs_visitor::emit_urb_writes()': brw_fs_visitor.cpp:977:58: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

[Mesa-dev] [PATCH] i965/vec4/nir: Remove all "this->" snippets

For consistency, either we have all class members dereferenced, or none. In this case, very few are so lets get rid of all. --- src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 31 +++--- 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/src/mesa/drivers/dri/i965/

[Mesa-dev] [PATCH] freedreno/a3xx: allow texture buffer objects up to 64M texels

This artificially converts a buffer into a 8K x N 2D texture to fetch texels from. As a result we can access up to 8K x 8K texels. Signed-off-by: Ilia Mirkin --- src/gallium/drivers/freedreno/a3xx/fd3_texture.c | 19 +-- src/gallium/drivers/freedreno/freedreno_screen.c |

[Mesa-dev] [PATCH 2/5] i965: Turn BRW_MAX_MRF into a macro that accepts a hardware generation

There are some bug reports about shaders failing to compile in gen6 because MRF 14 is used when we need to spill. For example: https://bugs.freedesktop.org/show_bug.cgi?id=86469 https://bugs.freedesktop.org/show_bug.cgi?id=90631 Discussion in bugzilla pointed to the fact that gen6 might actually h

[Mesa-dev] [PATCH 5/5] i965: Maximum allowed size of SEND messages is 15 (4 bits)

Until now we only used MRFs 1..15 for regular SEND messages, so the message length could not possibly exceed the maximum size. Now that we allow to use MRF registers 1..23 in gen6, we need to be careful not to build messages that can go beyond the limit. That could occur, specifically, when buildin

[Mesa-dev] [PATCH 1/5] i965: Move MRF register asserts out of brw_reg.h

In a later patch we will make BRW_MAX_MRF return a different value depending on the hardware generation, but it is inconvenient to add a gen parameter to the brw_reg functions only for the assertions, so move these to places where we have the hardware generation available. Ken suggested to add the

[Mesa-dev] [PATCH 4/5] i965/vec4: Use MRF registers 21-23 for spilling in gen6

--- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 0465770..7f06050 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_

[Mesa-dev] [PATCH 0/5] Enable up to 24 MRF registers in gen6

There are some bug reports about shaders failing to compile in gen6 because MRF 14 is used when we need to spill. For example: https://bugs.freedesktop.org/show_bug.cgi?id=86469 https://bugs.freedesktop.org/show_bug.cgi?id=90631 Discussion in bugzilla pointed to the fact that gen6 might actually h

[Mesa-dev] [PATCH 3/5] i965/fs: Use MRF registers 21-23 for spilling in gen6

--- src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp index 21fb3de..6900cee 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [RFC] nir/opt_peephole_ffma: Bypass fusion if any operand of fadd and fmul is a const

When both fadd and fmul instructions have at least one operand that is a constant and it is only used once, the total number of instructions can be reduced from 3 (1 ffma + 2 load_const) to 2 (1 fmul + 1 fadd); because the constants will be progagated as immediate operands of fmul and fadd. This p