[Mesa-dev] [Bug 91673] Segfault when calling glTexSubImage2D on storage texture to bound FBO

https://bugs.freedesktop.org/show_bug.cgi?id=91673 --- Comment #4 from Tapani Pälli --- (In reply to Dongseong Hwang from comment #3) > (In reply to Tapani Pälli from comment #2) > > With a bit of testing it seems things work fine if glTexStorage2D call is > > moved to happen right after first gl

[Mesa-dev] [PATCH 16/21] i965/fs: Rename demote_pull_constants to lower_constant_loads

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++-- src/mesa/drivers/dri/i965/brw_fs.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index c155c59..2a4cbff 100644 --- a/src/mesa/drivers/dri/i965/

[Mesa-dev] [PATCH 03/21] nir: Pull nir_lower_io's load_op selection into a helper function.

From: Kenneth Graunke Makes the function a bit smaller. Signed-off-by: Kenneth Graunke Reviewed-by: Jason Ekstrand --- src/glsl/nir/nir_lower_io.c | 39 ++- 1 file changed, 22 insertions(+), 17 deletions(-) diff --git a/src/glsl/nir/nir_lower_io.c b/src/gl

[Mesa-dev] [PATCH 21/21] i965/fs: Push small uniform arrays

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 40 1 file changed, 27 insertions(+), 13 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index f9e0c41..901c323 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp

[Mesa-dev] [PATCH 07/21] nir: Pass a type_size() function pointer into nir_lower_io().

From: Kenneth Graunke Previously, there were four type_size() functions in play - the i965 compiler backend defined scalar and vec4 type_size() functions, and nir_lower_io contained its own similar functions. In fact, the i965 driver used nir_lower_io() and then looped over the components using

[Mesa-dev] [PATCH 12/21] nir/lower_io: Remove assign_var_locations_direct_first

This is no longer used so we might as well get rid of it. --- src/glsl/nir/nir.h | 8 - src/glsl/nir/nir_lower_io.c | 74 - 2 files changed, 82 deletions(-) diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h index 8df0de9..06318fc 100644

[Mesa-dev] [PATCH 06/21] i965/vec4: Drop an assertion from type_size_vec4

It isn't really needed and ARB programs that get run though prog_to_nir will sometimes generate a zero-length uniform array which will cause the assertion to fail. --- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_ve

[Mesa-dev] [PATCH 08/21] nir/intrinsics: Add a second const index to load_uniform

In the i965 backend, we want to be able to "pull apart" the uniforms and push some of them into the shader through a different path. In order to do this effectively, we need to know which variable is actually being referred to by a given uniform load. Previously, it was completely flattened by ni

[Mesa-dev] [PATCH 15/21] i964/fs: Refactor assign_constant_locations

Now that all constant locations are assigned in a single function, we can refactor it a bit to unify things. In particular, we now handle pull_constant_loc and push_constant_loc more similarly and we only modify stage_prog_data->params[] in one place at the end of the function. --- src/mesa/drive

[Mesa-dev] [PATCH 17/21] i965/fs: Split VGRFs after lowering pull constants

The split_virtual_grfs code doesn't properly rewrite reladdr so we need to make sure that any uniform indirects are lowered away first. Cc: "10.6" --- src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp

[Mesa-dev] [PATCH 13/21] i965/fs: Combine assign_constant_locations and move_uniform_array_access_to_pull_constants

The comment above move_uniform_array_access_to_pull_constants was completely bogus because it has nothing to do with lowering instructions. Instead, it's assiging locations of pull constants. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 38 +--- src/mesa/drivers/dri/i

[Mesa-dev] [PATCH 09/21] nir/lower_io: Separate driver_location and base offset for uniforms

v2 (Jason Ekstrand): Fix up image uniforms --- src/glsl/nir/nir_lower_io.c | 9 +++-- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 13 + 2 files changed, 8 insertions(+), 14 deletions(-) diff --git a/src/glsl/nir/nir_lower_io.c b/src/glsl/nir/nir_lower_io.c index 15a4e

[Mesa-dev] [PATCH 11/21] i965/fs: Rework uniform handling

Previously, we treated the entire UNIFORM file as if it had two elements: One for direct things and one for indirect. This is substantially different from how the old visitor code handled it where each element was effectively its own uniform. This commit makes the NIR path more like the old ir_vi

[Mesa-dev] [PATCH 10/21] i965/vec4_nir: Get rid of the uniform_driver_location tracking

--- src/mesa/drivers/dri/i965/brw_vec4.h | 1 - src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 22 +++--- 2 files changed, 3 insertions(+), 20 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index 59a8397..673a29e 100644

[Mesa-dev] [PATCH 14/21] i965/fs: Handle reladdr in liveness calculations in assign_constant_locations

Previously, we weren't handling reladdr at all. However, this was ok, because we had already marked everything that's ever touched indirectly as push so that was ignored. As soon as we start using indirect push constants, this will no longer be true so the liveness calculations will need to be co

[Mesa-dev] [PATCH 19/21] i965/fs: Add an opcode for loading indirect push constants

This commit adds an FS_OPCODE_PUSH_CONSTANT_LOAD opcode which allows you to load an indirect push constant. The first argument to the function is a non-indirect uniform, the second is the indirect, and the third is an immediate value that provides a bound on the indirect. This way we can provide

[Mesa-dev] [PATCH 18/21] i965/brw_reg: Add a brw_VxH_indirect helper

--- src/mesa/drivers/dri/i965/brw_reg.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h index 31806f7..5a516e0 100644 --- a/src/mesa/drivers/dri/i965/brw_reg.h +++ b/src/mesa/drivers/dri/i965/brw_reg.h @@ -

[Mesa-dev] [PATCH 20/21] i965/fs: Support indirect push constants in lower_constant_loads

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 71 +--- 1 file changed, 49 insertions(+), 22 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 60c9a0f..f9e0c41 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp

[Mesa-dev] [PATCH 01/21] i965: Rename setup_vector_uniform_values to setup_vec4_uniform_value

The new name more accurately represents what it does: Set up a single vec4 uniform value. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 3 ++- src/mesa/drivers/dri/i965/brw_fs.h | 4 ++-- src/mesa/drivers/dri/i965/brw_shader.cpp | 12 ++-- src/mesa/drivers/dri/i9

[Mesa-dev] [PATCH 02/21] i965: Make setup_vec4_uniform_value and _image_uniform_values take an offset

This way they don't implicitly increment the uniforms variable and don't have to be called in-sequence during uniform setup. Cc: Francisco Jerez --- src/mesa/drivers/dri/i965/brw_fs.cpp | 7 --- src/mesa/drivers/dri/i965/brw_fs.h | 3 ++- src/mesa/drivers/dri/i965/brw

[Mesa-dev] [PATCH 00/21] i965/fs: Push small uniform arrays

Previously, every time we had an indirect into a uniform array it would immediatly git shoved off to a pull constant because we had no way of indirectly addressing GRFs. This series adds support for indirect push constants to the FS backend. Most of the patches are general cleanups and fixes that

[Mesa-dev] [PATCH 05/21] i965: Move type_size() methods out of visitor classes.

From: Kenneth Graunke I want to use C function pointers to these, and they don't use anything in the visitor classes anyway. Signed-off-by: Kenneth Graunke Reviewed-by: Jason Ekstrand --- src/mesa/drivers/dri/i965/brw_fs.cpp | 10 +- src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 04/21] nir: Use nir_builder in nir_lower_io's get_io_offset().

From: Kenneth Graunke Much more readable. Signed-off-by: Kenneth Graunke Reviewed-by: Jason Ekstrand --- src/glsl/nir/nir_lower_io.c | 42 ++ 1 file changed, 14 insertions(+), 28 deletions(-) diff --git a/src/glsl/nir/nir_lower_io.c b/src/glsl/nir/nir_

[Mesa-dev] big endian: r600g

Hi Michel, Many thanks for your answer. We need to think about the topic. Cheers, Christian On 20 August 2015 at 04:53 AM, Michel Dänzer wrote: On 19.08.2015 16:34, Christian Zigotzky wrote: Thank you for your answer. I don't have an idea anymore. Could you tell me which files we have to mod

Re: [Mesa-dev] Last try at AoA for Mesa 11 v4

On Thu, 2015-08-20 at 14:37 +1000, Timothy Arceri wrote: > Changes in v4: > - Desktop support (see patch 18 for limitations) > - Image support > - Much faster constant optimisation pass (patch 11) > > Changes in v3: > - Rebased on the tessellation and subroutine changes > - Atomic counter AoA now

[Mesa-dev] [PATCH 24/25] i965: enable ARB_arrays_of_arrays

--- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 0da528b..c0ff61d 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/

[Mesa-dev] [PATCH 22/25] i965: add support for image AoA

--- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 60 1 file changed, 38 insertions(+), 22 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index d7a2500..7dca642 100644 --- a/src/mesa/drivers/dri/i965/brw

[Mesa-dev] [PATCH 25/25] docs: Mark AoA as done for i965

--- docs/GL3.txt | 4 ++-- docs/relnotes/11.0.0.html | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index 54c0c5a..20627ae 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -149,7 +149,7 @@ GL 4.2, GLSL 4.20: GL 4.3, GLSL 4.30: -

[Mesa-dev] [PATCH 23/25] glsl: Allow arrays of arrays in GLSL ES 3.10 and GLSL 4.30

V2: add missing 's' to the extension name in error messages and add decimal place in version string Reviewed-by: Ilia Mirkin --- src/glsl/ast_to_hir.cpp | 13 - src/glsl/glsl_parser.yy | 22 ++ src/glsl/glsl_parser_extras.h | 5 + 3 files changed

[Mesa-dev] [PATCH 20/25] i965: add arrays of arrays support for varyings

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++-- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 82cb499..562a4f6 100644 --- a/src/mesa/drivers/

[Mesa-dev] [PATCH 18/25] glsl: disable interface block AoA

Desktop GL supports interface block AoA however AMD and Nvidia dont support it in their drivers curently so we can get away with disabling it for now. --- src/glsl/ast_to_hir.cpp | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_t

[Mesa-dev] [PATCH 11/25] glsl: interleave constant propagation and folding

The constant folding pass can take a long time to complete so rather than running throught the entire pass each time a new constant is propagated (and vice versa) interleave them. This change helps ES31-CTS.arrays_of_arrays.InteractionFunctionCalls1 go from around 2 min -> 23 sec. --- src/glsl/op

[Mesa-dev] [PATCH 21/25] glsl: set image access qualifiers for AoA

--- src/glsl/link_uniforms.cpp | 77 +- 1 file changed, 49 insertions(+), 28 deletions(-) diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp index 4757fd5..f8a6620 100644 --- a/src/glsl/link_uniforms.cpp +++ b/src/glsl/link_uniforms.cp

[Mesa-dev] [PATCH 19/25] glsl: add AoA support to subroutines

--- src/glsl/ast_function.cpp | 43 ++- src/glsl/lower_subroutine.cpp | 2 +- 2 files changed, 39 insertions(+), 6 deletions(-) diff --git a/src/glsl/ast_function.cpp b/src/glsl/ast_function.cpp index d003655..42affad 100644 --- a/src/glsl/ast_function

[Mesa-dev] [PATCH 06/25] glsl: fix binding validation for interface blocks

V2: rebase on SSBO changes --- src/glsl/ast_to_hir.cpp | 27 +-- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp index 5ee02ed..ee5ff9d 100644 --- a/src/glsl/ast_to_hir.cpp +++ b/src/glsl/ast_to_hir.cpp @@ -2

[Mesa-dev] [PATCH 05/25] glsl: add support for initialising sampler AoA

--- src/glsl/link_uniform_initializers.cpp | 68 -- 1 file changed, 41 insertions(+), 27 deletions(-) diff --git a/src/glsl/link_uniform_initializers.cpp b/src/glsl/link_uniform_initializers.cpp index 0cc79d9..d6a6ab7 100644 --- a/src/glsl/link_uniform_initializer

[Mesa-dev] [PATCH 08/25] glsl: validate binding qualifier for AoA

Reviewed-by: Tapani Pälli --- src/glsl/ast_to_hir.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp index ee5ff9d..54569a8 100644 --- a/src/glsl/ast_to_hir.cpp +++ b/src/glsl/ast_to_hir.cpp @@ -2114,7 +2114,7 @@ validate_bind

[Mesa-dev] [PATCH 17/25] glsl: avoid hitting assert for arrays of arrays

Also add TODO comment about adding proper support Signed-off-by: Timothy Arceri --- src/glsl/ir_set_program_inouts.cpp | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/glsl/ir_set_program_inouts.cpp b/src/glsl/ir_set_program_inouts.cpp index b7a0f6e..d7c29b0 100644 --- a/src/glsl/i

[Mesa-dev] [PATCH 13/25] nir: wrapper for glsl_type arrays_of_arrays_size()

Reviewed-by: Tapani Pälli --- src/glsl/nir/nir_types.cpp | 6 ++ src/glsl/nir/nir_types.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/src/glsl/nir/nir_types.cpp b/src/glsl/nir/nir_types.cpp index 940c676..da7015b 100644 --- a/src/glsl/nir/nir_types.cpp +++ b/src/glsl/nir/nir_type

[Mesa-dev] [PATCH 14/25] nir: add atomic lowering support for AoA

--- src/glsl/nir/nir_lower_atomics.c | 22 -- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/src/glsl/nir/nir_lower_atomics.c b/src/glsl/nir/nir_lower_atomics.c index ce3615a..ea63474 100644 --- a/src/glsl/nir/nir_lower_atomics.c +++ b/src/glsl/nir/nir_lower_at

[Mesa-dev] [PATCH 10/25] glsl: remove dead code in a single pass

Currently only one ir assignment is removed for each var in a single dead code optimisation pass. This means if a var has more than one assignment, then it requires all the glsl optimisations to be run again for each additional assignment to be removed. Another pass is also required to remove the v

[Mesa-dev] [PATCH 02/25] glsl: dont allow gl_PerVertex to be redeclared as an array of arrays

V2: move single dimensional array detection into a helper Signed-off-by: Timothy Arceri Reviewed-by: Samuel Iglesias Gonsálvez --- src/glsl/ast.h | 8 src/glsl/ast_to_hir.cpp | 3 ++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/src/glsl/ast.h b/src/glsl/ast.

[Mesa-dev] [PATCH 03/25] glsl: clean-up link uniform code

These changes are also needed to allow linking of struct and interface arrays of arrays. --- src/glsl/link_uniforms.cpp | 16 ++-- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp index 254086d..42f75e9 100644 --- a/

[Mesa-dev] [PATCH 01/25] glsl: calculate component size for arrays of arrays when varying packing disabled

Signed-off-by: Timothy Arceri Reviewed-by: Ilia Mirkin --- src/glsl/link_varyings.cpp | 13 ++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp index f7a7b8c..0d343d6 100644 --- a/src/glsl/link_varyings.cpp +++ b/sr

[Mesa-dev] [PATCH 12/25] glsl: add AoA support for atmoic counters

This marks all counters in an AoA as active. For AoA all but the innermost array are threated as separate counters/uniforms. The Nvidia binary also goes further and finds inactive counters in the AoA, in future we should do this too, however this gets things working for the time being. This chang

[Mesa-dev] [PATCH 15/25] i965: support atomic counter AoA

--- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 22 +- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 9062bcc..0701403 100644 --- a/src/mesa/drivers/dri/i

[Mesa-dev] [PATCH 07/25] glsl: add helper for calculating size of AoA

V2: return 0 if not array rather than -1 Reviewed-by: Tapani Pälli --- src/glsl/glsl_types.h | 19 +++ 1 file changed, 19 insertions(+) diff --git a/src/glsl/glsl_types.h b/src/glsl/glsl_types.h index e7c73da..469ee3e 100644 --- a/src/glsl/glsl_types.h +++ b/src/glsl/glsl_types.

[Mesa-dev] [PATCH 16/25] i965: fix atomic buffer index for bindings other than 0

Since commit c0cd5b var->data.binding was being used as a replacement for atomic buffer index, but they don't have to be the same value they just happen to end up the same when binding is 0. Now that we store the atomic uniform location in var->data.location we can use this to lookup the atomic bu

[Mesa-dev] [PATCH 09/25] glsl: allow AoA to be sized by initializer or constructor

From Section 4.1.9 of the GLSL ES 3.10 spec: "Arrays are sized either at compile-time or at run-time. To size an array at compile-time, either the size must be specified within the brackets as above or must be inferred from the type of the initializer." --- src/glsl/ast.h | 21 +++--

[Mesa-dev] [PATCH 04/25] glsl: Add support for linking uniform arrays of arrays

V2: Handle arrays of arrays in the same way structures are handled The ARB_arrays_of_arrays spec doesn't give very many details on how AoA uniforms are intended to be implemented. However in the ARB_program_interface_query spec there are details that show AoA are intended to be handled in a simila

[Mesa-dev] Last try at AoA for Mesa 11 v4

Changes in v4: - Desktop support (see patch 18 for limitations) - Image support - Much faster constant optimisation pass (patch 11) Changes in v3: - Rebased on the tessellation and subroutine changes - Atomic counter AoA now working including indirect indexing (previously I had broken piglit test

Re: [Mesa-dev] [PATCH 0/6] Copyright / license pet peeves

Patches 1 and 6 were too large for the mailing list, so I checked them in your tree. Patch 6 has some diffs that leave lines badly wrapped: + * THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWI

Re: [Mesa-dev] [PATCH 3/6] i965: Fix typos in license

On Wed, Aug 19, 2015 at 7:49 PM, Ian Romanick wrote: > From: Ian Romanick > > grep -lr 'sub license' | while read f; do \ > sed --in-place -e 's/sub license/sublicense/' $f ;\ > done > > grep -lr 'NON-INFRINGEMENT' | while read f; do \ > sed --in-place -e 's/NON-INFRINGEMENT/NONINFRIN

Re: [Mesa-dev] big endian: r600g

On 19.08.2015 16:34, Christian Zigotzky wrote: > > Thank you for your answer. I don't have an idea anymore. Could you > tell me which files we have to modify? If I knew exactly what needs to be done where, I probably would have done it myself. :) That said, I suspect changes to the driver (src/ga

[Mesa-dev] [PATCH 5/6] i965: Various trivial changes to file headers

From: Ian Romanick Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_cs.cpp | 2 +- src/mesa/drivers/dri/i965/brw_device_info.h | 45 src/mesa/drivers/dri/i965/brw_vec4_cse.cpp | 2 +- src/mesa/drivers/dri/i965/brw_vec4_generator.cpp

[Mesa-dev] [PATCH 4/6] i965: Re-wrap lines in the license, part 1

From: Ian Romanick grep -lr '^ [*] IN THE SOFTWARE.$' | while read f; do \ sed --in-place \ -e 's/THE USE OR OTHER DEALINGS$/THE USE OR OTHER/' \ -e 's/^ \* IN THE SOFTWARE.$/ * DEALINGS IN THE SOFTWARE./' \ $f done Signed-off-by: Ian Romanick --- src/mesa/drivers/d

[Mesa-dev] [PATCH 0/6] Copyright / license pet peeves

My justification for these patches is that I was annoyed. :) After this series, the following script tells me that the differences in the license / copyright headers of all the files in src/mesa/drivers/dri/i965 is pretty minimal. I have summarized the differences below. #! /bin/bash j=b

[Mesa-dev] [PATCH 2/6] i965: Remove horizontal bars from file header comments

From: Ian Romanick Why was that ever a thing? Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/brw_clear.c| 6 ++ src/mesa/drivers/dri/i965/brw_draw.c | 6 ++ src/mesa/drivers/dri/i965/brw_draw.h | 6 ++ src/mesa/drivers/dri/i965/brw_dra

[Mesa-dev] [PATCH 3/6] i965: Fix typos in license

From: Ian Romanick grep -lr 'sub license' | while read f; do \ sed --in-place -e 's/sub license/sublicense/' $f ;\ done grep -lr 'NON-INFRINGEMENT' | while read f; do \ sed --in-place -e 's/NON-INFRINGEMENT/NONINFRINGEMENT/' $f ;\ done Signed-off-by: Ian Romanick --- src/mesa/

Re: [Mesa-dev] [PATCH v2] i965: Refactor image uniform setup

On Wed, Aug 19, 2015 at 6:48 AM, Jason Ekstrand wrote: > > On Aug 19, 2015 6:45 AM, "Francisco Jerez" wrote: >> >> Jason Ekstrand writes: >> >> > On Aug 19, 2015 2:56 AM, "Francisco Jerez" >> > wrote: >> >> >> >> Jason Ekstrand writes: >> >> >> >> > Previously, setting up image uniforms relied

[Mesa-dev] [PATCH V2 3/8] i965: Use helper function intel_get_tile_dims() in surface setup

It takes care of using the correct tile width if we later use other tiling patterns for aux miptree. V2: Remove the comment about using Yf for aux miptree. Cc: Ben Widawsky Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 14 -- 1 file changed, 12 ins

[Mesa-dev] [PATCH V2 5/8] i965: Move conversion of {src, dst}_pitch to dwords outside if/else

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_blit.c | 25 + 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index c177eec..d15a64d 100644 --- a/src/mesa/driver

[Mesa-dev] [PATCH V2 2/8] i965: Use intel_get_tile_dims() to get tile masks

This will require change in the parameters passed to intel_miptree_get_tile_masks(). V2: Rearrange the order of parameters. (Ben) Change the name to intel_get_tile_masks(). (Topi) Cc: Ben Widawsky Cc: Topi Pohjolainen Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/brw_blorp.cpp

[Mesa-dev] [PATCH V2 6/8] i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLT

Current code checks the alignment restrictions only for Y tiling. From Broadwell PRM vol 10: "pitch is of 512Byte granularity for Tile-X: This means the tiled-x surface pitch can be (512, 1024, 1536, 2048...)/4 (in Dwords)." This patch adds the restriction for X tiling as well. Signed-off-by:

[Mesa-dev] [PATCH V2 8/8] i965: Rename intel_miptree_get_dimensions_for_image()

This function isn't specific to miptrees. So, drop the "miptree" from function name. Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_fbo.c | 2 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 +++--- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4 ++-- src/mesa/

[Mesa-dev] [PATCH V2 7/8] i965/gen9: Fix {src, dst}_pitch alignment check for XY_FAST_COPY_BLT

I misinterpreted the alignmnet restriction in XY_FAST_COPY_BLT earlier. Instead of checking pitch for 64KB alignmnet we need to check it for tile widh alignment. Signed-off-by: Anuj Phogat Cc: Ben Widawsky --- src/mesa/drivers/dri/i965/intel_blit.c | 18 +++--- 1 file changed, 7 ins

[Mesa-dev] [PATCH V2 4/8] i965: Delete temporary variable 'src_pitch'

Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_blit.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index f8606b8..c177eec 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.

[Mesa-dev] [PATCH V2 1/8] i965: Add a helper function intel_get_tile_dims()

V2: - Do the tile width/height computations in the new helper function and use it later in intel_miptree_get_tile_masks(). - Change the name to intel_get_tile_dims(). Cc: Ben Widawsky Signed-off-by: Anuj Phogat --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 81 +++

Re: [Mesa-dev] glClearColor is broken in a weird way if compiled with mangling enabled

Update: All function with GLclampf and GLfloat are messed up. But pointer are fine. Other datatype works fine as well. I never had such a weird issue before. The work around to replace it with GLdouble. Yuzhu - Original Message - From: "Yuzhu Lu" To: mesa-dev@lists.freedesktop

[Mesa-dev] [PATCH v3] mesa/formats: refactor by removing compressed formats

From: Nanley Chery All compressed formats return GL_FALSE and there isn't any evidence to support that this behaviour would change. Remove all switch cases for compressed formats. v2. Since the exhaustive switch is removed, add a gtest to ensure all formats are handled. v3. Ensure that GL_NO

[Mesa-dev] [PATCH] glsl: expose textureQueryLod in GLSL 4.00+ fragment shaders

Signed-off-by: Ilia Mirkin --- src/glsl/builtin_functions.cpp | 119 - 1 file changed, 82 insertions(+), 37 deletions(-) diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp index 04ad617..9351f71 100644 --- a/src/glsl/builtin_funct

Re: [Mesa-dev] [PATCH 1/2] mesa/texformat: enable ASTC formats for TexStorage

On Mon, Aug 17, 2015 at 11:54 AM, Chad Versace wrote: > On Tue 28 Jul 2015, Nanley Chery wrote: > > From: Nanley Chery > > > > According to the spec, Tex*Storage* commands are supported if the GL > > implementation has support for immutable textures. > > > > Signed-off-by: Nanley Chery > > ---

Re: [Mesa-dev] [PATCH v3] mesa: don't enable online compression for ASTC formats

Agreed. I've updated the patch. Thanks. On Mon, Aug 17, 2015 at 11:39 AM, Chad Versace wrote: > On Tue 11 Aug 2015, Nanley Chery wrote: > > From: Nanley Chery > > > > In agreement with the ASTC spec, this makes calls to TexImage*D > unsuccessful. > > Implied by the spec, Generate[Texture]Mipmap

Re: [Mesa-dev] glClearColor is broken in a weird way if compiled with mangling enabled

It seems related to datatype GLclampf, which affects mglClearColor, mglBlendColor... If I replace it with double, everything works fine. Any ideas? Yuzhu - Original Message - From: "Yuzhu Lu" To: mesa-dev@lists.freedesktop.org, mesa-us...@lists.freedesktop.org Sent: Friday, Au

Re: [Mesa-dev] [PATCH 13/25] glsl: Use a separate availability class for image atomic built-ins.

Reviewed-by: Timothy Arceri ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 12/25] glsl: Allow precision qualifiers on general opaque types.

Reviewed-by: Timothy Arceri ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965/fs: Split VGRFs after lowering pull constants

The following shader test exercises the bug: [require] GLSL >= 1.10 [vertex shader] void main() { gl_Position = gl_Vertex; } [fragment shader] uniform float f[4]; uniform ivec4 s; void main() { gl_FragColor = vec4(f[s.x], f[s.y], f[s.z], f[s.w]); } [test] uniform float f[0] 0.0 uniform f

[Mesa-dev] [PATCH] i965/fs: Split VGRFs after lowering pull constants

The split_virtual_grfs code doesn't properly rewrite reladdr so we need to make sure that any uniform indirects are lowered away first. --- src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/

Re: [Mesa-dev] [PATCH 10/25] glsl: Require that all image uniforms have a format qualifier in GLSL ES.

Reviewed-by: Timothy Arceri ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 09/25] glsl: Add support for image binding qualifiers.

On Wed, 2015-08-19 at 13:52 +0300, Francisco Jerez wrote: > Timothy Arceri writes: > > > On Mon, 2015-08-17 at 19:45 +0300, Francisco Jerez wrote: > > > Support for binding an image to an image unit explicitly in the shader > > > source is required by both GLSL 4.2 and GLSL ES 3.1, but not by the

Re: [Mesa-dev] [PATCH 4/4] mesa/formats: refactor by globbing on types in switch statement

On Fri, Aug 14, 2015 at 4:09 PM, Chad Versace wrote: > On Tue 11 Aug 2015, Nanley Chery wrote: > > From: Nanley Chery > > > > Combine the adjacent cases which have the same GL type in the switch > statemnt. > > > > Signed-off-by: Nanley Chery > > --- > > src/mesa/main/formats.c | 152 > ++-

[Mesa-dev] [PATCH v2] mesa/formats: refactor by removing compressed formats

From: Nanley Chery All compressed formats return GL_FALSE and there isn't any evidence to support that this behaviour would change. Remove all switch cases for compressed formats. v2. Since the exhaustive switch is removed, add a gtest to ensure all formats are handled. Cc: Brian Paul Cc:

[Mesa-dev] [PATCH 2/2] mesa/formats: make format testing a gtest

From: Nanley Chery We currently check that our format info table is sane during context initialization in debug builds. Perform this check during `make check` instead. This enables format testing in release builds and removes the requirement of an exhuastive switch for _mesa_uncompressed_format_t

[Mesa-dev] [PATCH 1/2] mesa/formats: only do type and component lookup for uncompressed formats

From: Nanley Chery Only uncompressed formats have a non-void type and actual components per pixel. Rename _mesa_format_to_type_and_comps to _mesa_uncompressed_format_to_type_and_comps and require callers to check if the format is not compressed. v2. include compressed format cases to avoid gcc w

[Mesa-dev] [PATCH 1/3] mesa/es3.1 : Align OpenGL ES 3.1 glBindVertexBuffer error handling with OpenGL Core

From: Marta Lofstedt According to OpenGL ES 3.1 specification 10.3.1: "An INVALID_OPERATION error is generated if buffer is not zero or a name returned from a previous call to GenBuffers, or if such a name has since been deleted with DeleteBuffers." This error check was previously limited to Open

[Mesa-dev] [PATCH 3/3] mesa/es3.1: Enable GL_ARB_vertex_attrib_binding functionality for GLES 3.1

From: Marta Lofstedt Signed-off-by: Marta Lofstedt --- src/mesa/main/varray.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c index 3bab985..3ddf795 100644 --- a/src/mesa/main/varray.c +++ b/src/mesa/main/varray.

[Mesa-dev] [PATCH 2/3] mesa/es3.1: Allow query of Vertex bindings for GLES 3.1

From: Marta Lofstedt Signed-off-by: Marta Lofstedt --- src/mesa/main/get.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c index ae2d0b7..b6b7d6c 100644 --- a/src/mesa/main/get.c +++ b/src/mesa/main/get.c @@ -1966,7 +1966,8 @@

[Mesa-dev] [PATCH 0/3] Enable misc. Vertex bindings for OpenGL ES 3.1

These patches enable some Vertex Binding functionality for OpenGL ES 3.1, that is currently limited to desktop GL. Marta Lofstedt (3): mesa/es3.1 : Align OpenGL ES 3.1 glBindVertexBuffer error handling with OpenGL Core mesa/es3.1: Allow query of Vertex bindings for GLES 3.1 mesa/es3.1: E

[Mesa-dev] [PATCH] mesa: Allow query of GL_VERTEX_BINDING_BUFFER

From: Marta Lofstedt According to OpenGL ES 3.1 specification table : 20.2 and OpenGL specification 4.4 table 23.4. The glGetIntegeri_v functions should report the name of the buffer bound when called with GL_VERTEX_BINDING_BUFFER. Signed-off-by: Marta Lofstedt --- src/mesa/main/get.c | 8 +++

Re: [Mesa-dev] [PATCH 11/25] glsl: Implement GLSL ES restriction on images being either readonly or writeonly.

Patches 11,12,13: Reviewed-by: Tapani Pälli On 08/17/2015 07:45 PM, Francisco Jerez wrote: --- src/glsl/ast_to_hir.cpp | 18 ++ 1 file changed, 18 insertions(+) diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp index 4d279f6..ff57ec3 100644 --- a/src/glsl/ast_to

[Mesa-dev] [Bug 91691] Missing "gl.pc" file while using Scons for cross-compiling

https://bugs.freedesktop.org/show_bug.cgi?id=91691 YuGiOhJCJ changed: What|Removed |Added CC||yugioh...@1s.fr -- You are receiving this m

[Mesa-dev] [Bug 91691] Missing "gl.pc" file while using Scons for cross-compiling

https://bugs.freedesktop.org/show_bug.cgi?id=91691 Bug ID: 91691 Summary: Missing "gl.pc" file while using Scons for cross-compiling Product: Mesa Version: 9.1 Hardware: Other OS: All Status: NEW

Re: [Mesa-dev] [PATCH 20.5/25] mesa: Add ES31 API tag for the extension table.

Reviewed-by: Tapani Palli On 08/19/2015 02:50 PM, Francisco Jerez wrote: I'll mark the OES_shader_image_atomic extension entry with this tag to make sure that we don't expose it on earlier GLES API versions accidentally, because according to the extension: "OpenGL ES 3.1 and GLSL ES 3.10 are

Re: [Mesa-dev] [PATCH v3 4/5] i965: handle nir_intrinsic_image_size

Francisco Jerez writes: > Martin Peres writes: > >> v2, Review from Francisco Jerez: >> - avoid the camelCase for the booleans >> - init the booleans using the sampler type >> - force the initialization of all the components of the output register >> >> Signed-off-by: Martin Peres >> --- >> sr

Re: [Mesa-dev] [PATCH 07/10] i965: Move texture swizzle resolving into dispatcher

Topi Pohjolainen writes: > v2: Non-trivial rebase > > Reviewed-by: Matt Turner (v1) > Reviewed-by: Kenneth Graunke (v1) > Signed-off-by: Topi Pohjolainen > > Signed-off-by: Topi Pohjolainen Uhm, and here you dropped my "[ Francisco Jerez: Non-trivial rebase. ]" and R-b tags and replaced them

Re: [Mesa-dev] [PATCH 06/10] i965/gen7: Move tex gather format override into common dispatcher

Topi Pohjolainen writes: > Signed-off-by: Topi Pohjolainen Reviewed-by: Francisco Jerez > --- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c > b/src/mesa/drivers/dri/i965/brw_wm

Re: [Mesa-dev] [PATCH 05/10] i965: Move tex miptree and format resolving into dispatcher

Topi Pohjolainen writes: > All hardware platforms have this in common, so do it in the > hardware independent dispatcher. > > v2 (Matt): Removed extra whitespace. > v3: Non-trivial rebase > > Reviewed-by: Matt Turner (v1) > Reviewed-by: Kenneth Graunke (v1) > Signed-off-by: Topi Pohjolainen I

Re: [Mesa-dev] [PATCH 04/10] i965/gen4: Use tex object format instead of the miptree format

Topi Pohjolainen writes: > Equivalent logic for newer generations (>= 7) use the tex object > format instead. This patch prepares for merging the decision > making for all generations. > > Signed-off-by: Topi Pohjolainen Reviewed-by: Francisco Jerez > --- > src/mesa/drivers/dri/i965/brw_wm_s

[Mesa-dev] [Bug 91687] Crash when creating new context after destroying the old one using indirect rendering

https://bugs.freedesktop.org/show_bug.cgi?id=91687 Bug ID: 91687 Summary: Crash when creating new context after destroying the old one using indirect rendering Product: Mesa Version: 10.5 Hardware: x86-64 (AMD64)

[Mesa-dev] [Bug 91687] Crash when creating new context after destroying the old one using indirect rendering

https://bugs.freedesktop.org/show_bug.cgi?id=91687 --- Comment #2 from Guilherme --- Created attachment 117785 --> https://bugs.freedesktop.org/attachment.cgi?id=117785&action=edit xtrace with glx commands -- You are receiving this mail because: You are the QA Contact for the bug. You are the

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