[Mesa-dev] [PATCH 5/5] i965/fs: Emit a MOV instead of a SEL if the sources are the same.

One program affected. instructions in affected programs: 436 -> 428 (-1.83%) Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp | 42 +-- 1 file changed, 23 insertions(+), 19 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_sel_peeph

[Mesa-dev] [PATCH 1/5] i965: Keep pointers to IF/ELSE/ENDIF instructions in the cfg.

Useful for finding the associated control flow instructions, given a block ending in one. --- src/mesa/drivers/dri/i965/brw_cfg.cpp | 34 ++ src/mesa/drivers/dri/i965/brw_cfg.h | 10 ++ 2 files changed, 40 insertions(+), 4 deletions(-) diff --git a/src/me

[Mesa-dev] [PATCH 3/5] i965/fs: New peephole optimization to generate SEL.

fs_visitor::try_replace_with_sel optimizes only if statements whose "then" and "else" bodies contain a single MOV instruction. It also could not handle constant arguments, since they cause an extra MOV immediate to be generated (since we haven't run constant propagation, there are more than the sin

[Mesa-dev] [PATCH 4/5] i965/fs: Extend SEL peephole to handle only matching MOVs.

Before this patch, the following code would not be optimized even though the first two instructions were common to the then and else blocks: (+f0) IF MOV dst0 ... MOV dst1 ... MOV dst2 ... ELSE MOV dst0 ... MOV dst1 ... MOV dst3 ... ENDIF This commit extends the peephol

[Mesa-dev] [PATCH 2/5] i965: Add a pass to remove dead control flow.

Removes IF/ENDIF and IF/ELSE/ENDIF with no intervening instructions. total instructions in shared programs: 1360393 -> 1360387 (-0.00%) instructions in affected programs: 157 -> 151 (-3.82%) (no change in vertex shaders) Reviewed-by: Paul Berry [v1] v2: Moved before SEL peephole in series.

[Mesa-dev] [PATCH 2/2] i965: Respect driconf option clamp_max_samples

Clamp gen7 GL_MAX_SAMPLES to 0, 4, or 8. Clamp gen6 GL_MAX_SAMPLES to 0 or 4. Clamp other gens to 0. CC: Eric Anholt Signed-off-by: Chad Versace --- src/mesa/drivers/dri/i965/brw_context.c | 35 +++- src/mesa/drivers/dri/i965/intel_screen.c | 1 + 2 files changed,

[Mesa-dev] [PATCH 1/2] dri: Add driconf option clamp_max_samples

This clamps GL_MAX_SAMPLES to the given value. If negative, then no clamping occurs. This patch adds the option, but no driver respects it yet. CC: Eric Anholt Signed-off-by: Chad Versace --- This little series lives on my driconf-clamp-max-samples branch. src/mesa/drivers/dri/common/xmlpoo

[Mesa-dev] [Bug 71110] xorg_driver.c:1030:2: error: too many arguments to function ‘DamageUnregister’

https://bugs.freedesktop.org/show_bug.cgi?id=71110 Vinson Lee changed: What|Removed |Added CC||a...@nwnk.net, |

[Mesa-dev] [Bug 71110] New: xorg_driver.c:1030:2: error: too many arguments to function ‘DamageUnregister’

https://bugs.freedesktop.org/show_bug.cgi?id=71110 Priority: medium Bug ID: 71110 Assignee: mesa-dev@lists.freedesktop.org Summary: xorg_driver.c:1030:2: error: too many arguments to function ‘DamageUnregister’ Severity: bloc

[Mesa-dev] [PATCH V3 03/12] mesa: Pass number of samples as a program state variable

Number of samples will be required in fragment shader program by new GLSL builtin uniform "gl_NumSamples". V2: Use "state.numsamples" in place of "state.num.samples" Use _NEW_BUFFERS flag in place of _NEW_MULTISAMPLE Signed-off-by: Anuj Phogat Reviewed-by: Ian Romanick Reviewed-by: Ken Grau

[Mesa-dev] [PATCH V3 02/12] mesa: Add new functions and enums required by GL_ARB_sample_shading

New functions added by GL_ARB_sample_shading: glMinSampleShadingARB() New enums: GL_SAMPLE_SHADING_ARB GL_MIN_SAMPLE_SHADING_VALUE_ARB V2: Update comments. Create new GL4x.xml. Remove redundant code in get.c. Update the API_XML list in Makefile.am. Add extra_gl40_ARB_sample_shadin

[Mesa-dev] [PATCH V3 09/12] i965: Add FS backend for builtin gl_SampleMask[]

V2: - Update comments - Add a special backend instructions to compute sample_mask. - Add a new variable uses_omask in brw_wm_prog_data. V3: - Make changes to support simd16 mode. - Delete redundant AND instruction and handle the register stride in FS backend instruction. Signed

[Mesa-dev] [PATCH V3 10/12] i965/gen6: Enable the features required for GL_ARB_sample_shading

- Enable GEN6_WM_MSDISPMODE_PERSAMPLE, GEN6_WM_POSOFFSET_SAMPLE, GEN6_WM_OMASK_TO_RENDER_TARGET as per extension's specification. - Only enable one of GEN6_WM_8_DISPATCH_ENABLE or GEN6_WM_16_DISPATCH_ENABLE when GEN6_WM_MSDISPMODE_PERSAMPLE is enabled. Refer SNB PRM Vol. 2, Part 1, Page 279 f

[Mesa-dev] [PATCH V3 04/12] glsl: Add new builtins required by GL_ARB_sample_shading

New builtins added by GL_ARB_sample_shading: in vec2 gl_SamplePosition in int gl_SampleID in int gl_NumSamples out int gl_SampleMask[] V2: - Use SWIZZLE_ for STATE_NUM_SAMPLES. - Use "result.samplemask" in arb_output_attrib_string. - Add comment to explain the size of gl_SampleMask[] a

[Mesa-dev] [PATCH V3 12/12] i965: Enable ARB_sample_shading on intel hardware >= gen6

Signed-off-by: Anuj Phogat Reviewed-by: Paul Berry Reviewed-by: Ken Graunke --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index abc3176..5eae84f 10

[Mesa-dev] [PATCH V3 06/12] i965: Don't do vector splitting for ir_var_system_value

This is required while adding builtin system value vec{2, 3, 4} variables. For example: (declare (sys) vec2 gl_SamplePosition) Without this patch above glsl ir splits in to: (declare (temporary) float gl_SamplePosition_x) (declare (temporary) float gl_SamplePosition_y) Signed-off-by: Anuj Phogat

[Mesa-dev] [PATCH V3 05/12] mesa: Add a helper function _mesa_get_min_invocations_per_fragment()

This function is used to test if we need to do per sample shading or per fragment shading. V2: Use MAX2() to make sure the function returns a number >= 1. Signed-off-by: Anuj Phogat Reviewed-by: Ian Romanick Reviewed-by: Paul Berry --- src/mesa/program/program.c | 32 +

[Mesa-dev] [PATCH V3 07/12] i965: Add FS backend for builtin gl_SamplePosition

V2: - Update comments. - Add compute_pos_offset variable in brw_wm_prog_key. - Add variable uses_pos_offset in brw_wm_prog_data. V3: - Make changes to support simd16 mode. Signed-off-by: Anuj Phogat Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_context.h | 1 + sr

[Mesa-dev] [PATCH V3 08/12] i965: Add FS backend for builtin gl_SampleID

V2: - Update comments - Add compute_sample_id variables in brw_wm_prog_key - Add a special backend instruction to compute sample_id. V3: - Make changes to support simd16 mode. Signed-off-by: Anuj Phogat Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_defines.h| 1

[Mesa-dev] [PATCH V3 11/12] i965/gen7: Enable the features required for GL_ARB_sample_shading

- Enable GEN7_WM_MSDISPMODE_PERSAMPLE, GEN7_WM_POSOFFSET_SAMPLE, GEN7_WM_OMASK_TO_RENDER_TARGET as per extension's specification. - Only enable one of GEN7_WM_8_DISPATCH_ENABLE or GEN7_WM_16_DISPATCH_ENABLE when GEN7_WM_MSDISPMODE_PERSAMPLE is enabled. Refer IVB PRM Vol. 2, Part 1, Page 288 f

[Mesa-dev] [PATCH V3 01/12] mesa: Add infrastructure for GL_ARB_sample_shading

This patch implements the common support code required for the GL_ARB_sample_shading extension. V2: Move GL_ARB_sample_shading to ARB extension list. Signed-off-by: Anuj Phogat Reviewed-by: Ian Romanick Reviewed-by: Ken Graunke --- src/glsl/glcpp/glcpp-parse.y| 3 +++ src/glsl/glsl_pa

[Mesa-dev] [PATCH V3 00/12] Implement GL_ARB_sample_shading on Intel hardware

Changes in V3: Incorporate review comments from Brian, Ian and Paul. Major changes are related to fixing code generation for simd16 and enabling simd16 dispatch on gen6, gen7. Although I've received r-b on all the patches (except patch 6/12) in this series, I'm sending out the final version of pat

Re: [Mesa-dev] [PATCH 5/6] docs/GL3: document radeonsi support, minor cleanup

On Thu, Oct 31, 2013 at 10:05 AM, Ian Romanick wrote: >> +GL_ARB_shading_language_420pack DONE (i965, r600, >> radeonsi) > > Because of the way it was implemented, I think this should say "All > drivers that support GLSL 1.30." In a similar vein, I wonder if there's any valu

Re: [Mesa-dev] [PATCH 6/6] mesa: fix NUM_COMPRESSED_TEXTURE_FORMATS query

On 10/31/2013 10:45 AM, Ian Romanick wrote: > On 10/31/2013 10:21 AM, Marek Olšák wrote: >> On Thu, Oct 31, 2013 at 6:19 PM, Ian Romanick wrote: >>> On 10/31/2013 08:42 AM, Marek Olšák wrote: From: Marek Olšák Cc: mesa-sta...@lists.freedesktop.org >>> >>> This is not correct. GL_C

[Mesa-dev] [PATCH 4/5] Patch 5: whitespace consistency.

--- src/mesa/main/varray.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c index 0087096..ed3d047 100644 --- a/src/mesa/main/varray.c +++ b/src/mesa/main/varray.c @@ -1495,7 +1495,7 @@ _mesa_VertexAttribIFormat(GLuint attr

[Mesa-dev] [PATCH 1/5] mesa: Clean up vertex attrib binding patch.

I didn't like how the getters looked in the code (I have a hard enough time keeping the ArrayObj members straight without moving some of their names farther from their usage), so I tried this cleanup. It is intended to be squashed with "[PATCH 05/11] mesa: Add ARB_vertex_attrib_binding" --- src/m

[Mesa-dev] collected review for GL_ARB_vertex_attrib_binding

While reviewing the patch series, I got to wondering if my patch 1/5 idea would clean things up, so instead of suggesting you try writing the patch, I wrote it, and then just wrote the rest of my review as patches. If you squash it all into your series, the whole set is: Reviewed-by: Eric Anholt

[Mesa-dev] [PATCH 3/5] corresponding cleanup for patch 11: Optimize rebinding the same VBO

--- src/mesa/main/varray.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c index e7ff8d7..0087096 100644 --- a/src/mesa/main/varray.c +++ b/src/mesa/main/varray.c @@ -1347,10 +1347,10 @@ void GLAPIENTRY _mesa_BindVerte

[Mesa-dev] [PATCH 5/5] mesa: Fix bug about "what if we didn't find the VBO"?

There was some spec text, and what there isn't text for we have obvious intended behavior from other buffer object bindings. --- src/mesa/main/bufferobj.c | 16 src/mesa/main/bufferobj.h | 8 +++- src/mesa/main/varray.c| 19 ++- 3 files changed, 25 inserti

[Mesa-dev] [PATCH 2/5] corresponding cleanup for patch 7: getters

--- src/mesa/main/varray.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/mesa/main/varray.c b/src/mesa/main/varray.c index f8837e8..e7ff8d7 100644 --- a/src/mesa/main/varray.c +++ b/src/mesa/main/varray.c @@ -708,6 +708,7 @@ static GLuint get_vertex_array_attrib(s

Re: [Mesa-dev] [PATCH] i965/vec4: Don't overwrite op[1] when doing a UBO load.

On 30 October 2013 17:45, Eric Anholt wrote: > Prior to the GLSL CSE pass, all of our testing happened to have a freshly > computed temporary in op[1], from the multiply by 16 to get a byte offset. > As of CSE you'll get var_refs of a reused value when you've got multiple > loads from the same of

Re: [Mesa-dev] [PATCH 6/6] mesa: fix NUM_COMPRESSED_TEXTURE_FORMATS query

On 10/31/2013 10:21 AM, Marek Olšák wrote: > On Thu, Oct 31, 2013 at 6:19 PM, Ian Romanick wrote: >> On 10/31/2013 08:42 AM, Marek Olšák wrote: >>> From: Marek Olšák >>> >>> Cc: mesa-sta...@lists.freedesktop.org >> >> This is not correct. GL_COMPRESSED_TEXTURE_FORMATS is only supposed to >> retu

Re: [Mesa-dev] [PATCH 6/6] mesa: fix NUM_COMPRESSED_TEXTURE_FORMATS query

On Thu, Oct 31, 2013 at 6:19 PM, Ian Romanick wrote: > On 10/31/2013 08:42 AM, Marek Olšák wrote: >> From: Marek Olšák >> >> Cc: mesa-sta...@lists.freedesktop.org > > This is not correct. GL_COMPRESSED_TEXTURE_FORMATS is only supposed to > return texture formats "suitable for general-purpose usa

Re: [Mesa-dev] [PATCH V2 11/12] i965/gen7: Enable the features required for GL_ARB_sample_shading

On Tue, Oct 29, 2013 at 9:29 PM, Paul Berry wrote: > On 29 October 2013 21:28, Paul Berry wrote: > >> On 29 October 2013 17:16, Anuj Phogat wrote: >> >>> >>> >>> >>> On Tue, Oct 29, 2013 at 4:31 PM, Paul Berry wrote: >>> >>> I think the right thing to do is to add: if (dispatch_

Re: [Mesa-dev] [PATCH 6/6] mesa: fix NUM_COMPRESSED_TEXTURE_FORMATS query

On 10/31/2013 08:42 AM, Marek Olšák wrote: > From: Marek Olšák > > Cc: mesa-sta...@lists.freedesktop.org This is not correct. GL_COMPRESSED_TEXTURE_FORMATS is only supposed to return texture formats "suitable for general-purpose usage." Since GL_COMPRESSED_RGBA_S3TC_DXT1_EXT only has 1 bit for

Re: [Mesa-dev] [PATCH 5/6] docs/GL3: document radeonsi support, minor cleanup

On 10/31/2013 08:42 AM, Marek Olšák wrote: > From: Marek Olšák A couple small comments below. With those fixed, Reviewed-by: Ian Romanick > --- > docs/GL3.txt | 180 > +-- > 1 file changed, 90 insertions(+), 90 deletions(-) > > diff -

Re: [Mesa-dev] [PATCH 6/6] mesa: fix NUM_COMPRESSED_TEXTURE_FORMATS query

On Thu, Oct 31, 2013 at 9:42 AM, Marek Olšák wrote: > From: Marek Olšák > > Cc: mesa-sta...@lists.freedesktop.org > --- > src/mesa/main/texcompress.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/src/mesa/main/texcompress.c b/src/mesa/main/texcompress.c > index e71d0

Re: [Mesa-dev] [PATCH] i965: Fix compiler warning.

+Ken, because he has fought the dragons of GLboolean and know where lie the invisible dragons. On 10/30/2013 02:58 PM, Courtney Goeltzenleuchter wrote: fix: intel_screen.c:1320:4: warning: initialization from incompatible pointer type [enabled by default] --- src/mesa/drivers/dri/i965/brw_cont

[Mesa-dev] [PATCH] mesa: Change driver interface for ARB_viewport_array

Add the index parameter to the Scissor, Viewport and DepthRange driver methods. Update i965 and Gallium to the change. Index always 0. --- src/mesa/drivers/common/driverfuncs.c | 2 +- src/mesa/drivers/dri/i965/brw_context.c | 4 ++-- src/mesa/drivers/dri/i965/brw_context.h | 2 +- src/mesa/d

[Mesa-dev] [PATCH 0/1]: Preparing for ARB_viewport_array

The following patch will begin the process of adding ARB_viewport_array to Mesa. Next will be to extend the gl_context Scissor and Viewport attributes to hold multiple viewport, scissor and scissor enables. Then the DI side of ARB_viewport_array. ___ mes

[Mesa-dev] [PATCH 3/6] r600g, radeonsi: properly expose texture buffer formats

From: Marek Olšák This exposes GL_ARB_texture_buffer_object_rgb32. --- src/gallium/drivers/r600/evergreen_state.c | 11 --- src/gallium/drivers/r600/r600_state.c | 11 --- src/gallium/drivers/radeonsi/si_state.c| 11 --- 3 files changed, 24 insertions(+), 9 delet

[Mesa-dev] [PATCH 6/6] mesa: fix NUM_COMPRESSED_TEXTURE_FORMATS query

From: Marek Olšák Cc: mesa-sta...@lists.freedesktop.org --- src/mesa/main/texcompress.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/main/texcompress.c b/src/mesa/main/texcompress.c index e71d0c4..7393d3f 100644 --- a/src/mesa/main/texcompress.c +++ b/src/mesa/m

[Mesa-dev] [PATCH 5/6] docs/GL3: document radeonsi support, minor cleanup

From: Marek Olšák --- docs/GL3.txt | 180 +-- 1 file changed, 90 insertions(+), 90 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index ff28ea6..0408266 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -20,45 +20,45 @@ Feature

[Mesa-dev] [PATCH 2/6] radeonsi: implement texture buffer objects

From: Marek Olšák GLSL 1.40 is done. --- src/gallium/drivers/radeonsi/radeonsi_pipe.c | 11 ++- src/gallium/drivers/radeonsi/radeonsi_shader.c | 64 -- src/gallium/drivers/radeonsi/si_state.c| 116 +++-- 3 files changed, 137 insertions(+), 54 deletions

[Mesa-dev] [PATCH 4/6] radeonsi: implement ARB_vertex_type_2_10_10_10_rev

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_state.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 0d74344..72368d8 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/galliu

[Mesa-dev] [PATCH 1/6] radeonsi: report our border color behavior

From: Marek Olšák --- src/gallium/drivers/radeonsi/radeonsi_pipe.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c b/src/gallium/drivers/radeonsi/radeonsi_pipe.c index 0431ab0..f222f7d 100644 --- a/src/gallium/drivers/radeonsi/

Re: [Mesa-dev] Tagging the 10.0 fork for git-describe

On 10/30/2013 02:16 PM, Paul Berry wrote: On 30 October 2013 14:13, Ian Romanick wrote: On 10/30/2013 01:01 PM, Chad Versace wrote: For the sake of git-describe, I propose we tag the 10.0 fork point on master as 'mesa-10.0-fork', 'mesa-10.0-base', or something similair. How do people feel abo

Re: [Mesa-dev] Batch buffer sizes, flushing questions

On 31 October 2013 05:38, Rogovin, Kevin wrote: > > > >> but I do not quite follow the second upload; what > >> is the magicks going on with batch->state_batch_offset and for that > matter > >> batch->bo->size ?? > > >This is stack and heap model for batchbuffer submission. Direct state, > which

Re: [Mesa-dev] Batch buffer sizes, flushing questions

On 31 October 2013 02:22, Rogovin, Kevin wrote: >Hi, > > Thankyou for the detailed answer, and now I have still more questions: > > > No. do_flush_locked() (which is called by intel_batch_buffer_flush()) > follows that by calling either drm_intel_bo_mrb_exec() or > drm_intel_gem_bo_context

Re: [Mesa-dev] RFC: Haswell resource streamer/hw-generated binding tables (v2)

On Thursday, October 10, 2013 01:04:08 PM Eric Anholt wrote: > > My basic comment on resource streamer: We need performance data showing > that it is a win before we commit it. I'm not planning on reviewing the > changes until we get that data. Okay, I revisited the series, did some additional o

Re: [Mesa-dev] Batch buffer sizes, flushing questions

On Thursday, October 31, 2013 12:38:37 PM Rogovin, Kevin wrote: > >> but I do not quite follow the second upload; what > >> is the magicks going on with batch->state_batch_offset and for that > >> matter > >> batch->bo->size ?? > > > >This is stack and heap model for batchbuffer submission. Direct

Re: [Mesa-dev] Batch buffer sizes, flushing questions

>> but I do not quite follow the second upload; what >> is the magicks going on with batch->state_batch_offset and for that matter >> batch->bo->size ?? >This is stack and heap model for batchbuffer submission. Direct state, which >is usually composed of the commands, is allocated at the beginni

Re: [Mesa-dev] Batch buffer sizes, flushing questions

On Thursday, October 31, 2013 09:22:23 AM Rogovin, Kevin wrote: > but I do not quite follow the second upload; what > is the magicks going on with batch->state_batch_offset and for that matter > batch->bo->size ?? This is stack and heap model for batchbuffer submission. Direct state, which is us

[Mesa-dev] Uniform Buffer Object implementation questions

Hi all, I was looking at the UBO implementation for Gen7 and following the trail of brw_vs_ubo_surfaces (found in brw_vs_surface_state.c ). The part that made me wonder was the following trail: 834 /* Because behavior for referencing outside of the binding's size in the 835

Re: [Mesa-dev] Batch buffer sizes, flushing questions

Hi, Thankyou for the detailed answer, and now I have still more questions: > No. do_flush_locked() (which is called by intel_batch_buffer_flush()) > follows that by calling either drm_intel_bo_mrb_exec() or > drm_intel_gem_bo_context_exec(). That's what > causes the batch to be queued > for

Re: [Mesa-dev] [PATCH 3/4] glsl: add ir_cache class and functions for shader serialization

On 10/29/2013 03:48 PM, Paul Berry wrote: On 29 October 2013 00:53, Tapani > wrote: On 10/28/2013 10:09 PM, Paul Berry wrote: +static uint32_t _unique_id(ir_variable *var) +{ + char buffer[256]; + _mesa_snprintf(buffer, 256