On 04/23/2013 06:19 AM, Ian Romanick wrote:
On 04/23/2013 03:28 AM, Chad Versace wrote:
This allows maintainers/packagers/testers to tag the build with
information that will be reported by GL_VERSION.
If the environemt variable or make variable MESA_VERSION_STRING_EXTRA is
environmen
On Mon, 22 Apr, 2013 at 4:38 PM, christopher.halse.rog...@canonical.com
wrote:
From: Christopher James Halse Rogers
This is only exposed by drivers wich support the new PIPE_CAP_PRIME
parameter,
for PRIME import/export.
---
This stubs out texture_from_renderbuffer, which I don't care abou
---
Do these comments make sense to anyone else?
src/mesa/drivers/dri/i965/brw_defines.h |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index ea5d2af..6517f24 100644
--- a/src/mesa/dr
Never existed? At least never supported. Doesn't appear in 965, G45,
or ILK documentation.
---
src/mesa/drivers/dri/i965/brw_defines.h |1 -
src/mesa/drivers/dri/i965/brw_disasm.c |2 +-
2 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
On 04/23/2013 03:28 AM, Chad Versace wrote:
This allows maintainers/packagers/testers to tag the build with
information that will be reported by GL_VERSION.
If the environemt variable or make variable MESA_VERSION_STRING_EXTRA is
environment
set, then its values will appear in the GL
On 04/23/2013 02:39 AM, Kenneth Graunke wrote:
Otherwise, the table could be full of uninitialized garbage. That means
the NULL check at the bottom might not happen, so we wouldn't get the
_mesa_problem, and we'd then return garbage.
format_pack.c also has tables like this and memsets them.
T
From: Tom Stellard
There was a lot of code in evergreen_compute_internal.c that was not
being used at all and most of it was duplicating code from other parts
of the driver.
---
src/gallium/drivers/r600/Makefile.sources | 1 -
src/gallium/drivers/r600/compute_resource.def | 38 -
From: Tom Stellard
---
src/gallium/drivers/r600/evergreen_compute.c | 47 +++---
.../drivers/r600/evergreen_compute_internal.h | 2 +-
2 files changed, 33 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_compute.c
b/src/gallium/drivers/
From: Tom Stellard
---
src/gallium/drivers/r600/evergreen_state.c | 34 +-
src/gallium/drivers/r600/evergreend.h | 2 ++
src/gallium/drivers/r600/r600_pipe.h | 9
3 files changed, 35 insertions(+), 10 deletions(-)
diff --git a/src/gallium/driver
From: Tom Stellard
The state tracker should be responsible for waiting for the kernel to
finish.
---
src/gallium/drivers/r600/evergreen_compute.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_compute.c
b/src/gallium/drivers/r600/evergreen_compute.c
From: Tom Stellard
Buffer size should be in bytes not dwords.
---
src/gallium/drivers/r600/evergreen_compute.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/r600/evergreen_compute.c
b/src/gallium/drivers/r600/evergreen_compute.c
index 189ffac..58dc36d 1
https://bugs.freedesktop.org/show_bug.cgi?id=62142
Gordon Jin changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Resolution|INVALID
Scratch that -- I see what they're for. They seem to be missing from
enum ir_expression_operation though.
-- Chris
On Tue, Apr 23, 2013 at 1:33 PM, Chris Forbes wrote:
> In the last hunk:
>
> + case ir_binop_bfm:
> + case ir_triop_bfi:
>
> These look like leftovers?
>
> -- Chris
+ case ir_unop_find_msb:
+ for (unsigned c = 0; c < components; c++) {
+ int v = op[0]->value.i[c];
+
+ if (v == 0 || (op[0]->type->base_type == GLSL_TYPE_INT && v == -1))
+data.i[c] = -1;
+ else {
+int count = 0;
+int top_bit = op[
On Mon, 2013-04-22 at 21:38 +1000, Dave Airlie wrote:
> On Mon, Apr 22, 2013 at 9:09 PM, Jose Fonseca wrote:
> > - Original Message -
> >> From: Christopher James Halse Rogers
> >>
> >> This is only exposed by drivers wich support the new PIPE_CAP_PRIME
> >> parameter,
> >> for PRIME impo
In the last hunk:
+ case ir_binop_bfm:
+ case ir_triop_bfi:
These look like leftovers?
-- Chris
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This allows maintainers/packagers/testers to tag the build with
information that will be reported by GL_VERSION.
If the environemt variable or make variable MESA_VERSION_STRING_EXTRA is
set, then its values will appear in the GL_VERSION string immediately
after "Mesa X.Y" and before "(git-xxx)
On Mon, Apr 22, 2013 at 5:39 PM, Kenneth Graunke wrote:
> Otherwise, the table could be full of uninitialized garbage. That means
> the NULL check at the bottom might not happen, so we wouldn't get the
> _mesa_problem, and we'd then return garbage.
>
> format_pack.c also has tables like this and
Otherwise, the table could be full of uninitialized garbage. That means
the NULL check at the bottom might not happen, so we wouldn't get the
_mesa_problem, and we'd then return garbage.
format_pack.c also has tables like this and memsets them.
Signed-off-by: Kenneth Graunke
---
src/mesa/main/
---
src/mesa/drivers/dri/i965/brw_disasm.c | 26 ++
1 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index 0b881b7..556e63a 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 14 ++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index b3bd1b9..15a0440 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++
---
src/mesa/drivers/dri/i965/brw_vec4.h |7 +++
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp| 29 ++
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 48
3 files changed, 84 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/
Don't bother scalarizing ir_binop_bfm, since its results are
identical for all channels.
---
src/mesa/drivers/dri/i965/brw_fs.cpp |7 +++
src/mesa/drivers/dri/i965/brw_fs.h |7 +++
.../dri/i965/brw_fs_channel_expressions.cpp| 37 +++
src/
Specifically
bfe - for bitfieldExtract()
bfi1 and bfi2 - for bitfieldInsert()
bfrev - for bitfieldReverse()
cbit - for bitCount()
fbh - for findMSB()
fbl - for findLSB()
---
src/mesa/drivers/dri/i965/brw_defines.h |7 +++
src/mesa/drivers/dri/i965/brw_disasm.c |7 +++
Also update asserts to allow BFE and BFI2, which take (unsigned)
doubleword arguments.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 34 +++---
1 files changed, 30 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/
---
src/mesa/drivers/dri/i965/brw_defines.h | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index 38f0356..a5d9452 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/m
---
src/mesa/drivers/dri/i965/brw_structs.h | 31 +++
1 files changed, 19 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h
b/src/mesa/drivers/dri/i965/brw_structs.h
index 75365e0..c322edf 100644
--- a/src/mesa/drivers/dri/i965/brw_
---
src/glsl/ir_optimization.h |1 +
src/glsl/lower_instructions.cpp | 82 +++
2 files changed, 83 insertions(+), 0 deletions(-)
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
index 445dc49..c5405e5 100644
--- a/src/glsl/ir_opti
---
src/glsl/ir_optimization.h |1 +
src/glsl/lower_instructions.cpp | 61 +++
2 files changed, 62 insertions(+), 0 deletions(-)
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
index 49b1475..445dc49 100644
--- a/src/glsl/ir_opti
i965/Gen7+ and Radeon/Evergreen+ have bfm/bfi instructions to implement
bitfieldInsert() from ARB_gpu_shader5.
---
src/glsl/ir.cpp |2 +
src/glsl/ir.h | 18
src/glsl/ir_optimization.h |1 +
src/glsl/ir_validate.cpp| 12 +++
---
src/glsl/ir_constant_expression.cpp | 123 +++
1 files changed, 123 insertions(+), 0 deletions(-)
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index c09e56a..119fe59 100644
--- a/src/glsl/ir_constant_expression.cpp
++
This series, available at
git://people.freedesktop.org/~mattst88/mesa arb_gpu_shader5
adds support for the bit built-ins for ARB_gpu_shader5 to the GLSL
compiler and the i965 driver.
Interesting parts of the series -
- New IR operations for each built-in, plus two operations that match
i965
---
src/glsl/ir.cpp|8 +++-
src/glsl/ir.h | 21 -
src/glsl/ir_validate.cpp | 26 ++
src/glsl/opt_algebraic.cpp |6 +++---
src/mesa/program/ir_to_me
---
src/glsl/builtins/ir/bitCount.ir| 41 ++
src/glsl/builtins/ir/bitfieldExtract.ir | 57
src/glsl/builtins/ir/bitfieldInsert.ir | 65 +++
src/glsl/builtins/ir/bitfieldReverse.ir | 41 +++
Needed to support the bitfieldInsert() built-in added by
ARB_gpu_shader5.
---
src/glsl/ir_reader.cpp | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/glsl/ir_reader.cpp b/src/glsl/ir_reader.cpp
index 16fdc41..b366712 100644
--- a/src/glsl/ir_reader.cpp
+++ b/sr
---
src/glsl/builtins/tools/generate_builtins.py |1 +
src/glsl/glcpp/glcpp-parse.y |3 +++
src/glsl/glsl_parser_extras.cpp |1 +
src/glsl/glsl_parser_extras.h|2 ++
src/glsl/standalone_scaffolding.cpp |1 +
src/mesa/main/ex
On 04/22/2013 08:15 AM, Jordan Justen wrote:
On Sun, Apr 21, 2013 at 12:30 PM, Kenneth Graunke wrote:
On 04/19/2013 12:35 PM, Jordan Justen wrote:
For interface blocks, there are three separate namespaces for
uniform, input and output blocks.
http://knowyourmeme.com/photos/2109
There are?
> Can you even have that property in in a non-geometry shader?
No, not in well formed shaders at least. One could of course force it through
graw. I thought about an assert there but I figured that a conditional there
won't matter much.
> In any case, series looks good to me, though your patche
Number of vertices to fetch doesn't always equal the number of input
vertices. To correctly compute the number if IA primitives we need
to use the total number of input vertices, not only those that
need to be fetched.
Signed-off-by: Zack Rusin
---
src/gallium/auxiliary/draw/draw_pt_fetch_shade_
Am 20.04.2013 09:04, schrieb Zack Rusin:
> TGSI geometry shader input declerations are of the IN[][2] format
> and the dimensions of the array have to be deduced from the input
> primitive property.
>
> Signed-off-by: Zack Rusin
> ---
> src/gallium/auxiliary/tgsi/tgsi_scan.c | 17 +
TGSI geometry shader input declerations are of the IN[][2] format
and the dimensions of the array have to be deduced from the input
primitive property.
Signed-off-by: Zack Rusin
---
src/gallium/auxiliary/tgsi/tgsi_scan.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/sr
We want to be able to reset certain parts of the pipeline,
in particular the input primitive index, but only either with
seperate invocations of the draw_vbo or new instances. In all
other cases (e.g. new invocations due to primitive restart)
that data needs to be preserved. Add a function through
Same approach as in the llvmpipe, if the geometry shader is
null and we have stream output then attach it to the vertex
shader right before executing the draw pipeline.
Signed-off-by: Zack Rusin
---
src/gallium/drivers/softpipe/sp_draw_arrays.c |7 ++
src/gallium/drivers/softpipe/sp_sta
On 22/04/13 21:03, Brian Paul wrote:
> On 04/22/2013 12:17 PM, Ferry Huberts wrote:
>>
>>
>> On 22/04/13 19:38, Brian Paul wrote:
>>> MapBufferRange was present twice. MapBuffer was missing.
>>>
>>> Note: This is a candidate for the stable branches.
>>> ---
>>> src/mesa/main/context.c |2 +
On 04/22/2013 12:17 PM, Ferry Huberts wrote:
On 22/04/13 19:38, Brian Paul wrote:
MapBufferRange was present twice. MapBuffer was missing.
Note: This is a candidate for the stable branches.
---
src/mesa/main/context.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
On 04/13/2013 11:07 AM, Christoph Bumiller wrote:
On 12.04.2013 21:14, Kenneth Graunke wrote:
This provides an interface for applications (and OpenGL-based tools) to
access GPU performance counters. Since the exact performance counters
available vary between vendors and hardware generations, th
Patrick Baggett writes:
> On Mon, Apr 22, 2013 at 11:14 AM, Eric Anholt wrote:
>
>> This function going to get used a lot more in upcoming patches.
>> ---
>> src/mesa/swrast/s_texture.c | 16
>> 1 file changed, 12 insertions(+), 4 deletions(-)
>>
>> diff --git a/src/mesa/swra
On 04/12/2013 01:16 PM, Eric Anholt wrote:
Kenneth Graunke writes:
Ironlake's counters are always enabled; userspace can simply send a
MI_REPROT_PERF_COUNT packet to take a snapshot of them. This makes it
easy to implement.
The counters are documented in the source code for the intel-gpu-too
On 04/12/2013 11:21 AM, Eric Anholt wrote:
Kenneth Graunke writes:
Ironlake's counters are always enabled; userspace can simply send a
MI_REPROT_PERF_COUNT packet to take a snapshot of them. This makes it
easy to implement.
The counters are documented in the source code for the intel-gpu-too
On 22/04/13 19:38, Brian Paul wrote:
> MapBufferRange was present twice. MapBuffer was missing.
>
> Note: This is a candidate for the stable branches.
> ---
> src/mesa/main/context.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/src/mesa/main/context.c b/src/m
- Original Message -
> Looks like a copy&paste typo.
> ---
> src/mesa/main/context.c |1 -
> 1 files changed, 0 insertions(+), 1 deletions(-)
>
> diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
> index ce76243..9d915b6 100644
> --- a/src/mesa/main/context.c
> +++ b/sr
Looks like a copy&paste typo.
---
src/mesa/main/context.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index ce76243..9d915b6 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -923,7 +923,6 @@ create_
On 04/22/2013 11:38 AM, Brian Paul wrote:
MapBufferRange was present twice. MapBuffer was missing.
Note: This is a candidate for the stable branches.
---
src/mesa/main/context.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/
"Pohjolainen, Topi" writes:
> On Tue, Apr 16, 2013 at 01:22:22PM -0700, Eric Anholt wrote:
>> Topi Pohjolainen writes:
>>
>> > The set introduces new target for 'eglCreateImageKHR()' allowing one
>> > to create EGL images out of externally allocated buffers. Especially
>> > one can combine up t
"Pohjolainen, Topi" writes:
> On Tue, Apr 16, 2013 at 04:57:49PM -0700, Eric Anholt wrote:
>> Topi Pohjolainen writes:
>> > + if (image->regions[i]->bo)
>> > + intel_region_release(&image->regions[i]);
>>
>> Why are you looking at the BO for deciding whether to free the region?
>>
Chris Forbes writes:
> Signed-off-by: Chris Forbes
> ---
> src/mesa/main/mtypes.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
> index 6108a35..7b51ec8 100644
> --- a/src/mesa/main/mtypes.h
> +++ b/src/mesa/main/mty
"Pohjolainen, Topi" writes:
> On Tue, Apr 16, 2013 at 04:55:14PM -0700, Eric Anholt wrote:
>> Topi Pohjolainen writes:
>>
>> > Signed-off-by: Topi Pohjolainen
>> > ---
>> > src/mesa/drivers/dri/intel/intel_screen.c | 22 --
>> > 1 file changed, 16 insertions(+), 6 deletion
MapBufferRange was present twice. MapBuffer was missing.
Note: This is a candidate for the stable branches.
---
src/mesa/main/context.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index ce76243..0fb57ad 100644
--- a/
On Mon, Apr 22, 2013 at 11:14 AM, Eric Anholt wrote:
> This function going to get used a lot more in upcoming patches.
> ---
> src/mesa/swrast/s_texture.c | 16
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/swrast/s_texture.c b/src/mesa/swrast/s_
Marek Olšák writes:
> already set by _mesa_readbuffer
> ---
> src/mesa/main/buffers.c |1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/src/mesa/main/buffers.c b/src/mesa/main/buffers.c
> index 3f5cbcd..36b0312 100644
> --- a/src/mesa/main/buffers.c
> +++ b/src/mesa/main/buffers.c
> @@
Marek Olšák writes:
> A driver doesn't have to set _NEW_BUFFER_OBJECT if it doesn't reallocate
> the buffer from core Mesa's point of view, which avoids unnecessary state
> validation.
>
> Gallium drivers can be asked to reallocate a buffer privately by setting
> PIPE_TRANSFER_DISCARD_WHOLE_RESOU
Kenneth Graunke writes:
> The code doesn't set brw->query.obj to NULL, it sets query->bo to NULL.
Reviewed-by: Eric Anholt
pgpHt7PZ8akua.pgp
Description: PGP signature
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It's not really span code ever since we stopped using spans for S8.
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 56
src/mesa/drivers/dri/intel/intel_span.c| 56
src/mesa/drivers/dri/intel/intel_span.h|2 -
3 files c
In the case of renering to windows in X, we would render to stale buffers
(or not render at all!) if you hit a MapRenderbuffer as the first thing
done to your window after new buffers are ready to be collected in DRI2.
I think this also covers the weird comment about irb->mt being missing
sometime
The remaining bits happen to do nothing that
_swrast_span_render_start()/finish() don't do.
---
src/mesa/drivers/dri/i915/Makefile.sources |1 -
src/mesa/drivers/dri/i915/i830_context.c |2 -
src/mesa/drivers/dri/i915/i915_context.c |3 -
src/mesa/drivers/dri/i915/intel
I always forget how we do this for compressed textures.
---
src/mesa/main/dd.h |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/main/dd.h b/src/mesa/main/dd.h
index 8f3cd3d..471d963 100644
--- a/src/mesa/main/dd.h
+++ b/src/mesa/main/dd.h
@@ -354,7 +354,9 @@ struc
Now that everything goes through ImageSlices[], we can rely on the
driver's existing texture mapping function.
A big block of code goes away on Radeon that looks like it was to deal with
the validate that happened at SpanRenderStart, which no longer occurs since we
don't need validation for the Ma
This is a step toward allowing drivers to use their normal mapping paths,
instead of requiring that all slice mappings come from an aligned offset
from the first slice's map.
This incidentally fixes missing slice handling in FXT1 swrast.
---
src/mesa/drivers/dri/intel/intel_tex_validate.c | 37
This code is trying to deal with providing a map in the case that
AllocTexImageBuffer was called, which is hooked up to the swrast variant.
---
src/mesa/drivers/dri/nouveau/nouveau_texture.c |4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/nouveau/nouv
This gets us ready for the Map field to die.
---
src/mesa/swrast/s_texfetch_tmp.h |4 ++--
src/mesa/swrast/s_texfilter.c|4 ++--
src/mesa/swrast/s_triangle.c |8
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/mesa/swrast/s_texfetch_tmp.h b/src/mesa/
For hardware drivers with pitch alignment requirements, a
non-power-of-two-sized texture format won't end up being an integer number
of pixels per row. Also, avoids having to change our units between
MapTextureImage's rowStride and swrast's RowStride.
This doesn't fully convert the compressed tex
---
src/mesa/swrast/s_context.h |1 -
1 file changed, 1 deletion(-)
diff --git a/src/mesa/swrast/s_context.h b/src/mesa/swrast/s_context.h
index 509759e..3e007b0 100644
--- a/src/mesa/swrast/s_context.h
+++ b/src/mesa/swrast/s_context.h
@@ -149,7 +149,6 @@ struct swrast_texture_image
GLin
---
src/mesa/drivers/dri/intel/intel_tex.c | 20 ++--
src/mesa/drivers/dri/radeon/radeon_texture.c | 15 ++-
src/mesa/swrast/s_texture.c | 24
src/mesa/swrast/swrast.h |2 +-
4 files changed,
---
src/mesa/drivers/dri/intel/intel_tex.c |8 +---
src/mesa/drivers/dri/radeon/radeon_texture.c |9 +
2 files changed, 2 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_tex.c
b/src/mesa/drivers/dri/intel/intel_tex.c
index 2fbd5c4..24f13df 1
MapTextureImage has the exact same logic, except it can also handle
swrast-allocated buffers.
---
src/mesa/drivers/dri/nouveau/nouveau_texture.c | 99 +---
1 file changed, 18 insertions(+), 81 deletions(-)
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_texture.c
b/src/me
---
src/mesa/swrast/s_texture.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/src/mesa/swrast/s_texture.c b/src/mesa/swrast/s_texture.c
index 36a90dd..b6dd8cb 100644
--- a/src/mesa/swrast/s_texture.c
+++ b/src/mesa/swrast/s_texture.c
@@ -218,18 +218,17 @@
This function going to get used a lot more in upcoming patches.
---
src/mesa/swrast/s_texture.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/src/mesa/swrast/s_texture.c b/src/mesa/swrast/s_texture.c
index 51048be..36a90dd 100644
--- a/src/mesa/swrast/s_te
This is the equivalent of intel's
80513ec8b4c812b9c6249cc5824337a5f04ab34c.
---
src/mesa/drivers/dri/radeon/radeon_texture.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c
b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 0bd2c24..b1bc0fc
34 files changed, 311 insertions(+), 889 deletions(-)
Also, swrast_dri.so now passes two FXT1 tests that failed before, and
i915's vertex shader texturing works. I haven't tested the radeon/nouveau
code, nor have I been as invasive as I could be, because I don't have any
AGP systems left. nouve
---
src/mesa/drivers/dri/radeon/radeon_texture.c | 50 --
src/mesa/drivers/dri/radeon/radeon_texture.h |2 --
2 files changed, 52 deletions(-)
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c
b/src/mesa/drivers/dri/radeon/radeon_texture.c
index b1bc0fc..b6e
https://bugs.freedesktop.org/show_bug.cgi?id=63404
Joe Konno changed:
What|Removed |Added
Depends on||54111, 59299
--- Comment #5 from Joe Konno
Am 22.04.2013 16:43, schrieb jfons...@vmware.com:
> From: José Fonseca
>
> TEMP is not the only register file that accept unsigned. OUT too.
>
> Actually, what determines the appropriate type of the destination value is
> not the opcode, but rather the register.
>
> Also cleanup/simplify code.
On Mon, 2013-04-22 at 10:20 -0400, alexdeuc...@gmail.com wrote:
> From: Alex Deucher
>
> There are too many cases were we end up with lockups.
> Once we sort out the remaining issues on master, they
> can be backported and hyperz can be re-enabled on 9.1
>
> Signed-off-by: Alex Deucher
Review
On Sun, Apr 21, 2013 at 12:30 PM, Kenneth Graunke wrote:
> On 04/19/2013 12:35 PM, Jordan Justen wrote:
>>
>> For interface blocks, there are three separate namespaces for
>> uniform, input and output blocks.
>
>
> http://knowyourmeme.com/photos/2109
>
> There are?
>
> Similarly, for your next pat
On 04/20/2013 04:37 PM, jfons...@vmware.com wrote:
From: José Fonseca
gl_rasterization_rules lumps too many different flags.
---
src/gallium/auxiliary/draw/draw_context.c |1 +
src/gallium/auxiliary/draw/draw_llvm.c |2 +-
src/gallium/auxiliary/draw/draw_pt.h
On 04/21/2013 03:09 PM, Kenneth Graunke wrote:
I was reviewing some patches and saw more new files that said "IN NO EVENT
SHALL BRIAN PAUL BE LIABLE" but were...not authored by Brian. People
keep doing that by accident, and a lot of those files have been altered
by other people by now anyway.
T
From: José Fonseca
TEMP is not the only register file that accept unsigned. OUT too.
Actually, what determines the appropriate type of the destination value is
not the opcode, but rather the register.
Also cleanup/simplify code. Add a few more asserts, but also make
code more robust by handlin
On 04/21/2013 05:25 PM, Marek Olšák wrote:
Although this might be useful for ARB_clear_buffer_object,
I need it for initializating resources in r600g.
---
src/gallium/auxiliary/util/u_blitter.c | 81 +---
src/gallium/auxiliary/util/u_blitter.h | 18 ++-
2 f
On 04/22/2013 12:38 AM, christopher.halse.rog...@canonical.com wrote:
From: Christopher James Halse Rogers
---
src/gallium/drivers/r300/r300_screen.c| 8 ++-
src/gallium/drivers/r300/r300_texture.c | 2 +-
src/gallium/drivers/r600/r600_pipe.c | 7 ++-
s
On Sun, Apr 21, 2013 at 7:25 PM, Marek Olšák wrote:
> Although this might be useful for ARB_clear_buffer_object,
> I need it for initializating resources in r600g.
For the series:
Reviewed-by: Alex Deucher
Should probably go to 9.1 as well or disable cmask/htile on 9.1
Alex
> ---
> src/galli
From: Alex Deucher
There are too many cases were we end up with lockups.
Once we sort out the remaining issues on master, they
can be backported and hyperz can be re-enabled on 9.1
Signed-off-by: Alex Deucher
---
src/gallium/drivers/r600/r600_pipe.c |2 +-
1 files changed, 1 insertions(+),
On Mon, Apr 22, 2013 at 9:09 PM, Jose Fonseca wrote:
> - Original Message -
>> From: Christopher James Halse Rogers
>>
>> This is only exposed by drivers wich support the new PIPE_CAP_PRIME
>> parameter,
>> for PRIME import/export.
>
> What does exactly PIPE_CAP_PRIME entail? Please docum
Am 22.04.2013 13:21, schrieb Marek Olšák:
On Mon, Apr 22, 2013 at 8:38 AM,
wrote:
From: Christopher James Halse Rogers
---
src/gallium/drivers/r300/r300_screen.c| 8 ++-
src/gallium/drivers/r300/r300_texture.c | 2 +-
src/gallium/drivers/r600/r600_pipe.c
On Mon, Apr 22, 2013 at 8:38 AM,
wrote:
> From: Christopher James Halse Rogers
>
> ---
> src/gallium/drivers/r300/r300_screen.c| 8 ++-
> src/gallium/drivers/r300/r300_texture.c | 2 +-
> src/gallium/drivers/r600/r600_pipe.c | 7 ++-
> src/gallium/drivers/r6
- Original Message -
> From: Christopher James Halse Rogers
>
> This is only exposed by drivers wich support the new PIPE_CAP_PRIME
> parameter,
> for PRIME import/export.
What does exactly PIPE_CAP_PRIME entail? Please document it.
Jose
___
m
Am 20.04.2013 10:57, schrieb jfons...@vmware.com:
> From: José Fonseca
>
> They are supported on LLVM 3.1, at least on x86. (I haven't tested on PPC
> though.)
>
> Actually lp_build_linear_mip_levels() already has been emitting them for
> some time.
>
> This avoids intrinsics, which tend to be
Am 22.04.2013 09:35, schrieb Michel Dänzer:
On Sam, 2013-04-20 at 13:21 +0200, Christian König wrote:
From: Christian König
Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=63702
Signed-off-by: Christian König
---
src/gallium/drivers/radeonsi/radeonsi_uvd.c |6 +++---
1 file c
On Sam, 2013-04-20 at 13:21 +0200, Christian König wrote:
> From: Christian König
>
> Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=63702
>
> Signed-off-by: Christian König
> ---
> src/gallium/drivers/radeonsi/radeonsi_uvd.c |6 +++---
> 1 file changed, 3 insertions(+), 3 delet
On 21.04.2013 14:35, Jose Fonseca wrote:
>
>
> - Original Message -
>> On 21.04.2013 13:18, Jose Fonseca wrote:
>>
>> I think that drivers can just report all 4 CAPs as supported and do the
>> adjustment in the shader themselves (no need for recompilation, just use
>> uniforms, the st alr
Reviewed-by: Marek Olšák
Marek
On Mon, Apr 22, 2013 at 8:38 AM,
wrote:
> From: Christopher James Halse Rogers
>
> It's a map of GEM name->bo, so identify it as such
> ---
> src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 16
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
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