On 12/18/2012 10:57 AM, Wolfgang Grandegger wrote:
> On 12/18/2012 10:44 AM, Johannes Braun wrote:
>> Hello,
>>
>> I hope someone could help me with my problem. Currently I am porting
>> a new kernel (3.3.8) for a tqm5200s based board.
>
> This is not really
On 12/18/2012 10:44 AM, Johannes Braun wrote:
> Hello,
>
> I hope someone could help me with my problem. Currently I am porting
> a new kernel (3.3.8) for a tqm5200s based board.
This is not really a new kernel.
> The previous kernel was 2.6.23. The new kernel version is needed because
> of supp
Hi Kumar,
On 10/18/2011 07:44 AM, Kumar Gala wrote:
>
> On Aug 16, 2011, at 10:32 PM, Robin Holt wrote:
>
>> David,
>>
>> The following set of patches have been reviewed by the above parties and
>> all comments have been integrated. Although the patches stray from the
>> drivers/net/can directo
The re-binding (unbind..bind) of an EMAC device fails because the
static variable "busy_phy_map" is not updated when the device is
removed.
Signed-off-by: Wolfgang Grandegger
---
drivers/net/ethernet/ibm/emac/core.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
di
This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 19
This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 19
This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 19
This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
Acked-by
This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 19
This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
Acked-by
This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 19
This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
Acked-by
This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 19
This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
Acked-by
On 12/07/2011 08:34 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2011-12-01 at 10:41 +0100, Wolfgang Grandegger wrote:
>> This patch enables or updates support for the CC770 and AN82527
>> CAN controller on the TQM8548 and TQM8xx boards.
>
> I'm a bit confused by the n
Hello,
I'm confused by the modalias'es created by OF devices, e.g.:
# cat /sys/devices/f000.soc5200/ff00.spi/modalias
of:NspiTCfsl,mpc5200b-spiCfsl,mpc5200-spi
First of all, the string "" looks like an error.
I could then dynamically load a driver module for the SPI using:
# mo
new Lite5200B has *two* slots. IIRC, there are also early Lite5200B
boards using MPC5200 v1.2 chips.
Wolfgang (Grandegger)
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Hello Heiko,
Heiko Schocher wrote:
> Hello Grant,
>
> Grant Likely wrote:
>> Thanks for the patch. Comments below.
>>
>> g.
>>
>> On Mon, Sep 14, 2009 at 2:05 AM, Heiko Schocher wrote:
>>> - serial Console on PSC1
>>> - 64MB SDRAM
>>> - MTD CFI Flash
>>> - Ethernet FEC
>>> - I2C with PCF8563 an
he first read, but when the whole transaction ends.
>
> Signed-off-by: Joakim Tjernlund
Tested-by: Wolfgang Grandegger
on a MPC8548 board with an up-to-date kernel. I did not realize any
problems.
Wolfgang.
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Grant Likely wrote:
> From: John Bonesio
>
> The MDIO bus cannot be accessed at interrupt context, but on an FEC
> error, the fec_mpc52xx driver reset function also tries to reset the
> PHY. Since the error is detected at IRQ context, and the PHY functions
> try to sleep, the kernel ends up pani
David Miller wrote:
> From: Wolfram Sang
> Date: Fri, 13 Nov 2009 17:14:52 +0100
>
>> Taken from socketcan-svn, fixed remaining todos, cleaned up, tested with a
>> phyCORE-MPC5200B-IO and a custom board.
>>
>> Signed-off-by: Wolfram Sang
>
> Applied.
Unfortunately too early. I will send my rev
Grant Likely wrote:
> On Fri, Nov 13, 2009 at 9:14 AM, Wolfram Sang wrote:
>> Taken from socketcan-svn, fixed remaining todos, cleaned up, tested with a
>> phyCORE-MPC5200B-IO and a custom board.
>>
>> Signed-off-by: Wolfram Sang
>> Cc: Wolfgang Grandegger
m Sang
> Cc: Wolfgang Grandegger
> Cc: Grant Likely
> Cc: David Miller
> ---
>
> This patch is based on net-next as of yesterday.
>
> To make the review easier for those who are already familiar with earlier
> versions of this driver (especially for Wolfgang), I put
Hi Wolfram,
Wolfram Sang wrote:
> Hi Wolfgang,
>
> On Mon, Nov 16, 2009 at 09:44:05AM +0100, Wolfgang Grandegger wrote:
>> Hi Wolfram,
>>
>> thanks for pushing this driver to mainline. I think you should also add
>> a CC to the Devicetree-discuss ML.
>
>
David Miller wrote:
> From: Wolfram Sang
> Date: Mon, 16 Nov 2009 23:57:43 +0100
>
>> here are the patches which fix the issues for the mscan & mpc52xx_can drivers
>> raised by Wolfgang Grandegger and Grant Likely. They are based on the initial
>> version of th
Wolfgang Grandegger wrote:
> Wolfram Sang wrote:
>> Hi Grant,
>>
>> Wolfgang commented on some points already, I will pick up the other remarks,
>> just one question:
>>
>>>> + clk_src = of_get_property(np, "fsl,mscan-clk-src", NULL);
Wolfram Sang wrote:
> Hi Grant,
>
> Wolfgang commented on some points already, I will pick up the other remarks,
> just one question:
>
>>> + clk_src = of_get_property(np, "fsl,mscan-clk-src", NULL);
>>> + if (clk_src && strcmp(clk_src, "ip") == 0)
>> Should protect against non-null.
The following patch series fixes some issues with the DTS files of the
TQM85xx modules and the defconfig for the TQM8548 modules.
The patches are against the "next" branch of Kumar's "powerpc" GIT tree.
Wolfgang.
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Commit 0f73a449a649acfca91404a98a35353a618b9555 added I2C device nodes
for the LM75 thermal sensor on the TQM85xx modules, unfortunately with
the wrong I2C address. The LM75s are located at address 0x48.
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8540.dts |4
For enet2 and enet3 the wrong phy-handles have been used in DTS files
of the TQM8548 modules.
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts |4 ++--
arch/powerpc/boot/dts/tqm8548.dts |4 ++--
2 files changed, 4 insertions(+), 4 deletions
Enable highmem support for the TQM8548-AG modules and NAND support for
the TQM8548-BE modules. Furthermore disable USB, Wireless and IDE support
because it's not available on the STK85xx starter kit.
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/configs/85xx/tqm8548_defconfig |
Anton Vorontsov wrote:
> On Tue, Mar 17, 2009 at 10:12:22AM +0100, Wolfgang Grandegegr wrote:
>> From: Wolfgang Grandegger
>>
>> This patch adds multi-chip support for the Micron MT29F8G08FAB NAND
>> flash memory on the TQM8548 modules.
>>
>> This patch sho
Anton Vorontsov wrote:
> On Tue, Mar 17, 2009 at 10:12:19AM +0100, Wolfgang Grandegegr wrote:
>> From: Wolfgang Grandegger
>>
>> This patch adds support for multi-chip NAND devices to the FSL-UPM
>> driver. This requires support for multiple GPIOs for the RNB pins.
&g
The I2C driver for the MPC still uses a fixed clock divider hard-coded
into the driver. This issue has already been discussed twice:
http://www.mail-archive.com/linuxppc-dev@ozlabs.org/msg21933.html
http://www.mail-archive.com/linuxppc-dev@ozlabs.org/msg26923.html
Let's code speak ;-). The atta
This is the 2nd version of the patch series adding generic support for
multi-chip NAND devices to the FSL-UPM driver and support for the
Micron MT29F8G08FAB NAND flash memory on the TQM8548 modules. It
addresses the issues reported on the mailing list, e.g. the new
bindings are now documented:
[PA
This patch adds multi-chip support for the Micron MT29F8G08FAB NAND
flash memory on the TQM8548 modules.
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts |7 ++-
arch/powerpc/boot/dts/tqm8548.dts |7 ++-
2 files changed, 12 insertions
This patch adds documentation for the new NAND FSL UPM bindings for:
NAND: FSL-UPM: add multi chip support
NAND: FSL-UPM: Add wait flags to support board/chip specific delays
NAND: FSL-UPM: add support for selecting chips via MAR
Signed-off-by: Wolfgang Grandegger
---
.../powerpc/dts
For the NAND chips on the TQM8548 modules, a special chip-select logic is
used. It uses dedicated address lines to be set via UPM machine address
register (mar). This patch also adds that support to the FSL-UPM driver.
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/sysdev/fsl_lbc.c |2
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. This requires support for multiple GPIOs for the RNB pins.
Signed-off-by: Wolfgang Grandegger
---
drivers/mtd/nand/fsl_upm.c | 88 +--
1 files changed, 67 insertions(+), 21
delay points. To manage these extra delays in a more general way,
I introduced the "wait-flags" property allowing the board-specific driver
to specify various types of extra delay.
Signed-off-by: Wolfgang Grandegger
---
drivers/mtd/nand/fsl_upm.c | 20 ++--
1 fi
Grant Likely wrote:
> I agree 100% with David's comments, and I have some additional ones below.
OK.
> On Thu, Mar 19, 2009 at 9:26 AM, Wolfgang Grandegger
> wrote:
>> + soc8...@e000 {
>> + #address-cells = <1>;
>
David Gibson wrote:
> On Thu, Mar 19, 2009 at 04:26:44PM +0100, Wolfgang Grandegger wrote:
[snip]
> [snip[
>> +disp...@2,0 {
>> +compatible = "fujitsu,lime";
>
> This compat string looks slightly worryingly non-specific.
The node
Hi Kumar,
Kumar Gala wrote:
>
> On Mar 19, 2009, at 10:26 AM, Wolfgang Grandegger wrote:
>
>> +m...@24520 {
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +compatible = "fsl,
David Gibson wrote:
> On Thu, Mar 19, 2009 at 04:26:44PM +0100, Wolfgang Grandegger wrote:
>> This patch adds support for the "socrates" board based on the MPC8544.
>> Supported are Ethernet, serial console, I2C, I2C-based RTC and
>> temperature sensors, NOR and NAN
Scott Wood wrote:
> On Thu, Mar 19, 2009 at 04:16:07PM +0100, Wolfgang Grandegger wrote:
>> +Optional properties:
>> +- fsl,upm-mar-offset : use the UPM machine address register to drive a
>> + custom chip select logic using the specified
>> +
This is my third version of the patch series adding generic support
for multi-chip NAND devices to the FSL-UPM driver and support for
the Micron MT29F8G08FAB NAND flash memory on the TQM8548 modules.
It addresses the issues reported on the mailing list, e.g. the new
bindings are now documented as w
This patch adds documentation for the new NAND FSL UPM bindings for:
NAND: FSL-UPM: add multi chip support
NAND: FSL-UPM: Add wait flags to support board/chip specific delays
Signed-off-by: Wolfgang Grandegger
---
.../powerpc/dts-bindings/fsl/upm-nand.txt | 39
delay points. To manage these extra delays in a more general way,
I introduced the "wait-flags" property allowing the board-specific driver
to specify various types of extra delay.
Signed-off-by: Wolfgang Grandegger
---
drivers/mtd/nand/fsl_upm.c | 20 ++--
1 fi
This patch adds multi-chip support for the Micron MT29F8G08FAB NAND
flash memory on the TQM8548 modules.
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts |6 +-
arch/powerpc/boot/dts/tqm8548.dts |6 +-
2 files changed, 10 insertions
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. This requires support for multiple GPIOs for the RNB pins.
The NAND chips are selected through address lines defined by the
FDT property "chip-offset".
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/sysdev
Singh, Vimal wrote:
>> +static void fun_select_chip(struct mtd_info *mtd, int chip_nr)
>> +{
>> + struct nand_chip *chip = mtd->priv;
>> + struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
>> +
>> + if (chip_nr == -1) {
>> + chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 |
>>
Grant Likely wrote:
> On Wed, Mar 25, 2009 at 7:31 AM, Grant Likely
> wrote:
>> On Wed, Mar 25, 2009 at 4:08 AM, Wolfgang Grandegger
>> wrote:
>>> This patch adds support for multi-chip NAND devices to the FSL-UPM
>>> driver. This requires support for mult
Hi Anton,
Anton Vorontsov wrote:
> Hi Wolfgang,
>
> On Wed, Mar 25, 2009 at 11:08:18AM +0100, Wolfgang Grandegger wrote:
>> This patch adds support for multi-chip NAND devices to the FSL-UPM
>> driver. This requires support for multiple GPIOs for the RNB pins.
>>
Grant Likely wrote:
> (cc'ing the devicetree-discuss mailing list)
>
> On Wed, Mar 18, 2009 at 1:56 PM, Wolfgang Grandegger
> wrote:
>> The I2C driver for the MPC still uses a fixed clock divider hard-coded
>> into the driver. This issue has already been discussed
Grant Likely wrote:
> (cc'ing devicetree-discuss)
>
> On Wed, Mar 25, 2009 at 4:08 AM, Wolfgang Grandegger
> wrote:
>> This patch adds documentation for the new NAND FSL UPM bindings for:
>>
>> NAND: FSL-UPM: add multi chip support
>> NAND: FSL-
Grant Likely wrote:
> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger
> wrote:
>> Grant Likely wrote:
>>> For the chip offset, it's not clear what the meaning is. First, does
>>> the UPM controller support access of multiple chips simultaneously?
>
Grant Likely wrote:
> On Thu, Mar 26, 2009 at 1:42 AM, Wolfgang Grandegger
> wrote:
>> Grant Likely wrote:
>>> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger
>>> wrote:
>>>> Grant Likely wrote:
>>>>> For the chip offset, it&#x
Grant Likely wrote:
> On Thu, Mar 26, 2009 at 9:33 AM, Wolfgang Grandegger
> wrote:
>> Grant Likely wrote:
>>> Does using the reg property give the driver enough information to
>>> reliably program the MAR for NAND connections that use the address
>>> li
Anton Vorontsov wrote:
> On Thu, Mar 26, 2009 at 11:02:06AM -0600, Grant Likely wrote:
> []
Here is another thought. The binding is describing that address lines
are used to activate CS lines. Offset for chip access purposes is
derived from the address line, but it doesn't directly
Grant Likely wrote:
> On Thu, Mar 26, 2009 at 4:14 PM, Wolfgang Grandegger
> wrote:
>> Anton Vorontsov wrote:
>>> On Thu, Mar 26, 2009 at 11:02:06AM -0600, Grant Likely wrote:
>>>> In other words, this device is not register-level compatible with the
>>&
This is my forth version of the patch series adding generic support
for multi-chip NAND devices to the FSL-UPM driver and support for
the Micron MT29F8G08FAB NAND flash memory on the TQM8548 modules.
It addresses the issues reported on the mailing list, e.g. the new
bindings are now documented as w
delay points. To manage these extra delays in a more general way,
I introduced the "fsl,ump-wait-flags" property allowing the board-
specific driver to specify various types of extra delay.
Signed-off-by: Wolfgang Grandegger
---
drivers/mtd/nand/fsl_upm.c | 20 ++--
1 f
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. This requires support for multiple GPIOs for the RNB pins.
The NAND chips are selected through address lines defined by the
FDT property "fsl,upm-addr-line-cs-offsets".
Signed-off-by: Wolfgang Grandegger
---
ar
This patch adds multi-chip support for the Micron MT29F8G08FAB NAND
flash memory on the TQM8548 modules.
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts |7 +--
arch/powerpc/boot/dts/tqm8548.dts |7 +--
2 files changed, 10 insertions
This patch adds documentation for the new NAND FSL UPM bindings for:
NAND: FSL-UPM: add multi chip support
NAND: FSL-UPM: Add wait flags to support board/chip specific delays
It also documents the old binding for "chip-delay".
Signed-off-by: Wolfgang Grandegger
---
Documentation/p
Hello,
we realized an inconsistent implementation of fsl_get_sys_freq():
http://lxr.linux.no/linux+v2.6.29/arch/powerpc/sysdev/fsl_soc.c#L80
For 826x and 827x boards, the function is available but it cannot be
used because the "bus-frequency" property is not defined for the SOC and
U-Boot also d
Grant Likely wrote:
> On Tue, Mar 31, 2009 at 1:28 AM, Wolfgang Grandegger
> wrote:
>> Hello,
>>
>> we realized an inconsistent implementation of fsl_get_sys_freq():
>>
>> http://lxr.linux.no/linux+v2.6.29/arch/powerpc/sysdev/fsl_soc.c#L80
>>
&g
Grant Likely wrote:
> I agree 100% with David's comments, and I have some additional ones below.
>
> On Thu, Mar 19, 2009 at 9:26 AM, Wolfgang Grandegger
> wrote:
>> + soc8...@e000 {
>> + #address-cells = <1>;
The I2c node property "fsl,preserve-clocking" allows to overtake the
clock settings from the boot loader and avoids the hard-coded setting.
Signed-off-by: Wolfgang Grandegger
---
drivers/i2c/busses/i2c-mpc.c | 24
1 file changed, 16 insertions(+), 8
Index: linux-2.6/arch/powerpc/boot/dts/socrates.dts
===
--- linux-2.6.orig/arch/powerpc/boot/dts/socrates.dts 2009-03-31
13:24:38.078719288 +0200
+++ linux-2.6/arch/powerpc/boot/dts/socrates.dts2009-03-31
13:47:56.986720719
Following (most of) Grant's suggestions to my RFC:
http://ozlabs.org/pipermail/linuxppc-dev/2009-March/069820.html
this new patch series now uses:
- the I2c node property "fsl,preserve-clocking" to overtake the
clock settings from the boot loader. The first patch provides this
feature and ca
the comptible CPU.
It used arch-specific tables and functions to determine the proper
Freqency Divider Register (fdr).
Furthermore dev_dbg() and dev_info() are now used to profit from a more
comprehensive output.
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/platforms/52xx/mpc52xx_c
egree
Signed-off-by: Wolfgang Grandegger
Signed-off-by: Sergei Poselenov
Signed-off-by: Yuri Tikhonov
Signed-off-by: Dmitry Rakhchev
Signed-off-by: Matthias Fuchs
---
drivers/rtc/Kconfig |9
drivers/rtc/Makefile |1
drivers/rtc/rtc-rx8025.c | 891 +++
* Wolfgang Grandegger | 2009-03-25 11:48:37 [+0100]:
>Signed-off-by: Ilya Yanok
>Acked-by: Wolfgang Grandegger
You seem to forgot a few bits (subpage_sft & max page size). I had this
patch in my tree like for ever and forgot post it here. I did however
merge the mtd-utils bit
Signed-off-by: Ilya Yanok
Acked-by: Wolfgang Grandegger
---
drivers/mtd/nand/Kconfig |6
drivers/mtd/nand/Makefile|1
drivers/mtd/nand/socrates_nand.c | 324 +++
3 files changed, 331 insertions(+)
Index: linux-2.6/drivers/mtd/nand
The I2c node property "fsl,preserve-clocking" allows to overtake the
clock settings from the boot loader and avoids the hard-coded setting.
Signed-off-by: Wolfgang Grandegger
---
drivers/i2c/busses/i2c-mpc.c | 24
1 file changed, 16 insertions(+), 8
test
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the comptible CPU.
It used arch-specific tables and functions to determine the proper
Freqency Divider Register (fdr).
Furthermore dev_dbg() and dev_info() are now used to profit from a more
comprehensive output.
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/platforms/52xx/mpc52xx_c
Please *FORGET* this series of patches. Only the I2C related patches are
relevant but I accidentally sent out the complete patch stack :-(. I
will resent them in a second.
Sorry for any inconvenience this has caused.
Wolfgang.
Wolfgang Grandegger wrote:
> Following (most of) Grant's sug
Following (most of) Grant's suggestions to my RFC:
http://ozlabs.org/pipermail/linuxppc-dev/2009-March/069820.html
this new patch series now uses:
- the I2c node property "fsl,preserve-clocking" to overtake the
clock settings from the boot loader. The first patch provides this
feature and ca
the comptible CPU.
It used arch-specific tables and functions to determine the proper
Freqency Divider Register (fdr).
Furthermore dev_dbg() and dev_info() are now used to profit from a more
comprehensive output.
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/platforms/52xx/mpc52xx_c
Grant Likely wrote:
> On Tue, Mar 31, 2009 at 3:35 AM, Wolfgang Grandegger
> wrote:
>> Grant Likely wrote:
>>> I agree 100% with David's comments, and I have some additional ones below.
>>>
>>> On Thu, Mar 19, 2009 at 9:26 AM, Wolfgang Grandegge
The I2c node property "fsl,preserve-clocking" allows to overtake the
clock settings from the boot loader and avoids the hard-coded setting.
Signed-off-by: Wolfgang Grandegger
---
drivers/i2c/busses/i2c-mpc.c | 24
1 file changed, 16 insertions(+), 8
Wolfram Sang wrote:
> On Tue, Mar 31, 2009 at 02:50:29PM +0200, Wolfgang Grandegger wrote:
>> The I2c node property "fsl,preserve-clocking" allows to overtake the
>> clock settings from the boot loader and avoids the hard-coded setting.
>>
>> Signed-off-by: Wo
Hi Grant,
Grant Likely wrote:
> On Tue, Mar 31, 2009 at 6:37 AM, Wolfgang Grandegger
> wrote:
>> Supported are Ethernet, serial console, I2C, I2C-based RTC and
>> temperature sensors, NOR and NAND flash, PCI, USB, CAN and Lime
>> display controller.
>>
>>
The i2c node property "fsl,preserve-clocking" allows to overtake the
clock settings from the boot loader avoiding the hard-coded settings.
Signed-off-by: Wolfgang Grandegger
---
Documentation/powerpc/dts-bindings/fsl/i2c.txt |2 ++
drivers/i2c/busses/i2c-mpc.c
Grant Likely wrote:
> 2009/3/31 Wolfram Sang :
> -
> - mpc_i2c_setclock(i2c);
> +
> + if (set_clock)
> + mpc_i2c_setclock(i2c);
Can't we drop 'set_clock' with something like this here?
+ if (!of_get_property(op->node, "fsl,preserve-clocking", NULL)) {
Hi David,
this patch went out by mistake, sorry.
David Gibson wrote:
> On Tue, Mar 31, 2009 at 02:37:33PM +0200, Wolfgang Grandegger wrote:
>> Index: linux-2.6/arch/powerpc/boot/dts/socrates.dts
>> ===
>> --
Anton Vorontsov wrote:
> On Tue, Mar 31, 2009 at 09:05:28AM -0600, Grant Likely wrote:
> [...]
>>> + soc8...@e000 {
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + device_type = "soc";
>> Drop device_type here too.
>
David Gibson wrote:
> On Tue, Mar 31, 2009 at 02:43:39PM +0200, Wolfgang Grandegger wrote:
>> The I2c node property "fsl,preserve-clocking" allows to overtake the
>> clock settings from the boot loader and avoids the hard-coded setting.
>
> Hrm. This is dubious. T
Grant Likely wrote:
> On Tue, Mar 31, 2009 at 6:37 AM, Wolfgang Grandegger
> wrote:
>> This patch makes the I2C bus speed configurable by using the I2C node
>> property "clock-frequency". If the property is not defined, the old
>> fixed clock settings will
David Gibson wrote:
> On Wed, Apr 01, 2009 at 09:31:34AM +0200, Wolfgang Grandegger wrote:
>> Hi David,
>>
>> this patch went out by mistake, sorry.
>>
>> David Gibson wrote:
>>> On Tue, Mar 31, 2009 at 02:37:33PM +0200, Wolfgang Grandegger wrote:
&
Grant Likely wrote:
> On Wed, Apr 1, 2009 at 1:36 AM, Wolfgang Grandegger
> wrote:
>> Anton Vorontsov wrote:
>>> On Tue, Mar 31, 2009 at 09:05:28AM -0600, Grant Likely wrote:
>>> [...]
>>>>>>>>> + soc8...
5xx, MPC86xx,
MPC5200 and MPC5200B.
The i2c->flags field and the corresponding FSL_I2C_DEV_* definitions
have been removed as they are obsolete.
Furthermore dev_dbg() and dev_info() are now used to profit from a more
comprehensive output.
Signed-off-by: Wolfgang Grandegger
---
Documentation/po
Grant Likely wrote:
> On Wed, Apr 1, 2009 at 1:51 AM, Wolfgang Grandegger
> wrote:
>> Grant Likely wrote:
>>> The table definition is more verbose this way, but I think it results
>>> in more understandable and easier to extend code. It also adds lets
>>>
Wolfgang Grandegger wrote:
> Grant Likely wrote:
>> On Wed, Apr 1, 2009 at 1:51 AM, Wolfgang Grandegger
>> wrote:
>>> Grant Likely wrote:
>>>> The table definition is more verbose this way, but I think it results
>>>> in more understandable and ea
Grant Likely wrote:
> On Wed, Apr 1, 2009 at 7:44 AM, Grant Likely
> wrote:
>> On Wed, Apr 1, 2009 at 7:13 AM, Wolfgang Grandegger
>> wrote:
>>> This patch makes the I2C bus speed configurable by using the I2C node
>>> property "clock-frequency&
Hi Kumar,
Kumar Gala wrote:
>
> On Apr 1, 2009, at 8:10 AM, Wolfgang Grandegger wrote:
>
>> Grant Likely wrote:
>>> On Wed, Apr 1, 2009 at 1:36 AM, Wolfgang Grandegger
>>> wrote:
>>>> Anton Vorontsov wrote:
>>>>>
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