Anton Vorontsov wrote: > On Tue, Mar 17, 2009 at 10:12:19AM +0100, Wolfgang Grandegegr wrote: >> From: Wolfgang Grandegger <w...@grandegger.com> >> >> This patch adds support for multi-chip NAND devices to the FSL-UPM >> driver. This requires support for multiple GPIOs for the RNB pins. >> >> Signed-off-by: Wolfgang Grandegger <w...@grandegger.com> >> --- >> drivers/mtd/nand/fsl_upm.c | 90 >> +++++++++++++++++++++++++++++++++---------- >> 1 files changed, 69 insertions(+), 21 deletions(-) >> >> diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c >> index 7815a40..ca7e85a 100644 >> --- a/drivers/mtd/nand/fsl_upm.c >> +++ b/drivers/mtd/nand/fsl_upm.c >> @@ -23,6 +23,8 @@ >> #include <linux/io.h> >> #include <asm/fsl_lbc.h> >> >> +#define FSL_UPM_NAND_MAX_CHIPS 4 > > Is there any reason to hardcode max chips? Some obscure limit in the > UPMs maybe?
Not really. It's limited by NAND_MAX_CHIP. See http://lxr.linux.no/linux+v2.6.28.8/include/linux/mtd/nand.h#L40 > Otherwise we'd better allocate the rnb_gpios dynamically, depending > on the num-chips property. Could be done. Wolfgang. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
