* Metzger, Markus T wrote:
> >-Original Message-
> >From: Paul Mackerras [mailto:pau...@samba.org]
> >Sent: Monday, September 21, 2009 8:45 AM
>
>
> >Markus, please take care in future to mention it in the changelog if
> >your patches touch definitions used by other architectures. If
On Mon, Sep 21, 2009 at 09:30:43AM +0200, Ingo Molnar wrote:
>
> * Metzger, Markus T wrote:
>
> > >-Original Message-
> > >From: Paul Mackerras [mailto:pau...@samba.org]
> > >Sent: Monday, September 21, 2009 8:45 AM
> >
> >
> > >Markus, please take care in future to mention it in the c
* Heiko Carstens wrote:
> On Mon, Sep 21, 2009 at 09:30:43AM +0200, Ingo Molnar wrote:
> >
> > * Metzger, Markus T wrote:
> >
> > > >-Original Message-
> > > >From: Paul Mackerras [mailto:pau...@samba.org]
> > > >Sent: Monday, September 21, 2009 8:45 AM
> > >
> > >
> > > >Markus, pl
* Paul Mackerras wrote:
> Commit 5622f295 ("x86, perf_counter, bts: Optimize BTS overflow
> handling") removed the regs field from struct perf_sample_data and
> added a regs parameter to perf_counter_overflow(). This breaks the
> build on powerpc as reported by Sachin Sant:
>
> arch/powerpc/ke
- 0x0 0x0800>;
+ 0x0 0x080>;
You might want to write that as 0x0080, otherwise people
will think it says 128M still :-)
Segher
___
Linuxppc-dev mailing list
Linuxppc-dev@lis
On Fri, 2009-09-18 at 09:31 +, Sumesh Kaana wrote:
>
>
> Hi,
>
>
> I am trying to boot linux kernel (2.6.30) on PPC440x5 processor in a
> custom built board. I am using simple ppc platform.
>
>
> I have a small bootloader which will only copy the
> simpleImage.myboard.bin to 0x40 loca
>-Original Message-
>From: Paul Mackerras [mailto:pau...@samba.org]
>Sent: Monday, September 21, 2009 8:45 AM
>Markus, please take care in future to mention it in the changelog if
>your patches touch definitions used by other architectures. If you
>could go so far as to use grep a bit mo
On Tue, 2009-09-15 at 16:10 -0600, Julie Zhu wrote:
> Add bus glue driver for Xilinx USB host controller. The controller can be
> configured as HS only or HS/FS hybrid. The driver uses the device tree file
> to configure the driver according to the setting in the hardware system.
>
> This driver h
Ingo Molnar writes:
> Paul, you might also want to test the perfcounter bits of -tip on
> PowerPC a bit more frequently - this patch was there for 5 days before i
> sent it to Linus.
Yes, I'll try to do that in future.
I hope I didn't come across as blaming anyone for anything - that
wasn't my
Hi Stefan,
On Friday 18 September 2009 17:50:24 Cote, Sylvain wrote:
> USB gadget support --> y
> Maximum VBUS power usage = 500
> Synopsys DWC OTG controller
> Synopsys DWC OTG internal DMA mode --> y
> USB gadget --> M
> gadget zero --
On Tue, Sep 15, 2009 at 3:10 PM, Julie Zhu wrote:
> Add bus glue driver for Xilinx USB host controller. The controller can be
> configured as HS only or HS/FS hybrid. The driver uses the device tree file
> to configure the driver according to the setting in the hardware system.
>
> This driver has
On Monday 21 September 2009 15:44:30 Cote, Sylvain wrote:
> > Looks good so far. I suspect that the only thing missing for your 405EX
> > custom
> > board is the following line in the arch/powerpc/sysdev/Makefile:
> >
> > obj-$(CONFIG_KILAUEA) += amcc-usbotg.o
>
> I have created a new pl
The PCI-e addressing was originally patterned of the MPC8548CDS
which has PCI1, PCI2, and PCI-e. Since this board only has
PCI1 and PCI-e, it makes more sense to be similar to the MPC8568MDS
board. This does that by cutting the PCI/PCI-e I/O sizes from
16MB to 8MB and pulling the PCI-e I/O range
On Mon, Sep 21, 2009 at 7:41 AM, Julie Zhu wrote:
> I have changed the compatible to "xlnx,xps-usb-host-1.00.a", thanks for
> catching this.
>
> Where should I put the binding for Xilinx USB host controller? usb-ehci.txt
> or xilinx.txt?
Probably xilinx.txt.
g.
--
Grant Likely, B.Sc., P.Eng.
-- Forwarded message --
Date: Wed, 16 Sep 2009 18:37:12 +0200 (CEST)
From: Geert Uytterhoeven
To: Linux Test Project
Subject: [LTP] mmapstress03 weirdness?
On ppc64, with 32-bit userland, I get:
| Running tests...
| <<>>
| tag=mmapstress03 stime=1253117251
| cmdline="mmapstr
Thanks, Grant and Ben,
> > Add bus glue driver for Xilinx USB host controller. The controller can
> be
> > configured as HS only or HS/FS hybrid. The driver uses the device tree
> file
> > to configure the driver according to the setting in the hardware system.
> >
> > This driver has been tested
Hi,
I have an MPC880 @133MHz. If I look into the load (with uptime) I get
values around 3.0 but my CPU is always under 5 percent (top). How could I
explain this? I'm using linux 2.6.19 with xenomai but no xenomai application is
running at all. I have a cramfs on a nor flash. What could be the p
Hi,
On a custom MPC8536 board running linux-2.6.31,
I'd like to load FPGA code from linux and then rescan
PCI-E bus to discover FPGA device. Is that possible ?
When linux boots FPGA is not loaded, so initial PCI
scan does not detect it.
I've tried playing with /sys/bus/pci/rescan and
/sys/bus/p
if (mmap((caddr_t)(1UL << (POINTER_SIZE - 1)) - pagesize,
(size_t)((1UL << (POINTER_SIZE - 1)) - pagesize),
PROT_READ|PROT_WRITE, MAP_ANONYMOUS|MAP_FIXED|
MAP_SHARED, 0, 0)
!= (caddr_t)-1)
With 32-bit userland, this boils down to:
| mm
Can you give us some more details about your app?
Is it multithread or single process?
What do the process do?
Bye Daniele
-Messaggio originale-
Da: linuxppc-dev-bounces+daniele.bosi=mta...@lists.ozlabs.org
[mailto:linuxppc-dev-bounces+daniele.bosi=mta...@lists.ozlabs.org] Per conto di
On Mon, Sep 21, 2009 at 05:13:05PM +0200, diba...@libero.it wrote:
> Hi,
>
> I have an MPC880 @133MHz. If I look into the load (with uptime) I get
> values around 3.0 but my CPU is always under 5 percent (top). How could I
> explain this? I'm using linux 2.6.19 with xenomai but no xenomai applic
Hi Felix,
On a custom MPC8536 board running linux-2.6.31,
I'd like to load FPGA code from linux and then rescan
PCI-E bus to discover FPGA device. Is that possible ?
When linux boots FPGA is not loaded, so initial PCI
scan does not detect it.
I've tried playing with /sys/bus/pci/rescan and
/sy
The former is no longer really accurate with the swiotlb case now
a possibility. I also move it into dma-mapping.h - it no longer
needs to be in dma.c, and there are about to be some more accessors
that should all end up in the same place. A comment is added to
indicate that this function is not
Sometimes this is used to hold a simple offset, and sometimes
it is used to hold a pointer. This patch changes it to a union containing
void * and dma_addr_t. get/set accessors are also provided, because it was
getting a bit ugly to get to the actual data.
Signed-off-by: Becky Bruce
---
arch/p
Add bus glue driver for Xilinx USB host controller. The controller can be
configured as HS only or HS/FS hybrid. The driver uses the device tree file
to configure the driver according to the setting in the hardware system.
This driver has been tested with usbtest using the NET2280 PCI card.
Signe
On Mon, Sep 21, 2009 at 12:38 PM, Julie Zhu wrote:
> Add bus glue driver for Xilinx USB host controller. The controller can be
> configured as HS only or HS/FS hybrid. The driver uses the device tree file
> to configure the driver according to the setting in the hardware system.
Looks good, one m
On Mon, 2009-09-21 at 13:38 -0600, Julie Zhu wrote:
> + iounmap(hcd->regs);
> +err_ioremap:
> + irq_dispose_mapping(irq);
You missed that one too :-)
I'm actually considering making irq_dispose_mapping() a private
API and rename it to something like __irq_dispose_mapping() :-)
I think t
Add bus glue driver for Xilinx USB host controller. The controller can be
configured as HS only or HS/FS hybrid. The driver uses the device tree file
to configure the driver according to the setting in the hardware system.
This driver has been tested with usbtest using the NET2280 PCI card.
Signe
I upgraded from 2.6.29 to 2.6.31, and the kernel no longer recognized
the partitions embedded within my DTS file. I had to revert this
change:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=4b08e149c0e02e97ec49c2a31d14a0d3a02f8074
in order to boot. This code looks l
Matthew L. Creech wrote:
I upgraded from 2.6.29 to 2.6.31, and the kernel no longer recognized
the partitions embedded within my DTS file. I had to revert this
change:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=4b08e149c0e02e97ec49c2a31d14a0d3a02f8074
in order
On Tue, Sep 22, 2009 at 06:49:40AM +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2009-09-21 at 13:38 -0600, Julie Zhu wrote:
>
> > + iounmap(hcd->regs);
> > +err_ioremap:
> > + irq_dispose_mapping(irq);
>
> You missed that one too :-)
>
> I'm actually considering making irq_dispose_mapping(
Support for MAL interrupt coalescing in Canyonlands, Kilauea & Glacier
dts.
MAL driver falls back to EOB IRQ if Coalescing IRQ mapping missing in dts
Signed-off-by: Prodyut Hazarika
Acked-by: Victor Gallardo
Acked-by: Feng Kan
---
arch/powerpc/boot/dts/canyonlands.dts |6 +-
arch/pow
Support for Hardware Interrupt coalescing in MAL.
Coalescing is supported on the newer revs of 460EX/GT and 405EX.
The MAL driver falls back to EOB IRQ if coalescing not supported
Signed-off-by: Prodyut Hazarika
Acked-by: Victor Gallardo
Acked-by: Feng Kan
---
drivers/net/ibm_newemac/Kconfig
On Mon, Sep 21, 2009 at 05:36:25PM -0500, Scott Wood wrote:
> Matthew L. Creech wrote:
> >I upgraded from 2.6.29 to 2.6.31, and the kernel no longer recognized
> >the partitions embedded within my DTS file. I had to revert this
> >change:
> >
> >http://git.kernel.org/?p=linux/kernel/git/torvalds/l
Anton Vorontsov wrote:
On Mon, Sep 21, 2009 at 05:36:25PM -0500, Scott Wood wrote:
Matthew L. Creech wrote:
I upgraded from 2.6.29 to 2.6.31, and the kernel no longer recognized
the partitions embedded within my DTS file. I had to revert this
change:
http://git.kernel.org/?p=linux/kernel/git/
On Mon, 2009-09-21 at 15:47 -0700, Prodyut Hazarika wrote:
> Support for Hardware Interrupt coalescing in MAL.
> Coalescing is supported on the newer revs of 460EX/GT and 405EX.
> The MAL driver falls back to EOB IRQ if coalescing not supported
>
> Signed-off-by: Prodyut Hazarika
> Acked-by: Vict
On Tue, 2009-09-22 at 02:56 +0400, Anton Vorontsov wrote:
> On Tue, Sep 22, 2009 at 06:49:40AM +1000, Benjamin Herrenschmidt wrote:
> > On Mon, 2009-09-21 at 13:38 -0600, Julie Zhu wrote:
> >
> > > + iounmap(hcd->regs);
> > > +err_ioremap:
> > > + irq_dispose_mapping(irq);
> >
> > You missed that
This fixes two places in the powerpc perf_event (perf_counter) code
where 'list_entry' needs to be changed to 'group_entry', but were
missed in commit 65abc865 ("perf_counter: Rename list_entry ->
group_entry, counter_list -> group_list").
This also changes 'event' back to 'counter' in a couple of
Hi Ben,
Thanks for your comments.
> What happens if we build a kernel that is supposed to boot with two
> different variants of 405 or 440 ?
We cannot build a kernel with H/W Interrupt coalescing other than in
405EX/460EX/GT.
This is controlled via KConfig (config IBM_NEW_EMAC_INTR_COALESCE
depe
Hi Ben,
Thanks again for your comments.
> Same goes with the SDR register definitions. Prefix them with the SOC
> name but don't make them conditionally compiled.
I will add the base address in the Device tree, and make all register
definitions based on offset from the base in the next version of
On Mon, 2009-09-21 at 16:49 -0700, Prodyut Hazarika wrote:
> Hi Ben,
> Thanks for your comments.
>
>
> > What happens if we build a kernel that is supposed to boot with two
> > different variants of 405 or 440 ?
>
> We cannot build a kernel with H/W Interrupt coalescing other than in
> 405EX/460
On Mon, 2009-09-21 at 17:05 -0700, Prodyut Hazarika wrote:
> Hi Ben,
> Thanks again for your comments.
>
> > Same goes with the SDR register definitions. Prefix them with the SOC
> > name but don't make them conditionally compiled.
>
> I will add the base address in the Device tree, and make all
On Mon, 2009-09-21 at 15:40 +0200, Geert Uytterhoeven wrote:
>
> With 32-bit userland, this boils down to:
>
> | mmap addr 0x7fff size 0x7fff
> | mmap returned 0x7fff
>
> i.e. mmap() succeeds, but (1) the test expects it to fail, so the test returns
> TFAIL, but (2) ltp-pan still re
Hi Ben,
>
> BTW. If you guys are ever going to do another change to MAL, please
> please plase, add the -one- major missing feature that's causing all the
> pain and complication in the current design: Add a per-channel interrupt
> masking option.
>
> The lack of ability to mask the interrupt per
On Mon, 2009-09-21 at 17:28 -0700, prodyut hazarika wrote:
> > BTW. If you guys are ever going to do another change to MAL, please
> > please plase, add the -one- major missing feature that's causing all
> the
> > pain and complication in the current design: Add a per-channel
> interrupt
> > maskin
Hi Ben,
> Well... the above is a HW limitation :-) IE. I was suggesting you fix
> the HW, but in the case where you already did and the current MAL in
> your SoC can indeed mask the interrupt per-channel, then that's great
> and we should definitely look into having the driver go back to a more
>
On Mon, 2009-09-21 at 17:53 -0700, Prodyut Hazarika wrote:
>
> In the newer revs of 460EX/GT and 405EX, we have Interrupt coalescing
> both on Tx and Rx per channel (physical not virtual), which can be
> enabled/disabled per channel via UIC. The Tx/Rx Coalesce mappings are
> defined in the dts fil
On Tue, 2009-09-22 at 09:48 +1000, Paul Mackerras wrote:
> This fixes two places in the powerpc perf_event (perf_counter) code
> where 'list_entry' needs to be changed to 'group_entry', but were
> missed in commit 65abc865 ("perf_counter: Rename list_entry ->
> group_entry, counter_list -> group_li
If we are using 1TB segments and we are allowed to randomise the heap, we can
put it above 1TB so it is backed by a 1TB segment. Otherwise the heap will be
in the bottom 1TB which always uses 256MB segments and this may result in a
performance penalty.
This functionality is disabled when heap ran
When we take an exception and the SDAR isn't synchronised we currently
log 0 as the address. Unfortunately this is a pretty common value, so
use ~OUL instead.
Signed-off-by: Anton Blanchard
---
Index: linux.trees.git/arch/powerpc/kernel/perf_event.c
=
perf_counter uses arch_vma_name() to detect a vdso region which in turn uses
current->mm->context.vdso_base. We need to initialise this before doing
the mmap or else we fail to detect the vdso.
Signed-off-by: Anton Blanchard
---
Index: linux.trees.git/arch/powerpc/kernel/vdso.c
In continuous sampling mode we want the SDAR to update. While we can
select between dcache misses and erat misses, a decent default is to
enable both.
Signed-off-by: Anton Blanchard
---
Index: linux.trees.git/arch/powerpc/kernel/power7-pmu.c
=
On Mon, Sep 21, 2009 at 05:13:05PM +0200, diba...@libero.it wrote:
> I have an MPC880 @133MHz. If I look into the load (with uptime) I get
> values around 3.0 but my CPU is always under 5 percent (top). How could I
> explain this? I'm using linux 2.6.19 with xenomai but no xenomai application
>
On Mon, Sep 21, 2009 at 3:08 PM, Julie Zhu wrote:
> Add bus glue driver for Xilinx USB host controller. The controller can be
> configured as HS only or HS/FS hybrid. The driver uses the device tree file
> to configure the driver according to the setting in the hardware system.
>
> This driver has
Hi,
This is an RFC, not for inclusion **
This patchset introduces cpuidle infrastructure to POWER, prototyping
for pSeries, and also does a major refactoring of current x86 idle
power management and a cleanup of cpuidle infrastructure.
My earlier iterations can be found at:
v4
* Arun R Bharadwaj [2009-09-22 11:03:14]:
This patch cleans up drivers/cpuidle/cpuidle.c
Earlier cpuidle assumed pm_idle as the default idle loop. Break that
assumption and make it more generic. cpuidle_idle_call() which is the
main idle loop of cpuidle is to be called by architectures which have
* Arun R Bharadwaj [2009-09-22 11:03:14]:
Implement a list based registering mechanism for architectures which
have multiple sets of idle routines which are to be registered.
Currently, in x86 it is done by merely setting pm_idle = idle_routine
and managing this pm_idle pointer is messy.
To giv
* Arun R Bharadwaj [2009-09-22 11:03:14]:
This patch cleans up x86 of all instances of pm_idle.
pm_idle which was earlier called from cpu_idle() idle loop
is replaced by cpuidle_idle_call.
x86 also registers to cpuidle when the idle routine is selected,
by populating the cpuidle_device data str
* Arun R Bharadwaj [2009-09-22 11:03:14]:
This patch enables the cpuidle option in Kconfig for pSeries.
Currently cpuidle infrastructure is enabled only for x86 and ARM.
Signed-off-by: Arun R Bharadwaj
---
arch/powerpc/Kconfig | 14 ++
1 file changed, 14 insertions(+)
Index: l
* Arun R Bharadwaj [2009-09-22 11:03:14]:
This patch removes the routines, pseries_shared_idle_sleep and
pseries_dedicated_idle_sleep, since this is implemented as a part
of arch/powerpc/platform/pseries/processor_idle.c
Also, similar to x86, call cpuidle_idle_call from cpu_idle() idle
loop inst
* Arun R Bharadwaj [2009-09-22 11:03:14]:
In arch/powerpc/kernel/idle.c create a default_idle() routine by moving
the failover condition of the cpu_idle() idle loop. This is needed by
cpuidle infrastructure to call default_idle when other idle routines
are not yet registered. Functionality remain
* Arun R Bharadwaj [2009-09-22 11:03:14]:
This patch creates arch/powerpc/platforms/pseries/processor_idle.c,
which implements the cpuidle infrastructure for pseries.
It implements a pseries_cpuidle_loop() which would be the main idle loop
called from cpu_idle(). It makes decision of entering eit
Some System p configurations can already have more than 16 nodes so we
need to increase NODES_SHIFT. I chose 256 to give us some room to grow in the
future, although we can look at something smaller if the memory bloat is
considered too much.
Unless we clamp MAX_ACTIVE_REGIONS we end up with 300k
On machines without the ibm,client-architecture-support call we were missing a
newline. We may as well print the full name in all its glory too - its
ibm,client-architecture-support, not ibm,client-architecture as I mistakenly
wrote (a name only an IBM architect could love).
For my penance I will
64 matches
Mail list logo