detected from the other party
i'm using a USB-A to USB-C cable.
any help would be greatly appreciated.
thanks,
Dario
On Thu, Nov 7, 2024 at 2:06 PM Dario Pennisi wrote:
> Hi,
> i'm trying to use ps-USB port as a NCM interface to an external and i
> think i correctly added the r
Hi,
i'm trying to use ps-USB port as a NCM interface to an external and i think
i correctly added the required stuff but i see a major issue that is
present also when not adding the related modifications:
1) issuing lsusb shows nothing
2) regardless of the modifications the host PC shows failure to
h that and with newer releases (haven't tried them all yet)
any hint?
thanks,
Dario Pennisi
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that as there's no forecast function
and i don't seem to see any parameter to pass to the block to change this
behaviour...
thanks,
Dario Pennisi
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t packet length equal to MTU radios won't output anything whereas if i
set them to output MTU/2 it seems to work.. any hint?
thanks,
Dario Pennisi
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dtool - NI Community
<https://forums.ni.com/t5/USRP-Software-Radio/rfnocmodtool/td-p/4349614>
thanks,
Dario Pennisi
On Mon, Feb 12, 2024 at 10:22 PM Brian Padalino wrote:
> On Mon, Feb 12, 2024 at 4:13 PM Dario Pennisi wrote:
>
>> Hi Brian,
>> The issue with not
Hi Brian,
The issue with not using gr-ettus is the lack of rfnocmodtool which is very
handy. Also, it is my understanding that unless you move to gnuradio 3.10
even with uhd4.6 you still need gr-ettus. Am I wrong?
Dario Pennisi
Il Lun 12 Feb 2024, 20:21 Brian Padalino ha scritto:
> On
You have to install gr-ettus which contains what's needed for compiling OOT
blocks and also installs rfnock blocks
Dario Pennisi
Il Lun 12 Feb 2024, 19:05 ha scritto:
> I also cannot find existing installed blocks like the radio block, DDC and
> DUC blocks in my current GUI. Any he
l the
best way to create an OOT block and eventually what is going to be its
replacement in the future.
thanks,
Dario Pennisi
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as i understand X440 and X410 share the same mainboard and just have
a different front end which would make it straightforward to port code...
is this correct?
thanks,
Dario Pennisi
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To unsubscribe se
et started on
an OOT block with these latest versions.
thanks,
Dario Pennisi
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Hi Wade,
thank you very much! That indeed did the trick.
Dario Pennisi
On Fri, Nov 25, 2022 at 6:21 PM Wade Fife wrote:
> Hi Dario,
>
> It looks like this mode was never officially supported. I'm going to
> follow up with R&D on Monday (it's a holiday in the US
Hi Piotr,
thank you very much. i'll look into it. unfortunately it worked at 125 MHz
on UHD 4.0 when most of the stuff was hardcoded... anyway I'll figure out.
Dario Pennisi
On Fri, Nov 25, 2022 at 10:51 AM wrote:
> Hello,
>
> I recently experimented with adding new maste
Hi Piotr,
We maintain our fork of UHD as we already customize it so if you could
point me to the right things to change it would be great. I tried changing
the default master clock rate definition in MPM python code but that causes
the software not to run at all
Thanks
Dario Pennisi
Il Gio 24
application
and leaves more free space for user logic
Dario Pennisi
Il Mer 23 Nov 2022, 21:52 Marcus D. Leech ha
scritto:
> On 23/11/2022 15:24, Dario Pennisi wrote:
>
> Hi,
> i am using a XG-100 FPGA and moved from UHD4.0 to UHD4.2 and found out
> that master clock rate changed from 125 t
store sampling frequency to 125 MHz?
thanks,
Dario Pennisi
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Hi,
i'm trying to build x4xx system image with kas. first of all let me flag
that recent kas versions moved to an incompatible gcc version so nothing
would build. after reverting to kas 2.6.3 i can build successfully for n310
however building for x410 would result in the following error:
| install
i think i found the answer myself... just needed to remake and reinstall
uhd/host as that was outdated...
thanks,
Dario
On Sun, Oct 3, 2021 at 8:45 AM Dario Pennisi wrote:
> Hi Wade,
> thank you for the response. i was actually able to spot the issue... the
> IP version doesn't
> remove it from the build. Edit fpga/usrp3/top/x400/Makefile.inc and delete
> the three lines that reference "ddr4_64bits" or "DDR4_64BITS", then it
> should skip that IP in the build.
>
> Wade
>
> On Sat, Oct 2, 2021 at 1:04 AM Dario Pennisi wrote:
>
&g
==
Warnings: 4
Critical Warnings: 7
Errors: 8
since it seems the issue is related to locking i tried serveral times
cleaning up the build directory or even making just X410_IP target with no
success.
any hints on what is currently going wrong?
thanks,
Dario Pennisi
rough
> your block. If this is the case, try calling issue_stream_cmd() on the DDC
> block which will then propagate it to the Radio block (or call directly on
> the Radio if there is no DDC).
> Rob
>
> On Fri, Aug 20, 2021 at 1:26 PM Dario Pennisi wrote:
>
>> Hi,
>
Hi,
i'm trying to optimize FPGA consumption and on N310/UHD4.1.0.1 i am testing
a block that needs only 2 inputs and no outputs. since i don't need to
stream any data in/out of the FPGA i declared a single streamer with
control only and declared no connection between it and any block in the yml
and
doing so i was thinking to
modify the code so that my outgoing packets could have different virtual
channels and use them to identify the destination port.
may i have any suggestion on how to proceed? it seems to me there may be
some easy way to do that but am not getting a clear picture yet.
thanks,
SIDEBAND_AT_END to 1.
thanks,
Dario Pennisi
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... not sure that would really help anyway.
do you have any suggestion to improve UDP packet transmission on zynq,
eventually suggesting how to perform real zero copy for UDP traffic in a
GNURadio block?
thanks!
Dario Pennisi
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mainly for the FPGA and haven't tried
yet the native gbit port but was wondering if there is any reason this is
happening and any recommended best practice to run gnuradio graphs on
zynq/arm.
thanks,
Dario Pennisi
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o know how to
reach it.
Is there any possibility to handle the case of connecting everything
statically? i really need to save as many resources as possible in the
final build.
thanks,
Dario Pennisi
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Hi,
i'm trying to use DPDK with UHD 4 but it is not detected by cmake.
i have ubuntu 20.04.1 which installs DPDK 19.11.3-0ubuntu0.2 when i use
apt-get install dpdk dpdk-dev
i tried passing manually environment variables for include and library
directories but that doesn't work.
can you please shed
> Also, if you have access to ModelSim, I would highly suggest trying that
> tool instead as it is far more robust than xsim. You can use the vsim make
> target to use ModelSim.
>
> Jonathon
>
> On Sat, Nov 21, 2020 at 5:54 AM Dario Pennisi via USRP-users <
> usrp-users@
ying that
> tool instead as it is far more robust than xsim. You can use the vsim make
> target to use ModelSim.
>
> Jonathon
>
> On Sat, Nov 21, 2020 at 5:54 AM Dario Pennisi via USRP-users <
> usrp-users@lists.ettus.com> wrote:
>
>> Hi,
>> i'm trying
/u_ddr3_infrastructure/plle2_i) is outside the
allowed range (19.000 - 933.000 MHz). Please change the CLKIN1_PERIOD
attribute value in order to be within the allowed range for this device.
strange enough i don't get these when running from console.
any suggestions?
Dario Pe
g...
if i remove cmul instance from my design simulation works.
can you please shed some light on how to fix this?
thanks,
Dario Pennisi
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al
creation of the block.yaml files?
2) why the fft block using the block.yaml definition from gr-uhd doesn't seem
to work?
3) how do I make oot blocks recognized by probe and grc?
Thanks,
Dario Pennisi
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al
creation of the block.yaml files?
2) why the fft block using the block.yaml definition from gr-uhd doesn't seem
to work?
3) how do I make oot blocks recognized by probe and grc?
Thanks,
Dario Pennisi
different clock (at 214MHz).
do I understand correctly that the assignments are ignored and that the signals
stay at 214MHz rather than the 200 MHz of the radio_clk?
Is there any reason why the builder script adds those declarations/assignments?
Thanks,
Dario Pennisi
71b5a53f18).
Basically it looks like whenever we tell the streamer we used less data it
provided at input or filled in less data it expects at output there will be a
memory leak.
any help on this would be greatly appreciated...
thanks,
Dario Pennisi
__
hen doing probe the block does not
responds to requests and probe fails. This was working with vivado 2015.4 and
yes, we added bus_clk and bus_rst in axi_wrapper
Can anyone help at least on the first point? We can't really understand why our
custom control block seem
ow it. For x310 axi bw is around 300 msps
Dario Pennisi
On Tue, Jul 24, 2018 at 1:56 PM +0200, "Carlos Alberto Ruiz Naranjo via
USRP-users" mailto:usrp-users@lists.ettus.com>>
wrote:
Please, any help?? :( :( :(
2018-07-12 19:13 GMT+02:00 Brassard, Sean M.
mailto:sean.brass
,
Dario Pennisi
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along with them...
Best regards,
Dario Pennisi
Da: ishai alouche via USRP-users
Inviato: domenica 22 luglio, 20:58
Oggetto: [USRP-users] how to write test for block with two output ports
A: usrp-users@lists.ettus.com
Hi all,
I use the X310 usrp and i create new block with rdnocmodtools.
My bloc
them manually in your driver but it's easier to just add
dummy inputs or outputs... You just have to remember once again that a single
rfnoc block with multiple inputs and or outputs will share bandwidth across
them so for example on x310 you can't pump in or out of ports more than
ay be wrong or misunderstanding your end goal but
these are my 50 cents...
Dario Pennisi
On Sun, Jul 22, 2018 at 5:13 PM +0200, "Brian Padalino"
mailto:bpadal...@gmail.com>> wrote:
Hey Dario,
On Sun, Jul 22, 2018 at 3:55 AM Dario Pennisi
mailto:da...@iptronix.com>> w
Hi Brian,
Don't think what you want to do is feasible. While the streaming data part is
easy as it's basically just an oot block, emulating register writes is not
possible because they go through APIs that send commands over the network. The
only reasonable option I see to do what you want is to
esend them if ack is out of sequence
won't work since resending commands at that point would change the order
commands are executed and could be potentially very wrong.
Would be great if someone from usrp could discuss this a bit further and come
out with a better solution...
Best regar
.
Thanks,
Dario Pennisi
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work function.
Thanks in advance for your help!
Dario Pennisi
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set on tuser.
Is there any particular procedure/way to have this working?
Thanks,
Dario Pennisi
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if host is not in the loop for the tx part.
Thank you,
Dario Pennisi
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nix/fpga/commit/b144fcb40eaa0e54dfa3c66bc4fc7cb42c54362c>fpga<https://github.com/ipTronix/fpga/commit/b144fcb40eaa0e54dfa3c66bc4fc7cb42c54362c>/commit/b144fcb40eaa0e54dfa3c66bc4fc7cb42c54362c<https://github.com/ipTronix/fpga/commit/b144fcb40eaa0e54dfa3c66bc4fc7cb42c54362c>
Dario Pennisi
On Wed, Oct 25
You may want to check
this:https://www.mail-archive.com/usrp-users@lists.ettus.com/msg03271.html
Dario Pennisi
On Sat, Oct 14, 2017 at 10:31 AM +0200, "Andrew Thommesen"
mailto:andrewjoh...@outlook.com>> wrote:
Hi Dario,
Thanks. I did try that, but I am using a Twi
ports but got no
answer on that either...
Thanks,
Dario Pennisi
On Fri, Oct 13, 2017 at 10:35 PM +0200, "Michael West"
mailto:michael.w...@ettus.com>> wrote:
Hi Dario,
OK. I dug in a bit more and I can now tell you are most likely using the 2
streams from a single TwinRX
port.
With the same block, even without adding code for a second output but just
adding the fake output to the block descriptors made it work...
I'm sure there's a bug somewhere in uhd or gr-ettus as he is fine.
Best regards,
Dario Pennisi
On Fri, Oct 13, 2017 at 9:32 PM +0200
s. To change
sampling clock you have to set system clock attribute in device3. Of course
same thing goes for outputs
Doing this worked for me... I'm connecting inputs to radio and outputs to host
blocks...
Let me know if this helps...
Dario Pennisi
On Fri, Oct 13, 2017 at 9:1
adios will work at so you have
to change system sampling frequency to 120 MHz using the attribute in
device3... Don't even try changing it in radio block as the sampling frequency
there is not doing anything at all.
Good luck,
Dario Pennisi
On Wed, Oct 11, 2017 at 10:11 PM +0200, "A
Hi,
If your block is sending small amounts of bursty data the timeout being printed
is irrelevant as it just indicates no data has been sent for a given time lapse
not that no data has been received at all.
Dario Pennisi
On Wed, Oct 11, 2017 at 10:10 PM +0200, "John Medrano via
one?
Thanks,
Dario Pennisi
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or for the mismatch
between the two XML files (with the one in GRC) so I guess this setting
requires some special stuff in GRC XML as well but could not figure that out
Thanks,
Dario Pennisi
Da: Nick Foster
Inviato: martedì 26 settembre, 20:27
Oggetto: Re: [USRP-users] rfnoc block with tw
n what’s on the input….
Dario Pennisi
From: Nick Foster [mailto:bistrom...@gmail.com]
Sent: Tuesday, September 26, 2017 5:16 PM
To: Dario Pennisi ; usrp-users@lists.ettus.com
Subject: Re: [USRP-users] rfnoc block with two inputs
Dario,
Glad simulation appears to be working.
Since you aren'
nough room for overhead.
Now. In these conditions I still don't see data coming from the second channel
so am thinking that the issue must be on the software side.
Any help would be greatly appreciated.
Thanks,
Dario Pennisi
From: Dario Pennisi
Sent: Tuesday, September 26, 2017 12:00 PM
also would be interested in trying simulation but didn't find any example of
simulation with 2 inputs.
Thanks,
Dario Pennisi
From: Dario Pennisi
Sent: Monday, September 25, 2017 11:11 PM
To: usrp-users@lists.ettus.com; Nick Foster
Subject: Re: [USRP-users] rfnoc block with two inputs
Hi
27;t seem to be any other connection.
Am I missing something?
Btw is there any example of a block with 2 in and 1 out? I found only addsub
which has 2 out and is not even using axis wrapper...
Thanks
Dario Pennisi
On Mon, Sep 25, 2017 at 9:28 PM +0200, "Nick Foster"
mailto:bistr
id go high.
Thanks,
Dario Pennisi
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;re not doing correctly? I could not find any example other
than addsub that shows how to set up a rfnoc block with two inputs and one
output...
Thanks,
Dario Pennisi
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Hi,
After some testing it turned out that when creating a rfnoc block that sends
timestamps for packets, the output stream is not tagged.
The patch below solves the issue and also removes the annoying timeout message
that comes out whenever a block is not sending data so often.
Hope this helps an
Hi,
i've been developing a packet decoder block in rfnoc and so far it seems to
work in the sense that i can successfully decode packets and receive them in
gnuradio. in my implementation output data from the block would be in short
bursts and i would like to be able on the host to identify eac
hanks,
Dario Pennisi
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works...
is there any way of avoiding this manual step?
thanks,
Dario Pennisi
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: Tom Bereknyei
Inviato: mercoledì 23 agosto, 01:47
Oggetto: Re: [USRP-users] RFNoC user registers and related APIs
A: Dario Pennisi, Jonathon Pendlum
Cc: usrp-users@lists.ettus.com
Dario,
I've been working on a similar requirement. how strict are your timing needs?
For prototyping
oC code (such
as the radio core) into RFNoC. We do have a redesign of that bus on our RFNoC
roadmap to make it more consistent.
Jonathon
On Tue, Aug 22, 2017 at 3:56 AM, Dario Pennisi via USRP-users
mailto:usrp-users@lists.ettus.com>> wrote:
Hi,
I have some doubts on the interfaces available o
Hi,
I have some doubts on the interfaces available on noc shell and axi wrapper.
Based on the deep dive slides noc shell provides 3 bidirectional busses:
* Command & response
Looking at the noc_shell code this should be indicated as control source. This
bus seems to be able to send commands t
blocks. As you may have guessed I have to perform some
significant post processing on data and for me xml block descriptors are not
enough. For this reason I was looking for the rfnoc-tutorial/lib/gain_impl.cc
file referred in your link which I can’t find anywhere.
Thanks,
Dario Pennisi
Hi,
We are creating a RFNoC block that inputs a continuous flow of data and needs
to output an irregular burst of variable length.
I tried to research a bit but didn't found a final answer on the following
questions:
1. Packets to and from RFNoC blocks need to have a min/max/fixed length?
Ap
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