Hi, i'm working on an X410 image that needs to run at 400 MHz (500 MSPS). i see there are two templates one called X410_400 and one called X410_400_d. the first one has CHDR_W set to 512 which seems quite oversized while X410_400_d has CHRD_W set to 128 if i'm not wrong bus clock in both cases is set to run at over 200 MHz so sending 4 samples per clock should be more than enough so why does the one with 512 bits exist?
as a secondary note i'm having some trouble with my block which is a signal generator that connects through static routes to radios. in this case if i set packet length equal to MTU radios won't output anything whereas if i set them to output MTU/2 it seems to work.. any hint? thanks, Dario Pennisi
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