Re: [U-Boot] [PATCH] usb: dwc2: Add driver for Synopsis DWC2 USB IP block
Hi!
> This is the USB host controller used on the Altera SoCFPGA and Raspbery Pi.
>
> This code has three checkpatch warnings, but to make sure it stays at least
> readable and clear, these are not fixed. These bugs are in the USB request
> handling combinatorial logic, so any abstracting of those is out of question.
>
> Tested on DENX MCV (Altera SoCFPGA 5CSFXC6C6U23C8N) and RPi B+
> (BCM2835).
The code also has ton of unused defines. You said you want them to
document hardware, but do we really need
DWC2_HAINTMSK_CH7 _and_ DWC2_HAINTMSK_CH7_OFFSET, both unused? They
both contain same information...
> NOTE: Unless there are no objections, I would like to apply this.
Parse error :-).
> diff --git a/README b/README
> index 46def00..e243e4b 100644
> --- a/README
> +++ b/README
> @@ -1459,6 +1459,9 @@ The following options need to be configured:
> CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
> txfilltuning field in the EHCI controller on reset.
>
> + CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
> + HW module registers
Missing . at end of sentence.
> index 000..cff36f8
> --- /dev/null
> +++ b/drivers/usb/host/dwc2.c
> @@ -0,0 +1,1055 @@
> +/*
> + * Copyright (C) 2012 Oleksandr Tymoshenko
> + * Copyright (C) 2014 Marek Vasut
> + *
> + * SPDX-License-Identifier: GPL-2.0
> + */
Is this supposed to be "GPL-2.0+"?
> + switch (cmd->requesttype & ~USB_DIR_IN) {
> + case 0:
> + *(uint16_t *)buffer = cpu_to_le16(1);
> + len = 2;
> + break;
> + case USB_RECIP_INTERFACE:
> + *(uint16_t *)buffer = cpu_to_le16(0);
> + len = 2;
> + break;
> + case USB_RECIP_ENDPOINT:
> + *(uint16_t *)buffer = cpu_to_le16(0);
> + len = 2;
> + break;
> + case USB_TYPE_CLASS:
> + *(uint32_t *)buffer = cpu_to_le32(0);
> + len = 4;
> + break;
You can get rid of endianness conversion for zeros.
And can use same code for USB_RECIP_INTERFACE and USB_RECIP_ENDPOINT.
> + switch (cmd->requesttype & ~USB_DIR_IN) {
> + case 0:
> + switch (wValue & 0xff00) {
> + case 0x0100:/* device descriptor */
> + len = min3(txlen, sizeof(root_hub_dev_des), wLength);
> + memcpy(buffer, root_hub_dev_des, len);
> + break;
> + case 0x0200:/* configuration descriptor */
> + len = min3(txlen, sizeof(root_hub_config_des), wLength);
> + memcpy(buffer, root_hub_config_des, len);
> + break;
> + case 0x0300:/* string descriptors */
> + switch (wValue & 0xff) {
> + case 0x00:
> + len = min3(txlen, sizeof(root_hub_str_index0),
> +wLength);
> + memcpy(buffer, root_hub_str_index0, len);
> + break;
> + case 0x01:
> + len = min3(txlen, sizeof(root_hub_str_index1),
> +wLength);
> + memcpy(buffer, root_hub_str_index1, len);
> + break;
> + }
> + break;
Helper function that takes root_hub_str_index0 or similar, then does
len and memcpy?
Otherwise looks good to me,
Acked-by: Pavel Machek
> +#define DWC2_HAINT_CH0 (1 << 0)
> +#define DWC2_HAINT_CH0_OFFSET0
> +#define DWC2_HAINT_CH1 (1 << 1)
> +#define DWC2_HAINT_CH1_OFFSET1
> +#define DWC2_HAINT_CH2 (1 << 2)
> +#define DWC2_HAINT_CH2_OFFSET2
> +#define DWC2_HAINT_CH3 (1 << 3)
> +#define DWC2_HAINT_CH3_OFFSET3
> +#define DWC2_HAINT_CH4 (1 << 4)
> +#define DWC2_HAINT_CH4_OFFSET4
> +#define DWC2_HAINT_CH5 (1 << 5)
> +#define DWC2_HAINT_CH5_OFFSET5
> +#define DWC2_HAINT_CH6 (1 << 6)
> +#define DWC2_HAINT_CH6_OFFSET6
> +#define DWC2_HAINT_CH7 (1 << 7)
> +#define DWC2_HAINT_CH7_OFFSET7
> +#define DWC2_HAINT_CH8 (1 << 8)
> +#define DWC2_HAINT_CH8_OFFSET8
> +#define DWC2_HAINT_CH9 (1 << 9)
> +#define DWC2_HAINT_CH9_OFFSET9
> +#define DWC2_HAINT_CH10
Re: [U-Boot] [PATCH] arm: socfpga: Move code from misc_init_r() to arch_early_init_r()
On Sun 2014-10-19 20:40:47, Marek Vasut wrote: > Move this initialization code to proper place. The misc_init_r() > function is called way too late and the platform initialization > code should be executed much earlier. > > Signed-off-by: Marek Vasut > Cc: Chin Liang See > Cc: Dinh Nguyen > Cc: Vince Bridgers > Cc: Albert Aribaud Acked-by: Pavel Machek -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/7] spi: altera: Use struct-based register access
On Sun 2014-10-19 20:43:33, Marek Vasut wrote: > Zap the offset-based register access and use the struct-based one > as this is the preferred method. > > No functional change, but there are some line-over-80 problems in > the driver, which will be addressed later. For the whole series, Acked-by: Pavel Machek -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: socfpga: Zap spl.h and ad-hoc related syms
On Sun 2014-10-19 23:16:12, Marek Vasut wrote: > Switch to the common spl.h file and zap the arch/spl.h . Since the arch/spl.h > contained various ad-hoc symbols, zap those symbols as well and rework the > board configuration a little so it doesn't depend on them. > > Signed-off-by: Marek Vasut > Cc: Chin Liang See > Cc: Dinh Nguyen > Cc: Vince Bridgers > Cc: Albert Aribaud Acked-by: Pavel Machek -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] common/cmd_io.c: Fix incorrect help for iod/iow
Signed-off-by: Bin Meng --- common/cmd_io.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/common/cmd_io.c b/common/cmd_io.c index eefac36..c59148f 100644 --- a/common/cmd_io.c +++ b/common/cmd_io.c @@ -70,8 +70,8 @@ int do_io_iow(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) /**/ U_BOOT_CMD(iod, 2, 0, do_io_iod, - "IO space display", "[.b, .w, .l] address [# of objects]"); + "IO space display", "[.b, .w, .l] address"); U_BOOT_CMD(iow, 3, 0, do_io_iow, - "IO space modify (auto-incrementing address)", - "[.b, .w, .l] address"); + "IO space modify", + "[.b, .w, .l] address value"); -- 1.8.2.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] powerpc/t4rdb: Add support of CPLD
This support of CPLD includes
- Files and register definitions
- Command to switch alternate bank
- Command to switch default bank
Signed-off-by: Chunhe Lan
---
board/freescale/t4rdb/Makefile |1 +
board/freescale/t4rdb/cpld.c | 136 ++
board/freescale/t4rdb/cpld.h | 49 ++
board/freescale/t4rdb/law.c |3 +
board/freescale/t4rdb/t4240rdb.c | 12
board/freescale/t4rdb/tlb.c |5 ++
include/configs/T4240RDB.h | 23 +++
7 files changed, 229 insertions(+), 0 deletions(-)
create mode 100644 board/freescale/t4rdb/cpld.c
create mode 100644 board/freescale/t4rdb/cpld.h
diff --git a/board/freescale/t4rdb/Makefile b/board/freescale/t4rdb/Makefile
index f7f7fc0..3886e3d 100644
--- a/board/freescale/t4rdb/Makefile
+++ b/board/freescale/t4rdb/Makefile
@@ -5,6 +5,7 @@
#
obj-$(CONFIG_T4240RDB) += t4240rdb.o
+obj-y += cpld.o
obj-y += ddr.o
obj-y += eth.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/board/freescale/t4rdb/cpld.c b/board/freescale/t4rdb/cpld.c
new file mode 100644
index 000..d5f3812
--- /dev/null
+++ b/board/freescale/t4rdb/cpld.c
@@ -0,0 +1,136 @@
+/**
+ * Copyright 2014 Freescale Semiconductor
+ *
+ * Author: Chunhe Lan
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * This file provides support for the board-specific CPLD used on some
Freescale
+ * reference boards.
+ *
+ * The following macros need to be defined:
+ *
+ * CONFIG_SYS_CPLD_BASE - The virtual address of the base of the
+ * CPLD register map
+ *
+ */
+
+#include
+#include
+#include
+
+#include "cpld.h"
+
+u8 cpld_read(unsigned int reg)
+{
+ void *p = (void *)CONFIG_SYS_CPLD_BASE;
+
+ return in_8(p + reg);
+}
+
+void cpld_write(unsigned int reg, u8 value)
+{
+ void *p = (void *)CONFIG_SYS_CPLD_BASE;
+
+ out_8(p + reg, value);
+}
+
+/**
+ * Set the boot bank to the alternate bank
+ */
+void cpld_set_altbank(void)
+{
+ u8 val, curbank, altbank, override;
+
+ val = CPLD_READ(vbank);
+ curbank = val & CPLD_BANK_SEL_MASK;
+
+ switch (curbank) {
+ case CPLD_SELECT_BANK0:
+ altbank = CPLD_SELECT_BANK4;
+ CPLD_WRITE(vbank, altbank);
+ override = CPLD_READ(software_on);
+ CPLD_WRITE(software_on, override | CPLD_BANK_SEL_EN);
+ CPLD_WRITE(sys_reset, CPLD_SYSTEM_RESET);
+ break;
+ case CPLD_SELECT_BANK4:
+ altbank = CPLD_SELECT_BANK0;
+ CPLD_WRITE(vbank, altbank);
+ override = CPLD_READ(software_on);
+ CPLD_WRITE(software_on, override | CPLD_BANK_SEL_EN);
+ CPLD_WRITE(sys_reset, CPLD_SYSTEM_RESET);
+ break;
+ default:
+ printf("CPLD Altbank Fail: Invalid value!\n");
+ return;
+ }
+}
+
+/**
+ * Set the boot bank to the default bank
+ */
+void cpld_set_defbank(void)
+{
+ u8 val;
+
+ val = CPLD_DEFAULT_BANK;
+
+ CPLD_WRITE(global_reset, val);
+}
+
+#ifdef DEBUG
+static void cpld_dump_regs(void)
+{
+ printf("chip_id1= 0x%02x\n", CPLD_READ(chip_id1));
+ printf("chip_id2= 0x%02x\n", CPLD_READ(chip_id2));
+ printf("sw_maj_ver = 0x%02x\n", CPLD_READ(sw_maj_ver));
+ printf("sw_min_ver = 0x%02x\n", CPLD_READ(sw_min_ver));
+ printf("hw_ver = 0x%02x\n", CPLD_READ(hw_ver));
+ printf("software_on = 0x%02x\n", CPLD_READ(software_on));
+ printf("cfg_rcw_src = 0x%02x\n", CPLD_READ(cfg_rcw_src));
+ printf("res0= 0x%02x\n", CPLD_READ(res0));
+ printf("vbank = 0x%02x\n", CPLD_READ(vbank));
+ printf("sw1_sysclk = 0x%02x\n", CPLD_READ(sw1_sysclk));
+ printf("sw2_status = 0x%02x\n", CPLD_READ(sw2_status));
+ printf("sw3_status = 0x%02x\n", CPLD_READ(sw3_status));
+ printf("sw4_status = 0x%02x\n", CPLD_READ(sw4_status));
+ printf("sys_reset = 0x%02x\n", CPLD_READ(sys_reset));
+ printf("global_reset= 0x%02x\n", CPLD_READ(global_reset));
+ printf("res1= 0x%02x\n", CPLD_READ(res1));
+ putc('\n');
+}
+#endif
+
+#ifndef CONFIG_SPL_BUILD
+int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ int rc = 0;
+
+ if (argc <= 1)
+ return cmd_usage(cmdtp);
+
+ if (strcmp(argv[1], "reset") == 0) {
+ if (strcmp(argv[2], "altbank") == 0)
+ cpld_set_altbank();
+ else
+ cpld_set_defbank();
+#ifdef DEBUG
+ } else if (strcmp(argv[1], "dump") == 0) {
+ cpld_dump_regs();
+#endif
+ } else
+ rc = cmd_usage(cmdtp);
+
+ return rc;
+}
+
+U_BOOT_CMD(
+ cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
+ "Reset the board or alternate bank",
+ "reset - reset to default bank\n"
+ "cpld reset altbank - re
[U-Boot] [PATCH v4 2/2] kconfig: add CONFIG_SUPPORT_TPL
CONFIG_TPL should not be enabled for boards that do not have TPL. CONFIG_SUPPORT_TPL introduced by this commit should be "select"ed by boards with TPL support and CONFIG_TPL should depend on it. Signed-off-by: Masahiro Yamada --- Changes in v4: None Changes in v3: None Changes in v2: - bug fix. s/HAVE_SPL_SUPPORT/SUPPORT_SPL/ Kconfig | 5 - arch/powerpc/cpu/mpc85xx/Kconfig | 5 + 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/Kconfig b/Kconfig index 29e0b92..932fc8b 100644 --- a/Kconfig +++ b/Kconfig @@ -73,6 +73,9 @@ config TPL_BUILD config SUPPORT_SPL bool +config SUPPORT_TPL + bool + config SPL bool depends on SUPPORT_SPL @@ -83,7 +86,7 @@ config SPL config TPL bool - depends on SPL + depends on SPL && SUPPORT_TPL prompt "Enable TPL" if !SPL_BUILD default y if TPL_BUILD default n diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 6dcc45a..c5ebd40 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -31,6 +31,7 @@ config TARGET_BSC9132QDS config TARGET_C29XPCIE bool "Support C29XPCIE" select SUPPORT_SPL + select SUPPORT_TPL config TARGET_P3041DS bool "Support P3041DS" @@ -77,10 +78,12 @@ config TARGET_MPC8572DS config TARGET_P1010RDB bool "Support P1010RDB" select SUPPORT_SPL + select SUPPORT_TPL config TARGET_P1022DS bool "Support P1022DS" select SUPPORT_SPL + select SUPPORT_TPL config TARGET_P1023RDB bool "Support P1023RDB" @@ -88,10 +91,12 @@ config TARGET_P1023RDB config TARGET_P1_P2_RDB bool "Support P1_P2_RDB" select SUPPORT_SPL + select SUPPORT_TPL config TARGET_P1_P2_RDB_PC bool "Support p1_p2_rdb_pc" select SUPPORT_SPL + select SUPPORT_TPL config TARGET_P1_TWR bool "Support p1_twr" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/2] kconfig: add CONFIG_SUPPORT_SPL
CONFIG_SPL should not be enabled for boards that do not have SPL. CONFIG_SUPPORT_SPL introduced by this commit should be "select"ed by boards with SPL support and CONFIG_SPL should depend on it. Signed-off-by: Masahiro Yamada Acked-by: Simon Glass --- Changes in v4: - Add "select SUPPORT_SPL" to ARCH_KEYSTONE Changes in v3: - Rebase on commit dd0204e48 Changes in v2: None Kconfig| 4 +++ arch/arm/Kconfig | 46 ++ arch/arm/cpu/arm926ejs/davinci/Kconfig | 4 +++ arch/arm/cpu/armv7/exynos/Kconfig | 7 ++ arch/arm/cpu/armv7/omap3/Kconfig | 16 arch/microblaze/Kconfig| 1 + arch/powerpc/cpu/mpc5xxx/Kconfig | 1 + arch/powerpc/cpu/mpc83xx/Kconfig | 1 + arch/powerpc/cpu/mpc85xx/Kconfig | 12 + arch/powerpc/cpu/ppc4xx/Kconfig| 1 + 10 files changed, 93 insertions(+) diff --git a/Kconfig b/Kconfig index e0c8992..29e0b92 100644 --- a/Kconfig +++ b/Kconfig @@ -70,8 +70,12 @@ config TPL_BUILD depends on $KCONFIG_OBJDIR="tpl" default y +config SUPPORT_SPL + bool + config SPL bool + depends on SUPPORT_SPL prompt "Enable SPL" if !SPL_BUILD default y if SPL_BUILD help diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index bd10361..a159160 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -152,12 +152,14 @@ config TARGET_MX25PDK config TARGET_TX25 bool "Support tx25" + select SUPPORT_SPL config TARGET_ZMX25 bool "Support zmx25" config TARGET_APF27 bool "Support apf27" + select SUPPORT_SPL config TARGET_IMX27LITE bool "Support imx27lite" @@ -167,30 +169,39 @@ config TARGET_MAGNESIUM config TARGET_APX4DEVKIT bool "Support apx4devkit" + select SUPPORT_SPL config TARGET_XFI3 bool "Support xfi3" + select SUPPORT_SPL config TARGET_M28EVK bool "Support m28evk" + select SUPPORT_SPL config TARGET_MX23EVK bool "Support mx23evk" + select SUPPORT_SPL config TARGET_MX28EVK bool "Support mx28evk" + select SUPPORT_SPL config TARGET_MX23_OLINUXINO bool "Support mx23_olinuxino" + select SUPPORT_SPL config TARGET_BG0900 bool "Support bg0900" + select SUPPORT_SPL config TARGET_SANSA_FUZE_PLUS bool "Support sansa_fuze_plus" + select SUPPORT_SPL config TARGET_SC_SPS_1 bool "Support sc_sps_1" + select SUPPORT_SPL config ARCH_NOMADIK bool "ST-Ericsson Nomadik" @@ -215,6 +226,7 @@ config TARGET_SPEAR600 config TARGET_X600 bool "Support x600" + select SUPPORT_SPL config ARCH_VERSATILE bool "ARM Ltd. Versatile family" @@ -233,6 +245,7 @@ config TARGET_MX31ADS config TARGET_MX31PDK bool "Support mx31pdk" + select SUPPORT_SPL config TARGET_TT01 bool "Support tt01" @@ -245,6 +258,7 @@ config TARGET_WOODBURN config TARGET_WOODBURN_SD bool "Support woodburn_sd" + select SUPPORT_SPL config TARGET_FLEA3 bool "Support flea3" @@ -275,54 +289,71 @@ config TARGET_VEXPRESS_CA9X4 config TARGET_KWB bool "Support kwb" + select SUPPORT_SPL config TARGET_TSERIES bool "Support tseries" + select SUPPORT_SPL config TARGET_CM_T335 bool "Support cm_t335" + select SUPPORT_SPL config TARGET_PEPPER bool "Support pepper" + select SUPPORT_SPL config TARGET_AM335X_IGEP0033 bool "Support am335x_igep0033" + select SUPPORT_SPL config TARGET_PCM051 bool "Support pcm051" + select SUPPORT_SPL config TARGET_DRACO bool "Support draco" + select SUPPORT_SPL config TARGET_DXR2 bool "Support dxr2" + select SUPPORT_SPL config TARGET_PXM2 bool "Support pxm2" + select SUPPORT_SPL config TARGET_RUT bool "Support rut" + select SUPPORT_SPL config TARGET_PENGWYN bool "Support pengwyn" + select SUPPORT_SPL config TARGET_AM335X_EVM bool "Support am335x_evm" + select SUPPORT_SPL config TARGET_AM43XX_EVM bool "Support am43xx_evm" + select SUPPORT_SPL config TARGET_TI814X_EVM bool "Support ti814x_evm" + select SUPPORT_SPL config TARGET_TI816X_EVM bool "Support ti816x_evm" + select SUPPORT_SPL config TARGET_SAMA5D3_XPLAINED bool "Support sama5d3_xplained" + select SUPPORT_SPL config TARGET_SAMA5D3XEK bool "Support sama5d3xek" + select SUPPORT_SPL config TARGET_BCM28155_AP bool "Support bcm28155_ap" @@ -344,9 +375,11 @@ config ARCH_HIGHBANK config ARCH_KEYSTONE bool "TI Keystone" + select SUPPORT_SPL config TARGET_M53EVK bool "Support m53evk" + select SUPPORT_SPL config TARGET_IMA3_MX53 bool "Support ima3-mx53" @@ -
[U-Boot] [PATCH v4 0/2] Introduce CONFIG_SUPPORT_SPL/TPL
Masahiro Yamada (2): kconfig: add CONFIG_SUPPORT_SPL kconfig: add CONFIG_SUPPORT_TPL Kconfig| 9 ++- arch/arm/Kconfig | 46 ++ arch/arm/cpu/arm926ejs/davinci/Kconfig | 4 +++ arch/arm/cpu/armv7/exynos/Kconfig | 7 ++ arch/arm/cpu/armv7/omap3/Kconfig | 16 arch/microblaze/Kconfig| 1 + arch/powerpc/cpu/mpc5xxx/Kconfig | 1 + arch/powerpc/cpu/mpc83xx/Kconfig | 1 + arch/powerpc/cpu/mpc85xx/Kconfig | 17 + arch/powerpc/cpu/ppc4xx/Kconfig| 1 + 10 files changed, 102 insertions(+), 1 deletion(-) -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/5] ARM: HYP/non-sec: Fix the ARCH Timer frequency setting.
For some SoCs, the system clock frequency may not equal to the ARCH Timer's frequency. This patch uses the CONFIG_TIMER_CLK_FREQ instead of CONFIG_SYS_CLK_FREQ, then the system clock macro and arch timer macor could be set separately and without interfering each other. Signed-off-by: Xiubo Li --- arch/arm/cpu/armv7/nonsec_virt.S | 4 ++-- include/configs/sun7i.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 1ab5d54..30d81db 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -169,11 +169,11 @@ ENTRY(_nonsec_init) * we do this here instead. * But first check if we have the generic timer. */ -#ifdef CONFIG_SYS_CLK_FREQ +#ifdef CONFIG_TIMER_CLK_FREQ mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 and r0, r0, #CPUID_ARM_GENTIMER_MASK@ mask arch timer bits cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT) - ldreq r1, =CONFIG_SYS_CLK_FREQ + ldreq r1, =CONFIG_TIMER_CLK_FREQ mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ #endif diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index a902b84..6e201f2f 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -35,6 +35,7 @@ #define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_SYS_CLK_FREQ2400 +#define CONFIG_SYS_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ /* * Include common sunxi configuration where most the settings are -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 3/5] ls102xa: HYP/non-sec: support for ls102xa boards
Enable hypervisors utilizing the ARMv7 virtualization extension
on the LS1021A-QDS/TWR boards with the A7 core tile, we add the
required configuration variable.
Also we define the board specific smp_set_cpu_boot_addr() function
to set the start address for secondary cores in the LS1021A specific
manner.
Signed-off-by: Xiubo Li
---
arch/arm/cpu/armv7/ls102xa/cpu.c | 15 +++
arch/arm/include/asm/arch-ls102xa/config.h| 2 ++
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 +++
include/configs/ls1021aqds.h | 7 +++
include/configs/ls1021atwr.h | 7 +++
5 files changed, 34 insertions(+)
diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c
index b7dde45..69d1801 100644
--- a/arch/arm/cpu/armv7/ls102xa/cpu.c
+++ b/arch/arm/cpu/armv7/ls102xa/cpu.c
@@ -101,3 +101,18 @@ int cpu_eth_init(bd_t *bis)
return 0;
}
+
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+/* Setting the address at which secondary cores start from.*/
+void smp_set_core_boot_addr(unsigned long addr, int corenr)
+{
+ struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+
+ /*
+* After setting the secondary cores start address,
+* just release them to boot.
+*/
+ out_be32(&gur->scratchrw[0], addr);
+ out_be32(&gur->brrl, 0x2);
+}
+#endif
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h
b/arch/arm/include/asm/arch-ls102xa/config.h
index ed78c33..4856388 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -11,6 +11,8 @@
#define OCRAM_BASE_ADDR0x1000
#define OCRAM_SIZE 0x0002
+#define OCRAM_BASE_S_ADDR 0x1001
+#define OCRAM_S_SIZE 0x0001
#define CONFIG_SYS_IMMR0x0100
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 7995fe2..0bac353 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -17,6 +17,9 @@
#define SOC_VER_LS1021 0x11
#define SOC_VER_LS1022 0x12
+#define CCSR_BRR_OFFSET0xe4
+#define CCSR_SCRATCHRW1_OFFSET 0x200
+
#define RCWSR0_SYS_PLL_RAT_SHIFT 25
#define RCWSR0_SYS_PLL_RAT_MASK0x1f
#define RCWSR0_MEM_PLL_RAT_SHIFT 16
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 657e3b6..6976cfa 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -324,6 +324,13 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_IMLS
+#define CONFIG_ARMV7_NONSEC
+#define CONFIG_ARMV7_VIRT
+#define CONFIG_PEN_ADDR_BIG_ENDIAN
+#define CONFIG_SMP_PEN_ADDR0x01ee0200
+#define CONFIG_TIMER_CLK_FREQ 1250
+#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
+
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 45b2272..655b39a 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -227,6 +227,13 @@
#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_IMLS
+#define CONFIG_ARMV7_NONSEC
+#define CONFIG_ARMV7_VIRT
+#define CONFIG_PEN_ADDR_BIG_ENDIAN
+#define CONFIG_SMP_PEN_ADDR0x01ee0200
+#define CONFIG_TIMER_CLK_FREQ 1250
+#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
+
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
--
2.1.0.27.g96db324
___
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[U-Boot] [PATCH v3 0/5] ls102xa: HYP/non-sec: for ls102xa.
Change for V3: - Fix the language in commit message. Change for V2: - All the registers are defined as a struct, here use it. - Use CONFIG_PEN_ADDR_BIG_ENDIAN instead of CONFIG_SOC_BIG_ENDIAN. Xiubo Li (5): ARM: HYP/non-sec: add the pen address BE mode support. ARM: HYP/non-sec: Fix the ARCH Timer frequency setting. ls102xa: HYP/non-sec: support for ls102xa boards ARM: ls102xa: allow all the peripheral access permissions as R/W. ARM: ls102xa: Setting device's stream id for SMMUs. arch/arm/cpu/armv7/ls102xa/cpu.c | 15 +++ arch/arm/cpu/armv7/nonsec_virt.S | 7 +- arch/arm/include/asm/arch-ls102xa/config.h | 3 + arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 + .../include/asm/arch-ls102xa/ls102xa_stream_id.h | 17 +++ arch/arm/include/asm/arch-ls102xa/ns_access.h | 118 + board/freescale/common/Makefile| 4 + board/freescale/common/ls102xa_stream_id.c | 18 board/freescale/common/ns_access.c | 30 ++ board/freescale/ls1021aqds/ls1021aqds.c| 113 board/freescale/ls1021atwr/ls1021atwr.c| 112 +++ include/configs/ls1021aqds.h | 10 ++ include/configs/ls1021atwr.h | 10 ++ include/configs/sun7i.h| 1 + 14 files changed, 459 insertions(+), 2 deletions(-) create mode 100644 arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h create mode 100644 arch/arm/include/asm/arch-ls102xa/ns_access.h create mode 100644 board/freescale/common/ls102xa_stream_id.c create mode 100644 board/freescale/common/ns_access.c -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 4/5] ARM: ls102xa: allow all the peripheral access permissions as R/W.
The Central Security Unit (CSU) allows secure world software to
change the default access control policies of peripherals/bus
slaves, determining which bus masters may access them. This
allows peripherals to be separated into distinct security domains.
Combined with SMMU configuration of the system masters privileges,
these features provide protection against indirect unauthorized
access to data.
For now we configure all the peripheral access permissions as R/W.
Signed-off-by: Xiubo Li
---
arch/arm/include/asm/arch-ls102xa/config.h| 1 +
arch/arm/include/asm/arch-ls102xa/ns_access.h | 118 ++
board/freescale/common/Makefile | 2 +
board/freescale/common/ns_access.c| 30 +++
board/freescale/ls1021aqds/ls1021aqds.c | 92
board/freescale/ls1021atwr/ls1021atwr.c | 91
include/configs/ls1021aqds.h | 1 +
include/configs/ls1021atwr.h | 1 +
8 files changed, 336 insertions(+)
create mode 100644 arch/arm/include/asm/arch-ls102xa/ns_access.h
create mode 100644 board/freescale/common/ns_access.c
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h
b/arch/arm/include/asm/arch-ls102xa/config.h
index 4856388..0754296 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -18,6 +18,7 @@
#define CONFIG_SYS_FSL_DDR_ADDR(CONFIG_SYS_IMMR +
0x0008)
#define CONFIG_SYS_CCI400_ADDR (CONFIG_SYS_IMMR + 0x0018)
+#define CONFIG_SYS_FSL_CSU_ADDR (CONFIG_SYS_IMMR + 0x0051)
#define CONFIG_SYS_IFC_ADDR(CONFIG_SYS_IMMR + 0x0053)
#define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x0056)
#define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x0057)
diff --git a/arch/arm/include/asm/arch-ls102xa/ns_access.h
b/arch/arm/include/asm/arch-ls102xa/ns_access.h
new file mode 100644
index 000..b53f699
--- /dev/null
+++ b/arch/arm/include/asm/arch-ls102xa/ns_access.h
@@ -0,0 +1,118 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __FSL_NS_ACCESS_H_
+#define __FSL_NS_ACCESS_H_
+
+enum csu_cslx_access {
+ CSU_NS_SUP_R = 0x08,
+ CSU_NS_SUP_W = 0x80,
+ CSU_NS_SUP_RW = 0x88,
+ CSU_NS_USER_R = 0x04,
+ CSU_NS_USER_W = 0x40,
+ CSU_NS_USER_RW = 0x44,
+ CSU_S_SUP_R = 0x02,
+ CSU_S_SUP_W = 0x20,
+ CSU_S_SUP_RW = 0x22,
+ CSU_S_USER_R = 0x01,
+ CSU_S_USER_W = 0x10,
+ CSU_S_USER_RW = 0x11,
+ CSU_ALL_RW = 0xff,
+};
+
+enum csu_cslx_ind {
+ CSU_CSLX_PCIE2_IO = 0,
+ CSU_CSLX_PCIE1_IO,
+ CSU_CSLX_MG2TPR_IP,
+ CSU_CSLX_IFC_MEM,
+ CSU_CSLX_OCRAM,
+ CSU_CSLX_GIC,
+ CSU_CSLX_PCIE1,
+ CSU_CSLX_OCRAM2,
+ CSU_CSLX_QSPI_MEM,
+ CSU_CSLX_PCIE2,
+ CSU_CSLX_SATA,
+ CSU_CSLX_USB3,
+ CSU_CSLX_SERDES = 32,
+ CSU_CSLX_QDMA,
+ CSU_CSLX_LPUART2,
+ CSU_CSLX_LPUART1,
+ CSU_CSLX_LPUART4,
+ CSU_CSLX_LPUART3,
+ CSU_CSLX_LPUART6,
+ CSU_CSLX_LPUART5,
+ CSU_CSLX_DSPI2 = 40,
+ CSU_CSLX_DSPI1,
+ CSU_CSLX_QSPI,
+ CSU_CSLX_ESDHC,
+ CSU_CSLX_2D_ACE,
+ CSU_CSLX_IFC,
+ CSU_CSLX_I2C1,
+ CSU_CSLX_USB2,
+ CSU_CSLX_I2C3,
+ CSU_CSLX_I2C2,
+ CSU_CSLX_DUART2 = 50,
+ CSU_CSLX_DUART1,
+ CSU_CSLX_WDT2,
+ CSU_CSLX_WDT1,
+ CSU_CSLX_EDMA,
+ CSU_CSLX_SYS_CNT,
+ CSU_CSLX_DMA_MUX2,
+ CSU_CSLX_DMA_MUX1,
+ CSU_CSLX_DDR,
+ CSU_CSLX_QUICC,
+ CSU_CSLX_DCFG_CCU_RCPM = 60,
+ CSU_CSLX_SECURE_BOOTROM,
+ CSU_CSLX_SFP,
+ CSU_CSLX_TMU,
+ CSU_CSLX_SECURE_MONITOR,
+ CSU_CSLX_RESERVED0,
+ CSU_CSLX_ETSEC1,
+ CSU_CSLX_SEC5_5,
+ CSU_CSLX_ETSEC3,
+ CSU_CSLX_ETSEC2,
+ CSU_CSLX_GPIO2 = 70,
+ CSU_CSLX_GPIO1,
+ CSU_CSLX_GPIO4,
+ CSU_CSLX_GPIO3,
+ CSU_CSLX_PLATFORM_CONT,
+ CSU_CSLX_CSU,
+ CSU_CSLX_ASRC,
+ CSU_CSLX_SPDIF,
+ CSU_CSLX_FLEXCAN2,
+ CSU_CSLX_FLEXCAN1,
+ CSU_CSLX_FLEXCAN4 = 80,
+ CSU_CSLX_FLEXCAN3,
+ CSU_CSLX_SAI2,
+ CSU_CSLX_SAI1,
+ CSU_CSLX_SAI4,
+ CSU_CSLX_SAI3,
+ CSU_CSLX_FTM2,
+ CSU_CSLX_FTM1,
+ CSU_CSLX_FTM4,
+ CSU_CSLX_FTM3,
+ CSU_CSLX_FTM6 = 90,
+ CSU_CSLX_FTM5,
+ CSU_CSLX_FTM8,
+ CSU_CSLX_FTM7,
+ CSU_CSLX_COP_DCSR,
+ CSU_CSLX_EPU,
+ CSU_CSLX_GDI,
+ CSU_CSLX_DDI,
+ CSU_CSLX_RESERVED1,
+ CSU_CSLX_USB3_PHY = 117,
+ CSU_CSLX_RESERVED2,
+ CSU_CSLX_MAX,
+};
+
+struct csu_ns_dev {
+ unsigned long ind;
+ uint32_t val;
+};
+
+void enable_devices_ns_access(struct csu_ns_dev *ns_dev, uint32_t num);
+
+#endif
diff --git a/board/freescale/
[U-Boot] [PATCH v3 5/5] ARM: ls102xa: Setting device's stream id for SMMUs.
LS1 has 4 SMMUs for address translation of the masters. All the
SMMUs' stream IDs are 8-bit. The address translation depends on the
stream ID of the incoming transaction.
Each master has unique stream ID assigned to it and is configurable
through SCFG registers. The stream ID for the masters is identical
and share the same register field of STREAM ID registers.
Signed-off-by: Xiubo Li
---
.../include/asm/arch-ls102xa/ls102xa_stream_id.h| 17 +
board/freescale/common/Makefile | 2 ++
board/freescale/common/ls102xa_stream_id.c | 18 ++
board/freescale/ls1021aqds/ls1021aqds.c | 21 +
board/freescale/ls1021atwr/ls1021atwr.c | 21 +
include/configs/ls1021aqds.h| 2 ++
include/configs/ls1021atwr.h| 2 ++
7 files changed, 83 insertions(+)
create mode 100644 arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h
create mode 100644 board/freescale/common/ls102xa_stream_id.c
diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h
b/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h
new file mode 100644
index 000..abd70fc
--- /dev/null
+++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __FSL_LS102XA_STREAM_ID_H_
+#define __FSL_LS102XA_STREAM_ID_H_
+
+struct smmu_stream_id {
+ uint16_t offset;
+ uint16_t stream_id;
+ char dev_name[32];
+};
+
+void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num);
+#endif
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index e5aad2d..2cf3963 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -54,6 +54,8 @@ obj-$(CONFIG_VSC_CROSSBAR)+= vsc3316_3308.o
obj-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o
obj-$(CONFIG_ZM7300) += zm7300.o
+obj-$(CONFIG_LS102XA_STREAM_ID)+= ls102xa_stream_id.o
+
# deal with common files for P-series corenet based devices
obj-$(CONFIG_P2041RDB) += p_corenet/
obj-$(CONFIG_P3041DS) += p_corenet/
diff --git a/board/freescale/common/ls102xa_stream_id.c
b/board/freescale/common/ls102xa_stream_id.c
new file mode 100644
index 000..6154c9c
--- /dev/null
+++ b/board/freescale/common/ls102xa_stream_id.c
@@ -0,0 +1,18 @@
+/*
+ * Copyright 2014 Freescale Semiconductor
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num)
+{
+ uint32_t *scfg = (uint32_t *)CONFIG_SYS_FSL_SCFG_ADDR;
+ int i;
+
+ for (i = 0; i < num; i++)
+ out_be32(scfg + id[i].offset, id[i].stream_id);
+}
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c
b/board/freescale/ls1021aqds/ls1021aqds.c
index 07df7d2..dba0190 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -300,6 +301,23 @@ static struct csu_ns_dev ns_dev[] = {
};
#endif
+struct smmu_stream_id dev_stream_id[] = {
+ { 0x100, 0x01, "ETSEC MAC1" },
+ { 0x104, 0x02, "ETSEC MAC2" },
+ { 0x108, 0x03, "ETSEC MAC3" },
+ { 0x10c, 0x04, "PEX1" },
+ { 0x110, 0x05, "PEX2" },
+ { 0x114, 0x06, "qDMA" },
+ { 0x118, 0x07, "SATA" },
+ { 0x11c, 0x08, "USB3" },
+ { 0x120, 0x09, "QE" },
+ { 0x124, 0x0a, "eSDHC" },
+ { 0x128, 0x0b, "eMA" },
+ { 0x14c, 0x0c, "2D-ACE" },
+ { 0x150, 0x0d, "USB2" },
+ { 0x18c, 0x0e, "DEBUG" },
+};
+
int board_init(void)
{
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
@@ -315,6 +333,9 @@ int board_init(void)
config_serdes_mux();
#endif
+ ls102xa_config_smmu_stream_id(dev_stream_id,
+ ARRAY_SIZE(dev_stream_id));
+
#ifdef CONFIG_SYS_FSL_CSU_ADDR
enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev));
#endif
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c
b/board/freescale/ls1021atwr/ls1021atwr.c
index c4d3600..a1978e8 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -357,6 +358,23 @@ static struct csu_ns_dev ns_dev[] = {
};
#endif
+struct smmu_stream_id dev_stream_id[] = {
+ { 0x100, 0x01, "ETSEC MAC1" },
+ { 0x104, 0x02, "ETSEC MAC2" },
+ { 0x108, 0x03, "ETSEC MAC3" },
+ { 0x10c, 0x04, "PEX1" },
+ { 0x110, 0x05, "PEX2" },
+ { 0x114, 0x06, "qDMA" },
+ { 0x118, 0x07, "SATA" },
+ { 0x11c, 0x08, "USB3" },
+ { 0x120, 0x09, "QE" },
+ { 0x124, 0x0a, "eSDHC" },
+ { 0x128, 0x0
[U-Boot] [PATCH v3 1/5] ARM: HYP/non-sec: add the pen address BE mode support.
For some SoCs, the pen address register maybe in BE mode and the CPUs are in LE mode. This patch adds BE mode support for smp pen address. Signed-off-by: Xiubo Li --- arch/arm/cpu/armv7/nonsec_virt.S | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 745670e..1ab5d54 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -191,6 +191,9 @@ ENTRY(smp_waitloop) wfi ldr r1, =CONFIG_SMP_PEN_ADDR@ load start address ldr r1, [r1] +#ifdef CONFIG_PEN_ADDR_BIG_ENDIAN + rev r1, r1 +#endif cmp r0, r1 @ make sure we dont execute this code beq smp_waitloop@ again (due to a spurious wakeup) mov r0, r1 -- 2.1.0.27.g96db324 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Mini Summit 2014 Followup / Transcript of Open Discussion
Hi Detlev On 10/17/2014 05:02 PM, Detlev Zundel wrote: > Hi, > > it was a pleasure for me to meet so many of you this Monday in > Düsseldorf at the ELCE. As many as 17 current custodians and 2 > prospective new custodians were present at the event: > > Hans de Goede - Sunxi > Alexey Brodkin - ARC > Marek Vasut - USB > Scott Wood - NAND > Joe Hershberger - Networking > Anatolij Gustschin - Video > Heiko Schocher - I2C > Stefano Babic - ARM i.MX > Stefan Roese - PowerPC 4xx, CFI flash > Wolfgang Denk - PowerPC 8xx, 82xx, 85xx, 5xxx, 7xx, 74xx > Lukasz Majewski - DFU, OneNAND > Tom Rini - Master of the git tree > Pantelis Antoniou - MMC > Daniel Schwierzek - MIPS > Masahiro Yamada - Uniphier, Kconfig / Kbuild > Simon Glass - x86, Driver model, patman, buildman > Nobuhiro Iwamatsu - SH architecture > Vince Bridgers - SoCFPGA (soon) > Przemyslaw Marczak - PMIC (soon) Not for full day but + Michal Simek - Microblaze architecture, ARM Zynq > > The six talks gave rise to a lot of good discussions and the > presentation slides are now up on the wiki page[1]. > > The page is topped with a picture of the participants of the discussion > round in the evening. I started adding the names of the people that > gave me explicit approval to do so but I would like to extend this list > somewhat further. Whenever there is an NA without a question mark, then > I know the name and will fill it in when I get the approval. If there > is a question mark behind it then I'm unsure and would be glad to get > some help _in addition_ to the approval ;) Feel free to identify me. > > As promised, here are my notes that I took during the evening > discussion - feel free to follow-up on individual items by cutting out > the rest of the mail: > > 8<-8<- > > * Open Discussion > > ** ARM core vs ARM SoC custodianship > > Collection of patches should go to mainline in one bunch, rather than > splitting them for every custodian repository. Individual custodians > can ack parts of such a series. This should be the default - custodians > should only pick up individual bits when those bits are pretty isolated. I don't think this was an agreement to be honest. Merge early and merge often is golden rule for new SoCs. None is simply working on NAND when you don't have core SoC support or serial console. It means preferred way is to merge sensible patch series from start and then extend it to the drivers exactly how you do your SoC bringup. If you have bigger series touching some areas you need to get ack from custodian or you can be asked to split that series. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] config: MPC837X : Add complete USB EHCI support
Add complete USB EHCI support for MPC837XEMDS and MPC837XERDB Signed-off-by: Nikhil Badola --- include/configs/MPC837XEMDS.h | 5 + include/configs/MPC837XERDB.h | 5 + 2 files changed, 10 insertions(+) diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 695e47b..832c10f 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -387,6 +387,11 @@ extern int board_pci_host_broken(void); #define CONFIG_PQ_MDS_PIB 1 /* PQ MDS Platform IO Board */ #define CONFIG_HAS_FSL_DR_USB 1 /* fixup device tree for the DR USB */ +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_PCI_PNP /* do pci plug-and-play */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 1d1f4c0..8ed0f7c 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -685,6 +685,11 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_HAS_FSL_DR_USB +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_NETDEV "eth1" -- 1.7.11.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3][v2] drivers: usb: Make usb device-tree fixup code architecture independent
move usb device tree fixup code from "arch/powerpc/" to "drivers/usb/"
so that it works independent of architecture it is running on
Signed-off-by: Ramneek Mehresh
Signed-off-by: Nikhil Badola
---
Changes for v2 :
- Fixed compilation error for Platforms with
CONFIG_USB_MAX_CONTROLLER_COUNT not defined
- Depends on https://patchwork.ozlabs.org/patch/401063/
arch/powerpc/cpu/mpc8xxx/fdt.c | 104 -
drivers/usb/host/ehci-fsl.c| 113 +
2 files changed, 113 insertions(+), 104 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index 4cec5e1..65fde3f 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -73,110 +73,6 @@ void ft_fixup_num_cores(void *blob) {
}
#endif /* defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) */
-#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
-static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
- const char *phy_type, int start_offset)
-{
- const char *compat_dr = "fsl-usb2-dr";
- const char *compat_mph = "fsl-usb2-mph";
- const char *prop_mode = "dr_mode";
- const char *prop_type = "phy_type";
- const char *node_type = NULL;
- int node_offset;
- int err;
-
- node_offset = fdt_node_offset_by_compatible(blob,
- start_offset, compat_mph);
- if (node_offset < 0) {
- node_offset = fdt_node_offset_by_compatible(blob,
- start_offset, compat_dr);
- if (node_offset < 0) {
- printf("WARNING: could not find compatible"
- " node %s or %s: %s.\n", compat_mph,
- compat_dr, fdt_strerror(node_offset));
- return -1;
- } else
- node_type = compat_dr;
- } else
- node_type = compat_mph;
-
- if (mode) {
- err = fdt_setprop(blob, node_offset, prop_mode, mode,
- strlen(mode) + 1);
- if (err < 0)
- printf("WARNING: could not set %s for %s: %s.\n",
- prop_mode, node_type, fdt_strerror(err));
- }
-
- if (phy_type) {
- err = fdt_setprop(blob, node_offset, prop_type, phy_type,
- strlen(phy_type) + 1);
- if (err < 0)
- printf("WARNING: could not set %s for %s: %s.\n",
- prop_type, node_type, fdt_strerror(err));
- }
-
- return node_offset;
-}
-
-void fdt_fixup_dr_usb(void *blob, bd_t *bd)
-{
- const char *modes[] = { "host", "peripheral", "otg" };
- const char *phys[] = { "ulpi", "utmi" };
- int usb_mode_off = -1;
- int usb_phy_off = -1;
- char str[5];
- int i, j;
-
- for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
- const char *dr_mode_type = NULL;
- const char *dr_phy_type = NULL;
- int mode_idx = -1, phy_idx = -1;
- snprintf(str, 5, "%s%d", "usb", i);
- if (hwconfig(str)) {
- for (j = 0; j < ARRAY_SIZE(modes); j++) {
- if (hwconfig_subarg_cmp(str, "dr_mode",
- modes[j])) {
- mode_idx = j;
- break;
- }
- }
-
- for (j = 0; j < ARRAY_SIZE(phys); j++) {
- if (hwconfig_subarg_cmp(str, "phy_type",
- phys[j])) {
- phy_idx = j;
- break;
- }
- }
-
- if (mode_idx < 0 && phy_idx < 0) {
- printf("WARNING: invalid phy or mode\n");
- return;
- }
-
- if (mode_idx > -1)
- dr_mode_type = modes[mode_idx];
-
- if (phy_idx > -1)
- dr_phy_type = phys[phy_idx];
- }
-
- usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
- dr_mode_type, NULL, usb_mode_off);
-
- if (usb_mode_off < 0)
- return;
-
- usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
- NULL, dr_phy_type, usb_phy_off);
-
- if (usb_phy_off < 0)
- return;
- }
-}
-#endif /* defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) */
-
/*
* update crypto node proper
[U-Boot] [PATCH] ARM: UniPhier: make pinmon command optional
Add CONFIG_CMD_PINMON to UniPhier-specific Kconfig and make the "pinmon" command user-configurable. This command can be disabled via the configuration if users do not need it. Signed-off-by: Masahiro Yamada --- arch/arm/cpu/armv7/uniphier/Kconfig | 9 + arch/arm/cpu/armv7/uniphier/Makefile | 2 +- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig b/arch/arm/cpu/armv7/uniphier/Kconfig index 34f5496..8906f64 100644 --- a/arch/arm/cpu/armv7/uniphier/Kconfig +++ b/arch/arm/cpu/armv7/uniphier/Kconfig @@ -29,4 +29,13 @@ config MACH_PH1_SLD8 endchoice +config CMD_PINMON + bool "Enable boot mode pins monitor command" + depends on !SPL_BUILD + default y + help + The command "pinmon" shows the state of the boot mode pins. + The boot mode pins are latched when the system reset is deasserted + and determine which device the system should load a boot image from. + endmenu diff --git a/arch/arm/cpu/armv7/uniphier/Makefile b/arch/arm/cpu/armv7/uniphier/Makefile index 7ceddda..dd57469 100644 --- a/arch/arm/cpu/armv7/uniphier/Makefile +++ b/arch/arm/cpu/armv7/uniphier/Makefile @@ -12,7 +12,7 @@ obj-y += dram_init.o obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o obj-$(CONFIG_UNIPHIER_SMP) += smp.o -obj-$(if $(CONFIG_SPL_BUILD),,y) += cmd_pinmon.o +obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o obj-y += board_common.o obj-$(CONFIG_PFC_MICRO_SUPPORT_CARD) += support_card.o -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2][v2] powerpc/t2080qds: fix for 1000BASE-KX
From: Shaohui Xie
1000BASE-KX(1G-KX) uses SGMII protocol but the serdes lane runs in 1G-KX
mode. By default, the lane runs in SGMII mode, when a MAC uses a lane
in 1G-KX mode, corresponding bit in PCCR1 for the lane needs to be set,
and needs to fixup dtb accordingly for kernel to do proper initialization.
Hwconfig "fsl_1gkx" is used to indicate a MAC runs in 1G-KX mode, FM1 MAC
1/2/5/6/9/10 are available for 1G-KX, MAC 3/4 run in RGMII mode. To set a
MAC runs in 1G-KX mode, set its' corresponding env in "fsl_1gkx",
'fm1_1g1' stands for FM1-MAC1, 'fm1_1g2' stands for FM1-MAC2, etc.
If all MAC 1/2/5/6/9/10 run in 1G-KX mode, the hwconfig should has below
setting:
fsl_1gkx:fm1_1g1,fm1_1g2,fm1_1g5,fm1_1g6,fm1_1g9,fm1_1g10
Signed-off-by: Shaohui Xie
---
changes for V2:
- add 1G-KX description in t208xqds README.
- refined commit message.
board/freescale/t208xqds/README | 12 +
board/freescale/t208xqds/eth_t208xqds.c | 86 +
2 files changed, 98 insertions(+)
diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README
index e3eb5ba..83060c1 100755
--- a/board/freescale/t208xqds/README
+++ b/board/freescale/t208xqds/README
@@ -104,6 +104,18 @@ XFI:
set "fsl_10gkr_copper:fm1_10g1,fm1_10g2" in hwconfig, then first two
XFI ports will use copper cable, the other two XFI ports will use fiber
cable.
+1000BASE-KX(1G-KX):
+ - T2080QDS can support 1G-KX by using SGMII protocol, but serdes lane
+ runs in 1G-KX mode. By default, the lane runs in SGMII mode, to set a lane
+ in 1G-KX mode, need to set corresponding bit in SerDes Protocol Configuration
+ Register 1 (PCCR1), and U-boot fixup the dtb for kernel to do proper
+ initialization.
+ Hwconfig "fsl_1gkx" is used to indicate a lane runs in 1G-KX mode, MAC
+ 1/2/5/6/9/10 are available for 1G-KX, MAC 3/4 run in RGMII mode. To set a
+ MAC to use 1G-KX mode, set its' corresponding env in "fsl_1gkx", 'fm1_1g1'
+ stands for MAC 1, 'fm1_1g2' stands for MAC 2, etc.
+ For ex. set "fsl_1gkx:fm1_1g1,fm1_1g2,fm1_1g5,fm1_1g6,fm1_1g9,fm1_1g10" in
+ hwconfig, MAC 1/2/5/6/9/10 will use 1G-KX mode.
System Memory map
diff --git a/board/freescale/t208xqds/eth_t208xqds.c
b/board/freescale/t208xqds/eth_t208xqds.c
index 8675dbb..b3a4317 100644
--- a/board/freescale/t208xqds/eth_t208xqds.c
+++ b/board/freescale/t208xqds/eth_t208xqds.c
@@ -47,6 +47,15 @@
#define EMI2 8
#endif
+#define PCCR1_SGMIIA_KX_MASK 0x8000
+#define PCCR1_SGMIIB_KX_MASK 0x4000
+#define PCCR1_SGMIIC_KX_MASK 0x2000
+#define PCCR1_SGMIID_KX_MASK 0x1000
+#define PCCR1_SGMIIE_KX_MASK 0x0800
+#define PCCR1_SGMIIF_KX_MASK 0x0400
+#define PCCR1_SGMIIG_KX_MASK 0x0200
+#define PCCR1_SGMIIH_KX_MASK 0x0100
+
static int mdio_mux[NUM_FM_PORTS];
static const char * const mdio_names[] = {
@@ -195,6 +204,10 @@ void board_ft_fman_fixup_port(void *fdt, char *compat,
phys_addr_t addr,
int off;
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ serdes_corenet_t *srds_regs =
+ (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
+ u32 srds1_pccr1 = in_be32(&srds_regs->srdspccr1);
+
u32 srds_s1 = in_be32(&gur->rcwsr[4]) &
FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
@@ -205,9 +218,54 @@ void board_ft_fman_fixup_port(void *fdt, char *compat,
phys_addr_t addr,
switch (port) {
#if defined(CONFIG_T2080QDS)
case FM1_DTSEC1:
+ if (hwconfig_sub("fsl_1gkx", "fm1_1g1")) {
+ media_type = 1;
+ fdt_set_phy_handle(fdt, compat, addr,
+ "phy_1gkx1");
+ fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio1");
+ sprintf(buf, "%s%s%s", buf, "lane-c,",
+ (char *)lane_mode[0]);
+ out_be32(&srds_regs->srdspccr1, srds1_pccr1 |
+PCCR1_SGMIIH_KX_MASK);
+ break;
+ }
case FM1_DTSEC2:
+ if (hwconfig_sub("fsl_1gkx", "fm1_1g2")) {
+ media_type = 1;
+ fdt_set_phy_handle(fdt, compat, addr,
+ "phy_1gkx2");
+ fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio2");
+ sprintf(buf, "%s%s%s", buf, "lane-d,",
+ (char *)lane_mode[0]);
+ out_be32(&srds_regs->srdspccr1, srds1_pccr1 |
+PCCR1_SGMIIG_KX_MASK);
+ break;
+ }
case FM1_DTS
[U-Boot] [PATCH 1/2][v2] powerpc/t2080qds: fixup dtb for 10g-kr
XFI ports on t2080qds can work with fiber cable and direct attach
cable(copper). We use hwconfig to define cable type for XFI, and fixup
dtb based on the cable type.
For copper cable, set below env in hwconfig:
fsl_10gkr_copper:<10g_mac_name>
the <10g_mac_name> can be fm1_10g1, fm1_10g2, fm1_10g3, fm1_10g4.
fm1_10g1 stands for FM1-MAC9, fm1_10g2 stands for FM1-MAC10, fm1_10g3
stands for FM1-MAC1, fm1_10g4 stands for FM1-MAC2. The four
<10g_mac_name>s do not have to be coexist in hwconfig. For XFI ports, if
a given 10G port will use the copper cable for 10GBASE-KR, set the
<10g_mac_name> of the port in hwconfig, otherwise, fiber cable will be
assumed to be used for the port.
For ex. if four XFI ports will both use copper cable, the hwconfig
should contain:
fsl_10gkr_copper:fm1_10g1,fm1_10g2,fm1_10g3,fm1_10g4
Signed-off-by: Shaohui Xie
---
changes for V2:
add XFI description in t208xqds README.
board/freescale/t208xqds/README | 23 -
board/freescale/t208xqds/eth_t208xqds.c | 86 +
2 files changed, 98 insertions(+), 11 deletions(-)
diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README
index e05a10f..e3eb5ba 100755
--- a/board/freescale/t208xqds/README
+++ b/board/freescale/t208xqds/README
@@ -85,10 +85,29 @@ System Logic:
- QIXIS-II FPGA system controll
Debug Features:
- Support Legacy, COP/JTAG, Aurora, Event and EVT
-
+XFI:
+ - XFI is supported on T2080QDS through Lane A/B/C/D on Serdes 1 routed to
+ a on-board SFP+ cages, which to house optical module (fiber cable) or
+ direct attach cable(copper), the copper cable is used to emulate
+ 10GBASE-KR scenario.
+ So, for XFI usage, there are two scenarios, one will use fiber cable,
+ another will use copper cable. An hwconfig env "fsl_10gkr_copper" is
+ introduced to indicate a XFI port will use copper cable, and U-boot
+ will fixup the dtb accordingly.
+ It's used as: fsl_10gkr_copper:<10g_mac_name>
+ The <10g_mac_name> can be fm1_10g1, fm1_10g2, fm1_10g3, fm1_10g4, they
+ do not have to be coexist in hwconfig. If a MAC is listed in the env
+ "fsl_10gkr_copper", it will use copper cable, otherwise, fiber cable
+ will be used by default.
+ for ex. set "fsl_10gkr_copper:fm1_10g1,fm1_10g2,fm1_10g3,fm1_10g4" in
+ hwconfig, then both four XFI ports will use copper cable.
+ set "fsl_10gkr_copper:fm1_10g1,fm1_10g2" in hwconfig, then first two
+ XFI ports will use copper cable, the other two XFI ports will use fiber
+ cable.
System Memory map
--
+
+
Start Address End Address DescriptionSize
0xF_FFDF_ 0xF_FFDF_0FFFIFC - CPLD 4KB
0xF_FF80_ 0xF_FF80_IFC - NAND Flash 64KB
diff --git a/board/freescale/t208xqds/eth_t208xqds.c
b/board/freescale/t208xqds/eth_t208xqds.c
index 5879198..8675dbb 100644
--- a/board/freescale/t208xqds/eth_t208xqds.c
+++ b/board/freescale/t208xqds/eth_t208xqds.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include "../common/qixis.h"
#include "../common/fman.h"
#include "t208xqds_qixis.h"
@@ -187,7 +188,12 @@ void board_ft_fman_fixup_port(void *fdt, char *compat,
phys_addr_t addr,
{
int phy;
char alias[20];
+ char lane_mode[2][20] = {"1000BASE-KX", "10GBASE-KR"};
+ char buf[32] = "serdes-1,";
struct fixed_link f_link;
+ int media_type = 0;
+ int off;
+
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u32 srds_s1 = in_be32(&gur->rcwsr[4]) &
FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
@@ -265,15 +271,77 @@ void board_ft_fman_fixup_port(void *fdt, char *compat,
phys_addr_t addr,
case 0x6c:
case 0x6d:
case 0x71:
- f_link.phy_id = port;
- f_link.duplex = 1;
- f_link.link_speed = 1;
- f_link.pause = 0;
- f_link.asym_pause = 0;
- /* no PHY for XFI */
- fdt_delprop(fdt, offset, "phy-handle");
- fdt_setprop(fdt, offset, "fixed-link", &f_link,
- sizeof(f_link));
+ /*
+ * if the 10G is XFI, check hwconfig to see what is the
+ * media type, there are two types, fiber or copper,
+ * fix the dtb accordingly.
+ */
+ switch (port) {
+ case FM1_10GEC1:
+ if (hwconfig_sub("fsl_10gkr_copper", "fm1_10g1")) {
+ /* it's MAC9 */
+ media_type = 1;
+ fdt_set_phy_handle(fdt, compat, addr,
+ "phy_xfi9");
+ fdt_status_okay_by_alias(fdt, "xfi_pcs_mdio9");
+
Re: [U-Boot] [PATCH 1/7] spi: altera: Use struct-based register access
On 20 October 2014 00:13, Marek Vasut wrote:
> Zap the offset-based register access and use the struct-based one
> as this is the preferred method.
>
> No functional change, but there are some line-over-80 problems in
> the driver, which will be addressed later.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Albert Aribaud
> Cc: Tom Rini
> Cc: Wolfgang Denk
> Cc: Pavel Machek
> Cc: Jagannadha Sutradharudu Teki
> ---
> drivers/spi/altera_spi.c | 49
>
> 1 file changed, 25 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
> index 5accbb5..13191f3 100644
> --- a/drivers/spi/altera_spi.c
> +++ b/drivers/spi/altera_spi.c
> @@ -12,11 +12,14 @@
> #include
> #include
>
> -#define ALTERA_SPI_RXDATA 0
> -#define ALTERA_SPI_TXDATA 4
> -#define ALTERA_SPI_STATUS 8
> -#define ALTERA_SPI_CONTROL 12
> -#define ALTERA_SPI_SLAVE_SEL 20
> +struct altera_spi_regs {
> + u32 rxdata;
> + u32 txdata;
> + u32 status;
> + u32 control;
> + u32 _reserved;
> + u32 slave_sel;
> +};
Can you place this structure definition below of all macro defines, i
don't think the
next level patches does that, does they?
>
> #define ALTERA_SPI_STATUS_ROE_MSK (0x8)
> #define ALTERA_SPI_STATUS_TOE_MSK (0x10)
> @@ -39,8 +42,8 @@
> static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;
>
> struct altera_spi_slave {
> - struct spi_slave slave;
> - ulong base;
> + struct spi_slaveslave;
> + struct altera_spi_regs *regs;
> };
> #define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave,
> slave)
>
> @@ -54,16 +57,16 @@ __attribute__((weak))
> void spi_cs_activate(struct spi_slave *slave)
> {
> struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
> - writel(1 << slave->cs, altspi->base + ALTERA_SPI_SLAVE_SEL);
> - writel(ALTERA_SPI_CONTROL_SSO_MSK, altspi->base + ALTERA_SPI_CONTROL);
> + writel(1 << slave->cs, &altspi->regs->slave_sel);
> + writel(ALTERA_SPI_CONTROL_SSO_MSK, &altspi->regs->control);
> }
>
> __attribute__((weak))
> void spi_cs_deactivate(struct spi_slave *slave)
> {
> struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
> - writel(0, altspi->base + ALTERA_SPI_CONTROL);
> - writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);
> + writel(0, &altspi->regs->control);
> + writel(0, &altspi->regs->slave_sel);
> }
>
> void spi_init(void)
> @@ -87,9 +90,9 @@ struct spi_slave *spi_setup_slave(unsigned int bus,
> unsigned int cs,
> if (!altspi)
> return NULL;
>
> - altspi->base = altera_spi_base_list[bus];
> - debug("%s: bus:%i cs:%i base:%lx\n", __func__,
> - bus, cs, altspi->base);
> + altspi->regs = (struct altera_spi_regs *)altera_spi_base_list[bus];
> + debug("%s: bus:%i cs:%i base:%p\n", __func__,
> + bus, cs, altspi->regs);
>
> return &altspi->slave;
> }
> @@ -105,8 +108,8 @@ int spi_claim_bus(struct spi_slave *slave)
> struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
>
> debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
> - writel(0, altspi->base + ALTERA_SPI_CONTROL);
> - writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);
> + writel(0, &altspi->regs->control);
> + writel(0, &altspi->regs->slave_sel);
> return 0;
> }
>
> @@ -115,7 +118,7 @@ void spi_release_bus(struct spi_slave *slave)
> struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
>
> debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
> - writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);
> + writel(0, &altspi->regs->slave_sel);
> }
>
> #ifndef CONFIG_ALTERA_SPI_IDLE_VAL
> @@ -142,20 +145,18 @@ int spi_xfer(struct spi_slave *slave, unsigned int
> bitlen, const void *dout,
> }
>
> /* empty read buffer */
> - if (readl(altspi->base + ALTERA_SPI_STATUS) &
> - ALTERA_SPI_STATUS_RRDY_MSK)
> - readl(altspi->base + ALTERA_SPI_RXDATA);
> + if (readl(&altspi->regs->status) & ALTERA_SPI_STATUS_RRDY_MSK)
> + readl(&altspi->regs->rxdata);
> if (flags & SPI_XFER_BEGIN)
> spi_cs_activate(slave);
>
> while (bytes--) {
> uchar d = txp ? *txp++ : CONFIG_ALTERA_SPI_IDLE_VAL;
> debug("%s: tx:%x ", __func__, d);
> - writel(d, altspi->base + ALTERA_SPI_TXDATA);
> - while (!(readl(altspi->base + ALTERA_SPI_STATUS) &
> -ALTERA_SPI_STATUS_RRDY_MSK))
> + writel(d, &altspi->regs->txdata);
> + while (!(readl(&altspi->regs->status) &
> ALTERA_SPI_STATUS_RRDY_MSK))
> ;
> - d = readl(altspi->
Re: [U-Boot] [PATCH v9 0/12] Enable driver model for GPIOs on Tegra and Exynos
Hello Simon, Everything seems fine, but there some issues. In last days I tried to run my Odroid with SD card and the card is not detected, then I found few things, that should be fixed. Please follow other patch comments. On 10/15/2014 10:37 AM, Simon Glass wrote: (Note: Tegra patches have been applied, I am resending with exynos only) Now that driver model is part of U-Boot, the task of converting drivers over to it begins. GPIO is one of the easiest to convert, since it already has a sandbox driver and a uclass driver. The Tegra GPIO driver is relatively simple since it has a linear numbering and already uses the generic GPIO framework. Each GPIO bank has a separate device. Some arguments have been made that a single device should support all the GPIO banks, but currently the driver model uclass does not work that way and it would require a second-level data structure to handle the bank feature. This driver has been tested on: - Seaboard (Tegra 20) - Beaver (Tegra 30) - Jetson-TK1 (Tegra 124). I don't have a Tegra 114 board (Dalmore seems to be the only one with U-Boot support) but I am quite confident that it works. For exynos, the pinctrl device tree files are brought in from the kernel and cut down to remove the groupings which we don't yet use. Very small additions are made to avoid replicating the awful tables that Linux has for every exynos SoC. This series sits on top of the exynos refactors. The 'gpio' command is updated to support display of only the allocated GPIOs. This is much more friendly than displaying a large table. A few related clean-ups are provided as well. This series is available at u-boot-dm.git, branch working. Changes in v9: - Change compatible string to s5pc110-pinctrl for s5p_goni - Add missing compatible strings from exynos_gpio_ids[] Changes in v8: - Adjust odroid device tree file to use #include instead of /include/ - Add missing special case reg property for exynos5420 GPX0 - Add patch containing pinctrl settings for s5p_goni - Add patch containing pinctrl settings for s5p_goni - Add new patch to move smdkc100 to generic board - Add new patch to move s5p_goni to generic board - Enable driver model for smdkc100 and s5p_goni separately Changes in v7: - Bring in patches from the SPI series to move post-reloc DM init earlier Changes in v6: - Fix typo in compatible string - Remove exynos5420.dtsi which is not used in U-Boot - Move U-Boot changes into their own file - Use exynos54xx everywhere instead of exynos5420 Changes in v5: - Put this patch before the others to avoid breaking bisectability - Add additional gpio_request() calls for other samsung boards - Use a mask instead of division in gpio_request() naming call - Remove RFC label now that build errors are fixed - Tidy up and update cover letter message - Avoid reordering functions Changes in v4: - Add patches for exynos GPIO support Simon Glass (12): dm: exynos: dts: Convert /include/ to #include dm: exynos: Bring in pinctrl dts files from Linux kernel dm: exynos: dts: Remove unused pinctrl information to save space dm: exynos: dts: Adjust device tree files for U-Boot dm: exynos: Add pinctrl settings for smdkc100 dm: exynos: Add pinctrl settings for s5p_goni dm: exynos: Move smdkc100 to generic board dm: exynos: Move s5p_goni to generic board dm: exynos: Tidy up GPIO headers dm: exynos: Tidy up GPIO defines dm: exynos: Make sure that GPIOs are requested dm: exynos: gpio: Convert to driver model arch/arm/cpu/armv7/exynos/pinmux.c | 5 +- arch/arm/dts/exynos4.dtsi | 9 +- arch/arm/dts/exynos4210-origen.dts | 4 +- arch/arm/dts/exynos4210-pinctrl-uboot.dtsi | 27 ++ arch/arm/dts/exynos4210-pinctrl.dtsi | 306 arch/arm/dts/exynos4210-smdkv310.dts | 2 +- arch/arm/dts/exynos4210-trats.dts | 2 +- arch/arm/dts/exynos4210-universal_c210.dts | 2 +- arch/arm/dts/exynos4210.dtsi | 155 ++ arch/arm/dts/exynos4412-odroid.dts | 2 +- arch/arm/dts/exynos4412-trats2.dts | 2 +- arch/arm/dts/exynos4412.dtsi | 38 +++ arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 46 +++ arch/arm/dts/exynos4x12-pinctrl.dtsi | 346 ++ arch/arm/dts/exynos4x12.dtsi | 114 arch/arm/dts/exynos5.dtsi | 56 +++- arch/arm/dts/exynos5250-pinctrl-uboot.dtsi | 40 +++ arch/arm/dts/exynos5250-pinctrl.dtsi | 333 + arch/arm/dts/exynos5250-smdk5250.dts | 2 +- arch/arm/dts/exynos5250-snow.dts | 2 +- arch/arm/dts/exynos5250.dtsi | 40 ++- arch/arm/dts/exynos5420-peach-pit.dts | 2 +- arch/arm/dts/exynos5420-smdk5420.dts | 2 +- arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi | 40 +++ arch/arm/dts/exynos54xx-pinctrl.dtsi | 305 arch/arm/dts/exynos54xx.dtsi | 44
Re: [U-Boot] [PATCH v9 04/12] dm: exynos: dts: Adjust device tree files for U-Boot
Hello Simon,
On 10/15/2014 10:37 AM, Simon Glass wrote:
The pinctrl bindings used by Linux are an incomplete description of the
hardware. It is possible in most cases to determine the register address
of each, but not in all cases. By adding an additional property we can
fix this, and avoid adding a table to U-Boot for every single Exynos
SOC.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v8:
- Add missing special case reg property for exynos5420 GPX0
Changes in v7: None
Changes in v6:
- Move U-Boot changes into their own file
- Use exynos54xx everywhere instead of exynos5420
Changes in v5: None
Changes in v4: None
arch/arm/dts/exynos4210-pinctrl-uboot.dtsi | 27 ++
arch/arm/dts/exynos4210-pinctrl.dtsi | 2 ++
arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 46 ++
arch/arm/dts/exynos4x12-pinctrl.dtsi | 2 ++
arch/arm/dts/exynos5250-pinctrl-uboot.dtsi | 40 ++
arch/arm/dts/exynos5250-pinctrl.dtsi | 2 ++
arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi | 40 ++
arch/arm/dts/exynos54xx-pinctrl.dtsi | 2 ++
arch/arm/dts/exynos54xx.dtsi | 1 +
9 files changed, 162 insertions(+)
create mode 100644 arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
create mode 100644 arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
create mode 100644 arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
create mode 100644 arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
... snip ...
diff --git a/arch/arm/dts/exynos4210-pinctrl.dtsi
b/arch/arm/dts/exynos4210-pinctrl.dtsi
index bda17f7..87f162b 100644
--- a/arch/arm/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/dts/exynos4210-pinctrl.dtsi
@@ -14,6 +14,8 @@
* published by the Free Software Foundation.
*/
+#include "exynos4210-pinctrl-uboot.dtsi"
+
/ {
pinctrl@1140 {
gpa0: gpa0 {
diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
new file mode 100644
index 000..c02796d
--- /dev/null
+++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
@@ -0,0 +1,46 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ pinctrl_0: pinctrl@1140 {
+ #address-cells = <1>;
+ #size-cells = <0>;
The first issue with Exynos GPIO driver starts here. If you put pinctrl*
node data in a separated file, then the order of nodes in dtb is
changed. So for the pinctrl 0, the first subnode is gpf0, instead of
gpa0. And the same is for other pinctrls.
This means that function gpio_exynos_bind(), which expects proper
subnodes order assign wrong base addresses to some GPIO pins.
Move "reg" properties into arch/arm/dts/exynos4x12-pinctrl.dtsi fixes
this issue. But in this case, the file *-pinctrl-uboot.dtsi is quite
useless - since the cells size can be moved to pinctrl.dtsi too.
This probably will touch all *pinctrl-uboot.dtsi files.
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Re: [U-Boot] [PATCH v9 12/12] dm: exynos: gpio: Convert to driver model
Hello Simon,
On 10/15/2014 10:38 AM, Simon Glass wrote:
Convert the exynos GPIO driver to driver model. This implements the generic
GPIO interface but not the extra Exynos-specific functions.
Signed-off-by: Simon Glass
---
Changes in v9:
- Add missing compatible strings from exynos_gpio_ids[]
Changes in v8:
- Enable driver model for smdkc100 and s5p_goni separately
Changes in v7:
- Bring in patches from the SPI series to move post-reloc DM init earlier
Changes in v6: None
Changes in v5:
- Remove RFC label now that build errors are fixed
- Tidy up and update cover letter message
- Avoid reordering functions
Changes in v4:
- Add patches for exynos GPIO support
drivers/gpio/s5p_gpio.c | 424 +++-
include/configs/exynos-common.h | 4 +
include/configs/s5p_goni.h | 3 +
include/configs/smdkc100.h | 3 +
4 files changed, 298 insertions(+), 136 deletions(-)
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 99f2dd8..13d74eb 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -6,8 +6,15 @@
*/
..snip..
+/**
+ * We have a top-level GPIO device with no actual GPIOs. It has a child
+ * device for each Exynos GPIO bank.
+ */
+static int gpio_exynos_bind(struct udevice *parent)
+{
+ struct exynos_gpio_platdata *plat = parent->platdata;
+ struct s5p_gpio_bank *bank, *base;
+ const void *blob = gd->fdt_blob;
+ int node;
+
+ /* If this is a child device, there is nothing to do here */
+ if (plat)
+ return 0;
+
+ base = (struct s5p_gpio_bank *)fdtdec_get_addr(gd->fdt_blob,
+ parent->of_offset, "reg");
+ for (node = fdt_first_subnode(blob, parent->of_offset), bank = base;
+node > 0;
+node = fdt_next_subnode(blob, node), bank++) {
Here (bank++) you assume, that order of subnodes of each pinctrl is the
same like in dts file - as I wrote in comment to patch 04 - it isn't.
+ struct exynos_gpio_platdata *plat;
+ struct udevice *dev;
+ fdt_addr_t reg;
+ int ret;
+
+ if (!fdtdec_get_bool(blob, node, "gpio-controller"))
+ continue;
+ plat = calloc(1, sizeof(*plat));
+ if (!plat)
+ return -ENOMEM;
Some parts of GPIO banks, for which "reg" can be found are prober.
+ reg = fdtdec_get_addr(blob, node, "reg");
+ if (reg != FDT_ADDR_T_NONE)
+ bank = (struct s5p_gpio_bank *)((ulong)base + reg);
+ plat->bank = bank;
+ plat->bank_name = fdt_get_name(blob, node, NULL);
+ debug("dev at %p: %s\n", bank, plat->bank_name);
+
+ ret = device_bind(parent, parent->driver,
+ plat->bank_name, plat, -1, &dev);
+ if (ret)
+ return ret;
+ dev->of_offset = parent->of_offset;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id exynos_gpio_ids[] = {
+ { .compatible = "samsung,s5pc100-pinctrl" },
+ { .compatible = "samsung,s5pc110-pinctrl" },
+ { .compatible = "samsung,exynos4210-pinctrl" },
+ { .compatible = "samsung,exynos4x12-pinctrl" },
+ { .compatible = "samsung,exynos5250-pinctrl" },
+ { .compatible = "samsung,exynos5420-pinctrl" },
+ { }
... snip ...
And this is not the end of issues:)
Unfortunately Exynos4xxx has a gaps in GPIO bank address space, and the
big gpio enum lists includes that here:
arch/arm/include/asm/arch-exynos/gpio.h
This works for Exynos5, because it's enum list is linear.
And the driver gpio-uclass.c - assumes that the gpio numbers are linear.
When I removed the gaps in enum for 4x12 -then gpio is mapped good.
And after remove the enum gaps, it also requires fitting the gpios in
dts files, e.g. cd-gpio, pwr-gpios for sdhci host.
Sorry for such late reply in v9 but, before it seems working fine - I
didn't try to check the sd card before.
I hope that after that fixes, everything will work fine:)
Best Regards,
--
Przemyslaw Marczak
Samsung R&D Institute Poland
Samsung Electronics
p.marc...@samsung.com
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[U-Boot] [PATCH 0/3] DM9000 support for multiple interfaces
This is a rework of the DM9000 driver to support registering interfaces dynamically (i.e. determine how many ethernet chips we have at boot and register 0, 1, 2, or more). It was tested on a yet-to-be-submitted board which is based on the PXA270 + 0, 1, or 2 DM9000 chips. To maintain backwards compatibility with older board files, we add a new initialize function taking the io address, data address, and availability of a SROM chip. The old initialize function is now a shim around this new initialize function but provides the parameters based on the old DM9000 preprocessor symbols. I have compile-tested this on all the arm-based boards. Cc: Joe Hershberger Andrew Ruder (3): dm9000: mark dump_regs() function as unused dm9000: Add struct eth_device * to SROM functions dm9000: rework dm9000 to support multiple devices board/trizepsiv/eeprom.c | 5 +- drivers/net/dm9000x.c| 382 +++ include/dm9000.h | 8 +- include/netdev.h | 1 + 4 files changed, 224 insertions(+), 172 deletions(-) -- 2.1.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] dm9000: Add struct eth_device * to SROM functions
Currently this argument is not used. To eventually support multiple
DM9000's these public-facing functions will need a new argument - the
ethernet device. Fix-up the one board using this part of the DM9000
API. Compile-tested only.
Signed-off-by: Andrew Ruder
Cc: Joe Hershberger
Cc: Stefano Babic
---
board/trizepsiv/eeprom.c | 5 +++--
drivers/net/dm9000x.c| 10 +-
include/dm9000.h | 8
3 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/board/trizepsiv/eeprom.c b/board/trizepsiv/eeprom.c
index 1318edc..d9045dd 100644
--- a/board/trizepsiv/eeprom.c
+++ b/board/trizepsiv/eeprom.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
static int do_read_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char
* const argv[]) {
unsigned int i;
@@ -16,7 +17,7 @@ static int do_read_dm9000_eeprom ( cmd_tbl_t *cmdtp, int
flag, int argc, char *
for (i=0; i < 0x40; i++) {
if (!(i % 0x10))
printf("\n%08x:", i);
- dm9000_read_srom_word(i, data);
+ dm9000_read_srom_word(eth_get_dev_by_index(0), i, data);
printf(" %02x%02x", data[1], data[0]);
}
printf ("\n");
@@ -35,7 +36,7 @@ static int do_write_dm9000_eeprom ( cmd_tbl_t *cmdtp, int
flag, int argc, char *
printf("Wrong offset : 0x%x\n",offset);
return cmd_usage(cmdtp);
}
- dm9000_write_srom_word(offset, value);
+ dm9000_write_srom_word(eth_get_dev_by_index(0), offset, value);
return (0);
}
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index 50a36f3..230f368 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -534,9 +534,9 @@ static int dm9000_rx(struct eth_device *netdev)
/*
Read a word data from SROM
*/
-#if !defined(CONFIG_DM9000_NO_SROM)
-void dm9000_read_srom_word(int offset, u8 *to)
+void dm9000_read_srom_word(struct eth_device *dev, int offset, u8 *to)
{
+ (void)dev;
DM9000_iow(DM9000_EPAR, offset);
DM9000_iow(DM9000_EPCR, 0x4);
udelay(8000);
@@ -545,8 +545,9 @@ void dm9000_read_srom_word(int offset, u8 *to)
to[1] = DM9000_ior(DM9000_EPDRH);
}
-void dm9000_write_srom_word(int offset, u16 val)
+void dm9000_write_srom_word(struct eth_device *dev, int offset, u16 val)
{
+ (void)dev;
DM9000_iow(DM9000_EPAR, offset);
DM9000_iow(DM9000_EPDRH, ((val >> 8) & 0xff));
DM9000_iow(DM9000_EPDRL, (val & 0xff));
@@ -554,14 +555,13 @@ void dm9000_write_srom_word(int offset, u16 val)
udelay(8000);
DM9000_iow(DM9000_EPCR, 0);
}
-#endif
static void dm9000_get_enetaddr(struct eth_device *dev)
{
#if !defined(CONFIG_DM9000_NO_SROM)
int i;
for (i = 0; i < 3; i++)
- dm9000_read_srom_word(i, dev->enetaddr + (2 * i));
+ dm9000_read_srom_word(dev, i, dev->enetaddr + (2 * i));
#endif
}
diff --git a/include/dm9000.h b/include/dm9000.h
index 42b04fa..825c32a 100644
--- a/include/dm9000.h
+++ b/include/dm9000.h
@@ -8,10 +8,10 @@
#ifndef __DM9000_H__
#define __DM9000_H__
+struct eth_device;
+
/** function prototypes **/
-#if !defined(CONFIG_DM9000_NO_SROM)
-void dm9000_write_srom_word(int offset, u16 val);
-void dm9000_read_srom_word(int offset, u8 *to);
-#endif
+void dm9000_write_srom_word(struct eth_device *dev, int offset, u16 val);
+void dm9000_read_srom_word(struct eth_device *dev, int offset, u8 *to);
#endif /* __DM9000_H__ */
--
2.1.1
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[U-Boot] [PATCH 1/3] dm9000: mark dump_regs() function as unused
dump_regs() is a handy function to keep around for bringing up a new
dm9000-based board, but defining CONFIG_DM9000_DEBUG only adds the
function - nowhere currently uses it. Rather than remove a potentially
useful function, let's just tell gcc to not emit a warning when it is
unused.
Signed-off-by: Andrew Ruder
Cc: Joe Hershberger
---
drivers/net/dm9000x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index 4de9d41..50a36f3 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -126,7 +126,7 @@ static void DM9000_iow(int reg, u8 value);
#ifdef CONFIG_DM9000_DEBUG
static void
-dump_regs(void)
+dump_regs(void) __attribute__ ((unused))
{
DM9000_DBG("\n");
DM9000_DBG("NCR (0x00): %02x\n", DM9000_ior(0));
--
2.1.1
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[U-Boot] [PATCH 3/3] dm9000: rework dm9000 to support multiple devices
The DM9000 was hard-coded to only support one DM9000 device. This patch
adds a new initialization function - dm9000_initialize_ex() - to support
registering multiple (and possibly dynamic) numbers of dm9000 devices.
This patch consists of:
* Change the board_info struct to a private struct under eth_device.
* Add io address/data address/srom availability information to this
private struct.
* Replace all uses of DM9000_IO/DM9000_DATA with new members, ensure
that the eth_device struct propagates down to all helper functions.
* Make dm9000_initialize() call dm9000_initialize_ex() with filled
in information from the old preprocessor symbols (DM9000_IO,
DM9000_DATA, etc.)
Overall the following parameters have been moved over to being a
per-chip setting:
DM9000_IO, DM9000_DATA, CONFIG_DM9000_NO_SROM
while the following is still a global setting affecting all chips:
CONFIG_DM9000_BYTE_SWAPPED
And the following has been removed entirely:
CONFIG_DM9000_BASE (was only used in a single printf)
Signed-off-by: Andrew Ruder
Cc: Joe Hershberger
---
drivers/net/dm9000x.c | 378 --
include/netdev.h | 1 +
2 files changed, 215 insertions(+), 164 deletions(-)
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index 230f368..2ed3121 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -55,6 +55,7 @@ TODO: external MII is not functional, only internal at the
moment.
#include
#include
#include
+#include
#include "dm9000x.h"
@@ -80,7 +81,9 @@ TODO: external MII is not functional, only internal at the
moment.
#endif
/* Structure/enum declaration --- */
-typedef struct board_info {
+struct dm9000_priv {
+ ulong data_base;
+ ulong io_base;
u32 runt_length_counter;/* counter: RX length < 64byte */
u32 long_length_counter;/* counter: RX length > 1514byte */
u32 reset_counter; /* counter: RESET */
@@ -89,23 +92,22 @@ typedef struct board_info {
u16 tx_pkt_cnt;
u16 queue_start_addr;
u16 dbug_cnt;
+ u8 has_srom;
u8 phy_addr;
u8 device_wait_reset; /* device state */
unsigned char srom[128];
- void (*outblk)(volatile void *data_ptr, int count);
- void (*inblk)(void *data_ptr, int count);
- void (*rx_status)(u16 *RxStatus, u16 *RxLen);
- struct eth_device netdev;
-} board_info_t;
-static board_info_t dm9000_info;
+ void (*outblk)(struct eth_device *dev, volatile void *data_ptr, int
count);
+ void (*inblk)(struct eth_device *dev, void *data_ptr, int count);
+ void (*rx_status)(struct eth_device *dev, u16 *RxStatus, u16 *RxLen);
+};
/* function declaration - */
-static int dm9000_probe(void);
-static u16 dm9000_phy_read(int);
-static void dm9000_phy_write(int, u16);
-static u8 DM9000_ior(int);
-static void DM9000_iow(int reg, u8 value);
+static int dm9000_probe(struct eth_device *);
+static u16 dm9000_phy_read(struct eth_device *, int);
+static void dm9000_phy_write(struct eth_device *, int, u16);
+static u8 DM9000_ior(struct eth_device *, int);
+static void DM9000_iow(struct eth_device *, int reg, u8 value);
/* DM9000 network board routine */
#ifndef CONFIG_DM9000_BYTE_SWAPPED
@@ -126,125 +128,138 @@ static void DM9000_iow(int reg, u8 value);
#ifdef CONFIG_DM9000_DEBUG
static void
-dump_regs(void) __attribute__ ((unused))
+dump_regs(struct eth_device *dev) __attribute__ ((unused))
{
DM9000_DBG("\n");
- DM9000_DBG("NCR (0x00): %02x\n", DM9000_ior(0));
- DM9000_DBG("NSR (0x01): %02x\n", DM9000_ior(1));
- DM9000_DBG("TCR (0x02): %02x\n", DM9000_ior(2));
- DM9000_DBG("TSRI (0x03): %02x\n", DM9000_ior(3));
- DM9000_DBG("TSRII (0x04): %02x\n", DM9000_ior(4));
- DM9000_DBG("RCR (0x05): %02x\n", DM9000_ior(5));
- DM9000_DBG("RSR (0x06): %02x\n", DM9000_ior(6));
- DM9000_DBG("ISR (0xFE): %02x\n", DM9000_ior(DM9000_ISR));
+ DM9000_DBG("NCR (0x00): %02x\n", DM9000_ior(dev, 0));
+ DM9000_DBG("NSR (0x01): %02x\n", DM9000_ior(dev, 1));
+ DM9000_DBG("TCR (0x02): %02x\n", DM9000_ior(dev, 2));
+ DM9000_DBG("TSRI (0x03): %02x\n", DM9000_ior(dev, 3));
+ DM9000_DBG("TSRII (0x04): %02x\n", DM9000_ior(dev, 4));
+ DM9000_DBG("RCR (0x05): %02x\n", DM9000_ior(dev, 5));
+ DM9000_DBG("RSR (0x06): %02x\n", DM9000_ior(dev, 6));
+ DM9000_DBG("ISR (0xFE): %02x\n", DM9000_ior(dev, DM9000_ISR));
DM9000_DBG("\n");
}
#endif
-static void dm9000_outblk_8bit(volatile void *data_ptr, int count)
+static void dm9000_outblk_8bit(struct eth_device *dev, volatile void
*data_ptr, int count)
{
int i;
+ struct dm9000_priv *priv = dev->priv;
for (i = 0; i < count; i++)
- DM9000_outbu8 *) data_ptr)[i]
Re: [U-Boot] [PATCH 4/7] spi: altera: Zap endless loop
On 20 October 2014 00:13, Marek Vasut wrote:
> The driver contained an endless loop when waiting for TX completion,
> this is a bad idea since if the hardware fails, the loop might spin
> forever. Add timeout and handle it.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Albert Aribaud
> Cc: Tom Rini
> Cc: Wolfgang Denk
> Cc: Pavel Machek
> Cc: Jagannadha Sutradharudu Teki
> ---
> drivers/spi/altera_spi.c | 14 --
> 1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
> index 373ce30..ee65ec2 100644
> --- a/drivers/spi/altera_spi.c
> +++ b/drivers/spi/altera_spi.c
> @@ -129,6 +129,8 @@ int spi_xfer(struct spi_slave *slave, unsigned int
> bitlen, const void *dout,
> uint bytes = bitlen / 8;
> const uchar *txp = dout;
> uchar *rxp = din;
> + int timeout = 1;
This could be macro definable.
> + uint32_t reg;
>
> debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
> slave->bus, slave->cs, bitlen, bytes, flags);
> @@ -154,8 +156,16 @@ int spi_xfer(struct spi_slave *slave, unsigned int
> bitlen, const void *dout,
> debug("%s: tx:%x ", __func__, d);
> writel(d, &altspi->regs->txdata);
>
> - while (!(readl(&altspi->regs->status) &
> ALTERA_SPI_STATUS_RRDY_MSK))
> - ;
> + while (--timeout) {
> + reg = readl(&altspi->regs->status);
> + if (reg & ALTERA_SPI_STATUS_RRDY_MSK)
> + break;
> + }
> +
> + if (!timeout) {
> + printf("%s: Transmission timed out!\n", __func__);
> + goto done;
> + }
It's better to use tx status check with the help of get_timer()
instead of normal while loop.
Pls- use the same, we have some drivers who does the same.
>
> d = readl(&altspi->regs->rxdata);
> if (rxp)
> --
> 2.1.1
>
thanks!
--
Jagan.
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Re: [U-Boot] [PATCH 6/7] spi: altera: Add short note about EPCS/EPCQx1
On 20 October 2014 00:13, Marek Vasut wrote: > Add short documentation-alike note on how to use the Altera SPI > driver with the EPCS/EPCQx1 FPGA IP block on SoCFPGA Cyclone V. > > Signed-off-by: Marek Vasut > Cc: Chin Liang See > Cc: Dinh Nguyen > Cc: Albert Aribaud > Cc: Tom Rini > Cc: Wolfgang Denk > Cc: Pavel Machek > Cc: Jagannadha Sutradharudu Teki > --- > drivers/spi/altera_spi.c | 8 > 1 file changed, 8 insertions(+) > > diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c > index 3065e96..0566e4f 100644 > --- a/drivers/spi/altera_spi.c > +++ b/drivers/spi/altera_spi.c > @@ -4,6 +4,14 @@ > * based on bfin_spi.c > * Copyright (c) 2005-2008 Analog Devices Inc. > * Copyright (C) 2010 Thomas Chou > + * Copyright (C) 2014 Marek Vasut Looks not good to me - with few changes. > + * > + * SoCFPGA EPCS/EPCQx1 mini howto: > + * - Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild > + * - The controller base address is the "Base" in QSys + 0x400 > + * - Set MSEL[4:0]=10010 (AS Standard) > + * - Load the bitstream into FPGA, enable bridges > + * - Only then will the driver work Instead of here, Pls- try to test any hardware with this written sequence with the obtained logs copy that info on doc/SPI we're maintaining the test in this format. Testing the written sequence with logs are more authentic than listing on a driver file. > * > * SPDX-License-Identifier:GPL-2.0+ > */ > -- > 2.1.1 > thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/14] dm: omap: Provide access to driver model for am335x, and move boards
On Tue, Oct 14, 2014 at 09:26:51AM +0200, Simon Glass wrote: > Hi, > > On 22 September 2014 17:48, Simon Glass wrote: > > This series adjusts the serial and GPIO drivers, used by Beaglebone for > > example, to work with driver model. Since there are still boards using > > these drivers but not driver model, this adds new functionality rather > > than replacing what exists. > > > > Several patches tweak and fix the existing driver model serial and GPIO > > implementation. > > > > There are two Beaglebone Black configurations: > > > > - Device tree control with verified boot > > - No device tree control > > > > The first uses device tree to select the serial console and provide > > information needed by the serial driver (similar to how things work on > > Tegra). The second uses platform data provided by a common board file. > > > > Both are converted, so this is a good example of how to support both device > > tree and platform data if needed. > > Are there any comments on this series please? As part of settling back into the groove, I need to fire these up on my am335x boards and go from there. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-boot] [Patch v4 2/6] keystone2: clock: add K2L clock definitions and commands
On Wed, Oct 15, 2014 at 02:55:28AM +0300, Ivan Khoronzhuk wrote:
> From: Hao Zhang
>
> This patch adds clock definitions and commands to support Keystone II
> K2L SOC.
>
> Acked-by: Vitaly Andrianov
> Signed-off-by: Hao Zhang
> Signed-off-by: Ivan Khoronzhuk
[snip]
> diff --git a/arch/arm/cpu/armv7/keystone/cmd_clock.c
> b/arch/arm/cpu/armv7/keystone/cmd_clock.c
> index d97c95b..9204887 100644
> --- a/arch/arm/cpu/armv7/keystone/cmd_clock.c
> +++ b/arch/arm/cpu/armv7/keystone/cmd_clock.c
> @@ -72,6 +72,13 @@ U_BOOT_CMD(
> " \n"
> );
> #endif
> +#ifdef CONFIG_SOC_K2L
> +U_BOOT_CMD(
> + pllset, 5, 0, do_pll_cmd,
> + "set pll multiplier and pre divider",
> + " \n"
> +);
> +#endif
>
> int do_getclk_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
> {
> @@ -101,6 +108,9 @@ U_BOOT_CMD(
> #ifdef CONFIG_SOC_K2E
> "See the 'enum clk_e' in the clock-k2e.h for clk indexes\n"
> #endif
> +#ifdef CONFIG_SOC_K2L
> + "See the 'enum clk_e' in the clock-k2l.h for clk indexes\n"
> +#endif
> );
I'm not going to block on all of this duplication, but we need to think
how to do this cleaner so that the next K2 variant doesn't expand this
mess further. Thanks!
--
Tom
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Re: [U-Boot] [U-boot] [Patch v4 3/6] keystone2: msmc: add MSMC cache coherency support for K2L SOC
On Wed, Oct 15, 2014 at 02:55:29AM +0300, Ivan Khoronzhuk wrote: > From: Hao Zhang > > This patch adds Keystone II Lamar (K2L) SoC specific definitions > to support MSMC cache coherency. > > Acked-by: Vitaly Andrianov > Signed-off-by: Hao Zhang > Signed-off-by: Ivan Khoronzhuk > --- > arch/arm/cpu/armv7/keystone/init.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/cpu/armv7/keystone/init.c > b/arch/arm/cpu/armv7/keystone/init.c > index a8f8aee..a0ecfa2 100644 > --- a/arch/arm/cpu/armv7/keystone/init.c > +++ b/arch/arm/cpu/armv7/keystone/init.c > @@ -32,6 +32,9 @@ int arch_cpu_init(void) > #ifdef CONFIG_SOC_K2E > msmc_share_all_segments(13); /* PCIE 1 */ > #endif > +#ifdef CONFIG_SOC_K2L > + msmc_share_all_segments(14); /* PCIE 1 */ > +#endif > > /* >* just initialise the COM2 port so that TI specific Where does 13/14 come from and can we just define what that means in a K2-foo specific header so we can always do msmc_share_all_segments(K2_MSMC_SEGMENTS_NR) or whatever? Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-boot] [Patch v4 3/6] keystone2: msmc: add MSMC cache coherency support for K2L SOC
On 10/20/2014 06:13 PM, Tom Rini wrote: On Wed, Oct 15, 2014 at 02:55:29AM +0300, Ivan Khoronzhuk wrote: From: Hao Zhang This patch adds Keystone II Lamar (K2L) SoC specific definitions to support MSMC cache coherency. Acked-by: Vitaly Andrianov Signed-off-by: Hao Zhang Signed-off-by: Ivan Khoronzhuk --- arch/arm/cpu/armv7/keystone/init.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/cpu/armv7/keystone/init.c b/arch/arm/cpu/armv7/keystone/init.c index a8f8aee..a0ecfa2 100644 --- a/arch/arm/cpu/armv7/keystone/init.c +++ b/arch/arm/cpu/armv7/keystone/init.c @@ -32,6 +32,9 @@ int arch_cpu_init(void) #ifdef CONFIG_SOC_K2E msmc_share_all_segments(13); /* PCIE 1 */ #endif +#ifdef CONFIG_SOC_K2L + msmc_share_all_segments(14); /* PCIE 1 */ +#endif /* * just initialise the COM2 port so that TI specific Where does 13/14 come from and can we just define what that means in a K2-foo specific header so we can always do msmc_share_all_segments(K2_MSMC_SEGMENTS_NR) or whatever? Thanks! Ok, I will update it. But, currently, there is newer version, [U-boot] [Patch v5 0/6] keystone2: add k2l SoC and k2l_evm board support https://www.mail-archive.com/u-boot@lists.denx.de/msg150245.html -- Regards, Ivan Khoronzhuk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] dm9000: Add struct eth_device * to SROM functions
Hi Andrew, On 20/10/2014 16:59, Andrew Ruder wrote: > Currently this argument is not used. To eventually support multiple > DM9000's these public-facing functions will need a new argument - the > ethernet device. Fix-up the one board using this part of the DM9000 > API. Compile-tested only. > > Signed-off-by: Andrew Ruder > Cc: Joe Hershberger > Cc: Stefano Babic > --- Acked-by : Stefano Babic Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: tegra: use architecture specific memcpy
On Tue, 2014-08-26 at 10:27 -0600, Stephen Warren wrote: > On Jetson TK1, this makes my "dhcp zImage" on my USB ethernet dongle got > from ~1.7MiB/s to ~2.8MiB/s :-) I just noticed this not having been applied anywhere yet. Is the tegra tree eventually gona be re-based and this being applied? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 04/12] dm: exynos: dts: Adjust device tree files for U-Boot
Hi,
On 20 October 2014 08:55, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 10/15/2014 10:37 AM, Simon Glass wrote:
>>
>> The pinctrl bindings used by Linux are an incomplete description of the
>> hardware. It is possible in most cases to determine the register address
>> of each, but not in all cases. By adding an additional property we can
>> fix this, and avoid adding a table to U-Boot for every single Exynos
>> SOC.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> Changes in v9: None
>> Changes in v8:
>> - Add missing special case reg property for exynos5420 GPX0
>>
>> Changes in v7: None
>> Changes in v6:
>> - Move U-Boot changes into their own file
>> - Use exynos54xx everywhere instead of exynos5420
>>
>> Changes in v5: None
>> Changes in v4: None
>>
>> arch/arm/dts/exynos4210-pinctrl-uboot.dtsi | 27 ++
>> arch/arm/dts/exynos4210-pinctrl.dtsi | 2 ++
>> arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 46
>> ++
>> arch/arm/dts/exynos4x12-pinctrl.dtsi | 2 ++
>> arch/arm/dts/exynos5250-pinctrl-uboot.dtsi | 40
>> ++
>> arch/arm/dts/exynos5250-pinctrl.dtsi | 2 ++
>> arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi | 40
>> ++
>> arch/arm/dts/exynos54xx-pinctrl.dtsi | 2 ++
>> arch/arm/dts/exynos54xx.dtsi | 1 +
>> 9 files changed, 162 insertions(+)
>> create mode 100644 arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
>> create mode 100644 arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
>> create mode 100644 arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
>> create mode 100644 arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
>>
>
> ... snip ...
>
>
>> diff --git a/arch/arm/dts/exynos4210-pinctrl.dtsi
>> b/arch/arm/dts/exynos4210-pinctrl.dtsi
>> index bda17f7..87f162b 100644
>> --- a/arch/arm/dts/exynos4210-pinctrl.dtsi
>> +++ b/arch/arm/dts/exynos4210-pinctrl.dtsi
>> @@ -14,6 +14,8 @@
>>* published by the Free Software Foundation.
>> */
>>
>> +#include "exynos4210-pinctrl-uboot.dtsi"
>> +
>> / {
>> pinctrl@1140 {
>> gpa0: gpa0 {
>> diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
>> b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
>> new file mode 100644
>> index 000..c02796d
>> --- /dev/null
>> +++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
>> @@ -0,0 +1,46 @@
>> +/*
>> + * U-Boot additions to enable a generic Exynos GPIO driver
>> + *
>> + * Copyright (c) 2014 Google, Inc
>> + */
>> +
>> +/{
>> + pinctrl_0: pinctrl@1140 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>
>
> The first issue with Exynos GPIO driver starts here. If you put pinctrl*
> node data in a separated file, then the order of nodes in dtb is changed. So
> for the pinctrl 0, the first subnode is gpf0, instead of gpa0. And the same
> is for other pinctrls.
>
> This means that function gpio_exynos_bind(), which expects proper subnodes
> order assign wrong base addresses to some GPIO pins.
>
> Move "reg" properties into arch/arm/dts/exynos4x12-pinctrl.dtsi fixes this
> issue. But in this case, the file *-pinctrl-uboot.dtsi is quite useless -
> since the cells size can be moved to pinctrl.dtsi too.
>
> This probably will touch all *pinctrl-uboot.dtsi files.
Yes this was a mistake in the series. I have pushed an updated series
to u-boot-dm/next. I will go through your comments as well before I
see if a new series is warranted, or just a few patch updates.
Regards,
Simon
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Re: [U-Boot] [PATCH v9 12/12] dm: exynos: gpio: Convert to driver model
Hi,
On 20 October 2014 08:55, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 10/15/2014 10:38 AM, Simon Glass wrote:
>>
>> Convert the exynos GPIO driver to driver model. This implements the
>> generic
>> GPIO interface but not the extra Exynos-specific functions.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> Changes in v9:
>> - Add missing compatible strings from exynos_gpio_ids[]
>>
>> Changes in v8:
>> - Enable driver model for smdkc100 and s5p_goni separately
>>
>> Changes in v7:
>> - Bring in patches from the SPI series to move post-reloc DM init earlier
>>
>> Changes in v6: None
>> Changes in v5:
>> - Remove RFC label now that build errors are fixed
>> - Tidy up and update cover letter message
>> - Avoid reordering functions
>>
>> Changes in v4:
>> - Add patches for exynos GPIO support
>>
>> drivers/gpio/s5p_gpio.c | 424
>> +++-
>> include/configs/exynos-common.h | 4 +
>> include/configs/s5p_goni.h | 3 +
>> include/configs/smdkc100.h | 3 +
>> 4 files changed, 298 insertions(+), 136 deletions(-)
>>
>> diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
>> index 99f2dd8..13d74eb 100644
>> --- a/drivers/gpio/s5p_gpio.c
>> +++ b/drivers/gpio/s5p_gpio.c
>> @@ -6,8 +6,15 @@
>>*/
>>
>
> ..snip..
>
>> +/**
>> + * We have a top-level GPIO device with no actual GPIOs. It has a child
>> + * device for each Exynos GPIO bank.
>> + */
>> +static int gpio_exynos_bind(struct udevice *parent)
>> +{
>> + struct exynos_gpio_platdata *plat = parent->platdata;
>> + struct s5p_gpio_bank *bank, *base;
>> + const void *blob = gd->fdt_blob;
>> + int node;
>> +
>> + /* If this is a child device, there is nothing to do here */
>> + if (plat)
>> + return 0;
>> +
>> + base = (struct s5p_gpio_bank *)fdtdec_get_addr(gd->fdt_blob,
>> + parent->of_offset,
>> "reg");
>> + for (node = fdt_first_subnode(blob, parent->of_offset), bank =
>> base;
>> +node > 0;
>> +node = fdt_next_subnode(blob, node), bank++) {
>
>
> Here (bank++) you assume, that order of subnodes of each pinctrl is the same
> like in dts file - as I wrote in comment to patch 04 - it isn't.
>
>> + struct exynos_gpio_platdata *plat;
>> + struct udevice *dev;
>> + fdt_addr_t reg;
>> + int ret;
>> +
>> + if (!fdtdec_get_bool(blob, node, "gpio-controller"))
>> + continue;
>> + plat = calloc(1, sizeof(*plat));
>> + if (!plat)
>> + return -ENOMEM;
>
>
> Some parts of GPIO banks, for which "reg" can be found are prober.
>
>
>> + reg = fdtdec_get_addr(blob, node, "reg");
>> + if (reg != FDT_ADDR_T_NONE)
>> + bank = (struct s5p_gpio_bank *)((ulong)base +
>> reg);
>> + plat->bank = bank;
>> + plat->bank_name = fdt_get_name(blob, node, NULL);
>> + debug("dev at %p: %s\n", bank, plat->bank_name);
>> +
>> + ret = device_bind(parent, parent->driver,
>> + plat->bank_name, plat, -1, &dev);
>> + if (ret)
>> + return ret;
>> + dev->of_offset = parent->of_offset;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static const struct udevice_id exynos_gpio_ids[] = {
>> + { .compatible = "samsung,s5pc100-pinctrl" },
>> + { .compatible = "samsung,s5pc110-pinctrl" },
>> + { .compatible = "samsung,exynos4210-pinctrl" },
>> + { .compatible = "samsung,exynos4x12-pinctrl" },
>> + { .compatible = "samsung,exynos5250-pinctrl" },
>> + { .compatible = "samsung,exynos5420-pinctrl" },
>> + { }
>
>
> ... snip ...
>
> And this is not the end of issues:)
>
> Unfortunately Exynos4xxx has a gaps in GPIO bank address space, and the big
> gpio enum lists includes that here:
> arch/arm/include/asm/arch-exynos/gpio.h
>
> This works for Exynos5, because it's enum list is linear.
>
> And the driver gpio-uclass.c - assumes that the gpio numbers are linear.
> When I removed the gaps in enum for 4x12 -then gpio is mapped good.
>
> And after remove the enum gaps, it also requires fitting the gpios in dts
> files, e.g. cd-gpio, pwr-gpios for sdhci host.
>
> Sorry for such late reply in v9 but, before it seems working fine - I didn't
> try to check the sd card before.
>
> I hope that after that fixes, everything will work fine:)
Thanks very much for testing this. As mentioned on the other patch,
please try u-boot-dm/next and see how things look.
Regards,
Simon
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Re: [U-Boot] [U-boot] [Patch v4 2/6] keystone2: clock: add K2L clock definitions and commands
On 10/20/2014 06:13 PM, Tom Rini wrote:
On Wed, Oct 15, 2014 at 02:55:28AM +0300, Ivan Khoronzhuk wrote:
From: Hao Zhang
This patch adds clock definitions and commands to support Keystone II
K2L SOC.
Acked-by: Vitaly Andrianov
Signed-off-by: Hao Zhang
Signed-off-by: Ivan Khoronzhuk
[snip]
diff --git a/arch/arm/cpu/armv7/keystone/cmd_clock.c
b/arch/arm/cpu/armv7/keystone/cmd_clock.c
index d97c95b..9204887 100644
--- a/arch/arm/cpu/armv7/keystone/cmd_clock.c
+++ b/arch/arm/cpu/armv7/keystone/cmd_clock.c
@@ -72,6 +72,13 @@ U_BOOT_CMD(
" \n"
);
#endif
+#ifdef CONFIG_SOC_K2L
+U_BOOT_CMD(
+ pllset, 5, 0, do_pll_cmd,
+ "set pll multiplier and pre divider",
+ " \n"
+);
+#endif
int do_getclk_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
@@ -101,6 +108,9 @@ U_BOOT_CMD(
#ifdef CONFIG_SOC_K2E
"See the 'enum clk_e' in the clock-k2e.h for clk indexes\n"
#endif
+#ifdef CONFIG_SOC_K2L
+ "See the 'enum clk_e' in the clock-k2l.h for clk indexes\n"
+#endif
);
I'm not going to block on all of this duplication, but we need to think
how to do this cleaner so that the next K2 variant doesn't expand this
mess further. Thanks!
I'll correct it to one line:
"See the 'enum clk_e' in the clock-k2*.h for clk indexes\n"
--
Regards,
Ivan Khoronzhuk
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Re: [U-Boot] [PATCH 04/19] dm: pmic: add implementation of driver model pmic uclass
Hello Simon,
I missed some of your comments.
On 10/11/2014 01:18 AM, Simon Glass wrote:
Hi,
On 10 October 2014 07:32, Przemyslaw Marczak wrote:
Hello Simon,
On 10/10/2014 05:17 AM, Simon Glass wrote:
Hi,
On 8 October 2014 14:48, Przemyslaw Marczak wrote:
This is an introduction to driver-model multi class PMIC support.
It starts with UCLASS_PMIC - a common PMIC class type for I/O, which
doesn't need to implement any specific operations and features beside
the platform data, which is the 'struct pmic_platdata' defined in file:
- 'include/power/pmic.h'
New files:
- pmic-uclass.c - provides a common code for UCLASS_PMIC drivers
- pmic_i2c.c- provides dm interface for i2c pmic drivers
- pmic_spi.c- provides dm interface for spi pmic drivers
Those files are based on a current PMIC framework files and code.
The new files are introduced to keep code readability and allow to
make an easy drivers migration. The old pmic framework is still kept
and full independent.
Changes:
- new uclass-id: UCLASS_PMIC,
- new configs: CONFIG_DM_PMIC; CONFIG_DM_PMIC_SPI; CONFIG_DM_PMIC_I2C,
New pmic api is documented in: doc/README.power-framework-dm
Signed-off-by: Przemyslaw Marczak
---
drivers/power/Makefile | 3 +
drivers/power/pmic-uclass.c | 255
drivers/power/pmic_i2c.c| 136 +++
drivers/power/pmic_spi.c| 137
include/dm/uclass-id.h | 3 +
include/power/pmic.h| 64 +++
6 files changed, 598 insertions(+)
create mode 100644 drivers/power/pmic-uclass.c
create mode 100644 drivers/power/pmic_i2c.c
create mode 100644 drivers/power/pmic_spi.c
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index dc64e4d..8def501 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -19,3 +19,6 @@ obj-$(CONFIG_DIALOG_POWER) += power_dialog.o
obj-$(CONFIG_POWER_FSL) += power_fsl.o
obj-$(CONFIG_POWER_I2C) += power_i2c.o
obj-$(CONFIG_POWER_SPI) += power_spi.o
+obj-$(CONFIG_DM_PMIC_SPI) += pmic_spi.o
+obj-$(CONFIG_DM_PMIC_I2C) += pmic_i2c.o
+obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
diff --git a/drivers/power/pmic-uclass.c b/drivers/power/pmic-uclass.c
new file mode 100644
index 000..5e8494b
--- /dev/null
+++ b/drivers/power/pmic-uclass.c
@@ -0,0 +1,255 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics
+ * Przemyslaw Marczak
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int pmic_check_reg(struct pmic_platdata *p, unsigned reg)
+{
+ if (!p)
+ return -ENODEV;
+
+ if (reg >= p->regs_num) {
+ error(" = %d is invalid. Should be less than
%d",
+ reg, p->regs_num);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+int pmic_reg_write(struct udevice *dev, unsigned reg, unsigned val)
+{
+ struct pmic_platdata *p;
+
+ p = dev_get_platdata(dev);
+ if (!p)
+ return -EPERM;
+
+ switch (p->interface) {
+ case PMIC_I2C:
+#ifdef CONFIG_DM_PMIC_I2C
+ return pmic_i2c_reg_write(dev, reg, val);
+#else
+ return -ENOSYS;
+#endif
+ case PMIC_SPI:
+#ifdef CONFIG_DM_PMIC_SPI
+ return pmic_spi_reg_write(dev, reg, val);
+#else
+ return -ENOSYS;
+#endif
Perhaps one day we should add another uclass which is some sort of
register cache. It could be implemented by I2C and SPI drivers (or
better perhaps the I2C and SPI uclasses could provide a register cache
uclass device for their main when requested).
For now this seems fine though. I think the 'return -ENOSYS' can just
go at the end of the function and appear once.
Why do we need the registers cache?
This maybe is good for a many read operations at a time in the system,
but actually I think, that it is not required for the bootloader purposes.
If we write some data - sequential, then we probably would like to check it
in the same time, e.g. update some range of I2C registers.
I don't know the Chromebook design, but how it could be useful for you?
We don't need a register cache - I was just thinking of that from the
kernel. But it feels like an interface like:
int reg_read(int reg, uint32_t *value)
int reg_write(int reg, uint32_t value)
int reg_write_range(int reg_start, int reg_count, uint32_t value[])
might be useful - it could be implemented for both I2C and SPI.
Ok, now I see.
+ default:
+ return -ENODEV;
+ }
+}
+
+int pmic_reg_read(struct udevice *dev, unsigned reg, unsigned *val)
+{
+ struct pmic_platdata *p;
+
+ p = dev_get_platdata(dev);
+ if (!p)
+ return -EPERM;
+
+ switch (p->interface) {
+ case PMIC_I2C:
+#ifdef CONFIG_DM_PMIC_I2C
+ return pmic_i2c_reg_read(dev, reg, va
Re: [U-Boot] [PATCH 06/19] dm: common: board_r: add call and weak of power_init_dm()
Hello Simon,
On 10/10/2014 05:32 AM, Simon Glass wrote:
Hi,
On 8 October 2014 14:48, Przemyslaw Marczak wrote:
This function call is required to init dm pmic framework
and drivers before call to power_init_board().
Signed-off-by: Przemyslaw Marczak
---
common/board_r.c | 8
1 file changed, 8 insertions(+)
diff --git a/common/board_r.c b/common/board_r.c
index cd92288..e574130 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -285,6 +285,11 @@ __weak int power_init_board(void)
return 0;
}
+__weak int pmic_init_dm(void)
+{
+ return 0;
+}
+
static int initr_announce(void)
{
debug("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr);
@@ -775,6 +780,9 @@ init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_ARCH_EARLY_INIT_R
arch_early_init_r,
#endif
+#ifdef CONFIG_DM_PMIC
+ pmic_init_dm,
+#endif
Can the call to init this just go in initr_dm()?
Yes, it can, but if the I2C uclass code is ready soon - then probably we
don't need this call.
power_init_board,
#ifndef CONFIG_SYS_NO_FLASH
initr_flash,
--
1.9.1
Regards,
Simon
Best regards,
--
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Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH 3/3] dm9000: rework dm9000 to support multiple devices
This one triggered a whole bunch of check-patch issues that I need to clean-up mostly due to dm9000x.c not originally meeting all of the coding conventions. I'll send a V2 of this momentarily. - Andy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/19] dm: pmic: add implementation of driver model pmic uclass
Hi,
On 20 October 2014 09:44, Przemyslaw Marczak wrote:
> Hello Simon,
>
> I missed some of your comments.
>
>
> On 10/11/2014 01:18 AM, Simon Glass wrote:
>>
>> Hi,
>>
>> On 10 October 2014 07:32, Przemyslaw Marczak
>> wrote:
>>>
>>> Hello Simon,
>>>
>>>
>>> On 10/10/2014 05:17 AM, Simon Glass wrote:
Hi,
On 8 October 2014 14:48, Przemyslaw Marczak
wrote:
>
>
> This is an introduction to driver-model multi class PMIC support.
> It starts with UCLASS_PMIC - a common PMIC class type for I/O, which
> doesn't need to implement any specific operations and features beside
> the platform data, which is the 'struct pmic_platdata' defined in file:
> - 'include/power/pmic.h'
>
> New files:
> - pmic-uclass.c - provides a common code for UCLASS_PMIC drivers
> - pmic_i2c.c- provides dm interface for i2c pmic drivers
> - pmic_spi.c- provides dm interface for spi pmic drivers
>
> Those files are based on a current PMIC framework files and code.
> The new files are introduced to keep code readability and allow to
> make an easy drivers migration. The old pmic framework is still kept
> and full independent.
>
> Changes:
> - new uclass-id: UCLASS_PMIC,
> - new configs: CONFIG_DM_PMIC; CONFIG_DM_PMIC_SPI; CONFIG_DM_PMIC_I2C,
>
> New pmic api is documented in: doc/README.power-framework-dm
>
> Signed-off-by: Przemyslaw Marczak
> ---
>drivers/power/Makefile | 3 +
>drivers/power/pmic-uclass.c | 255
>
>drivers/power/pmic_i2c.c| 136 +++
>drivers/power/pmic_spi.c| 137
>include/dm/uclass-id.h | 3 +
>include/power/pmic.h| 64 +++
>6 files changed, 598 insertions(+)
>create mode 100644 drivers/power/pmic-uclass.c
>create mode 100644 drivers/power/pmic_i2c.c
>create mode 100644 drivers/power/pmic_spi.c
>
> diff --git a/drivers/power/Makefile b/drivers/power/Makefile
> index dc64e4d..8def501 100644
> --- a/drivers/power/Makefile
> +++ b/drivers/power/Makefile
> @@ -19,3 +19,6 @@ obj-$(CONFIG_DIALOG_POWER) += power_dialog.o
>obj-$(CONFIG_POWER_FSL) += power_fsl.o
>obj-$(CONFIG_POWER_I2C) += power_i2c.o
>obj-$(CONFIG_POWER_SPI) += power_spi.o
> +obj-$(CONFIG_DM_PMIC_SPI) += pmic_spi.o
> +obj-$(CONFIG_DM_PMIC_I2C) += pmic_i2c.o
> +obj-$(CONFIG_DM_PMIC) += pmic-uclass.o
> diff --git a/drivers/power/pmic-uclass.c b/drivers/power/pmic-uclass.c
> new file mode 100644
> index 000..5e8494b
> --- /dev/null
> +++ b/drivers/power/pmic-uclass.c
> @@ -0,0 +1,255 @@
> +/*
> + * Copyright (C) 2014 Samsung Electronics
> + * Przemyslaw Marczak
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int pmic_check_reg(struct pmic_platdata *p, unsigned reg)
> +{
> + if (!p)
> + return -ENODEV;
> +
> + if (reg >= p->regs_num) {
> + error(" = %d is invalid. Should be less than
> %d",
> + reg, p->regs_num);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +int pmic_reg_write(struct udevice *dev, unsigned reg, unsigned val)
> +{
> + struct pmic_platdata *p;
> +
> + p = dev_get_platdata(dev);
> + if (!p)
> + return -EPERM;
> +
> + switch (p->interface) {
> + case PMIC_I2C:
> +#ifdef CONFIG_DM_PMIC_I2C
> + return pmic_i2c_reg_write(dev, reg, val);
> +#else
> + return -ENOSYS;
> +#endif
> + case PMIC_SPI:
> +#ifdef CONFIG_DM_PMIC_SPI
> + return pmic_spi_reg_write(dev, reg, val);
> +#else
> + return -ENOSYS;
> +#endif
Perhaps one day we should add another uclass which is some sort of
register cache. It could be implemented by I2C and SPI drivers (or
better perhaps the I2C and SPI uclasses could provide a register cache
uclass device for their main when requested).
For now this seems fine though. I think the 'return -ENOSYS' can just
go at the end of the function and appear once.
>>>
>>> Why do we need the registers cache?
>>> This maybe is good for a many read operations at a time in the system,
>>> but actually I think, that it is not required for the bootloader
>>> purposes.
>>>
>>> If we write some data - sequential, then we probably would like to check
>>> it
>>> in the sa
Re: [U-Boot] puts() and newlines (was Re: Discussion topics / issues)
On Wed, Oct 15, 2014 at 10:40:12AM +0200, Pavel Machek wrote:
> Hi!
>
> > First, we have a compatibility problem here. GCC assumes that puts()
> > will add a newline character after the string; U-Boot puts() does NOT
> > do this. So the GCC auto-converted printf()s will all be wrong, as
> > they are missing the newline. [1]
>
> > [1] One might argue that this is a bug in U-Boot and should be fixed,
> > but that is another topic.
>
> I believe we should fix that, yes.
>
> I did quick grep,
>
> pavel@duo:~/wagabuibui/u-boot$ grep -ri puts . | wc -l
> 4287
>
> and that is probably too much to change in one go. So what about this?
I'm thinking, now that we know that with $(CC) -ffreestanding printf is
not converted to puts, we should (a) globally change puts("no newline")
to printf (b) fix puts behavior to conform to standards and correct
puts("newline\n") to puts("newline"). And then let people use whatever
of the print functions they want, while we sort out making people use
debug(...) / error(...) more and come up with a clever output scheme
like we talked about in person.
--
Tom
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Re: [U-Boot] [PATCH 04/19] dm: pmic: add implementation of driver model pmic uclass
Hello, ... snip ... Thank you again. I'm going to check the i2c-working tree and maybe rebase the dm-pmic onto it. Is it good idea? Sounds good. Once I get the main DM patches landed (hopefully this week) I'll rebase the other series including I2C. But for now you should be good to use it. Regards, Simon I have also some other tasks, but I hope to check this in this week. Regards, -- Przemyslaw Marczak Samsung R&D Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-boot] [Patch v4 2/6] keystone2: clock: add K2L clock definitions and commands
On Mon, Oct 20, 2014 at 06:41:29PM +0300, Ivan Khoronzhuk wrote:
> On 10/20/2014 06:13 PM, Tom Rini wrote:
> >On Wed, Oct 15, 2014 at 02:55:28AM +0300, Ivan Khoronzhuk wrote:
> >
> >>From: Hao Zhang
> >>
> >>This patch adds clock definitions and commands to support Keystone II
> >>K2L SOC.
> >>
> >>Acked-by: Vitaly Andrianov
> >>Signed-off-by: Hao Zhang
> >>Signed-off-by: Ivan Khoronzhuk
> >[snip]
> >>diff --git a/arch/arm/cpu/armv7/keystone/cmd_clock.c
> >>b/arch/arm/cpu/armv7/keystone/cmd_clock.c
> >>index d97c95b..9204887 100644
> >>--- a/arch/arm/cpu/armv7/keystone/cmd_clock.c
> >>+++ b/arch/arm/cpu/armv7/keystone/cmd_clock.c
> >>@@ -72,6 +72,13 @@ U_BOOT_CMD(
> >>" \n"
> >> );
> >> #endif
> >>+#ifdef CONFIG_SOC_K2L
> >>+U_BOOT_CMD(
> >>+ pllset, 5, 0, do_pll_cmd,
> >>+ "set pll multiplier and pre divider",
> >>+ " \n"
> >>+);
> >>+#endif
> >> int do_getclk_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const
> >> argv[])
> >> {
> >>@@ -101,6 +108,9 @@ U_BOOT_CMD(
> >> #ifdef CONFIG_SOC_K2E
> >>"See the 'enum clk_e' in the clock-k2e.h for clk indexes\n"
> >> #endif
> >>+#ifdef CONFIG_SOC_K2L
> >>+ "See the 'enum clk_e' in the clock-k2l.h for clk indexes\n"
> >>+#endif
> >> );
> >I'm not going to block on all of this duplication, but we need to think
> >how to do this cleaner so that the next K2 variant doesn't expand this
> >mess further. Thanks!
> >
>
> I'll correct it to one line:
> "See the 'enum clk_e' in the clock-k2*.h for clk indexes\n"
That helps the second hunk, but still leaves the first. At some point,
even, we shouldn't say "go modify file foo" in the binary, that belongs
in board documentation. Like I said, this needs a little bit of
thinking.
--
Tom
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Re: [U-Boot] [PATCH v9 12/12] dm: exynos: gpio: Convert to driver model
Hello,
On 10/20/2014 05:31 PM, Simon Glass wrote:
Hi,
On 20 October 2014 08:55, Przemyslaw Marczak wrote:
Hello Simon,
On 10/15/2014 10:38 AM, Simon Glass wrote:
Convert the exynos GPIO driver to driver model. This implements the
generic
GPIO interface but not the extra Exynos-specific functions.
Signed-off-by: Simon Glass
---
Changes in v9:
- Add missing compatible strings from exynos_gpio_ids[]
Changes in v8:
- Enable driver model for smdkc100 and s5p_goni separately
Changes in v7:
- Bring in patches from the SPI series to move post-reloc DM init earlier
Changes in v6: None
Changes in v5:
- Remove RFC label now that build errors are fixed
- Tidy up and update cover letter message
- Avoid reordering functions
Changes in v4:
- Add patches for exynos GPIO support
drivers/gpio/s5p_gpio.c | 424
+++-
include/configs/exynos-common.h | 4 +
include/configs/s5p_goni.h | 3 +
include/configs/smdkc100.h | 3 +
4 files changed, 298 insertions(+), 136 deletions(-)
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 99f2dd8..13d74eb 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -6,8 +6,15 @@
*/
..snip..
+/**
+ * We have a top-level GPIO device with no actual GPIOs. It has a child
+ * device for each Exynos GPIO bank.
+ */
+static int gpio_exynos_bind(struct udevice *parent)
+{
+ struct exynos_gpio_platdata *plat = parent->platdata;
+ struct s5p_gpio_bank *bank, *base;
+ const void *blob = gd->fdt_blob;
+ int node;
+
+ /* If this is a child device, there is nothing to do here */
+ if (plat)
+ return 0;
+
+ base = (struct s5p_gpio_bank *)fdtdec_get_addr(gd->fdt_blob,
+ parent->of_offset,
"reg");
+ for (node = fdt_first_subnode(blob, parent->of_offset), bank =
base;
+node > 0;
+node = fdt_next_subnode(blob, node), bank++) {
Here (bank++) you assume, that order of subnodes of each pinctrl is the same
like in dts file - as I wrote in comment to patch 04 - it isn't.
+ struct exynos_gpio_platdata *plat;
+ struct udevice *dev;
+ fdt_addr_t reg;
+ int ret;
+
+ if (!fdtdec_get_bool(blob, node, "gpio-controller"))
+ continue;
+ plat = calloc(1, sizeof(*plat));
+ if (!plat)
+ return -ENOMEM;
Some parts of GPIO banks, for which "reg" can be found are prober.
+ reg = fdtdec_get_addr(blob, node, "reg");
+ if (reg != FDT_ADDR_T_NONE)
+ bank = (struct s5p_gpio_bank *)((ulong)base +
reg);
+ plat->bank = bank;
+ plat->bank_name = fdt_get_name(blob, node, NULL);
+ debug("dev at %p: %s\n", bank, plat->bank_name);
+
+ ret = device_bind(parent, parent->driver,
+ plat->bank_name, plat, -1, &dev);
+ if (ret)
+ return ret;
+ dev->of_offset = parent->of_offset;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id exynos_gpio_ids[] = {
+ { .compatible = "samsung,s5pc100-pinctrl" },
+ { .compatible = "samsung,s5pc110-pinctrl" },
+ { .compatible = "samsung,exynos4210-pinctrl" },
+ { .compatible = "samsung,exynos4x12-pinctrl" },
+ { .compatible = "samsung,exynos5250-pinctrl" },
+ { .compatible = "samsung,exynos5420-pinctrl" },
+ { }
... snip ...
And this is not the end of issues:)
Unfortunately Exynos4xxx has a gaps in GPIO bank address space, and the big
gpio enum lists includes that here:
arch/arm/include/asm/arch-exynos/gpio.h
This works for Exynos5, because it's enum list is linear.
And the driver gpio-uclass.c - assumes that the gpio numbers are linear.
When I removed the gaps in enum for 4x12 -then gpio is mapped good.
And after remove the enum gaps, it also requires fitting the gpios in dts
files, e.g. cd-gpio, pwr-gpios for sdhci host.
Sorry for such late reply in v9 but, before it seems working fine - I didn't
try to check the sd card before.
I hope that after that fixes, everything will work fine:)
Thanks very much for testing this. As mentioned on the other patch,
please try u-boot-dm/next and see how things look.
Regards,
Simon
No problem, it's also important for me. I will check the "next" in a
few minutes.
Regards,
--
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Samsung Electronics
p.marc...@samsung.com
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Re: [U-Boot] [PATCH v9 12/12] dm: exynos: gpio: Convert to driver model
Hello again,
On 10/20/2014 05:53 PM, Przemyslaw Marczak wrote:
Hello,
On 10/20/2014 05:31 PM, Simon Glass wrote:
Hi,
On 20 October 2014 08:55, Przemyslaw Marczak
wrote:
Hello Simon,
On 10/15/2014 10:38 AM, Simon Glass wrote:
Convert the exynos GPIO driver to driver model. This implements the
generic
GPIO interface but not the extra Exynos-specific functions.
Signed-off-by: Simon Glass
---
Changes in v9:
- Add missing compatible strings from exynos_gpio_ids[]
Changes in v8:
- Enable driver model for smdkc100 and s5p_goni separately
Changes in v7:
- Bring in patches from the SPI series to move post-reloc DM init
earlier
Changes in v6: None
Changes in v5:
- Remove RFC label now that build errors are fixed
- Tidy up and update cover letter message
- Avoid reordering functions
Changes in v4:
- Add patches for exynos GPIO support
drivers/gpio/s5p_gpio.c | 424
+++-
include/configs/exynos-common.h | 4 +
include/configs/s5p_goni.h | 3 +
include/configs/smdkc100.h | 3 +
4 files changed, 298 insertions(+), 136 deletions(-)
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 99f2dd8..13d74eb 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -6,8 +6,15 @@
*/
..snip..
+/**
+ * We have a top-level GPIO device with no actual GPIOs. It has a
child
+ * device for each Exynos GPIO bank.
+ */
+static int gpio_exynos_bind(struct udevice *parent)
+{
+ struct exynos_gpio_platdata *plat = parent->platdata;
+ struct s5p_gpio_bank *bank, *base;
+ const void *blob = gd->fdt_blob;
+ int node;
+
+ /* If this is a child device, there is nothing to do here */
+ if (plat)
+ return 0;
+
+ base = (struct s5p_gpio_bank *)fdtdec_get_addr(gd->fdt_blob,
+ parent->of_offset,
"reg");
+ for (node = fdt_first_subnode(blob, parent->of_offset), bank =
base;
+node > 0;
+node = fdt_next_subnode(blob, node), bank++) {
Here (bank++) you assume, that order of subnodes of each pinctrl is
the same
like in dts file - as I wrote in comment to patch 04 - it isn't.
+ struct exynos_gpio_platdata *plat;
+ struct udevice *dev;
+ fdt_addr_t reg;
+ int ret;
+
+ if (!fdtdec_get_bool(blob, node, "gpio-controller"))
+ continue;
+ plat = calloc(1, sizeof(*plat));
+ if (!plat)
+ return -ENOMEM;
Some parts of GPIO banks, for which "reg" can be found are prober.
+ reg = fdtdec_get_addr(blob, node, "reg");
+ if (reg != FDT_ADDR_T_NONE)
+ bank = (struct s5p_gpio_bank *)((ulong)base +
reg);
+ plat->bank = bank;
+ plat->bank_name = fdt_get_name(blob, node, NULL);
+ debug("dev at %p: %s\n", bank, plat->bank_name);
+
+ ret = device_bind(parent, parent->driver,
+ plat->bank_name, plat, -1,
&dev);
+ if (ret)
+ return ret;
+ dev->of_offset = parent->of_offset;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id exynos_gpio_ids[] = {
+ { .compatible = "samsung,s5pc100-pinctrl" },
+ { .compatible = "samsung,s5pc110-pinctrl" },
+ { .compatible = "samsung,exynos4210-pinctrl" },
+ { .compatible = "samsung,exynos4x12-pinctrl" },
+ { .compatible = "samsung,exynos5250-pinctrl" },
+ { .compatible = "samsung,exynos5420-pinctrl" },
+ { }
... snip ...
And this is not the end of issues:)
Unfortunately Exynos4xxx has a gaps in GPIO bank address space, and
the big
gpio enum lists includes that here:
arch/arm/include/asm/arch-exynos/gpio.h
This works for Exynos5, because it's enum list is linear.
And the driver gpio-uclass.c - assumes that the gpio numbers are linear.
When I removed the gaps in enum for 4x12 -then gpio is mapped good.
And after remove the enum gaps, it also requires fitting the gpios in
dts
files, e.g. cd-gpio, pwr-gpios for sdhci host.
Sorry for such late reply in v9 but, before it seems working fine - I
didn't
try to check the sd card before.
I hope that after that fixes, everything will work fine:)
Thanks very much for testing this. As mentioned on the other patch,
please try u-boot-dm/next and see how things look.
Regards,
Simon
No problem, it's also important for me. I will check the "next" in a few
minutes.
Regards,
After a quick look into the code I suppose that the issues are not
fixed, but it is tested for sure:)
So the main required changes:
1. Remove/fix all "**pinctrl-uboot.dtsi" files and move the cells size
into "pinctrl.dtsi"
2. Remove the gaps in Exynos4xxx gpio enum:
arch/arm/include/asm/arch-exynos/gpio.
and now I checked that the same is for s5pc110, here:
arch/arm/in
Re: [U-Boot] [PATCH] common/cmd_io.c: Fix incorrect help for iod/iow
Hi Bin, On 20 October 2014 02:14, Bin Meng wrote: > Signed-off-by: Bin Meng > --- > common/cmd_io.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/common/cmd_io.c b/common/cmd_io.c > index eefac36..c59148f 100644 > --- a/common/cmd_io.c > +++ b/common/cmd_io.c > @@ -70,8 +70,8 @@ int do_io_iow(cmd_tbl_t *cmdtp, int flag, int argc, char > *const argv[]) > > /**/ > U_BOOT_CMD(iod, 2, 0, do_io_iod, > - "IO space display", "[.b, .w, .l] address [# of objects]"); > + "IO space display", "[.b, .w, .l] address"); > > U_BOOT_CMD(iow, 3, 0, do_io_iow, > - "IO space modify (auto-incrementing address)", > - "[.b, .w, .l] address"); > + "IO space modify", > + "[.b, .w, .l] address value"); Acked-by: Simon Glass Are you using the coreboot support? What board are you using? Regards, SImon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: socfpga: Add I2C support to SoCFPGA
On Monday, October 20, 2014 at 08:45:48 AM, Stefan Roese wrote: Hi all, > This patch adds I2C support for the SoCFPGA. Using the designware I2C > controller driver. It supports all 4 I2C busses on the SoCFPGA. > > Signed-off-by: Stefan Roese > Cc: Marek Vasut > Cc: Vince Briders > Cc: Chin Liang See > Cc: Dinh Nguyen +CC Heiko, the I2C custodian. > --- > include/configs/socfpga_common.h | 22 ++ > 1 file changed, 22 insertions(+) > > diff --git a/include/configs/socfpga_common.h > b/include/configs/socfpga_common.h index 49504dc..ba1e072 100644 > --- a/include/configs/socfpga_common.h > +++ b/include/configs/socfpga_common.h > @@ -157,6 +157,28 @@ > #define CONFIG_BAUDRATE 115200 > > /* > + * I2C support > + */ > +#define CONFIG_HARD_I2C > +#define CONFIG_DW_I2C > +#define CONFIG_I2C_MULTI_BUS I presume this should be converted to CONFIG_SYS_I2C framework instead of using this I2C multibus horror, no? > +#define CONFIG_SYS_I2C_BUS_MAX 4 > +#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS > +#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS > +#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS > +#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS > +/* using standard mode which the speed up to 100Kb/s */ > +#define CONFIG_SYS_I2C_SPEED 10 > +/* address of device when used as slave */ > +#define CONFIG_SYS_I2C_SLAVE 0x02 > +#ifndef __ASSEMBLY__ > +/* clock supplied to I2C controller in unit of MHz */ > +unsigned int cm_get_l4_sp_clk_hz(void); Include clock_manager.h instead maybe ? > +#define IC_CLK (cm_get_l4_sp_clk_hz() / > 100) > +#endif > +#define CONFIG_CMD_I2C > + > +/* > * U-Boot environment > */ > #define CONFIG_SYS_CONSOLE_IS_IN_ENV Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/7] spi: altera: Add short note about EPCS/EPCQx1
On Monday, October 20, 2014 at 05:10:17 PM, Jagan Teki wrote: [...] > > * based on bfin_spi.c > > * Copyright (c) 2005-2008 Analog Devices Inc. > > * Copyright (C) 2010 Thomas Chou > > > > + * Copyright (C) 2014 Marek Vasut > > Looks not good to me - with few changes. > > > + * > > + * SoCFPGA EPCS/EPCQx1 mini howto: > > + * - Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild > > + * - The controller base address is the "Base" in QSys + 0x400 > > + * - Set MSEL[4:0]=10010 (AS Standard) > > + * - Load the bitstream into FPGA, enable bridges > > + * - Only then will the driver work > > Instead of here, > Pls- try to test any hardware with this written sequence with the > obtained logs copy > that info on doc/SPI we're maintaining the test in this format. > > Testing the written sequence with logs are more authentic than listing > on a driver file. Excuse me, but I don't quite understand what you're asking of me, sorry. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/25] ppc: Zap ICU862 board
On Monday, October 20, 2014 at 05:54:18 AM, Masahiro Yamada wrote: > Hi Marek, Hi! > On Mon, 20 Oct 2014 03:48:02 +0200 > > Marek Vasut wrote: > > This board is the only user of CONFIG_SYS_EEPROM_X40430 , remove > > it so the EEPROM command code can be cleansed of the related code > > as well. > > > > Signed-off-by: Marek Vasut > > Cc: Masahiro Yamada > > Cc: Tom Rini > > Cc: Wolfgang Denk > > Cc: Simon Glass > > Cc: Heiko Schocher > > Can we do this all day long? > I am happy with 01/25 thru 07/25. :-) With pleasure ;-) Scrubbing old ad-hoc stuff is really enjoyable. > There is only one item I can tell: > I know it is a tedious work, but can you > update doc/README.scrapyard, please? > It seems a rule in U-boot when dumping board supports. Ah, you're right, we have this thing. One thing I'm not sure about is how is someone supposed to determine the commit in which the board was removed before the commit was created in the upstream repository. This kinda doesn't add up to me. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/7] spi: altera: Use struct-based register access
On Monday, October 20, 2014 at 04:53:15 PM, Jagan Teki wrote:
[...]
> > -#define ALTERA_SPI_RXDATA 0
> > -#define ALTERA_SPI_TXDATA 4
> > -#define ALTERA_SPI_STATUS 8
> > -#define ALTERA_SPI_CONTROL 12
> > -#define ALTERA_SPI_SLAVE_SEL 20
> > +struct altera_spi_regs {
> > + u32 rxdata;
> > + u32 txdata;
> > + u32 status;
> > + u32 control;
> > + u32 _reserved;
> > + u32 slave_sel;
> > +};
>
> Can you place this structure definition below of all macro defines, i
> don't think the
> next level patches does that, does they?
Does it make sense to you, to first define the bits in registers and then
the register layout ? It does not make sense to me, so I would prefer to
keep it like it is.
[...]
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/7] spi: altera: Use struct-based register access
On 20 October 2014 20:40, Marek Vasut wrote:
> On Monday, October 20, 2014 at 04:53:15 PM, Jagan Teki wrote:
>
> [...]
>
>> > -#define ALTERA_SPI_RXDATA 0
>> > -#define ALTERA_SPI_TXDATA 4
>> > -#define ALTERA_SPI_STATUS 8
>> > -#define ALTERA_SPI_CONTROL 12
>> > -#define ALTERA_SPI_SLAVE_SEL 20
>> > +struct altera_spi_regs {
>> > + u32 rxdata;
>> > + u32 txdata;
>> > + u32 status;
>> > + u32 control;
>> > + u32 _reserved;
>> > + u32 slave_sel;
>> > +};
>>
>> Can you place this structure definition below of all macro defines, i
>> don't think the
>> next level patches does that, does they?
>
> Does it make sense to you, to first define the bits in registers and then
> the register layout ? It does not make sense to me, so I would prefer to
> keep it like it is.
You're correct the way you replaced, usually the driver code will go like this
-- >includes
--> macros definitions
--> global or structure definitions
--> driver function calls.
We follow this [1] to make the driver more readable.
[1] http://patchwork.ozlabs.org/patch/265683/
thanks!
--
Jagan.
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Re: [U-Boot] [PATCH v9 12/12] dm: exynos: gpio: Convert to driver model
Hi,
On 20 October 2014 10:06, Przemyslaw Marczak wrote:
> Hello again,
>
>
> On 10/20/2014 05:53 PM, Przemyslaw Marczak wrote:
>>
>> Hello,
>>
>> On 10/20/2014 05:31 PM, Simon Glass wrote:
>>>
>>> Hi,
>>>
>>> On 20 October 2014 08:55, Przemyslaw Marczak
>>> wrote:
Hello Simon,
On 10/15/2014 10:38 AM, Simon Glass wrote:
>
>
> Convert the exynos GPIO driver to driver model. This implements the
> generic
> GPIO interface but not the extra Exynos-specific functions.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v9:
> - Add missing compatible strings from exynos_gpio_ids[]
>
> Changes in v8:
> - Enable driver model for smdkc100 and s5p_goni separately
>
> Changes in v7:
> - Bring in patches from the SPI series to move post-reloc DM init
> earlier
>
> Changes in v6: None
> Changes in v5:
> - Remove RFC label now that build errors are fixed
> - Tidy up and update cover letter message
> - Avoid reordering functions
>
> Changes in v4:
> - Add patches for exynos GPIO support
>
>drivers/gpio/s5p_gpio.c | 424
> +++-
>include/configs/exynos-common.h | 4 +
>include/configs/s5p_goni.h | 3 +
>include/configs/smdkc100.h | 3 +
>4 files changed, 298 insertions(+), 136 deletions(-)
>
> diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
> index 99f2dd8..13d74eb 100644
> --- a/drivers/gpio/s5p_gpio.c
> +++ b/drivers/gpio/s5p_gpio.c
> @@ -6,8 +6,15 @@
> */
>
..snip..
> +/**
> + * We have a top-level GPIO device with no actual GPIOs. It has a
> child
> + * device for each Exynos GPIO bank.
> + */
> +static int gpio_exynos_bind(struct udevice *parent)
> +{
> + struct exynos_gpio_platdata *plat = parent->platdata;
> + struct s5p_gpio_bank *bank, *base;
> + const void *blob = gd->fdt_blob;
> + int node;
> +
> + /* If this is a child device, there is nothing to do here */
> + if (plat)
> + return 0;
> +
> + base = (struct s5p_gpio_bank *)fdtdec_get_addr(gd->fdt_blob,
> + parent->of_offset,
> "reg");
> + for (node = fdt_first_subnode(blob, parent->of_offset), bank =
> base;
> +node > 0;
> +node = fdt_next_subnode(blob, node), bank++) {
Here (bank++) you assume, that order of subnodes of each pinctrl is
the same
like in dts file - as I wrote in comment to patch 04 - it isn't.
> + struct exynos_gpio_platdata *plat;
> + struct udevice *dev;
> + fdt_addr_t reg;
> + int ret;
> +
> + if (!fdtdec_get_bool(blob, node, "gpio-controller"))
> + continue;
> + plat = calloc(1, sizeof(*plat));
> + if (!plat)
> + return -ENOMEM;
Some parts of GPIO banks, for which "reg" can be found are prober.
> + reg = fdtdec_get_addr(blob, node, "reg");
> + if (reg != FDT_ADDR_T_NONE)
> + bank = (struct s5p_gpio_bank *)((ulong)base +
> reg);
> + plat->bank = bank;
> + plat->bank_name = fdt_get_name(blob, node, NULL);
> + debug("dev at %p: %s\n", bank, plat->bank_name);
> +
> + ret = device_bind(parent, parent->driver,
> + plat->bank_name, plat, -1,
> &dev);
> + if (ret)
> + return ret;
> + dev->of_offset = parent->of_offset;
> + }
> +
> + return 0;
> +}
> +
> +static const struct udevice_id exynos_gpio_ids[] = {
> + { .compatible = "samsung,s5pc100-pinctrl" },
> + { .compatible = "samsung,s5pc110-pinctrl" },
> + { .compatible = "samsung,exynos4210-pinctrl" },
> + { .compatible = "samsung,exynos4x12-pinctrl" },
> + { .compatible = "samsung,exynos5250-pinctrl" },
> + { .compatible = "samsung,exynos5420-pinctrl" },
> + { }
... snip ...
And this is not the end of issues:)
Unfortunately Exynos4xxx has a gaps in GPIO bank address space, and
the big
gpio enum lists includes that here:
arch/arm/include/asm/arch-exynos/gpio.h
This works for Exynos5, because it's enum list is linear.
And the driver gpio-uclass.c - assumes that the gpio numbers are linear.
When I removed the gaps in enum for 4x12 -then gpio is mapped good.
And after remove the enum gaps, it also r
Re: [U-Boot] [PATCH 6/7] spi: altera: Add short note about EPCS/EPCQx1
On 20 October 2014 20:43, Marek Vasut wrote: > On Monday, October 20, 2014 at 05:10:17 PM, Jagan Teki wrote: > > [...] > >> > * based on bfin_spi.c >> > * Copyright (c) 2005-2008 Analog Devices Inc. >> > * Copyright (C) 2010 Thomas Chou >> > >> > + * Copyright (C) 2014 Marek Vasut >> >> Looks not good to me - with few changes. >> >> > + * >> > + * SoCFPGA EPCS/EPCQx1 mini howto: >> > + * - Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild >> > + * - The controller base address is the "Base" in QSys + 0x400 >> > + * - Set MSEL[4:0]=10010 (AS Standard) >> > + * - Load the bitstream into FPGA, enable bridges >> > + * - Only then will the driver work >> >> Instead of here, >> Pls- try to test any hardware with this written sequence with the >> obtained logs copy >> that info on doc/SPI we're maintaining the test in this format. >> >> Testing the written sequence with logs are more authentic than listing >> on a driver file. > > Excuse me, but I don't quite understand what you're asking of me, sorry. OK, the steps you written is looks like a usage of driver on specific module, my point here was instead of placing these into driver file try to verify the same steps on hardware with the help of simple spi tests and place the same file on doc/SPI/ . It's a well showed prof that this driver is working with this kind of steps. thanks! -- Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/3] arm: odroid: pmic77686: allow bucket voltage settings
Allow to set the bucket voltage for the max77686.
This will be used to reset the SMC LAN9730 ethernet on the odroids.
Signed-off-by: Suriyan Ramasami
---
drivers/power/pmic/pmic_max77686.c | 48 +-
include/power/max77686_pmic.h | 3 +++
2 files changed, 50 insertions(+), 1 deletion(-)
diff --git a/drivers/power/pmic/pmic_max77686.c
b/drivers/power/pmic/pmic_max77686.c
index df1fd91..1aeadb4 100644
--- a/drivers/power/pmic/pmic_max77686.c
+++ b/drivers/power/pmic/pmic_max77686.c
@@ -42,6 +42,25 @@ static unsigned int max77686_ldo_volt2hex(int ldo, ulong uV)
return 0;
}
+static unsigned int max77686_buck_volt2hex(int buck, ulong uV)
+{
+ unsigned int hex = 0;
+
+ if (buck < 5 || buck > 9) {
+ debug("%s: buck %d is not supported\n", __func__, buck);
+ return 0;
+ }
+
+ hex = (uV - 75) / 5;
+
+ if (hex >= 0 && hex <= MAX77686_BUCK_VOLT_MAX_HEX)
+ return hex;
+
+ debug("%s: %ld is wrong voltage value for BUCK%d\n",
+ __func__, uV, buck);
+ return MAX77686_BUCK_VOLT_MAX_HEX + 1;
+}
+
int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV)
{
unsigned int val, ret, hex, adr;
@@ -68,6 +87,33 @@ int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong
uV)
return ret;
}
+int max77686_set_buck_voltage(struct pmic *p, int buck, ulong uV)
+{
+ unsigned int val, ret, hex, adr;
+
+ if (buck < 5 && buck > 9) {
+ printf("%s: %d is an unsupported bucket number\n",
+ __func__, buck);
+ return -1;
+ }
+
+ adr = max77686_buck_addr[buck] + 1;
+ hex = max77686_buck_volt2hex(buck, uV);
+
+ if (hex == MAX77686_BUCK_VOLT_MAX_HEX + 1)
+ return -1;
+
+ ret = pmic_reg_read(p, adr, &val);
+ if (ret)
+ return ret;
+
+ val &= ~MAX77686_BUCK_VOLT_MASK;
+ val |= hex;
+ ret |= pmic_reg_write(p, adr, val);
+
+ return ret;
+}
+
int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode)
{
unsigned int val, ret, adr, mode;
@@ -157,7 +203,7 @@ int max77686_set_buck_mode(struct pmic *p, int buck, char
opmode)
/* mode */
switch (opmode) {
case OPMODE_OFF:
- mode = MAX77686_BUCK_MODE_OFF;
+ mode = MAX77686_BUCK_MODE_OFF << mode_shift;
break;
case OPMODE_STANDBY:
switch (buck) {
diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h
index c2a772a..b0e4255 100644
--- a/include/power/max77686_pmic.h
+++ b/include/power/max77686_pmic.h
@@ -150,6 +150,7 @@ enum {
int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV);
int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode);
+int max77686_set_buck_voltage(struct pmic *p, int buck, ulong uV);
int max77686_set_buck_mode(struct pmic *p, int buck, char opmode);
#define MAX77686_LDO_VOLT_MAX_HEX 0x3f
@@ -159,6 +160,8 @@ int max77686_set_buck_mode(struct pmic *p, int buck, char
opmode);
#define MAX77686_LDO_MODE_STANDBY (0x01 << 0x06)
#define MAX77686_LDO_MODE_LPM (0x02 << 0x06)
#define MAX77686_LDO_MODE_ON (0x03 << 0x06)
+#define MAX77686_BUCK_VOLT_MAX_HEX 0x3f
+#define MAX77686_BUCK_VOLT_MASK0x3f
#define MAX77686_BUCK_MODE_MASK0x03
#define MAX77686_BUCK_MODE_SHIFT_1 0x00
#define MAX77686_BUCK_MODE_SHIFT_2 0x04
--
1.9.1
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[U-Boot] [PATCH v2 2/3] arm: odroid: enable/disable usb host phy for exynos4412
Enable/disable the usb host phy on the odroid U/X2 boards which are based
on the Exynos4412 SOC.
Signed-off-by: Suriyan Ramasami
---
arch/arm/cpu/armv7/exynos/power.c| 26 ++
arch/arm/include/asm/arch-exynos/power.h | 7 +++
2 files changed, 33 insertions(+)
diff --git a/arch/arm/cpu/armv7/exynos/power.c
b/arch/arm/cpu/armv7/exynos/power.c
index e1ab3d6..6578a07 100644
--- a/arch/arm/cpu/armv7/exynos/power.c
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -53,10 +53,36 @@ void exynos5_set_usbhost_phy_ctrl(unsigned int enable)
}
}
+void exynos4412_set_usbhost_phy_ctrl(unsigned int enable)
+{
+ struct exynos4412_power *power =
+ (struct exynos4412_power *)samsung_get_base_power();
+
+ if (enable) {
+ /* Enabling USBHOST_PHY */
+ setbits_le32(&power->usbhost_phy_control,
+POWER_USB_HOST_PHY_CTRL_EN);
+ setbits_le32(&power->hsic1_phy_control,
+POWER_USB_HOST_PHY_CTRL_EN);
+ setbits_le32(&power->hsic2_phy_control,
+POWER_USB_HOST_PHY_CTRL_EN);
+ } else {
+ /* Disabling USBHOST_PHY */
+ clrbits_le32(&power->usbhost_phy_control,
+POWER_USB_HOST_PHY_CTRL_EN);
+ clrbits_le32(&power->hsic1_phy_control,
+POWER_USB_HOST_PHY_CTRL_EN);
+ clrbits_le32(&power->hsic2_phy_control,
+POWER_USB_HOST_PHY_CTRL_EN);
+ }
+}
+
void set_usbhost_phy_ctrl(unsigned int enable)
{
if (cpu_is_exynos5())
exynos5_set_usbhost_phy_ctrl(enable);
+ else if (proid_is_exynos4412())
+ exynos4412_set_usbhost_phy_ctrl(enable);
}
static void exynos5_set_usbdrd_phy_ctrl(unsigned int enable)
diff --git a/arch/arm/include/asm/arch-exynos/power.h
b/arch/arm/include/asm/arch-exynos/power.h
index e8a98a5..3f97b31 100644
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -210,6 +210,13 @@ struct exynos4_power {
unsigned intgps_alive_option;
};
+struct exynos4412_power {
+ unsigned char res1[0x0704];
+ unsigned intusbhost_phy_control;
+ unsigned inthsic1_phy_control;
+ unsigned inthsic2_phy_control;
+};
+
struct exynos5_power {
unsigned intom_stat;
unsigned char res1[0x18];
--
1.9.1
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[U-Boot] [PATCH v2 3/3] arm: odroid: usb: add support for usb host including ethernet
This change adds support for enabling the USB host features of the board.
This includes the USB3503A hub and the SMC LAN9730 ethernet controller
as well.
Credit goes to Tushar Berara for the function set_usb_ethaddr().
Signed-off-by: Suriyan Ramasami
---
v2:
* Removed an unneeded header file from ehci-exynos.c
* Fix indentation in the dts file
---
arch/arm/dts/exynos4412-odroid.dts | 11 +++
arch/arm/include/asm/arch-exynos/cpu.h | 2 ++
arch/arm/include/asm/arch-exynos/ehci.h | 13
board/samsung/odroid/odroid.c | 55 +
drivers/usb/host/ehci-exynos.c | 51 +-
include/configs/odroid.h| 13
6 files changed, 137 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/exynos4412-odroid.dts
b/arch/arm/dts/exynos4412-odroid.dts
index 24d0bf1..ac5fece 100644
--- a/arch/arm/dts/exynos4412-odroid.dts
+++ b/arch/arm/dts/exynos4412-odroid.dts
@@ -67,4 +67,15 @@
div = <0x3>;
index = <4>;
};
+
+ ehci@1258 {
+ compatible = "samsung,exynos-ehci";
+ reg = <0x1258 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ phy {
+ compatible = "samsung,exynos-usb-phy";
+ reg = <0x125B 0x100>;
+ };
+ };
};
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index ba71714..fda21fb 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -18,6 +18,8 @@
#define EXYNOS4_GPIO_PART3_BASE0x0386
#define EXYNOS4_PRO_ID 0x1000
+#define EXYNOS4_GUID_LOW 0x1014
+#define EXYNOS4_GUID_HIGH 0x1018
#define EXYNOS4_SYSREG_BASE0x1001
#define EXYNOS4_POWER_BASE 0x1002
#define EXYNOS4_SWRESET0x10020400
diff --git a/arch/arm/include/asm/arch-exynos/ehci.h
b/arch/arm/include/asm/arch-exynos/ehci.h
index d2d70bd..3800fa9 100644
--- a/arch/arm/include/asm/arch-exynos/ehci.h
+++ b/arch/arm/include/asm/arch-exynos/ehci.h
@@ -12,6 +12,13 @@
#define CLK_24MHZ 5
+#define PHYPWR_NORMAL_MASK_PHY0 (0x39 << 0)
+#define PHYPWR_NORMAL_MASK_PHY1 (0x7 << 6)
+#define PHYPWR_NORMAL_MASK_HSIC0(0x7 << 9)
+#define PHYPWR_NORMAL_MASK_HSIC1(0x7 << 12)
+#define RSTCON_HOSTPHY_SWRST(0xf << 3)
+#define RSTCON_SWRST(0x1 << 0)
+
#define HOST_CTRL0_PHYSWRSTALL (1 << 31)
#define HOST_CTRL0_COMMONON_N (1 << 9)
#define HOST_CTRL0_SIDDQ (1 << 6)
@@ -61,6 +68,12 @@ struct exynos_usb_phy {
unsigned int usbotgtune;
};
+struct exynos4412_usb_phy {
+ unsigned int usbphyctrl;
+ unsigned int usbphyclk;
+ unsigned int usbphyrstcon;
+};
+
/* Switch on the VBUS power. */
int board_usb_vbus_init(void);
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
index 5edb250..6c78b67 100644
--- a/board/samsung/odroid/odroid.c
+++ b/board/samsung/odroid/odroid.c
@@ -453,9 +453,64 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
.usb_phy_ctrl = EXYNOS4X12_USBPHY_CONTROL,
.usb_flags = PHY0_SLEEP,
};
+#endif
+
+#if defined(CONFIG_USB_GADGET) || defined(CONFIG_CMD_USB)
+
+#ifdef CONFIG_CMD_USB
+static void set_usb_ethaddr(void)
+{
+ int i;
+ uchar mac[6];
+ unsigned int guid_high = readl(EXYNOS4_GUID_HIGH);
+ unsigned int guid_low = readl(EXYNOS4_GUID_LOW);
+
+ for (i = 0; i < 2; i++)
+ mac[i] = (guid_high >> (8 * (1 - i))) & 0xFF;
+
+ for (i = 0; i < 4; i++)
+ mac[i+2] = (guid_low >> (8 * (3 - i))) & 0xFF;
+
+ /* mark it as not multicast and outside official 80211 MAC namespace */
+ mac[0] = (mac[0] & ~0x1) | 0x2;
+
+ eth_setenv_enetaddr("ethaddr", mac);
+ eth_setenv_enetaddr("usbethaddr", mac);
+}
+#endif
int board_usb_init(int index, enum usb_init_type init)
{
+#ifdef CONFIG_CMD_USB
+ struct pmic *p_pmic;
+
+ /* Set Ref freq 0 => 24MHz, 1 => 26MHz*/
+ /* Odroid Us have it at 24MHz, Odroid Xs at 26MHz */
+ if (gd->board_type == ODROID_TYPE_U3)
+ gpio_direction_output(EXYNOS4X12_GPIO_X30, 0);
+ else
+ gpio_direction_output(EXYNOS4X12_GPIO_X30, 1);
+
+ /* Disconnect, Reset, Connect */
+ gpio_direction_output(EXYNOS4X12_GPIO_X34, 0);
+ gpio_direction_output(EXYNOS4X12_GPIO_X35, 0);
+ gpio_direction_output(EXYNOS4X12_GPIO_X35, 1);
+ gpio_direction_output(EXYNOS4X12_GPIO_X34, 1);
+
+ /* Power off and on BUCK8 for LAN9730 */
+ debug("LAN9730 - Turning power buck 8 OFF and ON.\n");
+
+ p_pmic = pmic_get("MAX77686_
[U-Boot] [PATCH 3/3 V2] dm9000: rework dm9000 to support multiple devices
The DM9000 was hard-coded to only support one DM9000 device. This patch
adds a new initialization function - dm9000_initialize_ex() - to support
registering multiple (and possibly dynamic) numbers of dm9000 devices.
This patch consists of:
* Change the board_info struct to a private struct under eth_device.
* Add io address/data address/srom availability information to this
private struct.
* Replace all uses of DM9000_IO/DM9000_DATA with new members, ensure
that the eth_device struct propagates down to all helper functions.
* Make dm9000_initialize() call dm9000_initialize_ex() with filled
in information from the old preprocessor symbols (DM9000_IO,
DM9000_DATA, etc.)
Overall the following parameters have been moved over to being a
per-chip setting:
DM9000_IO, DM9000_DATA, CONFIG_DM9000_NO_SROM
while the following is still a global setting affecting all chips:
CONFIG_DM9000_BYTE_SWAPPED
And the following has been removed entirely:
CONFIG_DM9000_BASE (was only used in a single printf)
Signed-off-by: Andrew Ruder
Cc: Joe Hershberger
---
Maybe a useful exercise anyway, this patch is significantly more messy with all
the whitespace cleanups. See the v1 for the changes without the noise. :)
drivers/net/dm9000x.c | 468 +-
include/netdev.h | 1 +
2 files changed, 269 insertions(+), 200 deletions(-)
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index 230f368..89528a8 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -29,7 +29,7 @@ v1.2 03/18/2003 Weilun Huang
:
--
12/15/2003 Initial port to u-boot by
- Sascha Hauer
+ Sascha Hauer
06/03/2008 Remy Bohmer
- Fixed the driver to work with DM9000A.
@@ -55,6 +55,7 @@ TODO: external MII is not functional, only internal at the
moment.
#include
#include
#include
+#include
#include "dm9000x.h"
@@ -63,24 +64,26 @@ TODO: external MII is not functional, only internal at the
moment.
/* #define CONFIG_DM9000_DEBUG */
#ifdef CONFIG_DM9000_DEBUG
-#define DM9000_DBG(fmt,args...) printf(fmt, ##args)
-#define DM9000_DMP_PACKET(func,packet,length) \
+#define DM9000_DBG(fmt, args...) printf(fmt, ##args)
+#define DM9000_DMP_PACKET(func, packet, length) \
do { \
- int i; \
+ int i; \
printf("%s: length: %d\n", func, length); \
for (i = 0; i < length; i++) { \
if (i % 8 == 0) \
printf("\n%s: %02x: ", func, i);\
- printf("%02x ", ((unsigned char *) packet)[i]); \
+ printf("%02x ", ((unsigned char *)packet)[i]); \
} printf("\n"); \
- } while(0)
+ } while (0)
#else
-#define DM9000_DBG(fmt,args...)
-#define DM9000_DMP_PACKET(func,packet,length)
+#define DM9000_DBG(fmt, args...) do {} while (0)
+#define DM9000_DMP_PACKET(func, packet, length) do {} while (0)
#endif
/* Structure/enum declaration --- */
-typedef struct board_info {
+struct dm9000_priv {
+ ulong data_base;
+ ulong io_base;
u32 runt_length_counter;/* counter: RX length < 64byte */
u32 long_length_counter;/* counter: RX length > 1514byte */
u32 reset_counter; /* counter: RESET */
@@ -89,32 +92,31 @@ typedef struct board_info {
u16 tx_pkt_cnt;
u16 queue_start_addr;
u16 dbug_cnt;
+ u8 has_srom;
u8 phy_addr;
u8 device_wait_reset; /* device state */
unsigned char srom[128];
- void (*outblk)(volatile void *data_ptr, int count);
- void (*inblk)(void *data_ptr, int count);
- void (*rx_status)(u16 *RxStatus, u16 *RxLen);
- struct eth_device netdev;
-} board_info_t;
-static board_info_t dm9000_info;
+ void (*outblk)(struct eth_device *dev, void *data_ptr, int count);
+ void (*inblk)(struct eth_device *dev, void *data_ptr, int count);
+ void (*rx_status)(struct eth_device *dev, u16 *rxstatus, u16 *rxlen);
+};
/* function declaration - */
-static int dm9000_probe(void);
-static u16 dm9000_phy_read(int);
-static void dm9000_phy_write(int, u16);
-static u8 DM9000_ior(int);
-static void DM9000_iow(int reg, u8 value);
+static int dm9000_probe(struct eth_device *);
+static u16 dm9000_phy_read(struct eth_device *, int);
+static void dm9000_phy_write(struct eth_device *, int, u16);
+static u8 DM9000_ior(struct eth_device *, int);
+static void DM9000_iow(struct eth_device *, int reg, u8 value);
/* DM900
Re: [U-Boot] [PATCH 01/25] ppc: Zap ICU862 board
Dear Marek, In message <201410201649.49448.ma...@denx.de> you wrote: > > Ah, you're right, we have this thing. One thing I'm not sure about is how > is someone supposed to determine the commit in which the board was removed > before the commit was created in the upstream repository. This kinda doesn't > add up to me. You just insert place holders for the boards you are touching, and fix up older entries that already hit mainline. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de How many seconds are there in a year? If I tell you there are 3.155 x 10^7, you won't even try to remember it. On the other hand, who could forget that, to within half a percent, pi seconds is a nanocentury. -- Tom Duff, Bell Labs ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] compile issue with U-boot-2014.10-rc2 & Cubieboard
Hello Masahiro, On 19-10-14 16:28, Jeroen Hofstee wrote: Hello Tom, On 01-10-14 17:31, Jeroen Hofstee wrote: On 30-09-14 03:29, Tom Everett wrote: I am getting this compile error: scripts/Makefile.build:55: /tank/home/tom/freebsd/uboot/u-boot-2014.10-rc2/board/amd/sunxi/Makefile: No such file or directory gmake[1]: *** No rule to make target `/tank/home/tom/freebsd/uboot/u-boot-2014.10-rc2/board/amd/sunxi/Makefile'. Stop. It appears that the dir "/board/amd/sunxi" does not exist. It should be "/board/sunxi". I stumbled upon the same problem, on FreeBSD, the root user seems to have an VENDOR=amd env hanging around, hence u-boot's Makefile cannot assign the correct value. (or it would need override at least). I have a hard time understanding what exactly is going on here. It has nothing to do with the type of shell / OS. e.g. linux/bash behaves exactly the same with: export VENDOR=toasted make wandboard_quad_config all scripts/Makefile.build:55: /home/jeroen/software/u-boot/board/toasted/wandboard/Makefile: No such file or directory make[1]: *** No rule to make target `/home/jeroen/software/u-boot/board/toasted/wandboard/Makefile'. Stop. The slightly shorter (in time) version below, shows similar behavior. make distclean wandboard_quad_config include/config.h && cat include/config.h This would make sense if I did `make VENDOR=toasted`, but that is not the case. Can you shed some light on this, how does make end up using the version of the original shell? And how can that be prevented? Thanks, Jeroen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/25] ppc: Zap ICU862 board
Dear Marek Vasut, In message <1413769706-8596-2-git-send-email-ma...@denx.de> you wrote: > This board is the only user of CONFIG_SYS_EEPROM_X40430 , remove > it so the EEPROM command code can be cleansed of the related code > as well. > > Signed-off-by: Marek Vasut > Cc: Masahiro Yamada > Cc: Tom Rini > Cc: Wolfgang Denk > Cc: Simon Glass > Cc: Heiko Schocher Assuming you also add an entry to scrapyard: Acked-by: Wolfgang Denk Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de To make this work we'd need a patch, as nobody of us tests this. - L. Poettering in https://bugs.freedesktop.org/show_bug.cgi?id=74589 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 06/25] ppc: Zap TQM8260 board
Dear Marek Vasut, In message <1413769706-8596-7-git-send-email-ma...@denx.de> you wrote: > This board is old and is using CONFIG_I2C_X, which is wrong. > > Signed-off-by: Marek Vasut > Cc: Masahiro Yamada > Cc: Tom Rini > Cc: Wolfgang Denk > Cc: Simon Glass > Cc: Heiko Schocher Assuming you also add an entry to scrapyard: Acked-by: Wolfgang Denk Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It is better to be silent and thought a fool then to speak and remove all doubt. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 07/25] ppc: Zap TQM8272 board
Dear Marek Vasut, In message <1413769706-8596-8-git-send-email-ma...@denx.de> you wrote: > This board is old and is using CONFIG_I2C_X, which is wrong. > > Signed-off-by: Marek Vasut > Cc: Masahiro Yamada > Cc: Tom Rini > Cc: Wolfgang Denk > Cc: Simon Glass > Cc: Heiko Schocher Assuming you also add an entry to scrapyard: Acked-by: Wolfgang Denk Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de At the source of every error which is blamed on the computer you will find at least two human errors, including the error of blaming it on the computer. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] dm9000: mark dump_regs() function as unused
On Mon, Oct 20, 2014 at 09:59:43AM -0500, Andrew Ruder wrote:
> dump_regs() is a handy function to keep around for bringing up a new
> dm9000-based board, but defining CONFIG_DM9000_DEBUG only adds the
> function - nowhere currently uses it. Rather than remove a potentially
> useful function, let's just tell gcc to not emit a warning when it is
> unused.
>
> Signed-off-by: Andrew Ruder
> Cc: Joe Hershberger
> ---
> drivers/net/dm9000x.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
> index 4de9d41..50a36f3 100644
> --- a/drivers/net/dm9000x.c
> +++ b/drivers/net/dm9000x.c
> @@ -126,7 +126,7 @@ static void DM9000_iow(int reg, u8 value);
>
> #ifdef CONFIG_DM9000_DEBUG
> static void
> -dump_regs(void)
> +dump_regs(void) __attribute__ ((unused))
> {
> DM9000_DBG("\n");
> DM9000_DBG("NCR (0x00): %02x\n", DM9000_ior(0));
Please make sure we have and use __unused (or
__maybe_unused?) here, thanks!
--
Tom
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Re: [U-Boot] [PATCH 2/3] dm9000: Add struct eth_device * to SROM functions
On Mon, Oct 20, 2014 at 09:59:44AM -0500, Andrew Ruder wrote:
> Currently this argument is not used. To eventually support multiple
> DM9000's these public-facing functions will need a new argument - the
> ethernet device. Fix-up the one board using this part of the DM9000
> API. Compile-tested only.
[snip]
> -void dm9000_read_srom_word(int offset, u8 *to)
> +void dm9000_read_srom_word(struct eth_device *dev, int offset, u8 *to)
> {
> + (void)dev;
You shouldn't have to add this to avoid a warning I think. And frankly,
if it does for some reason since 3/3 makes use of dev, I'm OK with a
bisect adding a trivial warning like this, rather than do compiler
games.
--
Tom
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Re: [U-Boot] [PATCH 2/3] dm9000: Add struct eth_device * to SROM functions
On Mon, Oct 20, 2014 at 03:17:13PM -0400, Tom Rini wrote: > You shouldn't have to add this to avoid a warning I think. And frankly, > if it does for some reason since 3/3 makes use of dev, I'm OK with a > bisect adding a trivial warning like this, rather than do compiler > games. Fair enough, the more I look at it, the more it looks like I probably missed a warning on this patch + CONFIG_DM9000_NO_SROM (defined but not used) so it is still pretty easy to trigger a warning on this patch. I'll just remove the indicated parts in v2 of the series and let the warnings get cleaned up in 3/3 as you have suggested. Will send a v2 of series in a bit after seeing if there is any feedback on the approaches used in 3/3. - Andy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 V2] dm9000: rework dm9000 to support multiple devices
On Mon, Oct 20, 2014 at 01:11:48PM -0500, Andrew Ruder wrote: > The DM9000 was hard-coded to only support one DM9000 device. This patch > adds a new initialization function - dm9000_initialize_ex() - to support > registering multiple (and possibly dynamic) numbers of dm9000 devices. > This patch consists of: > >* Change the board_info struct to a private struct under eth_device. >* Add io address/data address/srom availability information to this > private struct. >* Replace all uses of DM9000_IO/DM9000_DATA with new members, ensure > that the eth_device struct propagates down to all helper functions. >* Make dm9000_initialize() call dm9000_initialize_ex() with filled > in information from the old preprocessor symbols (DM9000_IO, > DM9000_DATA, etc.) So, on new platforms we call dm9000_initialize with the right IO/DATA locations for the given device, yes? I think I'd rather update everyone else to call things the right and new way, rather than work-around supporting both. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] checkpatch: Add a check for forbidden tags in the git log
On Tue, Oct 07, 2014 at 11:53:54AM +0200, Alban Bedel wrote:
> After doing this error too many times myself add a check for left
> over tags from gerrit and co.
>
> Signed-off-by: Alban Bedel
> ---
> scripts/checkpatch.pl | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
> index 74db2e2..3f1dedf 100755
> --- a/scripts/checkpatch.pl
> +++ b/scripts/checkpatch.pl
> @@ -351,6 +351,15 @@ our $signature_tags = qr{(?xi:
> Cc:
> )};
>
> +our $forbidden_tags = qr{(?xi:
> + Bug[=:]|
> + Test[=:]|
> + Issue:|
> + Change-Id:|
> + Review URL:|
> + Reviewed-On:
> +)};
> +
> our @typeList = (
> qr{void},
> qr{(?:unsigned\s+)?char},
> @@ -1894,6 +1903,12 @@ sub process {
> }
> }
>
> +# Check for left over tags
> + if ($line =~ /^\s*$forbidden_tags/i) {
> + WARN("FORBIDDEN_TAGS",
> + "Do not leave extra tags (internal review marker,
> etc)\n" . $herecurr)
> + }
> +
> # Check for wrappage within a valid hunk of the file
> if ($realcnt != 0 && $line !~ m{^(?:\+|-| |\\ No newline|$)}) {
> ERROR("CORRUPTED_PATCH",
Since we last re-synced checkpatch.pl, there's a check for just
Change-Id now. I would suggest bringing this up with upstream to also
ignore these other tags as it's a more generic problem. Thanks!
--
Tom
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Re: [U-Boot] [PATCH 3/3 V2] dm9000: rework dm9000 to support multiple devices
On 10/20/2014 03:00 PM, Tom Rini wrote: > So, on new platforms we call dm9000_initialize with the right IO/DATA > locations for the given device, yes? I think I'd rather update everyone > else to call things the right and new way, rather than work-around > supporting both. The expectation is that new platforms would move over to dm9000_initialize_ex(), dm9000_initialize() just being a shim to use what used to be #define'd in the board config.h for backwards compatibility with older boards. There's really 3 options that I fought with: 1.) Change dm9000_initialize() to dm9000_initialize(x, y, z). PATCH #3 then also includes changes to all of the various boards. 2.) Add dm9000_initialize_ex(x, y, z), make dm9000_initialize() call dm9000_initiailize_ex(x, y, z). No boards need to change. This is what I chose. 3.) Hybrid approach, do #2, make another patch (#4) that moves everything over to dm9000_initialize_ex(x, y, z) while renaming it to dm9000_initialize(x, y, z). Seems more round-about than #1 with the same end-result, but sometimes I feel like it is a little easier to review the meat of this change (#3) without it also dealing with tons of board churn. Thoughts? - Andy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/3] arm: relocate the exception vectors
Hi Albert, Le 15/10/2014 00:11, Albert ARIBAUD a écrit : Hi Georges, On Tue, 14 Oct 2014 22:02:00 +0200, Georges Savoundararadj wrote: Hi Albert, Hi Masahiro, (putting Masahiro in Cc: just in case) As my issue is related to Kconfig, I would like you to give me your opinions. Le 11/10/2014 12:47, Albert ARIBAUD a écrit : Hi Georges, On Sat, 27 Sep 2014 21:48:10 +0200, Georges Savoundararadj wrote: This commit relocates the exception vectors. As ARM1176 and ARMv7 have the security extensions, it uses VBAR. For the other ARM processors, it copies the relocated exception vectors to the correct address: 0x or 0x. Signed-off-by: Georges Savoundararadj Cc: Albert Aribaud Cc: Tom Warren --- This patch needs some tests because it impacts many boards. I have tested it with my raspberry pi in the two cases: using VBAR and using the copied exception vectors. Changes in v2: - Relocate exception vectors also on processors which do not support security extensions - Reword the commit message arch/arm/cpu/armv7/start.S | 6 -- arch/arm/lib/relocate.S| 30 ++ 2 files changed, 30 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index fedd7c8..fdc05b9 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -81,12 +81,6 @@ ENTRY(c_runtime_cpu_setup) mcr p15, 0, r0, c7, c10, 4 @ DSB mcr p15, 0, r0, c7, c5, 4 @ ISB #endif -/* - * Move vector table - */ - /* Set vector address in CP15 VBAR register */ - ldr r0, =_start - mcr p15, 0, r0, c12, c0, 0 @Set VBAR bx lr diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S index 8035251..88a478e 100644 --- a/arch/arm/lib/relocate.S +++ b/arch/arm/lib/relocate.S @@ -6,6 +6,8 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include +#include #include /* @@ -52,6 +54,34 @@ fixnext: cmp r2, r3 blo fixloop + /* +* Relocate the exception vectors +*/ +#if (defined(CONFIG_ARM1176) || defined(CONFIG_ARMV7)) I would prefer a single CONFIG_HAS_VBAR symbol defined through Kconfig. 1) Actually, there is no Kconfig entry such as "config ARM1176" nor "config ARMV7" in U-Boot, unlike in Linux (arch/arm/mm/Kconfig). If there were such entries, we would simply do like the following (in arch/arm/Kconfig): config HAS_VBAR bool config ARM1176 select HAS_VBAR config ARMV7 select HAS_VBAR Should we go in this direction? It is the cleanest way to use Kconfig but it requires some work in order to convert all "#define CONFIG_" into Kconfig entries. 2) Otherwise, we can insert a "select HAS_VBAR" in all boards that have a ARM1176 or a ARMv7 processor in arch/arm/Kconfig. It is not logical but this is what has been done with the Kconfig entry ARM64. And, it does not require much change. 3) The last thing we can do is as follows: config HAS_VBAR bool depends on SYS_CPU = "arm1176" || SYS_CPU = "armv7" default y CONFIG_HAS_VBAR will be defined if SYS_CPU are arm1176 or armv7. It does not require much change as well but, I think, it is bad code. What do you think is the best way to introduce CONFIG_HAS_VBAR symbol? (1, 2 or 3) I believe you have already sorted the options in order of decreasing 'quality' -- 1 being the best option, and 3 being the worst... Indeed option 1 would be the best and cleanest, and it could possibly open the way for other per-CPU options. We could try and limit the effort to converting only ARM1176 and ARMV7 and leaving other CONFIG_ #define'd until some later point in the future, but experience shows that such half-hearted attempts are never completed. Amicalement, I am currently trying to implement solution 1. only for ARM1176 and ARMV7 but I wonder if this work worth the effort just for one CPU feature. Do you expect more CPU feature like HAS_VBAR coming in the future? I add the following lines in arch/arm/Kconfig: config HAS_VBAR bool config ARM1176 bool select HAS_VBAR config ARMV7 bool select HAS_VBAR config SYS_CPU default "arm1176" if ARM1176 default "armv7" if ARMV7 Then, in the same file, under each "config TARGET_", I add "select ARM1176" or "select ARMV7". Also, I delete the Kconfig entries "config SYS_CPU" in all Kconfig of *all* boards that use ARM1176 and ARMV7. Actually, I find the change quite big. What do you think about this implementation? Should I continue in this direction? Regards, Georges ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request: u-boot-video/master
Hey Tom, The following changes since commit c43fd23cf619856b0763a64a6a3bcf3663058c49: Prepare v2014.10 (2014-10-14 04:47:15 -0400) are available in the git repository at: git://git.denx.de/u-boot-video.git master for you to fetch changes up to 3e780af127282e5e24fa737a5b56d7c4523a72c9: video: ipu_disp: remove pixclk fixup (2014-10-16 11:00:26 +0200) Jeroen Hofstee (2): video: ipu: fix debug and comment video: ipu_disp: remove pixclk fixup Simon Glass (1): lcd: Fix build error with CONFIG_LCD_BMP_RLE8 common/lcd.c |4 ++-- drivers/video/ipu_disp.c | 33 +++-- drivers/video/mxc_ipuv3_fb.c |7 +++ include/configs/sandbox.h|1 + 4 files changed, 13 insertions(+), 32 deletions(-) Please pull. Thanks! Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-fsl-qoriq master
Tom, The following changes since commit c43fd23cf619856b0763a64a6a3bcf3663058c49: Prepare v2014.10 (2014-10-14 04:47:15 -0400) are available in the git repository at: git://git.denx.de/u-boot-fsl-qoriq.git master for you to fetch changes up to ba4740205d22d31da289f5b6b2f8db7d27896f40: ls102x: Add support for secure boot and enable blob command (2014-10-16 14:21:26 -0700) Ruchika Gupta (10): powerpc/P1010RDB:Update RESET_VECTOR_ADDRESS for 768KB u-boot size fsl_sec : Move SEC CCSR definition to common include fsl_sec : Change accessor function to take care of endianness fsl_sec: Add hardware accelerated SHA256 and SHA1 mpc85xx: configs - Add hash command in freescale platforms ls102x: configs - Add hash command in freescale LS1 platforms powerpc/mpc85xx: SECURE BOOT - Bypass PAMU in case of secure boot crypto/fsl: Add command for encapsulating/decapsulating blobs mpc85xx: configs - Enable blob command in freescale platforms ls102x: Add support for secure boot and enable blob command README |6 + arch/arm/include/asm/arch-ls102xa/config.h |4 + arch/powerpc/cpu/mpc85xx/cpu_init.c | 18 +- arch/powerpc/cpu/mpc85xx/fdt.c |2 +- arch/powerpc/cpu/mpc85xx/liodn.c |4 +- arch/powerpc/cpu/mpc8xxx/fdt.c |4 +- arch/powerpc/include/asm/config_mpc85xx.h|1 + arch/powerpc/include/asm/immap_85xx.h| 73 +-- arch/powerpc/include/asm/types.h |4 + board/freescale/ls1021aqds/MAINTAINERS |1 + board/freescale/ls1021aqds/ls1021aqds.c | 10 + board/freescale/ls1021atwr/MAINTAINERS |1 + board/freescale/ls1021atwr/ls1021atwr.c | 10 + common/Makefile |2 + common/cmd_blob.c| 109 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig |3 + configs/ls1021atwr_nor_SECURE_BOOT_defconfig |3 + drivers/crypto/Makefile |1 + drivers/crypto/fsl/Makefile | 10 + drivers/crypto/fsl/desc.h| 651 ++ drivers/crypto/fsl/desc_constr.h | 280 +++ drivers/crypto/fsl/error.c | 258 ++ drivers/crypto/fsl/fsl_blob.c| 61 +++ drivers/crypto/fsl/fsl_hash.c| 77 +++ drivers/crypto/fsl/jobdesc.c | 125 + drivers/crypto/fsl/jobdesc.h | 29 ++ drivers/crypto/fsl/jr.c | 462 ++ drivers/crypto/fsl/jr.h | 97 include/configs/B4860QDS.h | 11 + include/configs/BSC9131RDB.h |7 + include/configs/BSC9132QDS.h | 11 + include/configs/C29XPCIE.h |7 + include/configs/P1010RDB.h | 13 +- include/configs/P2041RDB.h | 11 + include/configs/T1040QDS.h |8 + include/configs/T104xRDB.h |8 + include/configs/T208xQDS.h |8 + include/configs/T208xRDB.h |8 + include/configs/T4240QDS.h | 11 + include/configs/T4240RDB.h |8 + include/configs/corenet_ds.h | 11 + include/configs/ls1021aqds.h | 11 + include/configs/ls1021atwr.h | 12 + include/fsl_sec.h| 181 +++ 44 files changed, 2558 insertions(+), 74 deletions(-) create mode 100644 common/cmd_blob.c create mode 100644 configs/ls1021aqds_nor_SECURE_BOOT_defconfig create mode 100644 configs/ls1021atwr_nor_SECURE_BOOT_defconfig create mode 100644 drivers/crypto/fsl/Makefile create mode 100644 drivers/crypto/fsl/desc.h create mode 100644 drivers/crypto/fsl/desc_constr.h create mode 100644 drivers/crypto/fsl/error.c create mode 100644 drivers/crypto/fsl/fsl_blob.c create mode 100644 drivers/crypto/fsl/fsl_hash.c create mode 100644 drivers/crypto/fsl/jobdesc.c create mode 100644 drivers/crypto/fsl/jobdesc.h create mode 100644 drivers/crypto/fsl/jr.c create mode 100644 drivers/crypto/fsl/jr.h create mode 100644 include/fsl_sec.h Thanks, York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH][v4] ls102x: configs - Add hash command in freescale LS1 platforms
On 10/14/2014 11:09 PM, Ruchika Gupta wrote: > Hardware accelerated support for SHA-1 and SHA-256 has been added. > Hash command enabled along with hardware accelerated support for > SHA-1 and SHA-256 for platforms which have CAAM block. > > Signed-off-by: Ruchika Gupta > CC: York Sun > --- > This and other patches in this series have been applied to fsl-qoriq/master, awaiting upstream. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] image: Fix Android boot image support
Hi,
On 16 October 2014 22:52, Ahmad Draidi wrote:
> This patch makes the following changes:
> - Set kernel entry point correctly
> - Append bootargs from image to global bootargs instead
> of replacing them
> - Return end address instead of size from android_image_get_end()
> - Give correct parameter to genimg_get_format() in boot_get_ramdisk()
>
> Signed-off-by: Ahmad Draidi
> Cc: Tom Rini
> ---
> common/bootm.c | 4 ++--
> common/image-android.c | 34 +++---
> common/image.c | 3 ++-
> 3 files changed, 31 insertions(+), 10 deletions(-)
>
> diff --git a/common/bootm.c b/common/bootm.c
> index ff81a27..c04a3b0 100644
> --- a/common/bootm.c
> +++ b/common/bootm.c
> @@ -144,11 +144,11 @@ static int bootm_find_os(cmd_tbl_t *cmdtp, int flag,
> int argc,
> images.os.type = IH_TYPE_KERNEL;
> images.os.comp = IH_COMP_NONE;
> images.os.os = IH_OS_LINUX;
> - images.ep = images.os.load;
> - ep_found = true;
>
> images.os.end = android_image_get_end(os_hdr);
> images.os.load = android_image_get_kload(os_hdr);
> + images.ep = images.os.load;
> + ep_found = true;
> break;
> #endif
> default:
> diff --git a/common/image-android.c b/common/image-android.c
> index 6ded7e2..badaa7e 100644
> --- a/common/image-android.c
> +++ b/common/image-android.c
> @@ -7,6 +7,7 @@
> #include
> #include
> #include
> +#include
>
> static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1];
>
> @@ -25,12 +26,30 @@ int android_image_get_kernel(const struct andr_img_hdr
> *hdr, int verify,
>
> printf("Kernel load addr 0x%08x size %u KiB\n",
>hdr->kernel_addr, DIV_ROUND_UP(hdr->kernel_size, 1024));
> +
> strncpy(andr_tmp_str, hdr->cmdline, ANDR_BOOT_ARGS_SIZE);
> andr_tmp_str[ANDR_BOOT_ARGS_SIZE] = '\0';
> if (strlen(andr_tmp_str)) {
> printf("Kernel command line: %s\n", andr_tmp_str);
> - setenv("bootargs", andr_tmp_str);
> + char *bootargs = getenv("bootargs");
> + if (bootargs == NULL) {
> + setenv("bootargs", andr_tmp_str);
> + } else {
> + char *newbootargs = malloc(strlen(bootargs) +
> + strlen(andr_tmp_str) + 1);
> + if (newbootargs == NULL) {
> + puts("Error: malloc in
> android_image_get_kernel failed!\n");
> + return -1;
> + }
> +
> + strcpy(newbootargs, bootargs);
> + strcat(newbootargs, " ");
> + strncat(newbootargs, andr_tmp_str,
> ANDR_BOOT_ARGS_SIZE);
Why have ANDR_BOOT_ARGS_SIZE? If you are going to malloc() anyway, you
may as well avoid the limit. Something like:
char *bootargs = getenv("bootargs");
int len = 0;
if (*hdr->cmdline)
len += strlen(hdr->cmdline);
if (bootargs)
len += strlen(bootargs);
malloc(len +1) bytes
copy them in
> +
> + setenv("bootargs", newbootargs);
> + }
> }
> +
> if (hdr->ramdisk_size)
> printf("RAM disk load addr 0x%08x size %u KiB\n",
>hdr->ramdisk_addr,
> @@ -52,17 +71,18 @@ int android_image_check_header(const struct andr_img_hdr
> *hdr)
>
> ulong android_image_get_end(const struct andr_img_hdr *hdr)
> {
> - u32 size = 0;
> + ulong end;
> /*
> * The header takes a full page, the remaining components are aligned
> * on page boundary
> */
> - size += hdr->page_size;
> - size += ALIGN(hdr->kernel_size, hdr->page_size);
> - size += ALIGN(hdr->ramdisk_size, hdr->page_size);
> - size += ALIGN(hdr->second_size, hdr->page_size);
> + end = (ulong)hdr;
> + end += hdr->page_size;
> + end += ALIGN(hdr->kernel_size, hdr->page_size);
> + end += ALIGN(hdr->ramdisk_size, hdr->page_size);
> + end += ALIGN(hdr->second_size, hdr->page_size);
>
> - return size;
> + return end;
> }
>
> ulong android_image_get_kload(const struct andr_img_hdr *hdr)
> diff --git a/common/image.c b/common/image.c
> index 085771c..e21c848 100644
> --- a/common/image.c
> +++ b/common/image.c
> @@ -1009,7 +1009,8 @@ int boot_get_ramdisk(int argc, char * const argv[],
> bootm_headers_t *images,
> image_multi_getimg(images->legacy_hdr_os, 1, &rd_data,
> &rd_len);
> }
> #ifdef CONFIG_ANDROID_BOOT_IMAGE
> - else if ((genimg_get_format(images) == IMAGE_FORMAT_ANDROID) &&
> + else if ((genimg_get_format((void *)images->os.start)
> + == IMAGE_FORMAT_ANDROID) &&
> (!android_image_get_ramdisk((void *)images->os.start,
> &rd_data, &rd_len))) {
>
Re: [U-Boot] [PATCH] image: Fix Android boot image support
Hi Ahmad, On 17 October 2014 23:34, Ahmad Draidi wrote: > Hello Mr. Glass > > On Fri, Oct 17, 2014 at 11:19 PM, Simon Glass wrote: >> Hi, >> >> On 16 October 2014 22:52, Ahmad Draidi wrote: >>> This patch makes the following changes: >>> - Set kernel entry point correctly >>> - Append bootargs from image to global bootargs instead >>> of replacing them >>> - Return end address instead of size from android_image_get_end() >>> - Give correct parameter to genimg_get_format() in boot_get_ramdisk() >> >> I wonder if it might be possible to add a sandbox test for this? I >> feel that we are at great risk of breaking these things without some >> automated tests. There are tests for FIT and legacy images. >> >> Regards, >> Simon > > I'll see if I can write one. > If I do, should I submit it as a separate patch series? Sorry, I'm new to > this. > Any notes on this patch? You can submit it as a separate patch but perhaps in the same series. I'll check the patch. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] net/e1000: Fix EEPROM access error
On Sat, 2014-10-18 at 01:40 +0200, Marek Vasut wrote: > +CC Marcel. Marcel, can you please take a look at this and test this with > i210 > card ? Good catch. Yes, I can confirm that this properly fixes at least one of the remaining issues as previously seen on the i210/i211. Acked-by: Marcel Ziswiler ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3 V2] dm9000: rework dm9000 to support multiple devices
On Mon, Oct 20, 2014 at 08:16:59PM +, Andrew Ruder wrote: > On 10/20/2014 03:00 PM, Tom Rini wrote: > > So, on new platforms we call dm9000_initialize with the right IO/DATA > > locations for the given device, yes? I think I'd rather update everyone > > else to call things the right and new way, rather than work-around > > supporting both. > > The expectation is that new platforms would move over to > dm9000_initialize_ex(), dm9000_initialize() just being a shim to use > what used to be #define'd in the board config.h for backwards > compatibility with older boards. > > There's really 3 options that I fought with: > > 1.) Change dm9000_initialize() to dm9000_initialize(x, y, z). PATCH #3 > then also includes changes to all of the various boards. > > 2.) Add dm9000_initialize_ex(x, y, z), make dm9000_initialize() call > dm9000_initiailize_ex(x, y, z). No boards need to change. This is what > I chose. > > 3.) Hybrid approach, do #2, make another patch (#4) that moves > everything over to dm9000_initialize_ex(x, y, z) while renaming it to > dm9000_initialize(x, y, z). Seems more round-about than #1 with the > same end-result, but sometimes I feel like it is a little easier to > review the meat of this change (#3) without it also dealing with tons of > board churn. > > Thoughts? How about step 1 is checkpatch re-formatting only, step 2 is dm9000_initalize(x, y, z) but y/z aren't used, step 3 is passing around 'dev' and step 4 is the rest of the changes (so that y/z are used, if I follow all of the logic right). This splits the whitespace/etc churn out from everything else, then makes it easy enough to review that boards are converted right to the new logic. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] common/cmd_io.c: Fix incorrect help for iod/iow
Hi Simon, On Tue, Oct 21, 2014 at 12:46 AM, Simon Glass wrote: > Hi Bin, > > Are you using the coreboot support? What board are you using? Not coreboot, but U-Boot directly booting from reset vector on Intel Crown Bay board. Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] common/cmd_io.c: Fix incorrect help for iod/iow
Hi Bin, On 20 October 2014 19:20, Bin Meng wrote: > Hi Simon, > > On Tue, Oct 21, 2014 at 12:46 AM, Simon Glass wrote: >> Hi Bin, >> >> Are you using the coreboot support? What board are you using? > > Not coreboot, but U-Boot directly booting from reset vector on Intel > Crown Bay board. OK I see - interesting! I talked with Wolfgang at the mini-Summit last week about a bare x86 port and he seemed keen on the idea. So I've been taking a look. I was planning to use the Minnowboard Max, but I don't have one yet (and it may be a long wait) so am looking at another board. Are you planning to post patches? I am getting close to posting patches for booting to a prompt on link. If it helps I've pushed my WIP tree to u-boot-x86/bare-working. It boots to a prompt but does not include SMM, display and resource allocation (among other things). Why are you using U-Boot? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10 11/12] dm: exynos: Make sure that GPIOs are requested
With driver model GPIOs must be requested before use. Make sure this is
done correctly.
(Note that the soft SPI part of universal is omitted, since this driver
is about to be replaced with a driver-model-aware version)
Signed-off-by: Simon Glass
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5:
- Add additional gpio_request() calls for other samsung boards
- Use a mask instead of division in gpio_request() naming call
Changes in v4: None
arch/arm/cpu/armv7/exynos/pinmux.c | 3 +++
board/samsung/arndale/arndale.c | 2 ++
board/samsung/common/misc.c | 2 ++
board/samsung/goni/goni.c| 2 ++
board/samsung/smdk5250/exynos5-dt.c | 7 +++
board/samsung/smdk5420/smdk5420.c| 4
board/samsung/trats/trats.c | 15 ---
board/samsung/trats2/trats2.c| 26 +-
board/samsung/universal_c210/universal.c | 3 +++
drivers/mmc/s5p_sdhci.c | 7 ++-
10 files changed, 62 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 2caeb3e..3d95dc3 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -172,6 +172,9 @@ static int exynos5420_mmc_config(int peripheral, int flags)
* this same assumption.
*/
if ((peripheral == PERIPH_ID_SDMMC0) && (i == (start + 2))) {
+#ifndef CONFIG_SPL_BUILD
+ gpio_request(i, "sdmmc0_vdden");
+#endif
gpio_set_value(i, 1);
gpio_cfg_pin(i, S5P_GPIO_OUTPUT);
} else {
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index e39795d..881d080 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -19,6 +19,8 @@ int board_usb_init(int index, enum usb_init_type init)
/* Configure gpios for usb 3503 hub:
* disconnect, toggle reset and connect
*/
+ gpio_request(EXYNOS5_GPIO_D17, "usb_connect");
+ gpio_request(EXYNOS5_GPIO_X35, "usb_reset");
gpio_direction_output(EXYNOS5_GPIO_D17, 0);
gpio_direction_output(EXYNOS5_GPIO_X35, 0);
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index b935922..4538ac7 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -411,6 +411,8 @@ void check_boot_mode(void)
void keys_init(void)
{
/* Set direction to input */
+ gpio_request(KEY_VOL_UP_GPIO, "volume-up");
+ gpio_request(KEY_VOL_DOWN_GPIO, "volume-down");
gpio_direction_input(KEY_VOL_UP_GPIO);
gpio_direction_input(KEY_VOL_DOWN_GPIO);
}
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 01be714..22f4995 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -80,6 +80,7 @@ int board_mmc_init(bd_t *bis)
int i, ret, ret_sd = 0;
/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
+ gpio_request(S5PC110_GPIO_J27, "massmemory_en");
gpio_direction_output(S5PC110_GPIO_J27, 1);
/*
@@ -108,6 +109,7 @@ int board_mmc_init(bd_t *bis)
* SD card (T_FLASH) detect and init
* T_FLASH_DETECT: EINT28: GPH3[4] input mode
*/
+ gpio_request(S5PC110_GPIO_H34, "t_flash_detect");
gpio_cfg_pin(S5PC110_GPIO_H34, S5P_GPIO_INPUT);
gpio_set_pull(S5PC110_GPIO_H34, S5P_GPIO_PULL_UP);
diff --git a/board/samsung/smdk5250/exynos5-dt.c
b/board/samsung/smdk5250/exynos5-dt.c
index d6ce133..53ff706 100644
--- a/board/samsung/smdk5250/exynos5-dt.c
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -29,6 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
static void board_enable_audio_codec(void)
{
/* Enable MAX98095 Codec */
+ gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
gpio_direction_output(EXYNOS5_GPIO_X17, 1);
gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
}
@@ -199,16 +200,19 @@ static int board_dp_bridge_setup(void)
/* Setup the GPIOs */
/* PD is ACTIVE_LOW, and initially de-asserted */
+ gpio_request(EXYNOS5_GPIO_Y25, "dp_bridge_pd");
gpio_set_pull(EXYNOS5_GPIO_Y25, S5P_GPIO_PULL_NONE);
gpio_direction_output(EXYNOS5_GPIO_Y25, 1);
/* Reset is ACTIVE_LOW */
+ gpio_request(EXYNOS5_GPIO_X15, "dp_bridge_reset");
gpio_set_pull(EXYNOS5_GPIO_X15, S5P_GPIO_PULL_NONE);
gpio_direction_output(EXYNOS5_GPIO_X15, 0);
udelay(10);
gpio_set_value(EXYNOS5_GPIO_X15, 1);
+ gpio_request(EXYNOS5_GPIO_X07, "dp_bridge_hpd");
gpio_direction_input(EXYNOS5_GPIO_X07);
/*
@@ -236,10 +240,12 @@ static int board_dp_bridge_setup(void)
void exynos_cfg_lcd_gpio(void)
{
/* For Backlight */
+ gpio_request(EXYNOS5_GPIO_B20, "lcd_backlight");
gpio_cfg_p
[U-Boot] [PATCH v10 0/12] Enable driver model for GPIOs on Tegra and Exynos
(Note: Tegra patches have been applied, I am resending with exynos only) Now that driver model is part of U-Boot, the task of converting drivers over to it begins. GPIO is one of the easiest to convert, since it already has a sandbox driver and a uclass driver. The Tegra GPIO driver is relatively simple since it has a linear numbering and already uses the generic GPIO framework. Each GPIO bank has a separate device. Some arguments have been made that a single device should support all the GPIO banks, but currently the driver model uclass does not work that way and it would require a second-level data structure to handle the bank feature. This driver has been tested on: - Seaboard (Tegra 20) - Beaver (Tegra 30) - Jetson-TK1 (Tegra 124). I don't have a Tegra 114 board (Dalmore seems to be the only one with U-Boot support) but I am quite confident that it works. For exynos, the pinctrl device tree files are brought in from the kernel and cut down to remove the groupings which we don't yet use. Very small additions are made to avoid replicating the awful tables that Linux has for every exynos SoC. This series sits on top of the exynos refactors. The 'gpio' command is updated to support display of only the allocated GPIOs. This is much more friendly than displaying a large table. A few related clean-ups are provided as well. This series is available at u-boot-dm.git, branch working. Changes in v10: - Adjust ordering of U-Boot .dtsi includes to fix GPIO numbering order - Remove gaps in the GPIO numbering since these are not needed now Changes in v9: - Change compatible string to s5pc110-pinctrl for s5p_goni - Add missing compatible strings from exynos_gpio_ids[] Changes in v8: - Adjust odroid device tree file to use #include instead of /include/ - Add missing special case reg property for exynos5420 GPX0 - Add patch containing pinctrl settings for s5p_goni - Add patch containing pinctrl settings for s5p_goni - Add new patch to move smdkc100 to generic board - Add new patch to move s5p_goni to generic board - Enable driver model for smdkc100 and s5p_goni separately Changes in v7: - Bring in patches from the SPI series to move post-reloc DM init earlier Changes in v6: - Fix typo in compatible string - Remove exynos5420.dtsi which is not used in U-Boot - Move U-Boot changes into their own file - Use exynos54xx everywhere instead of exynos5420 Changes in v5: - Put this patch before the others to avoid breaking bisectability - Add additional gpio_request() calls for other samsung boards - Use a mask instead of division in gpio_request() naming call - Remove RFC label now that build errors are fixed - Tidy up and update cover letter message - Avoid reordering functions Changes in v4: - Add patches for exynos GPIO support Simon Glass (12): dm: exynos: dts: Convert /include/ to #include dm: exynos: Bring in pinctrl dts files from Linux kernel dm: exynos: dts: Remove unused pinctrl information to save space dm: exynos: dts: Adjust device tree files for U-Boot dm: exynos: Add pinctrl settings for smdkc100 dm: exynos: Add pinctrl settings for s5p_goni dm: exynos: Move smdkc100 to generic board dm: exynos: Move s5p_goni to generic board dm: exynos: Tidy up GPIO headers dm: exynos: Tidy up GPIO defines dm: exynos: Make sure that GPIOs are requested dm: exynos: gpio: Convert to driver model arch/arm/cpu/armv7/exynos/pinmux.c | 5 +- arch/arm/dts/exynos4.dtsi | 9 +- arch/arm/dts/exynos4210-origen.dts | 4 +- arch/arm/dts/exynos4210-pinctrl-uboot.dtsi | 27 ++ arch/arm/dts/exynos4210-pinctrl.dtsi | 304 arch/arm/dts/exynos4210-smdkv310.dts | 2 +- arch/arm/dts/exynos4210-trats.dts | 2 +- arch/arm/dts/exynos4210-universal_c210.dts | 2 +- arch/arm/dts/exynos4210.dtsi | 156 ++ arch/arm/dts/exynos4412-odroid.dts | 2 +- arch/arm/dts/exynos4412-trats2.dts | 2 +- arch/arm/dts/exynos4412.dtsi | 38 +++ arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 46 +++ arch/arm/dts/exynos4x12-pinctrl.dtsi | 344 ++ arch/arm/dts/exynos4x12.dtsi | 115 arch/arm/dts/exynos5.dtsi | 56 +++- arch/arm/dts/exynos5250-pinctrl-uboot.dtsi | 40 +++ arch/arm/dts/exynos5250-pinctrl.dtsi | 331 + arch/arm/dts/exynos5250-smdk5250.dts | 2 +- arch/arm/dts/exynos5250-snow.dts | 2 +- arch/arm/dts/exynos5250.dtsi | 41 ++- arch/arm/dts/exynos5420-peach-pit.dts | 2 +- arch/arm/dts/exynos5420-smdk5420.dts | 2 +- arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi | 40 +++ arch/arm/dts/exynos54xx-pinctrl.dtsi | 305 arch/arm/dts/exynos54xx.dtsi | 44 ++- arch/arm/dts/s5pc100-pinctrl.dtsi | 180 arch/arm/dts/s5pc110-pinctrl.dtsi | 273 ++ arch/arm/dts/s5pc
[U-Boot] [PATCH v10 05/12] dm: exynos: Add pinctrl settings for smdkc100
These describe the GPIOs in enough detail for U-Boot's GPIO driver to
operate.
Signed-off-by: Simon Glass
---
Changes in v10: None
Changes in v9: None
Changes in v8:
- Add patch containing pinctrl settings for s5p_goni
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
arch/arm/dts/s5pc100-pinctrl.dtsi | 180 ++
arch/arm/dts/s5pc1xx-smdkc100.dts | 7 ++
2 files changed, 187 insertions(+)
create mode 100644 arch/arm/dts/s5pc100-pinctrl.dtsi
diff --git a/arch/arm/dts/s5pc100-pinctrl.dtsi
b/arch/arm/dts/s5pc100-pinctrl.dtsi
new file mode 100644
index 000..bd9f97c
--- /dev/null
+++ b/arch/arm/dts/s5pc100-pinctrl.dtsi
@@ -0,0 +1,180 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/ {
+ pinctrl@e030 {
+ gpa0: gpa0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpa1: gpa1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpb: gpb {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc: gpc {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpd: gpd {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpe0: gpe0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpe1: gpe1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpf0: gpf0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpf1: gpf1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpf2: gpf2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpf3: gpf3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpg0: gpg0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpg1: gpg1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpg2: gpg2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpg3: gpg3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpi: gpi {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpj0: gpj0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpj1: gpj1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpj2: gpj2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpj3: gpj3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpj4: gpj4 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpk0: gpk0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpk1: gpk1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpk2: gpk2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpk3: gpk3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpl0: gpl0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpl1: gpl1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpl2: gpl2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpl3: gpl3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpl4: gpl4 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gph0: gph0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
[U-Boot] [PATCH v10 01/12] dm: exynos: dts: Convert /include/ to #include
We should be consistent about this. The kernel has moved to #include
which breaks error reporting to some extent but does allow us to include
binding files.
Signed-off-by: Simon Glass
---
Changes in v10: None
Changes in v9: None
Changes in v8:
- Adjust odroid device tree file to use #include instead of /include/
Changes in v7: None
Changes in v6: None
Changes in v5:
- Put this patch before the others to avoid breaking bisectability
Changes in v4: None
arch/arm/dts/exynos4.dtsi | 2 +-
arch/arm/dts/exynos4210-origen.dts | 4 ++--
arch/arm/dts/exynos4210-smdkv310.dts | 2 +-
arch/arm/dts/exynos4210-trats.dts | 2 +-
arch/arm/dts/exynos4210-universal_c210.dts | 2 +-
arch/arm/dts/exynos4412-odroid.dts | 2 +-
arch/arm/dts/exynos4412-trats2.dts | 2 +-
arch/arm/dts/exynos5.dtsi | 2 +-
arch/arm/dts/exynos5250-smdk5250.dts | 2 +-
arch/arm/dts/exynos5250-snow.dts | 2 +-
arch/arm/dts/exynos5250.dtsi | 2 +-
arch/arm/dts/exynos5420-peach-pit.dts | 2 +-
arch/arm/dts/exynos5420-smdk5420.dts | 2 +-
arch/arm/dts/exynos54xx.dtsi | 2 +-
14 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/arm/dts/exynos4.dtsi b/arch/arm/dts/exynos4.dtsi
index 110eb43..6b83516 100644
--- a/arch/arm/dts/exynos4.dtsi
+++ b/arch/arm/dts/exynos4.dtsi
@@ -7,7 +7,7 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
/ {
serial@1380 {
diff --git a/arch/arm/dts/exynos4210-origen.dts
b/arch/arm/dts/exynos4210-origen.dts
index 15059d2..556a3a2 100644
--- a/arch/arm/dts/exynos4210-origen.dts
+++ b/arch/arm/dts/exynos4210-origen.dts
@@ -8,8 +8,8 @@
*/
/dts-v1/;
-/include/ "skeleton.dtsi"
-/include/ "exynos4.dtsi"
+#include "skeleton.dtsi"
+#include "exynos4.dtsi"
/ {
model = "Insignal Origen evaluation board based on Exynos4210";
diff --git a/arch/arm/dts/exynos4210-smdkv310.dts
b/arch/arm/dts/exynos4210-smdkv310.dts
index c390c8f..00cad04 100644
--- a/arch/arm/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/dts/exynos4210-smdkv310.dts
@@ -7,7 +7,7 @@
*/
/dts-v1/;
-/include/ "exynos4.dtsi"
+#include "exynos4.dtsi"
/ {
model = "Samsung SMDKV310 on Exynos4210";
diff --git a/arch/arm/dts/exynos4210-trats.dts
b/arch/arm/dts/exynos4210-trats.dts
index 0ff6939..71202d0 100644
--- a/arch/arm/dts/exynos4210-trats.dts
+++ b/arch/arm/dts/exynos4210-trats.dts
@@ -8,7 +8,7 @@
*/
/dts-v1/;
-/include/ "exynos4.dtsi"
+#include "exynos4.dtsi"
/ {
model = "Samsung Trats based on Exynos4210";
diff --git a/arch/arm/dts/exynos4210-universal_c210.dts
b/arch/arm/dts/exynos4210-universal_c210.dts
index 6941906..d30f131 100644
--- a/arch/arm/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/dts/exynos4210-universal_c210.dts
@@ -8,7 +8,7 @@
*/
/dts-v1/;
-/include/ "exynos4.dtsi"
+#include "exynos4.dtsi"
/ {
model = "Samsung Universal C210 based on Exynos4210 rev0";
diff --git a/arch/arm/dts/exynos4412-odroid.dts
b/arch/arm/dts/exynos4412-odroid.dts
index 24d0bf1..4c5e2b3 100644
--- a/arch/arm/dts/exynos4412-odroid.dts
+++ b/arch/arm/dts/exynos4412-odroid.dts
@@ -8,7 +8,7 @@
*/
/dts-v1/;
-/include/ "exynos4.dtsi"
+#include "exynos4.dtsi"
/ {
model = "Odroid based on Exynos4412";
diff --git a/arch/arm/dts/exynos4412-trats2.dts
b/arch/arm/dts/exynos4412-trats2.dts
index cc58c87..9d22de7 100644
--- a/arch/arm/dts/exynos4412-trats2.dts
+++ b/arch/arm/dts/exynos4412-trats2.dts
@@ -8,7 +8,7 @@
*/
/dts-v1/;
-/include/ "exynos4.dtsi"
+#include "exynos4.dtsi"
/ {
model = "Samsung Trats2 based on Exynos4412";
diff --git a/arch/arm/dts/exynos5.dtsi b/arch/arm/dts/exynos5.dtsi
index a2b533a..329a89a 100644
--- a/arch/arm/dts/exynos5.dtsi
+++ b/arch/arm/dts/exynos5.dtsi
@@ -5,7 +5,7 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
/ {
compatible = "samsung,exynos5";
diff --git a/arch/arm/dts/exynos5250-smdk5250.dts
b/arch/arm/dts/exynos5250-smdk5250.dts
index 9020382..8850409 100644
--- a/arch/arm/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/dts/exynos5250-smdk5250.dts
@@ -10,7 +10,7 @@
*/
/dts-v1/;
-/include/ "exynos5250.dtsi"
+#include "exynos5250.dtsi"
/ {
model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts
index ab4f2f8..2003412 100644
--- a/arch/arm/dts/exynos5250-snow.dts
+++ b/arch/arm/dts/exynos5250-snow.dts
@@ -10,7 +10,7 @@
*/
/dts-v1/;
-/include/ "exynos5250.dtsi"
+#include "exynos5250.dtsi"
/ {
model = "Google Snow";
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 0c644e7..771f8d3 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -5,7 +5,7 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-/include/ "exynos5.dtsi"
+#include "
[U-Boot] [PATCH v10 02/12] dm: exynos: Bring in pinctrl dts files from Linux kernel
Bring in required device tree files for pinctrl from Linux v3.14. These
are initially unchanged and have a number of pieces not needed by U-Boot.
Note that exynos5420 is renamed to exynos54xx here since we want to
support exynos5422 also.
Signed-off-by: Simon Glass
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- Fix typo in compatible string
- Remove exynos5420.dtsi which is not used in U-Boot
Changes in v5: None
Changes in v4: None
arch/arm/dts/exynos4.dtsi | 7 +
arch/arm/dts/exynos4210-origen.dts | 2 +-
arch/arm/dts/exynos4210-pinctrl.dtsi | 847 +
arch/arm/dts/exynos4210-trats.dts | 2 +-
arch/arm/dts/exynos4210-universal_c210.dts | 2 +-
arch/arm/dts/exynos4210.dtsi | 155 +
arch/arm/dts/exynos4412-trats2.dts | 2 +-
arch/arm/dts/exynos4412.dtsi | 38 ++
arch/arm/dts/exynos4x12-pinctrl.dtsi | 956 +
arch/arm/dts/exynos4x12.dtsi | 214 +++
arch/arm/dts/exynos5.dtsi | 54 ++
arch/arm/dts/exynos5250-pinctrl.dtsi | 790
arch/arm/dts/exynos5250.dtsi | 38 ++
arch/arm/dts/exynos54xx-pinctrl.dtsi | 687 +
arch/arm/dts/exynos54xx.dtsi | 41 ++
15 files changed, 3831 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/dts/exynos4210-pinctrl.dtsi
create mode 100644 arch/arm/dts/exynos4210.dtsi
create mode 100644 arch/arm/dts/exynos4412.dtsi
create mode 100644 arch/arm/dts/exynos4x12-pinctrl.dtsi
create mode 100644 arch/arm/dts/exynos4x12.dtsi
create mode 100644 arch/arm/dts/exynos5250-pinctrl.dtsi
create mode 100644 arch/arm/dts/exynos54xx-pinctrl.dtsi
diff --git a/arch/arm/dts/exynos4.dtsi b/arch/arm/dts/exynos4.dtsi
index 6b83516..77fad48 100644
--- a/arch/arm/dts/exynos4.dtsi
+++ b/arch/arm/dts/exynos4.dtsi
@@ -10,6 +10,13 @@
#include "skeleton.dtsi"
/ {
+ combiner: interrupt-controller@1044 {
+ compatible = "samsung,exynos4210-combiner";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0x1044 0x1000>;
+ };
+
serial@1380 {
compatible = "samsung,exynos4210-uart";
reg = <0x1380 0x3c>;
diff --git a/arch/arm/dts/exynos4210-origen.dts
b/arch/arm/dts/exynos4210-origen.dts
index 556a3a2..dd2476c 100644
--- a/arch/arm/dts/exynos4210-origen.dts
+++ b/arch/arm/dts/exynos4210-origen.dts
@@ -9,7 +9,7 @@
/dts-v1/;
#include "skeleton.dtsi"
-#include "exynos4.dtsi"
+#include "exynos4210.dtsi"
/ {
model = "Insignal Origen evaluation board based on Exynos4210";
diff --git a/arch/arm/dts/exynos4210-pinctrl.dtsi
b/arch/arm/dts/exynos4210-pinctrl.dtsi
new file mode 100644
index 000..a7c2128
--- /dev/null
+++ b/arch/arm/dts/exynos4210-pinctrl.dtsi
@@ -0,0 +1,847 @@
+/*
+ * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2011-2012 Linaro Ltd.
+ * www.linaro.org
+ *
+ * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+ pinctrl@1140 {
+ gpa0: gpa0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpa1: gpa1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpb: gpb {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpc0: gpc0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpc1: gpc1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpd0: gpd0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpd1: g
[U-Boot] [PATCH v10 07/12] dm: exynos: Move smdkc100 to generic board
The generic board deadline is approaching, and we need this feature to enable driver model. Enable CONFIG_SYS_GENERIC_BOARD for smdkc100. Signed-off-by: Simon Glass --- Changes in v10: None Changes in v9: None Changes in v8: - Add new patch to move smdkc100 to generic board Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None include/configs/smdkc100.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 22835ff..a7eb33e 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -223,4 +223,6 @@ #define CONFIG_OF_LIBFDT +#define CONFIG_SYS_GENERIC_BOARD + #endif /* __CONFIG_H */ -- 2.1.0.rc2.206.gedb03e5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10 04/12] dm: exynos: dts: Adjust device tree files for U-Boot
The pinctrl bindings used by Linux are an incomplete description of the
hardware. It is possible in most cases to determine the register address
of each, but not in all cases. By adding an additional property we can
fix this, and avoid adding a table to U-Boot for every single Exynos
SOC.
Signed-off-by: Simon Glass
---
Changes in v10:
- Adjust ordering of U-Boot .dtsi includes to fix GPIO numbering order
Changes in v9: None
Changes in v8:
- Add missing special case reg property for exynos5420 GPX0
Changes in v7: None
Changes in v6:
- Move U-Boot changes into their own file
- Use exynos54xx everywhere instead of exynos5420
Changes in v5: None
Changes in v4: None
arch/arm/dts/exynos4210-pinctrl-uboot.dtsi | 27 ++
arch/arm/dts/exynos4210.dtsi | 1 +
arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi | 46 ++
arch/arm/dts/exynos4x12.dtsi | 1 +
arch/arm/dts/exynos5250-pinctrl-uboot.dtsi | 40 ++
arch/arm/dts/exynos5250.dtsi | 1 +
arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi | 40 ++
arch/arm/dts/exynos54xx-pinctrl.dtsi | 2 ++
arch/arm/dts/exynos54xx.dtsi | 1 +
9 files changed, 159 insertions(+)
create mode 100644 arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
create mode 100644 arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
create mode 100644 arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
create mode 100644 arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi
diff --git a/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
new file mode 100644
index 000..ee071c1
--- /dev/null
+++ b/arch/arm/dts/exynos4210-pinctrl-uboot.dtsi
@@ -0,0 +1,27 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ pinctrl_0: pinctrl@1140 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos4210-pinctrl";
+ };
+
+ pinctrl_1: pinctrl@1100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpy0: gpy0 {
+ reg = <0xc00>;
+ };
+ };
+
+ pinctrl_2: pinctrl@0386 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+};
diff --git a/arch/arm/dts/exynos4210.dtsi b/arch/arm/dts/exynos4210.dtsi
index 48ecd7a..634a5c1 100644
--- a/arch/arm/dts/exynos4210.dtsi
+++ b/arch/arm/dts/exynos4210.dtsi
@@ -21,6 +21,7 @@
#include "exynos4.dtsi"
#include "exynos4210-pinctrl.dtsi"
+#include "exynos4210-pinctrl-uboot.dtsi"
/ {
compatible = "samsung,exynos4210";
diff --git a/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
new file mode 100644
index 000..c02796d
--- /dev/null
+++ b/arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi
@@ -0,0 +1,46 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ pinctrl_0: pinctrl@1140 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpf0: gpf0 {
+ reg = <0xc180>;
+ };
+ gpj0: gpj0 {
+ reg = <0x240>;
+ };
+ };
+
+ pinctrl_1: pinctrl@1100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpk0: gpk0 {
+ reg = <0x40>;
+ };
+ gpm0: gpm0 {
+ reg = <0x260>;
+ };
+ gpy0: gpy0 {
+ reg = <0x120>;
+ };
+ gpx0: gpx0 {
+ reg = <0xc00>;
+ };
+ };
+
+ pinctrl_2: pinctrl@0386 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pinctrl_3: pinctrl@106E {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+};
diff --git a/arch/arm/dts/exynos4x12.dtsi b/arch/arm/dts/exynos4x12.dtsi
index 5bc8f31..5d58c6e 100644
--- a/arch/arm/dts/exynos4x12.dtsi
+++ b/arch/arm/dts/exynos4x12.dtsi
@@ -19,6 +19,7 @@
#include "exynos4.dtsi"
#include "exynos4x12-pinctrl.dtsi"
+#include "exynos4x12-pinctrl-uboot.dtsi"
/ {
aliases {
diff --git a/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
new file mode 100644
index 000..7edb0ca
--- /dev/null
+++ b/arch/arm/dts/exynos5250-pinctrl-uboot.dtsi
@@ -0,0 +1,40 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/{
+ pinctrl_0: pinctrl@1140 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpc4: gpc4 {
+ reg = <0x2e0>;
+ };
+ gpx0: gpx0 {
+
[U-Boot] [PATCH v10 03/12] dm: exynos: dts: Remove unused pinctrl information to save space
We don't include the pinctrl functions for U-Boot as they use up quite
a bit of space and are not used.
We could instead perhaps eliminate this material with fdtgrep, but so far
this tool has not made it to upstream.
Signed-off-by: Simon Glass
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
arch/arm/dts/exynos4210-pinctrl.dtsi | 543 ---
arch/arm/dts/exynos4x12-pinctrl.dtsi | 612 ---
arch/arm/dts/exynos4x12.dtsi | 100 --
arch/arm/dts/exynos5250-pinctrl.dtsi | 459 --
arch/arm/dts/exynos54xx-pinctrl.dtsi | 384 --
5 files changed, 2098 deletions(-)
diff --git a/arch/arm/dts/exynos4210-pinctrl.dtsi
b/arch/arm/dts/exynos4210-pinctrl.dtsi
index a7c2128..bda17f7 100644
--- a/arch/arm/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/dts/exynos4210-pinctrl.dtsi
@@ -144,281 +144,6 @@
#interrupt-cells = <2>;
};
- uart0_data: uart0-data {
- samsung,pins = "gpa0-0", "gpa0-1";
- samsung,pin-function = <0x2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
- };
-
- uart0_fctl: uart0-fctl {
- samsung,pins = "gpa0-2", "gpa0-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
- };
-
- uart1_data: uart1-data {
- samsung,pins = "gpa0-4", "gpa0-5";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
- };
-
- uart1_fctl: uart1-fctl {
- samsung,pins = "gpa0-6", "gpa0-7";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
- };
-
- i2c2_bus: i2c2-bus {
- samsung,pins = "gpa0-6", "gpa0-7";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
- };
-
- uart2_data: uart2-data {
- samsung,pins = "gpa1-0", "gpa1-1";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
- };
-
- uart2_fctl: uart2-fctl {
- samsung,pins = "gpa1-2", "gpa1-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
- };
-
- uart_audio_a: uart-audio-a {
- samsung,pins = "gpa1-0", "gpa1-1";
- samsung,pin-function = <4>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
- };
-
- i2c3_bus: i2c3-bus {
- samsung,pins = "gpa1-2", "gpa1-3";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
- };
-
- uart3_data: uart3-data {
- samsung,pins = "gpa1-4", "gpa1-5";
- samsung,pin-function = <2>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
- };
-
- uart_audio_b: uart-audio-b {
- samsung,pins = "gpa1-4", "gpa1-5";
- samsung,pin-function = <4>;
- samsung,pin-pud = <0>;
- samsung,pin-drv = <0>;
- };
-
- spi0_bus: spi0-bus {
- samsung,pins = "gpb-0", "gpb-2", "gpb-3";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
- };
-
- i2c4_bus: i2c4-bus {
- samsung,pins = "gpb-2", "gpb-3";
- samsung,pin-function = <3>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
- };
-
- spi1_bus: spi1-bus {
- samsung,pins = "gpb-4", "gpb-6", "gpb-7";
- samsung,pin-function = <2>;
- samsung,pin-pud = <3>;
- samsung,pin-drv = <0>;
- };
-
- i2c5_bus: i2c5-bus {
- samsung,pins = "gpb-6", "gpb-7";
- samsung,pin-function = <3>;
- samsung,pin-pud
[U-Boot] [PATCH v10 06/12] dm: exynos: Add pinctrl settings for s5p_goni
These describe the GPIOs in enough detail for U-Boot's GPIO driver to
operate.
Signed-off-by: Simon Glass
---
Changes in v10: None
Changes in v9:
- Change compatible string to s5pc110-pinctrl for s5p_goni
Changes in v8:
- Add patch containing pinctrl settings for s5p_goni
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
arch/arm/dts/s5pc110-pinctrl.dtsi | 273 ++
arch/arm/dts/s5pc1xx-goni.dts | 7 +
2 files changed, 280 insertions(+)
create mode 100644 arch/arm/dts/s5pc110-pinctrl.dtsi
diff --git a/arch/arm/dts/s5pc110-pinctrl.dtsi
b/arch/arm/dts/s5pc110-pinctrl.dtsi
new file mode 100644
index 000..d21b6ab
--- /dev/null
+++ b/arch/arm/dts/s5pc110-pinctrl.dtsi
@@ -0,0 +1,273 @@
+/*
+ * U-Boot additions to enable a generic Exynos GPIO driver
+ *
+ * Copyright (c) 2014 Google, Inc
+ */
+
+/ {
+ pinctrl@e020 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpa0: gpa0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpa1: gpa1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpb: gpb {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc0: gpc0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc1: gpc1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpd0: gpd0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpd1: gpd1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpe0: gpe0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpe1: gpe1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpf0: gpf0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpf1: gpf1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpf2: gpf2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpf3: gpf3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpg0: gpg0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpg1: gpg1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpg2: gpg2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpg3: gpg3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpi: gpi {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpj0: gpj0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpj1: gpj1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpj2: gpj2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpj3: gpj3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpj4: gpj4 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpmp01: gpmp01 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpmp02: gpmp02 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpmp03: gpmp03 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpmp04: gpmp04 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpmp05: gpmp05 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpmp06: gpmp06 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpmp07: gpmp07 {
+ gpio-controller;
+ #gpio-c
[U-Boot] [PATCH v10 10/12] dm: exynos: Tidy up GPIO defines
The defines at the top of the GPIO driver use single-character names for parameters which are not very descriptive. Improve these to use descriptive parameter names. Signed-off-by: Simon Glass --- Changes in v10: None Changes in v9: None Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None drivers/gpio/s5p_gpio.c | 21 +++-- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c index aa60188..99f2dd8 100644 --- a/drivers/gpio/s5p_gpio.c +++ b/drivers/gpio/s5p_gpio.c @@ -11,19 +11,20 @@ #define S5P_GPIO_GET_PIN(x)(x % GPIO_PER_BANK) -#define CON_MASK(x)(0xf << ((x) << 2)) -#define CON_SFR(x, v) ((v) << ((x) << 2)) +#define CON_MASK(val) (0xf << ((val) << 2)) +#define CON_SFR(gpio, cfg) ((cfg) << ((gpio) << 2)) +#define CON_SFR_UNSHIFT(val, gpio) ((val) >> ((gpio) << 2)) -#define DAT_MASK(x)(0x1 << (x)) -#define DAT_SET(x) (0x1 << (x)) +#define DAT_MASK(gpio) (0x1 << (gpio)) +#define DAT_SET(gpio) (0x1 << (gpio)) -#define PULL_MASK(x) (0x3 << ((x) << 1)) -#define PULL_MODE(x, v)((v) << ((x) << 1)) +#define PULL_MASK(gpio)(0x3 << ((gpio) << 1)) +#define PULL_MODE(gpio, pull) ((pull) << ((gpio) << 1)) -#define DRV_MASK(x)(0x3 << ((x) << 1)) -#define DRV_SET(x, m) ((m) << ((x) << 1)) -#define RATE_MASK(x) (0x1 << (x + 16)) -#define RATE_SET(x)(0x1 << (x + 16)) +#define DRV_MASK(gpio) (0x3 << ((gpio) << 1)) +#define DRV_SET(gpio, mode)((mode) << ((gpio) << 1)) +#define RATE_MASK(gpio)(0x1 << (gpio + 16)) +#define RATE_SET(gpio) (0x1 << (gpio + 16)) #define name_to_gpio(n) s5p_name_to_gpio(n) static inline int s5p_name_to_gpio(const char *name) -- 2.1.0.rc2.206.gedb03e5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10 08/12] dm: exynos: Move s5p_goni to generic board
The generic board deadline is approaching, and we need this feature to enable driver model. Enable CONFIG_SYS_GENERIC_BOARD for s5p_goni. Signed-off-by: Simon Glass --- Changes in v10: None Changes in v9: None Changes in v8: - Add new patch to move s5p_goni to generic board Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None include/configs/s5p_goni.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 0c6e9c7..fa0e737 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -286,4 +286,6 @@ #define CONFIG_OF_LIBFDT +#define CONFIG_SYS_GENERIC_BOARD + #endif /* __CONFIG_H */ -- 2.1.0.rc2.206.gedb03e5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/11] fdt: Allow ft_board_setup() to report failure
Hi Anatolij,
On 17 October 2014 14:19, Anatolij Gustschin wrote:
> Hi Simon,
>
> some comments on return values and error reporting below:
>
> On Wed, 15 Oct 2014 02:05:31 -0600
> Simon Glass wrote:
> ...
>> diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c
>> index 53f9b34..afac3f9 100644
>> --- a/board/amcc/sequoia/sequoia.c
>> +++ b/board/amcc/sequoia/sequoia.c
>> @@ -10,6 +10,7 @@
>> */
>>
>> #include
>> +#include
>> #include
>> #include
>> #include
>> @@ -363,7 +364,7 @@ void board_pci_fixup_irq(struct pci_controller *hose,
>> pci_dev_t dev)
>> * On NAND-booting sequoia, we need to patch the chips select numbers
>> * in the dtb (CS0 - NAND, CS3 - NOR)
>> */
>> -void ft_board_setup(void *blob, bd_t *bd)
>> +int ft_board_setup(void *blob, bd_t *bd)
>> {
>> int rc;
>> int len;
>> @@ -381,7 +382,7 @@ void ft_board_setup(void *blob, bd_t *bd)
>> prop = fdt_get_property_w(blob, nodeoffset, "reg", &len);
>> if (prop == NULL) {
>> printf("Unable to update NOR chip select for NAND booting\n");
>> - return;
>> + return -ENOSPC;
>
> return -FDT_ERR_NOSPACE;
>
> otherwise failure reporting of ft_board_setup() as added in the next
> patch will output "".
OK so I think you are saying that this should return an FDT error
rather than a U-Boot error. This is a much better idea, I will change
it throughout.
Thanks very much for your review.
Regards,
Simon
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[U-Boot] [PATCH v10 12/12] dm: exynos: gpio: Convert to driver model
Convert the exynos GPIO driver to driver model. This implements the generic
GPIO interface but not the extra Exynos-specific functions.
Signed-off-by: Simon Glass
---
Changes in v10:
- Remove gaps in the GPIO numbering since these are not needed now
Changes in v9:
- Add missing compatible strings from exynos_gpio_ids[]
Changes in v8:
- Enable driver model for smdkc100 and s5p_goni separately
Changes in v7:
- Bring in patches from the SPI series to move post-reloc DM init earlier
Changes in v6: None
Changes in v5:
- Remove RFC label now that build errors are fixed
- Tidy up and update cover letter message
- Avoid reordering functions
Changes in v4:
- Add patches for exynos GPIO support
arch/arm/include/asm/arch-exynos/gpio.h | 82 +++---
arch/arm/include/asm/arch-s5pc1xx/gpio.h | 3 +-
drivers/gpio/s5p_gpio.c | 424 +--
include/configs/exynos-common.h | 4 +
include/configs/s5p_goni.h | 3 +
include/configs/smdkc100.h | 3 +
6 files changed, 340 insertions(+), 179 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
index ba169b9..ad2ece6 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -284,7 +284,7 @@ enum exynos4_gpio_pin {
EXYNOS4_GPIO_Y65,
EXYNOS4_GPIO_Y66,
EXYNOS4_GPIO_Y67,
- EXYNOS4_GPIO_X00 = 896, /* 896 0x380 */
+ EXYNOS4_GPIO_X00, /* 256 0x100 */
EXYNOS4_GPIO_X01,
EXYNOS4_GPIO_X02,
EXYNOS4_GPIO_X03,
@@ -292,7 +292,7 @@ enum exynos4_gpio_pin {
EXYNOS4_GPIO_X05,
EXYNOS4_GPIO_X06,
EXYNOS4_GPIO_X07,
- EXYNOS4_GPIO_X10, /* 904 0x388 */
+ EXYNOS4_GPIO_X10, /* 264 0x108 */
EXYNOS4_GPIO_X11,
EXYNOS4_GPIO_X12,
EXYNOS4_GPIO_X13,
@@ -300,7 +300,7 @@ enum exynos4_gpio_pin {
EXYNOS4_GPIO_X15,
EXYNOS4_GPIO_X16,
EXYNOS4_GPIO_X17,
- EXYNOS4_GPIO_X20, /* 912 0x390 */
+ EXYNOS4_GPIO_X20, /* 272 0x110 */
EXYNOS4_GPIO_X21,
EXYNOS4_GPIO_X22,
EXYNOS4_GPIO_X23,
@@ -308,7 +308,7 @@ enum exynos4_gpio_pin {
EXYNOS4_GPIO_X25,
EXYNOS4_GPIO_X26,
EXYNOS4_GPIO_X27,
- EXYNOS4_GPIO_X30, /* 920 0x398 */
+ EXYNOS4_GPIO_X30, /* 280 0x118 */
EXYNOS4_GPIO_X31,
EXYNOS4_GPIO_X32,
EXYNOS4_GPIO_X33,
@@ -318,7 +318,7 @@ enum exynos4_gpio_pin {
EXYNOS4_GPIO_X37,
/* GPIO_PART3_STARTS */
- EXYNOS4_GPIO_MAX_PORT_PART_2, /* 928 0x3A0 */
+ EXYNOS4_GPIO_MAX_PORT_PART_2, /* 288 0x120 */
EXYNOS4_GPIO_Z0 = EXYNOS4_GPIO_MAX_PORT_PART_2,
EXYNOS4_GPIO_Z1,
EXYNOS4_GPIO_Z2,
@@ -389,7 +389,7 @@ enum exynos4X12_gpio_pin {
EXYNOS4X12_GPIO_D15,
EXYNOS4X12_GPIO_D16,
EXYNOS4X12_GPIO_D17,
- EXYNOS4X12_GPIO_F00 = 96, /* 96 0x60 */
+ EXYNOS4X12_GPIO_F00,/* 56 0x38 */
EXYNOS4X12_GPIO_F01,
EXYNOS4X12_GPIO_F02,
EXYNOS4X12_GPIO_F03,
@@ -397,7 +397,7 @@ enum exynos4X12_gpio_pin {
EXYNOS4X12_GPIO_F05,
EXYNOS4X12_GPIO_F06,
EXYNOS4X12_GPIO_F07,
- EXYNOS4X12_GPIO_F10,/* 104 0x68 */
+ EXYNOS4X12_GPIO_F10,/* 64 0x40 */
EXYNOS4X12_GPIO_F11,
EXYNOS4X12_GPIO_F12,
EXYNOS4X12_GPIO_F13,
@@ -405,7 +405,7 @@ enum exynos4X12_gpio_pin {
EXYNOS4X12_GPIO_F15,
EXYNOS4X12_GPIO_F16,
EXYNOS4X12_GPIO_F17,
- EXYNOS4X12_GPIO_F20,/* 112 0x70 */
+ EXYNOS4X12_GPIO_F20,/* 72 0x48 */
EXYNOS4X12_GPIO_F21,
EXYNOS4X12_GPIO_F22,
EXYNOS4X12_GPIO_F23,
@@ -413,7 +413,7 @@ enum exynos4X12_gpio_pin {
EXYNOS4X12_GPIO_F25,
EXYNOS4X12_GPIO_F26,
EXYNOS4X12_GPIO_F27,
- EXYNOS4X12_GPIO_F30,/* 120 0x78 */
+ EXYNOS4X12_GPIO_F30,/* 80 0x50 */
EXYNOS4X12_GPIO_F31,
EXYNOS4X12_GPIO_F32,
EXYNOS4X12_GPIO_F33,
@@ -421,7 +421,7 @@ enum exynos4X12_gpio_pin {
EXYNOS4X12_GPIO_F35,
EXYNOS4X12_GPIO_F36,
EXYNOS4X12_GPIO_F37,
- EXYNOS4X12_GPIO_J00 = 144, /* 144 0x90 */
+ EXYNOS4X12_GPIO_J00,/* 88 0x58 */
EXYNOS4X12_GPIO_J01,
EXYNOS4X12_GPIO_J02,
EXYNOS4X12_GPIO_J03,
@@ -429,7 +429,7 @@ enum exynos4X12_gpio_pin {
EXYNOS4X12_GPIO_J05,
EXYNOS4X12_GPIO_J06,
EXYNOS4X12_GPIO_J07,
- EXYNOS4X12_GPIO_J10,/* 152 0x98 */
+ EXYNOS4X12_GPIO_J10,/* 96 0x60 */
EXYNOS4X12_GPIO_J11,
EXYNOS4X12_GPIO_J12,
EXYNOS4X12_GPIO_J13,
@@ -439,8 +439,8 @@ enum exynos4X12_gpio_pin {
EXYNOS4X12_GPIO_J17,
/* GPIO_PART2_STARTS */
- EXYNOS4X12_GPIO_MAX_
[U-Boot] [PATCH v10 09/12] dm: exynos: Tidy up GPIO headers
The wrong header is being included, thus requiring the code to re-declare
the generic GPIO interface in each GPIO header.
Fix this.
Signed-off-by: Simon Glass
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
arch/arm/cpu/armv7/exynos/pinmux.c | 2 +-
arch/arm/include/asm/arch-exynos/gpio.h | 5 -
arch/arm/include/asm/arch-s5pc1xx/gpio.h | 4
board/samsung/arndale/arndale.c | 2 +-
board/samsung/common/board.c | 2 +-
board/samsung/common/misc.c | 1 -
board/samsung/goni/goni.c| 2 +-
board/samsung/origen/origen.c| 2 +-
board/samsung/smdk5420/smdk5420.c| 2 +-
board/samsung/smdkc100/smdkc100.c| 2 +-
board/samsung/smdkv310/smdkv310.c| 2 +-
board/samsung/trats/trats.c | 2 +-
board/samsung/trats2/trats2.c| 1 +
board/samsung/universal_c210/universal.c | 1 -
drivers/gpio/s5p_gpio.c | 3 +--
15 files changed, 11 insertions(+), 22 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index b929486..2caeb3e 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -7,7 +7,7 @@
#include
#include
-#include
+#include
#include
#include
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
index 8fb5c23..ba169b9 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -1504,12 +1504,7 @@ static const struct gpio_name_num_table
exynos5420_gpio_table[] = {
void gpio_cfg_pin(int gpio, int cfg);
void gpio_set_pull(int gpio, int mode);
void gpio_set_drv(int gpio, int mode);
-int gpio_direction_input(unsigned gpio);
-int gpio_direction_output(unsigned gpio, int value);
-int gpio_set_value(unsigned gpio, int value);
-int gpio_get_value(unsigned gpio);
void gpio_set_rate(int gpio, int mode);
-struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio);
int s5p_gpio_get_pin(unsigned gpio);
#endif
diff --git a/arch/arm/include/asm/arch-s5pc1xx/gpio.h
b/arch/arm/include/asm/arch-s5pc1xx/gpio.h
index d5dbc22..bd6f2d2 100644
--- a/arch/arm/include/asm/arch-s5pc1xx/gpio.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/gpio.h
@@ -815,11 +815,7 @@ static const struct gpio_name_num_table
s5pc110_gpio_table[] = {
void gpio_cfg_pin(int gpio, int cfg);
void gpio_set_pull(int gpio, int mode);
void gpio_set_drv(int gpio, int mode);
-int gpio_direction_output(unsigned gpio, int value);
-int gpio_set_value(unsigned gpio, int value);
-int gpio_get_value(unsigned gpio);
void gpio_set_rate(int gpio, int mode);
-struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio);
int s5p_gpio_get_pin(unsigned gpio);
/* GPIO pins per bank */
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 83fd3bd..e39795d 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -6,9 +6,9 @@
#include
#include
+#include
#include
#include
-#include
#include
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 5c3c5bb..c119641 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -13,10 +13,10 @@
#include
#include
#include
+#include
#include
#include
#include
-#include
#include
#include
#include
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 8766f0c..b935922 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -14,7 +14,6 @@
#include
#include
#include
-#include
#include
#include
#include
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index eb0f9bf..01be714 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -7,7 +7,7 @@
*/
#include
-#include
+#include
#include
#include
#include
diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
index a539267..99a2fac 100644
--- a/board/samsung/origen/origen.c
+++ b/board/samsung/origen/origen.c
@@ -6,8 +6,8 @@
#include
#include
+#include
#include
-#include
#include
#include
#include
diff --git a/board/samsung/smdk5420/smdk5420.c
b/board/samsung/smdk5420/smdk5420.c
index 270ee83..47998ab 100644
--- a/board/samsung/smdk5420/smdk5420.c
+++ b/board/samsung/smdk5420/smdk5420.c
@@ -11,9 +11,9 @@
#include
#include
#include
+#include
#include
#include
-#include
#include
#include
#include
diff --git a/board/samsung/smdkc100/smdkc100.c
b/board/samsung/smdkc100/smdkc100.c
index e009564..66b6a98 100644
--- a/board/samsung/smdkc100/smdkc100.c
+++ b/board/samsung/smdkc100/smdkc100.c
@@ -7,9 +7,9 @@
*/
#include
+#include
#include
#include
-#include
#include
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/samsung/smdkv310/smdkv310.c
b/board/samsung/smdkv310/smd
Re: [U-Boot] [PATCH 0/4] dm: rpi: Move Raspberry Pi to use driver model
On 10/19/2014 09:14 PM, Simon Glass wrote: > Hi Stephen, > > On 17 October 2014 20:51, Stephen Warren wrote: >> On 09/30/2014 07:41 PM, Stephen Warren wrote: >>> On 09/22/2014 05:30 PM, Simon Glass wrote: This series adds driver model support to the GPIO and serial drivers used by Raspberry Pi, and moves Raspberry Pi over to driver model. This requires adding driver model support to the pl01x serial driver, and replacing the bcm2835 GPIO driver with a driver model version (since there are no longer clients that don't use driver model). See u-boot-dm.git branch rpi-working for the tree this is based on. >>> >>> The series, >>> Tested-by: Stephen Warren >> >> Hmm. I take that back. Patch 4 causes a problem, at least when applied >> on top of u-boot/master from today. >> >> Basic serial output works just fine, and I can interact with U-Boot >> without issue. However, when the boot scripts execute and load an >> extlinux.conf, U-Boot hangs. Up to patch 3, everything is fine. >> >> U-Boot 2014.10-4-g7830ed7 (Oct 17 2014 - 20:47:19) >> >> DRAM: 480 MiB >> WARNING: Caches not enabled >> MMC: bcm2835_sdhci: 0 >> Using default environment >> >> In:serial >> Out: lcd >> Err: lcd >> reading /uEnv.txt >> 24 bytes read in 14 ms (1000 Bytes/s) >> Hit any key to stop autoboot: 0 >> switch to partitions #0, OK >> mmc0 is current device >> Scanning mmc 0... >> Found /extlinux/extlinux.conf >> Retrieving file: /extlinux/extlinux.conf >> reading /extlinux/extlinux.conf >> (U-Boot hangs here) >> > > Can you please point me to where I can get an image to try this with? > Also did you check with dm/next? There may be dependent patches, > although the nature of the problem suggests not. I use (a pretty old version of, but I doubt that matters) RPi Foundation's Raspbian image, and compiled the kernel and U-Boot according to: http://elinux.org/index.php?title=RPi_Upstream_Kernel_Compilation&oldid=351104 http://elinux.org/RPi_U-Boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] common/cmd_io.c: Fix incorrect help for iod/iow
Hi Simon, On Tue, Oct 21, 2014 at 9:34 AM, Simon Glass wrote: > Hi Bin, > > OK I see - interesting! I talked with Wolfgang at the mini-Summit last > week about a bare x86 port and he seemed keen on the idea. So I've > been taking a look. I was planning to use the Minnowboard Max, but I > don't have one yet (and it may be a long wait) so am looking at > another board. Glad to see we are going to have the bare x86 support again :) > Are you planning to post patches? I am getting close to posting > patches for booting to a prompt on link. If it helps I've pushed my > WIP tree to u-boot-x86/bare-working. It boots to a prompt but does not > include SMM, display and resource allocation (among other things). Yes, I would like to post patches when they are ready. Right now my patches are against the U-Boot v2014.07 release. One issue is that I am using Intel FSP for the memory and chipset initialization, which I am not sure if some IP review is needed. But given coreboot already adopts Intel FSP, I think it would be good. > Why are you using U-Boot? Small footprint, extreme fast boot speed, and a user friendly shell. Just cool for an embedded x86 platform. Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Hi Simon, There may exist a problem about FIT image signature verify , can you check this problem?
Hi Simon & All
These days I tested verified U-Boot on ARM Foundation. And I found a problem
when I tested like this:
1) Generate a FIT image and signature blob file like: mkimage -D "-I dts
-O dtb -p 2000" -F kernel.its -k keys -K fvp.dtb -r signed_image.fit
2) Compile the Uboot like :
Step1: Make distclean
Step2: Make DEVICE_TREE=foundation all. After this step, there generated a
u-boot-dtb.bin file, but public key was not contained in it.
Normally I should use the public key contained blob file fvp.dtb to compile
Uoobt like: make EXT_DTB=/fvp.dtb.
In my test case, I omitted the last step, and just choose step2's result to
test.
3) Package firmware together with uboot
4) Boot system on Foundation
For the signed_image.fit contains the signature information, but U-Boot has no
public key information contained, When U-boot load the image,
There occurred error information like ": No signature node found: ", this
result was normal.
But the system wasn't stopped after this error information, it keep going on
and boot the system success at last!
I checked the source code about UBoot, and found problem in function
fit_config_verify_required_sigs
Please note the red part.
int fit_config_verify_required_sigs(const void *fit, int conf_noffset,
const void *sig_blob)
{
int noffset;
int sig_node;
/* Work out what we need to verify */
sig_node = fdt_subnode_offset(sig_blob, 0, FIT_SIG_NODENAME);
if (sig_node < 0) {
debug("%s: No signature node found: %s\n", __func__,
fdt_strerror(sig_node));
return 0; --> Since mismatch exists between UBoot and images, system
should return a error code. Return 0 means the result was ok.
}
.
After I modified return0 to return -1, result seems ok.
Please check this problem, and confirm should I have to commit a patch or
someone else will modify it.
Sincerely.
Jason
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[U-Boot] [PATCH] kbuild: clear VENDOR variable to fix build error on tcsh
Since the environment "VENDOR" is set in tcsh, it must be cleared in our makefile. Otherwise, boards without CONFIG_SYS_VENDOR fail to build: > make CROSS_COMPILE=arm-linux-gnueabi- wandboard_quad_defconfig all [ snip ] AR arch/arm/lib/lib.a CC arch/arm/lib/eabi_compat.o scripts/Makefile.build:55: /home/foo/u-boot/board/unknown/wandboard/ \ Makefile: No such file or directory make[2]: *** No rule to make target `/home/foo/u-boot/board/unknown/ \ wandboard/Makefile'. Stop. make[1]: *** [board/unknown/wandboard] Error 2 make: *** [__build_one_by_one] Error 2 Signed-off-by: Masahiro Yamada Reported-by: Tom Everett Reported-by: Jeroen Hofstee --- config.mk | 2 ++ 1 file changed, 2 insertions(+) diff --git a/config.mk b/config.mk index 2157537..00805bd 100644 --- a/config.mk +++ b/config.mk @@ -18,6 +18,8 @@ PLATFORM_LDFLAGS := LDFLAGS := LDFLAGS_FINAL := OBJCOPYFLAGS := +# clear VENDOR for tcsh +VENDOR := # ARCH := $(CONFIG_SYS_ARCH:"%"=%) -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
