On 20 October 2014 00:13, Marek Vasut <ma...@denx.de> wrote: > Add short documentation-alike note on how to use the Altera SPI > driver with the EPCS/EPCQx1 FPGA IP block on SoCFPGA Cyclone V. > > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Chin Liang See <cl...@altera.com> > Cc: Dinh Nguyen <dingu...@altera.com> > Cc: Albert Aribaud <albert.u.b...@aribaud.net> > Cc: Tom Rini <tr...@ti.com> > Cc: Wolfgang Denk <w...@denx.de> > Cc: Pavel Machek <pa...@denx.de> > Cc: Jagannadha Sutradharudu Teki <jagannadh.t...@gmail.com> > --- > drivers/spi/altera_spi.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c > index 3065e96..0566e4f 100644 > --- a/drivers/spi/altera_spi.c > +++ b/drivers/spi/altera_spi.c > @@ -4,6 +4,14 @@ > * based on bfin_spi.c > * Copyright (c) 2005-2008 Analog Devices Inc. > * Copyright (C) 2010 Thomas Chou <tho...@wytron.com.tw> > + * Copyright (C) 2014 Marek Vasut <ma...@denx.de>
Looks not good to me - with few changes. > + * > + * SoCFPGA EPCS/EPCQx1 mini howto: > + * - Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild > + * - The controller base address is the "Base" in QSys + 0x400 > + * - Set MSEL[4:0]=10010 (AS Standard) > + * - Load the bitstream into FPGA, enable bridges > + * - Only then will the driver work Instead of here, Pls- try to test any hardware with this written sequence with the obtained logs copy that info on doc/SPI we're maintaining the test in this format. Testing the written sequence with logs are more authentic than listing on a driver file. > * > * SPDX-License-Identifier: GPL-2.0+ > */ > -- > 2.1.1 > thanks! -- Jagan. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
