On Monday, October 20, 2014 at 05:10:17 PM, Jagan Teki wrote: [...]
> > * based on bfin_spi.c > > * Copyright (c) 2005-2008 Analog Devices Inc. > > * Copyright (C) 2010 Thomas Chou <tho...@wytron.com.tw> > > > > + * Copyright (C) 2014 Marek Vasut <ma...@denx.de> > > Looks not good to me - with few changes. > > > + * > > + * SoCFPGA EPCS/EPCQx1 mini howto: > > + * - Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild > > + * - The controller base address is the "Base" in QSys + 0x400 > > + * - Set MSEL[4:0]=10010 (AS Standard) > > + * - Load the bitstream into FPGA, enable bridges > > + * - Only then will the driver work > > Instead of here, > Pls- try to test any hardware with this written sequence with the > obtained logs copy > that info on doc/SPI we're maintaining the test in this format. > > Testing the written sequence with logs are more authentic than listing > on a driver file. Excuse me, but I don't quite understand what you're asking of me, sorry. Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
