[U-Boot] boot script
Hello, I am new using U-boot. and I wondering whetjer you could help. What I understood is that I can generate a file boot.scr to overwrite any setting done in u-boot.bin. Is that correct? To generate boot.scr I am using mkimage mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n 'NAND installer' -d uEnv1.txt boot.scr But in my script file I do not manage to change the setting of my arguments: I am nou sure of the two line setenv bootargs 'rootdelay=1 ip=192.168.1.10:192.168.1.255:192.168.1.1:255.255.255.0:devkit:eth0:off' saveenv If they are well written, if they are well located in mycsript file ? I am using the a board based on AM3517 --- nand erase.chip clean setenv bootdelay 2 mmc rescan 0 fatload mmc 0:1 $loadaddr MLO nandecc hw 2; nand erase 0 8 nand write $loadaddr 0 8 fatload mmc 0:1 $loadaddr NAND-u-boot.bin nandecc sw; nand erase 8 16 nand write $loadaddr 8 16 setenv bootargs 'rootdelay=1 ip=192.168.1.10:192.168.1.255:192.168.1.1:255.255.255.0:devkit:eth0:off' saveenv fatload mmc 0:1 $loadaddr NAND-uImage nandecc hw; nand erase 28 40 nand write $loadaddr 28 40 fatload mmc 0:1 $loadaddr uImage run mmcboot --- Best regards Stephane ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] FIT image and modify device-tree
Hi! We are using U-Boot and FIT images, but also want to modify the FDT during boot, today we just do: bootm 0xe800#config@1 which contains, linux, romfs and fdt. But I want to include additional nodes in the FDT to pass to linux (or pass an extra device tree if possible, just want to pass more information to linux). Is this possible when using FIT image. If not, what is the recommended way to send information from U-Boot to Linux? Regards Mattias ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mxs: timrot: Add support to i.MX23
From: Fadil Berisha
This patch add timer support to i.MX23 and complete bit fields and values
on regs-timrot.h.
Testet on imx23-olinuxino board.
Signed-off-by: Fadil Berisha
---
arch/arm/cpu/arm926ejs/mxs/timer.c | 19 +-
arch/arm/include/asm/arch-mxs/regs-timrot.h | 91 +++
2 files changed, 108 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c
b/arch/arm/cpu/arm926ejs/mxs/timer.c
index 4ed75e6..a99b122 100644
--- a/arch/arm/cpu/arm926ejs/mxs/timer.c
+++ b/arch/arm/cpu/arm926ejs/mxs/timer.c
@@ -32,7 +32,11 @@
#include
/* Maximum fixed count */
-#define TIMER_LOAD_VAL 0x
+#if defined(CONFIG_MX23)
+#define TIMER_LOAD_VAL 0x
+#elif defined(CONFIG_MX28)
+#define TIMER_LOAD_VAL 0x
+#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -77,7 +81,11 @@ int timer_init(void)
&timrot_regs->hw_timrot_timctrl0);
/* Set fixed_count to maximal value */
+#if defined(CONFIG_MX23)
+ writel(TIMER_LOAD_VAL-1, HW_TIMROT_TIMCOUNT0);
+#elif defined(CONFIG_MX28)
writel(TIMER_LOAD_VAL, &timrot_regs->hw_timrot_fixed_count0);
+#endif
return 0;
}
@@ -86,9 +94,16 @@ unsigned long long get_ticks(void)
{
struct mxs_timrot_regs *timrot_regs =
(struct mxs_timrot_regs *)MXS_TIMROT_BASE;
+ uint32_t now;
/* Current tick value */
- uint32_t now = readl(&timrot_regs->hw_timrot_running_count0);
+#if defined(CONFIG_MX23)
+ /* upper bits are the valid */
+ now = (readl(HW_TIMROT_TIMCOUNT0) >>
+ TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET);
+#elif defined(CONFIG_MX28)
+ now = readl(&timrot_regs->hw_timrot_running_count0);
+#endif
if (lastdec >= now) {
/*
diff --git a/arch/arm/include/asm/arch-mxs/regs-timrot.h
b/arch/arm/include/asm/arch-mxs/regs-timrot.h
index 529a3bc..400259a 100644
--- a/arch/arm/include/asm/arch-mxs/regs-timrot.h
+++ b/arch/arm/include/asm/arch-mxs/regs-timrot.h
@@ -71,7 +71,11 @@ struct mxs_timrot_regs {
#defineTIMROT_ROTCTRL_OVERSAMPLE_1X(0x3 << 10)
#defineTIMROT_ROTCTRL_POLARITY_B (1 << 9)
#defineTIMROT_ROTCTRL_POLARITY_A (1 << 8)
+#if defined(CONFIG_MX23)
+#defineTIMROT_ROTCTRL_SELECT_B_MASK(0x7 << 4)
+#elif defined(CONFIG_MX28)
#defineTIMROT_ROTCTRL_SELECT_B_MASK(0xf << 4)
+#endif
#defineTIMROT_ROTCTRL_SELECT_B_OFFSET 4
#defineTIMROT_ROTCTRL_SELECT_B_NEVER_TICK (0x0 << 4)
#defineTIMROT_ROTCTRL_SELECT_B_PWM0(0x1 << 4)
@@ -79,12 +83,21 @@ struct mxs_timrot_regs {
#defineTIMROT_ROTCTRL_SELECT_B_PWM2(0x3 << 4)
#defineTIMROT_ROTCTRL_SELECT_B_PWM3(0x4 << 4)
#defineTIMROT_ROTCTRL_SELECT_B_PWM4(0x5 << 4)
+#if defined(CONFIG_MX23)
+#defineTIMROT_ROTCTRL_SELECT_B_ROTARYA (0x6 << 4)
+#defineTIMROT_ROTCTRL_SELECT_B_ROTARYB (0x7 << 4)
+#elif defined(CONFIG_MX28)
#defineTIMROT_ROTCTRL_SELECT_B_PWM5(0x6 << 4)
#defineTIMROT_ROTCTRL_SELECT_B_PWM6(0x7 << 4)
#defineTIMROT_ROTCTRL_SELECT_B_PWM7(0x8 << 4)
#defineTIMROT_ROTCTRL_SELECT_B_ROTARYA (0x9 << 4)
#defineTIMROT_ROTCTRL_SELECT_B_ROTARYB (0xa << 4)
+#endif
+#if defined(CONFIG_MX23)
+#defineTIMROT_ROTCTRL_SELECT_A_MASK0x7
+#elif defined(CONFIG_MX28)
#defineTIMROT_ROTCTRL_SELECT_A_MASK0xf
+#endif
#defineTIMROT_ROTCTRL_SELECT_A_OFFSET 0
#defineTIMROT_ROTCTRL_SELECT_A_NEVER_TICK 0x0
#defineTIMROT_ROTCTRL_SELECT_A_PWM00x1
@@ -92,18 +105,25 @@ struct mxs_timrot_regs {
#defineTIMROT_ROTCTRL_SELECT_A_PWM20x3
#defineTIMROT_ROTCTRL_SELECT_A_PWM30x4
#defineTIMROT_ROTCTRL_SELECT_A_PWM40x5
+#if defined(CONFIG_MX23)
+#defineTIMROT_ROTCTRL_SELECT_A_ROTARYA 0x6
+#defineTIMROT_ROTCTRL_SELECT_A_ROTARYB 0x7
+#elif defined(CONFIG_MX28)
#defineTIMROT_ROTCTRL_SELECT_A_PWM50x6
#defineTIMROT_ROTCTRL_SELECT_A_PWM60x7
#defineTIMROT_ROTCTRL_SELECT_A_PWM70x8
#defineTIMROT_ROTCTRL_SELECT_A_ROTARYA 0x9
#defineTIMROT_ROTCTRL_SELECT_A_ROTARYB 0xa
+#endif
#defineTIMROT_ROTCOUNT_UPDOWN_MASK 0x
#defineTIMROT_ROTCOUNT_UPDOWN_OFFSET 0
#defineTIMROT_TIMCTRLn_IRQ (1 << 15)
#defineTIMROT_TIMCTRLn_IRQ_EN
[U-Boot] fw_env.config
Hi guys, I's like to ask a couple of quick questions to clear a disagreement we have at the office. Is the file fw_env.config needed during compilation time to build u-boot? Or is it in fact only needed at runtime by the tools fw_printenv/saveenv? Thank you and sorry if this questions has been answered before. Regards, Dimitris ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] fw_env.config
Dear Dimitrios Siganos, On 02/12/2013 11:43 PM, Dimitrios Siganos wrote: > Hi guys, > > I's like to ask a couple of quick questions to clear a disagreement we > have at the office. > > Is the file fw_env.config needed during compilation time to build u-boot? No. > Or is it in fact only needed at runtime by the tools fw_printenv/saveenv? MTD setup in /etc/fw_env.config can be used by fw_printenv/saveenv, but it depends on compile configuration of these tool(s). fw_printenv can be compiled with integrated mtd setup and will then not parse the configuration file. But yes, the default is to have an /etc/fw_env.config which describes the mtd setup for u-boot environment. At least this is the case for distributed versions like in Debian. Best regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Support required for PPC440gx
Hi Sadashiv, On 13.02.2013 08:11, Sadashiva Reddy N wrote: > I am Sadashiva Reddy working in Mistral Solutions Pvt Ltd. > > I am using AMCC PPC440Gx processor for our project presently the board is > working with vxWorks. > But our customer new requirement is same board should be ported with linux > but porting time is very less. > > So, I am asking the help from you. > > Where do I get proper U-boot and kernel source code for the below > mentioned specification or nearly related board specfication from your > website. > > Can I get any link where I can get the working u-boot and kernel code for > the below specification or near to the specfication. No, I'm afraid its not that easy. You seem to have a custom PPC440GX board which is not supported in mainline U-Boot and Linux. So there is no link to a "working u-boot and kernel code" for such a configuration. The 440GX is supported in U-Boot and Linux though (even if its not tested for quite some time). Best you could do is base your work on a supported 440GX board, for example the IBM/AMCC/AMP Ocotea board. But you need to port this code to your custom board. So either go ahead and do the porting yourself (feel free to ask some questions while doing this on the lists), or if time is critical and you have no experience here you might consider to hire an expert to do this. Hope this helps a bit. Best regards, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] oxnas810 (eTrayz) u-Boot 1.1.2 usb support
Dear Frank van der Jagt, This question shall go to the ML. > Hi, > > I'm trying to get usb support going for eTrayz nas (oxnas810 device). > http://www.plxtech.com/products/consumer/oxe810dse > This device uses u-Boot 1.1.2 to boot from NOR flash. > > I have following questions: > > - Why hasn't the source of the oxnas810 drivers been published to the > u-Boot 1.1.2 tree. If I look there there are no drivers for the board in > the source tree. > Was PLX Tech not obliged to do so under the open source licence ? The source must be published under the terms of GPL, not commited upstream. > - Where can I get hold of the u-Boot 1.1.2 driver source for this device > and was usb support implemented for this board ? Ask your hardware vendor. > Thanks and rgds, > Frank Hunter > intraxit Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 04/10] am33xx: refactor am33xx mux support and add ti814x support
AM33XX and TI814X have a similar mux though the pinmux register
layout and address space differ. Add a separate ti814x mux include
to support the TI814X-specific differences.
Signed-off-by: Matt Porter
---
arch/arm/include/asm/arch-am33xx/mux-am335x.h | 246
arch/arm/include/asm/arch-am33xx/mux-ti814x.h | 310 +
arch/arm/include/asm/arch-am33xx/mux.h| 230 +-
3 files changed, 562 insertions(+), 224 deletions(-)
create mode 100644 arch/arm/include/asm/arch-am33xx/mux-am335x.h
create mode 100644 arch/arm/include/asm/arch-am33xx/mux-ti814x.h
diff --git a/arch/arm/include/asm/arch-am33xx/mux-am335x.h
b/arch/arm/include/asm/arch-am33xx/mux-am335x.h
new file mode 100644
index 000..7258135
--- /dev/null
+++ b/arch/arm/include/asm/arch-am33xx/mux-am335x.h
@@ -0,0 +1,246 @@
+/*
+ * mux.h
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _MUX_AM335X_H_
+#define _MUX_AM335X_H_
+
+#include
+#include
+
+#define MUX_CFG(value, offset) \
+ __raw_writel(value, (CTRL_BASE + offset));
+
+/* PAD Control Fields */
+#define SLEWCTRL (0x1 << 6)
+#define RXACTIVE (0x1 << 5)
+#define PULLUP_EN (0x1 << 4) /* Pull UP Selection */
+#define PULLUDEN (0x0 << 3) /* Pull up enabled */
+#define PULLUDDIS (0x1 << 3) /* Pull up disabled */
+#define MODE(val) val /* used for Readability */
+
+/*
+ * PAD CONTROL OFFSETS
+ * Field names corresponds to the pad signal name
+ */
+struct pad_signals {
+ int gpmc_ad0;
+ int gpmc_ad1;
+ int gpmc_ad2;
+ int gpmc_ad3;
+ int gpmc_ad4;
+ int gpmc_ad5;
+ int gpmc_ad6;
+ int gpmc_ad7;
+ int gpmc_ad8;
+ int gpmc_ad9;
+ int gpmc_ad10;
+ int gpmc_ad11;
+ int gpmc_ad12;
+ int gpmc_ad13;
+ int gpmc_ad14;
+ int gpmc_ad15;
+ int gpmc_a0;
+ int gpmc_a1;
+ int gpmc_a2;
+ int gpmc_a3;
+ int gpmc_a4;
+ int gpmc_a5;
+ int gpmc_a6;
+ int gpmc_a7;
+ int gpmc_a8;
+ int gpmc_a9;
+ int gpmc_a10;
+ int gpmc_a11;
+ int gpmc_wait0;
+ int gpmc_wpn;
+ int gpmc_be1n;
+ int gpmc_csn0;
+ int gpmc_csn1;
+ int gpmc_csn2;
+ int gpmc_csn3;
+ int gpmc_clk;
+ int gpmc_advn_ale;
+ int gpmc_oen_ren;
+ int gpmc_wen;
+ int gpmc_be0n_cle;
+ int lcd_data0;
+ int lcd_data1;
+ int lcd_data2;
+ int lcd_data3;
+ int lcd_data4;
+ int lcd_data5;
+ int lcd_data6;
+ int lcd_data7;
+ int lcd_data8;
+ int lcd_data9;
+ int lcd_data10;
+ int lcd_data11;
+ int lcd_data12;
+ int lcd_data13;
+ int lcd_data14;
+ int lcd_data15;
+ int lcd_vsync;
+ int lcd_hsync;
+ int lcd_pclk;
+ int lcd_ac_bias_en;
+ int mmc0_dat3;
+ int mmc0_dat2;
+ int mmc0_dat1;
+ int mmc0_dat0;
+ int mmc0_clk;
+ int mmc0_cmd;
+ int mii1_col;
+ int mii1_crs;
+ int mii1_rxerr;
+ int mii1_txen;
+ int mii1_rxdv;
+ int mii1_txd3;
+ int mii1_txd2;
+ int mii1_txd1;
+ int mii1_txd0;
+ int mii1_txclk;
+ int mii1_rxclk;
+ int mii1_rxd3;
+ int mii1_rxd2;
+ int mii1_rxd1;
+ int mii1_rxd0;
+ int rmii1_refclk;
+ int mdio_data;
+ int mdio_clk;
+ int spi0_sclk;
+ int spi0_d0;
+ int spi0_d1;
+ int spi0_cs0;
+ int spi0_cs1;
+ int ecap0_in_pwm0_out;
+ int uart0_ctsn;
+ int uart0_rtsn;
+ int uart0_rxd;
+ int uart0_txd;
+ int uart1_ctsn;
+ int uart1_rtsn;
+ int uart1_rxd;
+ int uart1_txd;
+ int i2c0_sda;
+ int i2c0_scl;
+ int mcasp0_aclkx;
+ int mcasp0_fsx;
+ int mcasp0_axr0;
+ int mcasp0_ahclkr;
+ int mcasp0_aclkr;
+ int mcasp0_fsr;
+ int mcasp0_axr1;
+ int mcasp0_ahclkx;
+ int xdma_event_intr0;
+ int xdma_event_intr1;
+ int nresetin_out;
+ int porz;
+ int nnmi;
+ int osc0_in;
+ int osc0_out;
+ int rsvd1;
+ int tms;
+ int tdi;
+ int tdo;
+ int tck;
+ int ntrst;
+ int emu0;
+ int emu1;
+ int osc1_in;
+ int osc1_out;
+ int pmic_power_en;
+ int rtc_porz;
+ int rsvd2;
+ int ext_wakeup;
+ int enz_kaldo_1p8v;
+ int usb0_dm;
[U-Boot] [PATCH 00/10] Add TI814x EVM Support
This series adds support for the PG1.0 TI814x EVM board. TI814x fits into the existing AM33XX SoC support with some refactoring of the AM33XX-specific emif4, clock, and mux code. It has been tested booting up a Linux kernel and regression tested on BeagleBone and EVM-SK AM33XX boards. Matt Porter (10): am33xx: convert defines from am33xx-specific to generic names am33xx: refactor emif4/ddr to support multiple EMIF instances am33xx: refactor am33xx clocks and add ti814x support am33xx: refactor am33xx mux support and add ti814x support am33xx: add ti814x specific register definitions am33xx: add dmm support to emif4 library ti814x_evm: add ti814x evm board support ns16550: enable quirks for ti814x ti814x_evm: enable ti814x evm build MAINTAINERS: add ti814x_evm maintainer MAINTAINERS |4 + Makefile |2 +- arch/arm/cpu/armv7/Makefile |2 +- arch/arm/cpu/armv7/am33xx/Makefile |3 +- arch/arm/cpu/armv7/am33xx/board.c|4 +- arch/arm/cpu/armv7/am33xx/clock-am335x.c | 374 ++ arch/arm/cpu/armv7/am33xx/clock-ti814x.c | 234 ++ arch/arm/cpu/armv7/am33xx/clock.c| 374 -- arch/arm/cpu/armv7/am33xx/ddr.c | 99 +++--- arch/arm/cpu/armv7/am33xx/emif4.c| 55 ++-- arch/arm/cpu/armv7/am33xx/sys_info.c |3 + arch/arm/cpu/armv7/omap-common/Makefile |2 +- arch/arm/include/asm/arch-am33xx/clock.h |4 + arch/arm/include/asm/arch-am33xx/clocks_ti814x.h | 112 +++ arch/arm/include/asm/arch-am33xx/cpu.h | 11 +- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 57 +++- arch/arm/include/asm/arch-am33xx/hardware.h | 60 +++- arch/arm/include/asm/arch-am33xx/mux-am335x.h| 246 ++ arch/arm/include/asm/arch-am33xx/mux-ti814x.h| 310 ++ arch/arm/include/asm/arch-am33xx/mux.h | 230 + arch/arm/include/asm/arch-am33xx/omap.h |7 + arch/arm/include/asm/arch-am33xx/spl.h |5 + board/ti/am335x/board.c | 10 +- board/ti/ti814x/Makefile | 46 +++ board/ti/ti814x/evm.c| 198 board/ti/ti814x/evm.h|7 + board/ti/ti814x/mux.c| 51 +++ boards.cfg |1 + drivers/serial/ns16550.c |5 +- include/configs/ti814x_evm.h | 213 spl/Makefile |2 +- 31 files changed, 2044 insertions(+), 687 deletions(-) create mode 100644 arch/arm/cpu/armv7/am33xx/clock-am335x.c create mode 100644 arch/arm/cpu/armv7/am33xx/clock-ti814x.c delete mode 100644 arch/arm/cpu/armv7/am33xx/clock.c create mode 100644 arch/arm/include/asm/arch-am33xx/clocks_ti814x.h create mode 100644 arch/arm/include/asm/arch-am33xx/mux-am335x.h create mode 100644 arch/arm/include/asm/arch-am33xx/mux-ti814x.h create mode 100644 board/ti/ti814x/Makefile create mode 100644 board/ti/ti814x/evm.c create mode 100644 board/ti/ti814x/evm.h create mode 100644 board/ti/ti814x/mux.c create mode 100644 include/configs/ti814x_evm.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 09/10] ti814x_evm: enable ti814x evm build
Enable TI814X EVM build via ti814x_evm target. Signed-off-by: Matt Porter --- Makefile|2 +- arch/arm/cpu/armv7/Makefile |2 +- arch/arm/cpu/armv7/omap-common/Makefile |2 +- boards.cfg |1 + spl/Makefile|2 +- 5 files changed, 5 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index 51bd918..120ab31 100644 --- a/Makefile +++ b/Makefile @@ -334,7 +334,7 @@ LIBS-y += api/libapi.o LIBS-y += post/libpost.o LIBS-y += test/libtest.o -ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),) LIBS-y += $(CPUDIR)/omap-common/libomap-common.o endif diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 4fdbee4..156a5ba 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -32,7 +32,7 @@ COBJS += cache_v7.o COBJS += cpu.o COBJS += syslib.o -ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA20),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA20)$(CONFIG_TI814X),) SOBJS += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile index 0efc80d..55e82ba 100644 --- a/arch/arm/cpu/armv7/omap-common/Makefile +++ b/arch/arm/cpu/armv7/omap-common/Makefile @@ -36,7 +36,7 @@ COBJS += emif-common.o COBJS += vc.o endif -ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),) COBJS += boot-common.o SOBJS += lowlevel_init.o endif diff --git a/boards.cfg b/boards.cfg index 98f7a14..0eabae9 100644 --- a/boards.cfg +++ b/boards.cfg @@ -236,6 +236,7 @@ am335x_evm_uart2 arm armv7 am335x ti am335x_evm_uart3 arm armv7 am335x ti am33xx am335x_evm:SERIAL4,CONS_INDEX=4 am335x_evm_uart4 arm armv7 am335x ti am33xx am335x_evm:SERIAL5,CONS_INDEX=5 am335x_evm_uart5 arm armv7 am335x ti am33xx am335x_evm:SERIAL6,CONS_INDEX=6 +ti814x_evm arm armv7 ti814x ti am33xx highbank arm armv7 highbank- highbank mx51_efikamx arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg mx51_efikasb arm armv7 mx51_efikamx genesi mx5 mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg diff --git a/spl/Makefile b/spl/Makefile index 6dbb105..9761e7d 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -82,7 +82,7 @@ LIBS-$(CONFIG_SPL_NET_SUPPORT) += net/libnet.o LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/libnet.o LIBS-$(CONFIG_SPL_ETH_SUPPORT) += drivers/net/phy/libphy.o -ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),) LIBS-y += $(CPUDIR)/omap-common/libomap-common.o endif -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 10/10] MAINTAINERS: add ti814x_evm maintainer
Add a maintainer entry for the TI814x EVM. Signed-off-by: Matt Porter --- MAINTAINERS |4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d3ed390..282dead 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -830,6 +830,10 @@ Stelian Pop at91sam9263ek ARM926EJS (AT91SAM9263 SoC) at91sam9rlekARM926EJS (AT91SAM9RL SoC) +Matt Porter + + ti814x_evm ARM ARMV7 (TI814x Soc) + Dave Purdy pogo_e02ARM926EJS (Kirkwood SoC) -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 06/10] am33xx: add dmm support to emif4 library
Adds a config_dmm() routine to support TI814X DMM configuration.
Signed-off-by: Matt Porter
---
arch/arm/cpu/armv7/am33xx/emif4.c | 17 +
arch/arm/include/asm/arch-am33xx/ddr_defs.h |5 +
2 files changed, 22 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c
b/arch/arm/cpu/armv7/am33xx/emif4.c
index 0c617fa..27547be 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -44,11 +44,28 @@ void dram_init_banksize(void)
#ifdef CONFIG_SPL_BUILD
+static struct dmm_lisa_map_regs *hw_lisa_map_regs =
+ (struct dmm_lisa_map_regs *)DMM_BASE;
static struct vtp_reg *vtpreg[2] = {
(struct vtp_reg *)VTP0_CTRL_ADDR,
(struct vtp_reg *)VTP1_CTRL_ADDR};
static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
+void config_dmm(const struct dmm_lisa_map_regs *regs)
+{
+ enable_dmm_clocks();
+
+ writel(0, &hw_lisa_map_regs->dmm_lisa_map_3);
+ writel(0, &hw_lisa_map_regs->dmm_lisa_map_2);
+ writel(0, &hw_lisa_map_regs->dmm_lisa_map_1);
+ writel(0, &hw_lisa_map_regs->dmm_lisa_map_0);
+
+ writel(regs->dmm_lisa_map_3, &hw_lisa_map_regs->dmm_lisa_map_3);
+ writel(regs->dmm_lisa_map_2, &hw_lisa_map_regs->dmm_lisa_map_2);
+ writel(regs->dmm_lisa_map_1, &hw_lisa_map_regs->dmm_lisa_map_1);
+ writel(regs->dmm_lisa_map_0, &hw_lisa_map_regs->dmm_lisa_map_0);
+}
+
static void config_vtp(int nr)
{
writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_ENABLE,
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index 8bf25a0..943b4ce 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -66,6 +66,11 @@
#define MT41J128MJT125_IOCTRL_VALUE0x18B
/**
+ * Configure DMM
+ */
+void config_dmm(const struct dmm_lisa_map_regs *regs);
+
+/**
* Configure SDRAM
*/
void config_sdram(const struct emif_regs *regs, int nr);
--
1.7.9.5
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[U-Boot] [PATCH 05/10] am33xx: add ti814x specific register definitions
Support the ti814x specific register definitions within arch-am33xx. Signed-off-by: Matt Porter --- arch/arm/cpu/armv7/am33xx/sys_info.c|3 +++ arch/arm/include/asm/arch-am33xx/cpu.h | 11 + arch/arm/include/asm/arch-am33xx/hardware.h | 32 +++ arch/arm/include/asm/arch-am33xx/omap.h |7 ++ arch/arm/include/asm/arch-am33xx/spl.h |5 + 5 files changed, 54 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv7/am33xx/sys_info.c b/arch/arm/cpu/armv7/am33xx/sys_info.c index 507b618..402127c 100644 --- a/arch/arm/cpu/armv7/am33xx/sys_info.c +++ b/arch/arm/cpu/armv7/am33xx/sys_info.c @@ -98,6 +98,9 @@ int print_cpuinfo(void) case AM335X: cpu_s = "AM335X"; break; + case TI81XX: + cpu_s = "TI81XX"; + break; default: cpu_s = "Unknown cpu type"; break; diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 16e8a80..3d3a7c8 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -42,9 +42,10 @@ #define HS_DEVICE 0x2 #define GP_DEVICE 0x3 -/* cpu-id for AM33XX family */ +/* cpu-id for AM33XX and TI81XX family */ #define AM335X 0xB944 -#define DEVICE_ID 0x44E10600 +#define TI81XX 0xB81E +#define DEVICE_ID (CTRL_BASE + 0x0600) /* This gives the status of the boot mode pins on the evm */ #define SYSBOOT_MASK (BIT(0) | BIT(1) | BIT(2)\ @@ -52,9 +53,11 @@ /* Reset control */ #ifdef CONFIG_AM33XX -#define PRM_RSTCTRL0x44E00F00 -#define PRM_RSTST 0x44E00F08 +#define PRM_RSTCTRL(PRCM_BASE + 0x0F00) +#elif defined(CONFIG_TI814X) +#define PRM_RSTCTRL(PRCM_BASE + 0x00A0) #endif +#define PRM_RSTST (PRM_RSTCTRL + 8) #define PRM_RSTCTRL_RESET 0x01 #define PRM_RSTST_WARM_RESET_MASK 0x232 diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h b/arch/arm/include/asm/arch-am33xx/hardware.h index 41ab2c0..786c159 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware.h +++ b/arch/arm/include/asm/arch-am33xx/hardware.h @@ -20,9 +20,14 @@ #define __AM33XX_HARDWARE_H #include +#include /* Module base addresses */ +#ifdef CONFIG_AM33XX #define UART0_BASE 0x44E09000 +#elif defined(CONFIG_TI814X) +#define UART0_BASE 0x4802 +#endif /* DM Timer base addresses */ #define DM_TIMER0_BASE 0x4802C000 @@ -37,20 +42,39 @@ /* GPIO Base address */ #define GPIO0_BASE 0x48032000 #define GPIO1_BASE 0x4804C000 +#ifdef CONFIG_AM33XX #define GPIO2_BASE 0x481AC000 +#endif /* BCH Error Location Module */ #define ELM_BASE 0x4808 /* Watchdog Timer */ +#ifdef CONFIG_AM33XX #define WDT_BASE 0x44E35000 +#elif defined(CONFIG_TI814X) +#define WDT_BASE 0x481C7000 +#endif /* Control Module Base Address */ +#ifdef CONFIG_AM33XX #define CTRL_BASE 0x44E1 #define CTRL_DEVICE_BASE 0x44E10600 +#elif defined(CONFIG_TI814X) +#define CTRL_BASE 0x4814 +#endif /* PRCM Base Address */ +#ifdef CONFIG_AM33XX #define PRCM_BASE 0x44E0 +#elif defined(CONFIG_TI814X) +#define PRCM_BASE 0x4818 +#endif + +/* PLL Subsystem Base Address */ +#ifdef CONFIG_TI814X +#define PLL_SUBSYS_BASE0x481C5000 +#endif /* EMIF Base address */ #define EMIF4_0_CFG_BASE 0x4C00 @@ -99,10 +123,18 @@ /* CPSW Config space */ #define CPSW_BASE 0x4A10 +#ifdef CONFIG_AM33XX #define CPSW_MDIO_BASE 0x4A101000 +#elif defined(CONFIG_TI814X) +#define CPSW_MDIO_BASE 0x4A100800 +#endif /* RTC base address */ +#ifdef CONFIG_AM33XX #define RTC_BASE 0x44E3E000 +#elif defined(CONFIG_TI814X) +#define RTC_BASE 0x480C +#endif /* OTG */ #define USB0_OTG_BASE 0x47401000 diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index 850f8a5..ba4f6d2 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -23,13 +23,20 @@ #ifndef _OMAP_H_ #define _OMAP_H_ +#include + /* * Non-secure SRAM Addresses * Non-secure RAM starts at 0x4030 for GP devices. But we keep SRAM_BASE * at 0x40304000(EMU base) so that our code works for both EMU and GP */ +#ifdef CONFIG_AM33XX #define NON_SECURE_SRAM_START 0x40304000 #define NON_SECURE_SRAM_END0x4030E000 +#elif
[U-Boot] [PATCH 02/10] am33xx: refactor emif4/ddr to support multiple EMIF instances
The AM33xx emif4/ddr support closely matches what is need to support
TI814x except that TI814x has two EMIF instances. Refactor all the
emif4 helper calls and the config_ddr() init function to use an
additional instance number argument.
Signed-off-by: Matt Porter
---
arch/arm/cpu/armv7/am33xx/ddr.c | 99 ---
arch/arm/cpu/armv7/am33xx/emif4.c | 38 +-
arch/arm/include/asm/arch-am33xx/ddr_defs.h | 52 --
arch/arm/include/asm/arch-am33xx/hardware.h | 18 -
board/ti/am335x/board.c |4 +-
5 files changed, 143 insertions(+), 68 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/ddr.c b/arch/arm/cpu/armv7/am33xx/ddr.c
index fd9fc4a..493b99b 100644
--- a/arch/arm/cpu/armv7/am33xx/ddr.c
+++ b/arch/arm/cpu/armv7/am33xx/ddr.c
@@ -24,15 +24,20 @@ http://www.ti.com/
/**
* Base address for EMIF instances
*/
-static struct emif_reg_struct *emif_reg = {
- (struct emif_reg_struct *)EMIF4_0_CFG_BASE};
+static struct emif_reg_struct *emif_reg[2] = {
+ (struct emif_reg_struct *)EMIF4_0_CFG_BASE,
+ (struct emif_reg_struct *)EMIF4_1_CFG_BASE};
/**
- * Base address for DDR instance
+ * Base addresses for DDR PHY cmd/data regs
*/
-static struct ddr_regs *ddr_reg[2] = {
- (struct ddr_regs *)DDR_PHY_BASE_ADDR,
- (struct ddr_regs *)DDR_PHY_BASE_ADDR2};
+static struct ddr_cmd_regs *ddr_cmd_reg[2] = {
+ (struct ddr_regs *)DDR_PHY_CMD_ADDR,
+ (struct ddr_regs *)DDR_PHY_CMD_ADDR2};
+
+static struct ddr_data_regs *ddr_data_reg[2] = {
+ (struct ddr_regs *)DDR_PHY_DATA_ADDR,
+ (struct ddr_regs *)DDR_PHY_DATA_ADDR2};
/**
* Base address for ddr io control instances
@@ -43,70 +48,84 @@ static struct ddr_cmdtctrl *ioctrl_reg = {
/**
* Configure SDRAM
*/
-void config_sdram(const struct emif_regs *regs)
+void config_sdram(const struct emif_regs *regs, int nr)
{
- writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl);
- writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw);
+ writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
+ writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
if (regs->zq_config){
- writel(regs->zq_config, &emif_reg->emif_zq_config);
+ writel(regs->zq_config, &emif_reg[nr]->emif_zq_config);
writel(regs->sdram_config, &cstat->secure_emif_sdram_config);
}
- writel(regs->sdram_config, &emif_reg->emif_sdram_config);
+ writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
}
/**
* Set SDRAM timings
*/
-void set_sdram_timings(const struct emif_regs *regs)
+void set_sdram_timings(const struct emif_regs *regs, int nr)
{
- writel(regs->sdram_tim1, &emif_reg->emif_sdram_tim_1);
- writel(regs->sdram_tim1, &emif_reg->emif_sdram_tim_1_shdw);
- writel(regs->sdram_tim2, &emif_reg->emif_sdram_tim_2);
- writel(regs->sdram_tim2, &emif_reg->emif_sdram_tim_2_shdw);
- writel(regs->sdram_tim3, &emif_reg->emif_sdram_tim_3);
- writel(regs->sdram_tim3, &emif_reg->emif_sdram_tim_3_shdw);
+ writel(regs->sdram_tim1, &emif_reg[nr]->emif_sdram_tim_1);
+ writel(regs->sdram_tim1, &emif_reg[nr]->emif_sdram_tim_1_shdw);
+ writel(regs->sdram_tim2, &emif_reg[nr]->emif_sdram_tim_2);
+ writel(regs->sdram_tim2, &emif_reg[nr]->emif_sdram_tim_2_shdw);
+ writel(regs->sdram_tim3, &emif_reg[nr]->emif_sdram_tim_3);
+ writel(regs->sdram_tim3, &emif_reg[nr]->emif_sdram_tim_3_shdw);
}
/**
* Configure DDR PHY
*/
-void config_ddr_phy(const struct emif_regs *regs)
+void config_ddr_phy(const struct emif_regs *regs, int nr)
{
- writel(regs->emif_ddr_phy_ctlr_1, &emif_reg->emif_ddr_phy_ctrl_1);
- writel(regs->emif_ddr_phy_ctlr_1, &emif_reg->emif_ddr_phy_ctrl_1_shdw);
+ writel(regs->emif_ddr_phy_ctlr_1,
+ &emif_reg[nr]->emif_ddr_phy_ctrl_1);
+ writel(regs->emif_ddr_phy_ctlr_1,
+ &emif_reg[nr]->emif_ddr_phy_ctrl_1_shdw);
}
/**
* Configure DDR CMD control registers
*/
-void config_cmd_ctrl(const struct cmd_control *cmd)
+void config_cmd_ctrl(const struct cmd_control *cmd, int nr)
{
- writel(cmd->cmd0csratio, &ddr_reg[0]->cm0csratio);
- writel(cmd->cmd0dldiff, &ddr_reg[0]->cm0dldiff);
- writel(cmd->cmd0iclkout, &ddr_reg[0]->cm0iclkout);
+ writel(cmd->cmd0csratio, &ddr_cmd_reg[nr]->cm0csratio);
+ writel(cmd->cmd0dldiff, &ddr_cmd_reg[nr]->cm0dldiff);
+ writel(cmd->cmd0iclkout, &ddr_cmd_reg[nr]->cm0iclkout);
- writel(cmd->cmd1csratio, &ddr_reg[0]->cm1csratio);
- writel(cmd->cmd1dldiff, &ddr_reg[0]->cm1dldiff);
- writel(cmd->cmd1iclkout, &ddr_reg[0]->cm1iclkout);
+
[U-Boot] [PATCH 03/10] am33xx: refactor am33xx clocks and add ti814x support
Split clock.c for am335x and ti814x and add the ti814x include file.
Signed-off-by: Matt Porter
---
arch/arm/cpu/armv7/am33xx/Makefile |3 +-
arch/arm/cpu/armv7/am33xx/clock-am335x.c | 374 ++
arch/arm/cpu/armv7/am33xx/clock-ti814x.c | 234 ++
arch/arm/cpu/armv7/am33xx/clock.c| 374 --
arch/arm/include/asm/arch-am33xx/clock.h |4 +
arch/arm/include/asm/arch-am33xx/clocks_ti814x.h | 112 +++
6 files changed, 726 insertions(+), 375 deletions(-)
create mode 100644 arch/arm/cpu/armv7/am33xx/clock-am335x.c
create mode 100644 arch/arm/cpu/armv7/am33xx/clock-ti814x.c
delete mode 100644 arch/arm/cpu/armv7/am33xx/clock.c
create mode 100644 arch/arm/include/asm/arch-am33xx/clocks_ti814x.h
diff --git a/arch/arm/cpu/armv7/am33xx/Makefile
b/arch/arm/cpu/armv7/am33xx/Makefile
index 70c443e..7051029 100644
--- a/arch/arm/cpu/armv7/am33xx/Makefile
+++ b/arch/arm/cpu/armv7/am33xx/Makefile
@@ -16,7 +16,8 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-COBJS += clock.o
+COBJS-$(CONFIG_AM33XX) += clock-am335x.o
+COBJS-$(CONFIG_TI814X) += clock-ti814x.o
COBJS += sys_info.o
COBJS += mem.o
COBJS += ddr.o
diff --git a/arch/arm/cpu/armv7/am33xx/clock-am335x.c
b/arch/arm/cpu/armv7/am33xx/clock-am335x.c
new file mode 100644
index 000..d7d98d1
--- /dev/null
+++ b/arch/arm/cpu/armv7/am33xx/clock-am335x.c
@@ -0,0 +1,374 @@
+/*
+ * clock.c
+ *
+ * clocks for AM33XX based boards
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define PRCM_MOD_EN0x2
+#define PRCM_FORCE_WAKEUP 0x2
+#define PRCM_FUNCTL0x0
+
+#define PRCM_EMIF_CLK_ACTIVITY BIT(2)
+#define PRCM_L3_GCLK_ACTIVITY BIT(4)
+
+#define PLL_BYPASS_MODE0x4
+#define ST_MN_BYPASS 0x0100
+#define ST_DPLL_CLK0x0001
+#define CLK_SEL_MASK 0x7
+#define CLK_DIV_MASK 0x1f
+#define CLK_DIV2_MASK 0x7f
+#define CLK_SEL_SHIFT 0x8
+#define CLK_MODE_SEL 0x7
+#define CLK_MODE_MASK 0xfff8
+#define CLK_DIV_SEL0xFFE0
+#define CPGMAC0_IDLE 0x3
+#define DPLL_CLKDCOLDO_GATE_CTRL0x300
+
+const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
+const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
+const struct cm_dpll *cmdpll = (struct cm_dpll *)CM_DPLL;
+const struct cm_rtc *cmrtc = (struct cm_rtc *)CM_RTC;
+
+static void enable_interface_clocks(void)
+{
+ /* Enable all the Interconnect Modules */
+ writel(PRCM_MOD_EN, &cmper->l3clkctrl);
+ while (readl(&cmper->l3clkctrl) != PRCM_MOD_EN)
+ ;
+
+ writel(PRCM_MOD_EN, &cmper->l4lsclkctrl);
+ while (readl(&cmper->l4lsclkctrl) != PRCM_MOD_EN)
+ ;
+
+ writel(PRCM_MOD_EN, &cmper->l4fwclkctrl);
+ while (readl(&cmper->l4fwclkctrl) != PRCM_MOD_EN)
+ ;
+
+ writel(PRCM_MOD_EN, &cmwkup->wkl4wkclkctrl);
+ while (readl(&cmwkup->wkl4wkclkctrl) != PRCM_MOD_EN)
+ ;
+
+ writel(PRCM_MOD_EN, &cmper->l3instrclkctrl);
+ while (readl(&cmper->l3instrclkctrl) != PRCM_MOD_EN)
+ ;
+
+ writel(PRCM_MOD_EN, &cmper->l4hsclkctrl);
+ while (readl(&cmper->l4hsclkctrl) != PRCM_MOD_EN)
+ ;
+
+ writel(PRCM_MOD_EN, &cmwkup->wkgpio0clkctrl);
+ while (readl(&cmwkup->wkgpio0clkctrl) != PRCM_MOD_EN)
+ ;
+}
+
+/*
+ * Force power domain wake up transition
+ * Ensure that the corresponding interface clock is active before
+ * using the peripheral
+ */
+static void power_domain_wkup_transition(void)
+{
+ writel(PRCM_FORCE_WAKEUP, &cmper->l3clkstctrl);
+ writel(PRCM_FORCE_WAKEUP, &cmper->l4lsclkstctrl);
+ writel(PRCM_FORCE_WAKEUP, &cmwkup->wkclkstctrl);
+ writel(PRCM_FORCE_WAKEUP, &cmper->l4fwclkstctrl);
+ writel(PRCM_FORCE_WAKEUP, &cmper->l3sclkstctrl);
+}
+
+/*
+ * Enable the peripheral clock for required peripherals
+ */
+static void enable_per_clocks(void)
+{
+ /* Enable the control module though RBL would have done it*/
+ writel(PRCM_MOD_EN, &cmwkup->wkctrlclkctrl);
+ while (readl(&cmwkup->wkctrlclkctrl) != PRCM_MOD_EN)
+ ;
+
+ /* Enable the module clock */
+ writel(PRCM_MOD_EN, &cmper->timer2cl
[U-Boot] [PATCH 07/10] ti814x_evm: add ti814x evm board support
Add TI814X EVM board directory and config file.
Signed-off-by: Matt Porter
---
board/ti/ti814x/Makefile | 46 +
board/ti/ti814x/evm.c| 198 +++
board/ti/ti814x/evm.h|7 ++
board/ti/ti814x/mux.c| 51 ++
include/configs/ti814x_evm.h | 213 ++
5 files changed, 515 insertions(+)
create mode 100644 board/ti/ti814x/Makefile
create mode 100644 board/ti/ti814x/evm.c
create mode 100644 board/ti/ti814x/evm.h
create mode 100644 board/ti/ti814x/mux.c
create mode 100644 include/configs/ti814x_evm.h
diff --git a/board/ti/ti814x/Makefile b/board/ti/ti814x/Makefile
new file mode 100644
index 000..09d2422
--- /dev/null
+++ b/board/ti/ti814x/Makefile
@@ -0,0 +1,46 @@
+#
+# Makefile
+#
+# Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed "as is" WITHOUT ANY WARRANTY of any
+# kind, whether express or implied; without even the implied warranty
+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifdef CONFIG_SPL_BUILD
+COBJS := mux.o
+endif
+
+COBJS += evm.o
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
new file mode 100644
index 000..53912d1
--- /dev/null
+++ b/board/ti/ti814x/evm.c
@@ -0,0 +1,198 @@
+/*
+ * evm.c
+ *
+ * Board functions for TI814x EVM
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "evm.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
+#ifdef CONFIG_SPL_BUILD
+static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
+#endif
+
+/* UART Defines */
+#ifdef CONFIG_SPL_BUILD
+#define UART_RESET (0x1 << 1)
+#define UART_CLK_RUNNING_MASK 0x1
+#define UART_SMART_IDLE_EN (0x1 << 0x3)
+
+static void rtc32k_enable(void)
+{
+ struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
+
+ /*
+* Unlock the RTC's registers. For more details please see the
+* RTC_SS section of the TRM. In order to unlock we need to
+* write these specific values (keys) in this order.
+*/
+ writel(0x83e70b13, &rtc->kick0r);
+ writel(0x95a4f1e0, &rtc->kick1r);
+
+ /* Enable the RTC 32K OSC by setting bits 3 and 6. */
+ writel((1 << 3) | (1 << 6), &rtc->osc);
+}
+
+static void uart_enable(void)
+{
+ u32 regVal;
+
+ /* UART softreset */
+ regVal = readl(&uart_base->uartsyscfg);
+ regVal |= UART_RESET;
+ writel(regVal, &uart_base->uartsyscfg);
+ while ((readl(&uart_base->uartsyssts) &
+ UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
+ ;
+
+ /* Disable smart idle */
+ regVal = readl(&uart_base->uartsyscfg);
+ regVal |= UART_SMART_IDLE_EN;
+ writel(regVal, &uart_base->uartsyscfg);
+}
+
+static void wdt_disable(void)
+{
+ writel(0x, &wdtimer->wdtwspr);
+ while (readl(&wdtimer->wdtwwps) != 0x0)
+ ;
+ writel(0x, &wdtimer->wdtwspr);
+ while (readl(&wdtimer->wdtwwps) != 0x0)
+ ;
+}
+
+static const struct cmd_control evm_ddr2_cctrl_data = {
+ .cmd0csratio= 0x80,
+ .cmd0dldiff = 0x04,
+ .cmd0iclkout= 0x00,
+
+ .cmd1csratio= 0x80,
+ .cmd1dldiff = 0x04,
+
[U-Boot] [PATCH 01/10] am33xx: convert defines from am33xx-specific to generic names
Eliminate AM33xx specific names to prepare for TI814x support
within AM33xx-land.
Signed-off-by: Matt Porter
---
arch/arm/cpu/armv7/am33xx/board.c |4 ++--
arch/arm/include/asm/arch-am33xx/hardware.h | 10 +-
board/ti/am335x/board.c |6 +++---
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index ab31326..b186b32 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -141,11 +141,11 @@ int arch_misc_init(void)
{
#ifdef CONFIG_AM335X_USB0
musb_register(&otg0_plat, &otg0_board_data,
- (void *)AM335X_USB0_OTG_BASE);
+ (void *)USB0_OTG_BASE);
#endif
#ifdef CONFIG_AM335X_USB1
musb_register(&otg1_plat, &otg1_board_data,
- (void *)AM335X_USB1_OTG_BASE);
+ (void *)USB1_OTG_BASE);
#endif
return 0;
}
diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h
b/arch/arm/include/asm/arch-am33xx/hardware.h
index 6dd3296..7016e25 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware.h
@@ -84,14 +84,14 @@
#define GPMC_BASE 0x5000
/* CPSW Config space */
-#define AM335X_CPSW_BASE 0x4A10
-#define AM335X_CPSW_MDIO_BASE 0x4A101000
+#define CPSW_BASE 0x4A10
+#define CPSW_MDIO_BASE 0x4A101000
/* RTC base address */
-#define AM335X_RTC_BASE0x44E3E000
+#define RTC_BASE 0x44E3E000
/* OTG */
-#define AM335X_USB0_OTG_BASE 0x47401000
-#define AM335X_USB1_OTG_BASE 0x47401800
+#define USB0_OTG_BASE 0x47401000
+#define USB1_OTG_BASE 0x47401800
#endif /* __AM33XX_HARDWARE_H */
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index ed4229e..1e698df 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -123,7 +123,7 @@ static int read_eeprom(void)
static void rtc32k_enable(void)
{
- struct rtc_regs *rtc = (struct rtc_regs *)AM335X_RTC_BASE;
+ struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
/*
* Unlock the RTC's registers. For more details please see the
@@ -365,8 +365,8 @@ static struct cpsw_slave_data cpsw_slaves[] = {
};
static struct cpsw_platform_data cpsw_data = {
- .mdio_base = AM335X_CPSW_MDIO_BASE,
- .cpsw_base = AM335X_CPSW_BASE,
+ .mdio_base = CPSW_MDIO_BASE,
+ .cpsw_base = CPSW_BASE,
.mdio_div = 0xff,
.channels = 8,
.cpdma_reg_ofs = 0x800,
--
1.7.9.5
___
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U-Boot@lists.denx.de
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[U-Boot] [PATCH 08/10] ns16550: enable quirks for ti814x
TI814X requires the same quirks as AM33XX to be enabled. Signed-off-by: Matt Porter --- drivers/serial/ns16550.c |5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 87a0917..02bc85b 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -43,7 +43,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); #if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \ - defined(CONFIG_AM33XX) + defined(CONFIG_AM33XX) || defined(CONFIG_TI814X) serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ #endif serial_out(UART_LCR_BKSE | UART_LCRVAL, (ulong)&com_port->lcr); @@ -57,7 +57,8 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); serial_out(UART_LCRVAL, &com_port->lcr); #if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \ - defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) + defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \ + defined(CONFIG_TI814X) #if defined(CONFIG_APTIX) /* /13 mode so Aptix 6MHz can hit 115200 */ -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] Tegra: MMC: Add DT support to MMC driver for all T20 boards
Stephen, On Tue, Feb 12, 2013 at 2:06 PM, Stephen Warren wrote: > On 02/12/2013 01:57 PM, Tom Warren wrote: >> Stephen, >> >> On Tue, Feb 12, 2013 at 1:38 PM, Stephen Warren >> wrote: >>> On 02/11/2013 10:17 AM, Tom Warren wrote: tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. > diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h diff --git a/include/configs/plutux.h b/include/configs/plutux.h diff --git a/include/configs/tec.h b/include/configs/tec.h >>> >>> In all 3 of those files ... >>> #define CONFIG_DEFAULT_DEVICE_TREE tegra20-medcom-wide >>> >>> Why not change that define ... >>> #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE +#undef CONFIG_ARCH_DEVICE_TREE +#define CONFIG_ARCH_DEVICE_TREE tegra20-tamonten >>> >>> rather than adding that one? All the other Tegra boards only set >>> CONFIG_DEFAULT_DEVICE_TREE. >> >> CONFIG_DEFAULT_DEVICE_TREE is the .dts file (board/nvidia/dts). >> CONFIG_ARCH_DEVICE_TREE is the .dtsi file (arch/arm/dts). See >> Thierry's explanation, also. > > So why set CONFIG_ARCH_DEVICE_TREE to tegra20-tamonten here; if that > variable is supposed to point at the SoC .dtsi file, that value is > wrong; it *should* be tegra20.dtsi. > > Oh yuck. I see what's going on now. e.g. tegra20-medcom-wide.dts is > including ARCH_CPU_DTS. It should be including tegra20-tamonten.dtsi, > which then includes ARCH_CPU_DTS. The ARCH_CPU_DTS variable is supposed > to only ever point at the SoC .dtsi file, not any "intermediate" .dtsi > file... You probably need to put tegra20-tamonten.dtsi into > board/avionic-design/dts rather than arch/arm/dts to make that work. OK, I've removed the overrides for CONFIG_ARCH_DEVICE_TREE in the AD config files, and added 'tegra20-tamonten.dtsi' to the include line in the AD .dts files. I have to add an include path to the DTC command line in dts/Makefile so it can find tegra20-tamonten.dtsi in arch/$(ARCH)/dts, but it all builds fine. I'll have to rely on Thierry for testing. This will all be in v3, going up today or tomorrow. Thanks, Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] Tegra: MMC: Add DT support to MMC driver for all T20 boards
On 02/13/2013 12:59 PM, Tom Warren wrote: > Stephen, > > On Tue, Feb 12, 2013 at 2:06 PM, Stephen Warren wrote: >> On 02/12/2013 01:57 PM, Tom Warren wrote: >>> Stephen, >>> >>> On Tue, Feb 12, 2013 at 1:38 PM, Stephen Warren >>> wrote: On 02/11/2013 10:17 AM, Tom Warren wrote: > tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. > Tested on Seaboard, fully functional. > > Tamonten boards (medcom-wide, plutux, and tec) use a different/new > dtsi file w/common settings. >> > diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h > diff --git a/include/configs/plutux.h b/include/configs/plutux.h > diff --git a/include/configs/tec.h b/include/configs/tec.h In all 3 of those files ... > #define CONFIG_DEFAULT_DEVICE_TREE tegra20-medcom-wide Why not change that define ... > #define CONFIG_OF_CONTROL > #define CONFIG_OF_SEPARATE > +#undef CONFIG_ARCH_DEVICE_TREE > +#define CONFIG_ARCH_DEVICE_TREE tegra20-tamonten rather than adding that one? All the other Tegra boards only set CONFIG_DEFAULT_DEVICE_TREE. >>> >>> CONFIG_DEFAULT_DEVICE_TREE is the .dts file (board/nvidia/dts). >>> CONFIG_ARCH_DEVICE_TREE is the .dtsi file (arch/arm/dts). See >>> Thierry's explanation, also. >> >> So why set CONFIG_ARCH_DEVICE_TREE to tegra20-tamonten here; if that >> variable is supposed to point at the SoC .dtsi file, that value is >> wrong; it *should* be tegra20.dtsi. >> >> Oh yuck. I see what's going on now. e.g. tegra20-medcom-wide.dts is >> including ARCH_CPU_DTS. It should be including tegra20-tamonten.dtsi, >> which then includes ARCH_CPU_DTS. The ARCH_CPU_DTS variable is supposed >> to only ever point at the SoC .dtsi file, not any "intermediate" .dtsi >> file... You probably need to put tegra20-tamonten.dtsi into >> board/avionic-design/dts rather than arch/arm/dts to make that work. > > OK, I've removed the overrides for CONFIG_ARCH_DEVICE_TREE in the AD > config files, and added 'tegra20-tamonten.dtsi' to the include line in > the AD .dts files. Great. > I have to add an include path to the DTC command > line in dts/Makefile so it can find tegra20-tamonten.dtsi in > arch/$(ARCH)/dts, but it all builds fine. If you move tegra20-tamonten.dtsi to boards/avionic-design/dts, do you still need an include path? Since that file is board-/vendor-specific, it really shouldn't be in arch/arm/dts if that directory typically only contains SoC .dtsi files. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] Tegra: MMC: Add DT support to MMC driver for all T20 boards
Stephen, On Wed, Feb 13, 2013 at 1:02 PM, Stephen Warren wrote: > On 02/13/2013 12:59 PM, Tom Warren wrote: >> Stephen, >> >> On Tue, Feb 12, 2013 at 2:06 PM, Stephen Warren >> wrote: >>> On 02/12/2013 01:57 PM, Tom Warren wrote: Stephen, On Tue, Feb 12, 2013 at 1:38 PM, Stephen Warren wrote: > On 02/11/2013 10:17 AM, Tom Warren wrote: >> tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. >> Tested on Seaboard, fully functional. >> >> Tamonten boards (medcom-wide, plutux, and tec) use a different/new >> dtsi file w/common settings. >>> >> diff --git a/include/configs/medcom-wide.h >> b/include/configs/medcom-wide.h >> diff --git a/include/configs/plutux.h b/include/configs/plutux.h >> diff --git a/include/configs/tec.h b/include/configs/tec.h > > In all 3 of those files ... > >> #define CONFIG_DEFAULT_DEVICE_TREE tegra20-medcom-wide > > Why not change that define ... > >> #define CONFIG_OF_CONTROL >> #define CONFIG_OF_SEPARATE >> +#undef CONFIG_ARCH_DEVICE_TREE >> +#define CONFIG_ARCH_DEVICE_TREE tegra20-tamonten > > rather than adding that one? All the other Tegra boards only set > CONFIG_DEFAULT_DEVICE_TREE. CONFIG_DEFAULT_DEVICE_TREE is the .dts file (board/nvidia/dts). CONFIG_ARCH_DEVICE_TREE is the .dtsi file (arch/arm/dts). See Thierry's explanation, also. >>> >>> So why set CONFIG_ARCH_DEVICE_TREE to tegra20-tamonten here; if that >>> variable is supposed to point at the SoC .dtsi file, that value is >>> wrong; it *should* be tegra20.dtsi. >>> >>> Oh yuck. I see what's going on now. e.g. tegra20-medcom-wide.dts is >>> including ARCH_CPU_DTS. It should be including tegra20-tamonten.dtsi, >>> which then includes ARCH_CPU_DTS. The ARCH_CPU_DTS variable is supposed >>> to only ever point at the SoC .dtsi file, not any "intermediate" .dtsi >>> file... You probably need to put tegra20-tamonten.dtsi into >>> board/avionic-design/dts rather than arch/arm/dts to make that work. >> >> OK, I've removed the overrides for CONFIG_ARCH_DEVICE_TREE in the AD >> config files, and added 'tegra20-tamonten.dtsi' to the include line in >> the AD .dts files. > > Great. > >> I have to add an include path to the DTC command >> line in dts/Makefile so it can find tegra20-tamonten.dtsi in >> arch/$(ARCH)/dts, but it all builds fine. > > If you move tegra20-tamonten.dtsi to boards/avionic-design/dts, do you > still need an include path? Since that file is board-/vendor-specific, > it really shouldn't be in arch/arm/dts if that directory typically only > contains SoC .dtsi files. I tried both places, and had to add the include path to get it to build. I'll try it from board/avionic-design/dts with a new include path. Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] Tegra: MMC: Add DT support to MMC driver for all T20 boards
On 02/13/2013 01:06 PM, Tom Warren wrote: > Stephen, > > On Wed, Feb 13, 2013 at 1:02 PM, Stephen Warren wrote: >> On 02/13/2013 12:59 PM, Tom Warren wrote: >>> Stephen, >>> >>> On Tue, Feb 12, 2013 at 2:06 PM, Stephen Warren >>> wrote: On 02/12/2013 01:57 PM, Tom Warren wrote: > Stephen, > > On Tue, Feb 12, 2013 at 1:38 PM, Stephen Warren > wrote: >> On 02/11/2013 10:17 AM, Tom Warren wrote: >>> tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. >>> Tested on Seaboard, fully functional. >>> >>> Tamonten boards (medcom-wide, plutux, and tec) use a different/new >>> dtsi file w/common settings. >>> diff --git a/include/configs/medcom-wide.h >>> b/include/configs/medcom-wide.h >>> diff --git a/include/configs/plutux.h b/include/configs/plutux.h >>> diff --git a/include/configs/tec.h b/include/configs/tec.h >> >> In all 3 of those files ... >> >>> #define CONFIG_DEFAULT_DEVICE_TREE tegra20-medcom-wide >> >> Why not change that define ... >> >>> #define CONFIG_OF_CONTROL >>> #define CONFIG_OF_SEPARATE >>> +#undef CONFIG_ARCH_DEVICE_TREE >>> +#define CONFIG_ARCH_DEVICE_TREE tegra20-tamonten >> >> rather than adding that one? All the other Tegra boards only set >> CONFIG_DEFAULT_DEVICE_TREE. > > CONFIG_DEFAULT_DEVICE_TREE is the .dts file (board/nvidia/dts). > CONFIG_ARCH_DEVICE_TREE is the .dtsi file (arch/arm/dts). See > Thierry's explanation, also. So why set CONFIG_ARCH_DEVICE_TREE to tegra20-tamonten here; if that variable is supposed to point at the SoC .dtsi file, that value is wrong; it *should* be tegra20.dtsi. Oh yuck. I see what's going on now. e.g. tegra20-medcom-wide.dts is including ARCH_CPU_DTS. It should be including tegra20-tamonten.dtsi, which then includes ARCH_CPU_DTS. The ARCH_CPU_DTS variable is supposed to only ever point at the SoC .dtsi file, not any "intermediate" .dtsi file... You probably need to put tegra20-tamonten.dtsi into board/avionic-design/dts rather than arch/arm/dts to make that work. >>> >>> OK, I've removed the overrides for CONFIG_ARCH_DEVICE_TREE in the AD >>> config files, and added 'tegra20-tamonten.dtsi' to the include line in >>> the AD .dts files. >> >> Great. >> >>> I have to add an include path to the DTC command >>> line in dts/Makefile so it can find tegra20-tamonten.dtsi in >>> arch/$(ARCH)/dts, but it all builds fine. >> >> If you move tegra20-tamonten.dtsi to boards/avionic-design/dts, do you >> still need an include path? Since that file is board-/vendor-specific, >> it really shouldn't be in arch/arm/dts if that directory typically only >> contains SoC .dtsi files. > > I tried both places, and had to add the include path to get it to build. > > I'll try it from board/avionic-design/dts with a new include path. Hmmm. Odd. Since IIRC U-Boot is already running the .dts files through the C pre-processor, you could try: #include "tegra20-tamonten.dtsi" rather than: /include/ "tegra20-tamonten.dtsi"; The kernel is likely moving to this scheme, so U-Boot might want to follow this, even pre-emptively, in order to re-use DT files sometime anyway. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 02/10] mx23: Document the tRAS lockout setting in memory initialization
Dear Otavio Salvador, > Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to > enable the 'Fast Auto Pre-Charge' found in the memory chip. The > setting is applied after memory initialization and it is worth > document it. > > Signed-off-by: Otavio Salvador > --- > Changes in v2: > - Extend code comment to explicit say it needs to be there. > > arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c > b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..1952eac 100644 > --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c > +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c > @@ -119,6 +119,7 @@ static void initialize_dram_values(void) > writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); > > #ifdef CONFIG_MX23 > + /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be after all */ 'After all'? > writel((1 << 24), MXS_DRAM_BASE + (4 * 8)); > #endif > } Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 03/10] mx23evk: Adjust DRAM control register to use full 128MB of RAM
Dear Otavio Salvador,
> Adjust HW_DRAM_CTL14 to enable the chip selects to allow usage of full
> 128MB of RAM.
Why can this not be enabled globally?
> Signed-off-by: Otavio Salvador
> ---
> Changes in v2: None
>
> board/freescale/mx23evk/spl_boot.c | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/board/freescale/mx23evk/spl_boot.c
> b/board/freescale/mx23evk/spl_boot.c index 6007433..b6f4e7e 100644
> --- a/board/freescale/mx23evk/spl_boot.c
> +++ b/board/freescale/mx23evk/spl_boot.c
> @@ -98,6 +98,16 @@ const iomux_cfg_t iomux_setup[] = {
> (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
> };
>
> +#define HW_DRAM_CTL14(0x38 >> 2)
> +#define CS_MAP 0x3
> +#define INTAREF 0x2
> +#define HW_DRAM_CTL14_CONFIG (INTAREF << 8 | CS_MAP)
> +
> +void mxs_adjust_memory_params(uint32_t *dram_vals)
> +{
> + dram_vals[HW_DRAM_CTL14] = HW_DRAM_CTL14_CONFIG;
> +}
> +
> void board_init_ll(void)
> {
> mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 05/10] mxs: Fix iomux.h to not break build during assembly stage
Dear Otavio Salvador, > This fixes the build failure when included in mx23_olinuxino.h board > config; the addition of "asm/types.h" is due "u32" being otherwise > undefined. Regular doesn't cut it? > Signed-off-by: Otavio Salvador > --- > Changes in v2: None > > arch/arm/include/asm/arch-mxs/iomux.h | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/include/asm/arch-mxs/iomux.h > b/arch/arm/include/asm/arch-mxs/iomux.h index 7abdf58..4288715 100644 > --- a/arch/arm/include/asm/arch-mxs/iomux.h > +++ b/arch/arm/include/asm/arch-mxs/iomux.h > @@ -21,6 +21,10 @@ > #ifndef __MACH_MXS_IOMUX_H__ > #define __MACH_MXS_IOMUX_H__ > > +#ifndef __ASSEMBLY__ > + > +#include > + > /* > * IOMUX/PAD Bit field definitions > * > @@ -165,4 +169,5 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad); > */ > int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned > count); > > +#endif /* __ASSEMBLY__ */ > #endif /* __MACH_MXS_IOMUX_H__*/ Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 07/10] usb: mxs: Disable USB Port 1 for i.MX23
Dear Otavio Salvador,
> The i.MX23 just one USB port so disable the second controller probe
> when building for i.MX23.
>
> Signed-off-by: Otavio Salvador
> ---
> Changes in v2:
> - Avoid wrong clock setting in MX23
>
> drivers/usb/host/ehci-mxs.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
> index 5062af5..b7bf856 100644
> --- a/drivers/usb/host/ehci-mxs.c
> +++ b/drivers/usb/host/ehci-mxs.c
> @@ -50,10 +50,12 @@ int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int
> port) usb_base = MXS_USBCTRL0_BASE;
> phy_base = MXS_USBPHY0_BASE;
> break;
> +#ifdef CONFIG_MX28
> case 1:
> usb_base = MXS_USBCTRL1_BASE;
> phy_base = MXS_USBPHY1_BASE;
> break;
> +#endif
> default:
> printf("CONFIG_EHCI_MXS_PORT (port = %d)\n", port);
> return -1;
> @@ -67,7 +69,9 @@ int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int port)
> /* This DIGCTL register ungates clock to USB */
> #define HW_DIGCTL_CTRL 0x8001c000
> #define HW_DIGCTL_CTRL_USB0_CLKGATE (1 << 2)
> +#ifdef CONFIG_MX28
> #define HW_DIGCTL_CTRL_USB1_CLKGATE (1 << 16)
> +#endif
>
> int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor
> **hcor) {
> @@ -95,8 +99,12 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr,
> struct ehci_hcor **hcor) writel(CLKCTRL_PLL1CTRL0_EN_USB_CLKS |
> CLKCTRL_PLL1CTRL0_POWER,
> &clkctrl_regs->hw_clkctrl_pll1ctrl0_set);
>
> +#if defined(CONFIG_MX23)
> + writel(HW_DIGCTL_CTRL_USB0_CLKGATE, &digctl_ctrl->reg_clr);
What is that large space before '&digctl_regs->...' ?
> +#elif defined(CONFIG_MX28)
> writel(HW_DIGCTL_CTRL_USB0_CLKGATE | HW_DIGCTL_CTRL_USB1_CLKGATE,
> &digctl_ctrl->reg_clr);
> +#endif
I'm sure these can be wrapped in much more elegant way, yes?
>
> /* Start USB PHY */
> writel(0, &ehci_mxs.phy_regs->hw_usbphy_pwd);
> @@ -153,8 +161,12 @@ int ehci_hcd_stop(int index)
> &clkctrl_regs->hw_clkctrl_pll1ctrl0_clr);
>
> /* Gate off the USB clock */
> +#if defined(CONFIG_MX23)
> + writel(HW_DIGCTL_CTRL_USB0_CLKGATE, &digctl_ctrl->reg_set);
> +#elif defined(CONFIG_MX28)
> writel(HW_DIGCTL_CTRL_USB0_CLKGATE | HW_DIGCTL_CTRL_USB1_CLKGATE,
> &digctl_ctrl->reg_set);
> +#endif
>
> return 0;
> }
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 10/10] mx23_olinuxino: Add ethernet support
Dear Otavio Salvador, > This adds support to the LAN9512 chip included in the board and extend > the environment to easy netboot use. > > Signed-off-by: Otavio Salvador You completely ignored previous discussion to make this ethernet thingie part of the previous patch. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 02/10] mx23: Document the tRAS lockout setting in memory initialization
On Wed, Feb 13, 2013 at 7:12 PM, Marek Vasut wrote: > Dear Otavio Salvador, > >> Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to >> enable the 'Fast Auto Pre-Charge' found in the memory chip. The >> setting is applied after memory initialization and it is worth >> document it. >> >> Signed-off-by: Otavio Salvador >> --- >> Changes in v2: >> - Extend code comment to explicit say it needs to be there. >> >> arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c >> b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..1952eac 100644 >> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c >> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c >> @@ -119,6 +119,7 @@ static void initialize_dram_values(void) >> writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); >> >> #ifdef CONFIG_MX23 >> + /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be after all */ > > 'After all'? For me it is clear enough; I am not native so it'd be good if a native English speaker could comment on this. >> writel((1 << 24), MXS_DRAM_BASE + (4 * 8)); >> #endif >> } > > Best regards, > Marek Vasut -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 03/10] mx23evk: Adjust DRAM control register to use full 128MB of RAM
On Wed, Feb 13, 2013 at 7:13 PM, Marek Vasut wrote:
> Dear Otavio Salvador,
>
>> Adjust HW_DRAM_CTL14 to enable the chip selects to allow usage of full
>> 128MB of RAM.
>
> Why can this not be enabled globally?
Because it breaks mx23_olinuxino; it is a good reason for me.
>> Signed-off-by: Otavio Salvador
>> ---
>> Changes in v2: None
>>
>> board/freescale/mx23evk/spl_boot.c | 10 ++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/board/freescale/mx23evk/spl_boot.c
>> b/board/freescale/mx23evk/spl_boot.c index 6007433..b6f4e7e 100644
>> --- a/board/freescale/mx23evk/spl_boot.c
>> +++ b/board/freescale/mx23evk/spl_boot.c
>> @@ -98,6 +98,16 @@ const iomux_cfg_t iomux_setup[] = {
>> (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
>> };
>>
>> +#define HW_DRAM_CTL14(0x38 >> 2)
>> +#define CS_MAP 0x3
>> +#define INTAREF 0x2
>> +#define HW_DRAM_CTL14_CONFIG (INTAREF << 8 | CS_MAP)
>> +
>> +void mxs_adjust_memory_params(uint32_t *dram_vals)
>> +{
>> + dram_vals[HW_DRAM_CTL14] = HW_DRAM_CTL14_CONFIG;
>> +}
>> +
>> void board_init_ll(void)
>> {
>> mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
>
> Best regards,
> Marek Vasut
--
Otavio Salvador O.S. Systems
E-mail: ota...@ossystems.com.br http://www.ossystems.com.br
Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br
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Re: [U-Boot] [PATCH v2 05/10] mxs: Fix iomux.h to not break build during assembly stage
On Wed, Feb 13, 2013 at 7:13 PM, Marek Vasut wrote: > Dear Otavio Salvador, > >> This fixes the build failure when included in mx23_olinuxino.h board >> config; the addition of "asm/types.h" is due "u32" being otherwise >> undefined. > > Regular doesn't cut it? I did not test; this seemed as the right one to take. Stefano? >> Signed-off-by: Otavio Salvador >> --- >> Changes in v2: None >> >> arch/arm/include/asm/arch-mxs/iomux.h | 5 + >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/arm/include/asm/arch-mxs/iomux.h >> b/arch/arm/include/asm/arch-mxs/iomux.h index 7abdf58..4288715 100644 >> --- a/arch/arm/include/asm/arch-mxs/iomux.h >> +++ b/arch/arm/include/asm/arch-mxs/iomux.h >> @@ -21,6 +21,10 @@ >> #ifndef __MACH_MXS_IOMUX_H__ >> #define __MACH_MXS_IOMUX_H__ >> >> +#ifndef __ASSEMBLY__ >> + >> +#include >> + >> /* >> * IOMUX/PAD Bit field definitions >> * >> @@ -165,4 +169,5 @@ int mxs_iomux_setup_pad(iomux_cfg_t pad); >> */ >> int mxs_iomux_setup_multiple_pads(const iomux_cfg_t *pad_list, unsigned >> count); >> >> +#endif /* __ASSEMBLY__ */ >> #endif /* __MACH_MXS_IOMUX_H__*/ > > Best regards, > Marek Vasut -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 07/10] usb: mxs: Disable USB Port 1 for i.MX23
On Wed, Feb 13, 2013 at 7:15 PM, Marek Vasut wrote:
> Dear Otavio Salvador,
>
>> The i.MX23 just one USB port so disable the second controller probe
>> when building for i.MX23.
>>
>> Signed-off-by: Otavio Salvador
>> ---
>> Changes in v2:
>> - Avoid wrong clock setting in MX23
>>
>> drivers/usb/host/ehci-mxs.c | 12
>> 1 file changed, 12 insertions(+)
>>
>> diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
>> index 5062af5..b7bf856 100644
>> --- a/drivers/usb/host/ehci-mxs.c
>> +++ b/drivers/usb/host/ehci-mxs.c
>> @@ -50,10 +50,12 @@ int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int
>> port) usb_base = MXS_USBCTRL0_BASE;
>> phy_base = MXS_USBPHY0_BASE;
>> break;
>> +#ifdef CONFIG_MX28
>> case 1:
>> usb_base = MXS_USBCTRL1_BASE;
>> phy_base = MXS_USBPHY1_BASE;
>> break;
>> +#endif
>> default:
>> printf("CONFIG_EHCI_MXS_PORT (port = %d)\n", port);
>> return -1;
>> @@ -67,7 +69,9 @@ int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int port)
>> /* This DIGCTL register ungates clock to USB */
>> #define HW_DIGCTL_CTRL 0x8001c000
>> #define HW_DIGCTL_CTRL_USB0_CLKGATE (1 << 2)
>> +#ifdef CONFIG_MX28
>> #define HW_DIGCTL_CTRL_USB1_CLKGATE (1 << 16)
>> +#endif
>>
>> int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor
>> **hcor) {
>> @@ -95,8 +99,12 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr,
>> struct ehci_hcor **hcor) writel(CLKCTRL_PLL1CTRL0_EN_USB_CLKS |
>> CLKCTRL_PLL1CTRL0_POWER,
>> &clkctrl_regs->hw_clkctrl_pll1ctrl0_set);
>>
>> +#if defined(CONFIG_MX23)
>> + writel(HW_DIGCTL_CTRL_USB0_CLKGATE, &digctl_ctrl->reg_clr);
>
> What is that large space before '&digctl_regs->...' ?
My fault. I can fix it.
>> +#elif defined(CONFIG_MX28)
>> writel(HW_DIGCTL_CTRL_USB0_CLKGATE | HW_DIGCTL_CTRL_USB1_CLKGATE,
>> &digctl_ctrl->reg_clr);
>> +#endif
>
> I'm sure these can be wrapped in much more elegant way, yes?
I wanted to keep the changes at minimum; so seems the right route.
What you'd like me to do? Use a temporary variable?
>> /* Start USB PHY */
>> writel(0, &ehci_mxs.phy_regs->hw_usbphy_pwd);
>> @@ -153,8 +161,12 @@ int ehci_hcd_stop(int index)
>> &clkctrl_regs->hw_clkctrl_pll1ctrl0_clr);
>>
>> /* Gate off the USB clock */
>> +#if defined(CONFIG_MX23)
>> + writel(HW_DIGCTL_CTRL_USB0_CLKGATE, &digctl_ctrl->reg_set);
>> +#elif defined(CONFIG_MX28)
>> writel(HW_DIGCTL_CTRL_USB0_CLKGATE | HW_DIGCTL_CTRL_USB1_CLKGATE,
>> &digctl_ctrl->reg_set);
>> +#endif
>>
>> return 0;
>> }
>
> Best regards,
> Marek Vasut
--
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E-mail: ota...@ossystems.com.br http://www.ossystems.com.br
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Re: [U-Boot] [PATCH v2 10/10] mx23_olinuxino: Add ethernet support
On Wed, Feb 13, 2013 at 7:19 PM, Marek Vasut wrote: > Dear Otavio Salvador, > >> This adds support to the LAN9512 chip included in the board and extend >> the environment to easy netboot use. >> >> Signed-off-by: Otavio Salvador > > You completely ignored previous discussion to make this ethernet thingie part > of > the previous patch. I made the HUB part of the previous patch; I don't agree in moving ethernet to there. -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 02/10] mx23: Document the tRAS lockout setting in memory initialization
On Wed, Feb 13, 2013 at 7:20 PM, Otavio Salvador wrote: >>> #ifdef CONFIG_MX23 >>> + /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be after all */ >> >> 'After all'? > > For me it is clear enough; I am not native so it'd be good if a native > English speaker could comment on this. I think you meant to say "it must be the last element". ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 03/10] mx23evk: Adjust DRAM control register to use full 128MB of RAM
Dear Otavio Salvador, > On Wed, Feb 13, 2013 at 7:13 PM, Marek Vasut wrote: > > Dear Otavio Salvador, > > > >> Adjust HW_DRAM_CTL14 to enable the chip selects to allow usage of full > >> 128MB of RAM. > > > > Why can this not be enabled globally? > > Because it breaks mx23_olinuxino; it is a good reason for me. Can you elaborate please? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 05/10] mxs: Fix iomux.h to not break build during assembly stage
Dear Otavio Salvador, > On Wed, Feb 13, 2013 at 7:13 PM, Marek Vasut wrote: > > Dear Otavio Salvador, > > > >> This fixes the build failure when included in mx23_olinuxino.h board > >> config; the addition of "asm/types.h" is due "u32" being otherwise > >> undefined. > > > > Regular doesn't cut it? > > I did not test; this seemed as the right one to take. Stefano? ok, asm/types.h seems good Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 07/10] usb: mxs: Disable USB Port 1 for i.MX23
Dear Otavio Salvador,
> On Wed, Feb 13, 2013 at 7:15 PM, Marek Vasut wrote:
> > Dear Otavio Salvador,
> >
> >> The i.MX23 just one USB port so disable the second controller probe
> >> when building for i.MX23.
> >>
> >> Signed-off-by: Otavio Salvador
> >> ---
> >> Changes in v2:
> >> - Avoid wrong clock setting in MX23
> >>
> >> drivers/usb/host/ehci-mxs.c | 12
> >> 1 file changed, 12 insertions(+)
> >>
> >> diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
> >> index 5062af5..b7bf856 100644
> >> --- a/drivers/usb/host/ehci-mxs.c
> >> +++ b/drivers/usb/host/ehci-mxs.c
> >> @@ -50,10 +50,12 @@ int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int
> >> port) usb_base = MXS_USBCTRL0_BASE;
> >>
> >> phy_base = MXS_USBPHY0_BASE;
> >> break;
> >>
> >> +#ifdef CONFIG_MX28
> >>
> >> case 1:
> >> usb_base = MXS_USBCTRL1_BASE;
> >> phy_base = MXS_USBPHY1_BASE;
> >> break;
> >>
> >> +#endif
> >>
> >> default:
> >> printf("CONFIG_EHCI_MXS_PORT (port = %d)\n", port);
> >> return -1;
> >>
> >> @@ -67,7 +69,9 @@ int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int
> >> port)
> >>
> >> /* This DIGCTL register ungates clock to USB */
> >> #define HW_DIGCTL_CTRL 0x8001c000
> >> #define HW_DIGCTL_CTRL_USB0_CLKGATE (1 << 2)
> >>
> >> +#ifdef CONFIG_MX28
> >>
> >> #define HW_DIGCTL_CTRL_USB1_CLKGATE (1 << 16)
> >>
> >> +#endif
> >>
> >> int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor
> >>
> >> **hcor) {
> >> @@ -95,8 +99,12 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr,
> >> struct ehci_hcor **hcor) writel(CLKCTRL_PLL1CTRL0_EN_USB_CLKS |
> >> CLKCTRL_PLL1CTRL0_POWER,
> >>
> >> &clkctrl_regs->hw_clkctrl_pll1ctrl0_set);
> >>
> >> +#if defined(CONFIG_MX23)
> >> + writel(HW_DIGCTL_CTRL_USB0_CLKGATE, &digctl_ctrl->reg_clr);
> >
> > What is that large space before '&digctl_regs->...' ?
>
> My fault. I can fix it.
>
> >> +#elif defined(CONFIG_MX28)
> >>
> >> writel(HW_DIGCTL_CTRL_USB0_CLKGATE | HW_DIGCTL_CTRL_USB1_CLKGATE,
> >>
> >> &digctl_ctrl->reg_clr);
> >>
> >> +#endif
> >
> > I'm sure these can be wrapped in much more elegant way, yes?
>
> I wanted to keep the changes at minimum; so seems the right route.
> What you'd like me to do? Use a temporary variable?
Either that or wrap it all in struct ehci_mxs and do these ungatings etc on a
per-port basis.
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Re: [U-Boot] [PATCH v2 10/10] mx23_olinuxino: Add ethernet support
Dear Otavio Salvador, > On Wed, Feb 13, 2013 at 7:19 PM, Marek Vasut wrote: > > Dear Otavio Salvador, > > > >> This adds support to the LAN9512 chip included in the board and extend > >> the environment to easy netboot use. > >> > >> Signed-off-by: Otavio Salvador > > > > You completely ignored previous discussion to make this ethernet thingie > > part of the previous patch. > > I made the HUB part of the previous patch; I don't agree in moving > ethernet to there. The ethernet is integral part of the hub chip. This approach you take here breaks bisectability. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 02/10] mx23: Document the tRAS lockout setting in memory initialization
On Wed, Feb 13, 2013 at 7:31 PM, Fabio Estevam wrote: > On Wed, Feb 13, 2013 at 7:20 PM, Otavio Salvador > wrote: > #ifdef CONFIG_MX23 + /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be after all */ >>> >>> 'After all'? >> >> For me it is clear enough; I am not native so it'd be good if a native >> English speaker could comment on this. > > I think you meant to say "it must be the last element". diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926 index f8392f6..b6a0563 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -119,6 +119,9 @@ static void initialize_dram_values(void) writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); #ifdef CONFIG_MX23 + /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be the last +* element to be set */ writel((1 << 24), MXS_DRAM_BASE + (4 * 8)); #endif } What about this? -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 03/10] mx23evk: Adjust DRAM control register to use full 128MB of RAM
On Wed, Feb 13, 2013 at 7:33 PM, Marek Vasut wrote: > Dear Otavio Salvador, > >> On Wed, Feb 13, 2013 at 7:13 PM, Marek Vasut wrote: >> > Dear Otavio Salvador, >> > >> >> Adjust HW_DRAM_CTL14 to enable the chip selects to allow usage of full >> >> 128MB of RAM. >> > >> > Why can this not be enabled globally? >> >> Because it breaks mx23_olinuxino; it is a good reason for me. > > Can you elaborate please? >From cover letter: The DRAM control register change has been kept specific to mx23evk as it breaks mx23_olinuxino (as it than reads only 16MB) -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 02/10] mx23: Document the tRAS lockout setting in memory initialization
On Wed, Feb 13, 2013 at 7:36 PM, Otavio Salvador wrote: > On Wed, Feb 13, 2013 at 7:31 PM, Fabio Estevam wrote: >> On Wed, Feb 13, 2013 at 7:20 PM, Otavio Salvador >> wrote: >> > #ifdef CONFIG_MX23 > + /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be after all */ 'After all'? >>> >>> For me it is clear enough; I am not native so it'd be good if a native >>> English speaker could comment on this. >> >> I think you meant to say "it must be the last element". > > diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926 > index f8392f6..b6a0563 100644 > --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c > +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c > @@ -119,6 +119,9 @@ static void initialize_dram_values(void) > writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); > > #ifdef CONFIG_MX23 > + /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be the last > +* element to be set */ I think the comment is clear, but multi-line comment should be like: /* * First line bla bla bla * Second line bla bla bla */ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 10/10] mx23_olinuxino: Add ethernet support
On Wed, Feb 13, 2013 at 7:36 PM, Marek Vasut wrote: > Dear Otavio Salvador, > >> On Wed, Feb 13, 2013 at 7:19 PM, Marek Vasut wrote: >> > Dear Otavio Salvador, >> > >> >> This adds support to the LAN9512 chip included in the board and extend >> >> the environment to easy netboot use. >> >> >> >> Signed-off-by: Otavio Salvador >> > >> > You completely ignored previous discussion to make this ethernet thingie >> > part of the previous patch. >> >> I made the HUB part of the previous patch; I don't agree in moving >> ethernet to there. > > The ethernet is integral part of the hub chip. This approach you take here > breaks bisectability. It does not; in case you do bisect you'll be able to build and run both revisions; it'll be a matter of one more 'bad' command call. I prefer to keep it split as it is much easier for someone reading the history to stop what has been done. -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 02/10] mx23: Document the tRAS lockout setting in memory initialization
On Wed, Feb 13, 2013 at 7:39 PM, Fabio Estevam wrote: > On Wed, Feb 13, 2013 at 7:36 PM, Otavio Salvador > wrote: >> On Wed, Feb 13, 2013 at 7:31 PM, Fabio Estevam wrote: >>> On Wed, Feb 13, 2013 at 7:20 PM, Otavio Salvador >>> wrote: >>> >> #ifdef CONFIG_MX23 >> + /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be after all */ > > 'After all'? For me it is clear enough; I am not native so it'd be good if a native English speaker could comment on this. >>> >>> I think you meant to say "it must be the last element". >> >> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926 >> index f8392f6..b6a0563 100644 >> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c >> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c >> @@ -119,6 +119,9 @@ static void initialize_dram_values(void) >> writel(dram_vals[i], MXS_DRAM_BASE + (4 * i)); >> >> #ifdef CONFIG_MX23 >> + /* Enable tRAS lockout in HW_DRAM_CTL08 ; it must be the last >> +* element to be set */ > > I think the comment is clear, but multi-line comment should be like: > > /* > * First line bla bla bla > * Second line bla bla bla > */ Ok; fixed for v3. -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/3] Tegra: MMC: Add DT support for MMC to T20 boards
This patchset adds device-tree support to the Tegra MMC driver. All device config is done via properties in the DT files instead of hard-coded config options/function arguments. I've tested this on my Seaboard and everything works fine, including card detect. For the other T20 boards, I've used the Linux kernel DTS files for the sdhci nodes where there wasn't one already, or expanded the info that was already there. Everything builds fine, but I haven't tested anything but Seaboard. v2: Changes as per Stephen's & Simon's review v3: Changes as per Stephen/Lucas/Thierry/Simon's feedback Tom Warren (3): Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files Tegra: fdt: tamonten: Add common tamonten.dtsi file from linux Tegra: MMC: Add DT support to MMC driver for all T20 boards arch/arm/dts/tegra20.dtsi | 16 +- arch/arm/include/asm/arch-tegra/mmc.h |2 +- arch/arm/include/asm/arch-tegra/tegra_mmc.h | 13 +- board/avionic-design/common/tamonten.c| 19 +- board/avionic-design/dts/tegra20-medcom-wide.dts |3 +- board/avionic-design/dts/tegra20-plutux.dts |3 +- board/avionic-design/dts/tegra20-tamonten.dtsi| 489 + board/avionic-design/dts/tegra20-tec.dts |3 +- board/compal/dts/tegra20-paz00.dts| 19 +- board/compal/paz00/paz00.c| 26 +- board/compulab/dts/tegra20-trimslice.dts | 14 + board/compulab/trimslice/trimslice.c | 25 +- board/nvidia/common/board.c | 26 +- board/nvidia/dts/tegra20-harmony.dts | 18 + board/nvidia/dts/tegra20-seaboard.dts | 10 +- board/nvidia/dts/tegra20-ventana.dts | 15 + board/nvidia/dts/tegra20-whistler.dts | 13 + board/nvidia/harmony/harmony.c| 26 +- board/nvidia/seaboard/seaboard.c | 25 +- board/nvidia/whistler/whistler.c | 30 +- board/toradex/colibri_t20_iris/colibri_t20_iris.c | 11 +- board/toradex/dts/tegra20-colibri_t20_iris.dts|7 + drivers/mmc/tegra_mmc.c | 259 +++ dts/Makefile |2 +- include/fdtdec.h |1 + lib/fdtdec.c |1 + 26 files changed, 815 insertions(+), 261 deletions(-) create mode 100644 board/avionic-design/dts/tegra20-tamonten.dtsi ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/3] Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files
Linux dts files were used for those boards that didn't already
have sdhci info populated. Tamonten has their own dtsi file with
common sdhci nodes (sourced from Linux).
Signed-off-by: Tom Warren
Tested-by: Thierry Reding
---
v2:
- cleanup comments in dts files/match w/kernel files
- add sdhci aliases in all dts files
- use tegra20-tamonten.dtsi from the kernel for AD boards
v3:
- include tamonten.dtsi file directly in AD dts files
- fix Seaboard power-gpios flags
- add cd-gpios for Colibri T20 Iris
- add include paths to DTC command
arch/arm/dts/tegra20.dtsi| 16
board/avionic-design/dts/tegra20-medcom-wide.dts |3 ++-
board/avionic-design/dts/tegra20-plutux.dts |3 ++-
board/avionic-design/dts/tegra20-tec.dts |3 ++-
board/compal/dts/tegra20-paz00.dts | 19 +--
board/compulab/dts/tegra20-trimslice.dts | 14 ++
board/nvidia/dts/tegra20-harmony.dts | 18 ++
board/nvidia/dts/tegra20-seaboard.dts| 10 +++---
board/nvidia/dts/tegra20-ventana.dts | 15 +++
board/nvidia/dts/tegra20-whistler.dts| 13 +
board/toradex/dts/tegra20-colibri_t20_iris.dts |7 +++
dts/Makefile |2 +-
12 files changed, 110 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index 9a89685..982a070 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -318,24 +318,32 @@
sdhci@c800 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc800 0x200>;
- interrupts = < 46 >;
+ interrupts = <0 14 0x04>;
+ clocks = <&tegra_car 14>;
+ status = "disabled";
};
sdhci@c8000200 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000200 0x200>;
- interrupts = < 47 >;
+ interrupts = <0 15 0x04>;
+ clocks = <&tegra_car 9>;
+ status = "disabled";
};
sdhci@c8000400 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000400 0x200>;
- interrupts = < 51 >;
+ interrupts = <0 19 0x04>;
+ clocks = <&tegra_car 69>;
+ status = "disabled";
};
sdhci@c8000600 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000600 0x200>;
- interrupts = < 63 >;
+ interrupts = <0 31 0x04>;
+ clocks = <&tegra_car 15>;
+ status = "disabled";
};
};
diff --git a/board/avionic-design/dts/tegra20-medcom-wide.dts
b/board/avionic-design/dts/tegra20-medcom-wide.dts
index e46afbe..01a4451 100644
--- a/board/avionic-design/dts/tegra20-medcom-wide.dts
+++ b/board/avionic-design/dts/tegra20-medcom-wide.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ ARCH_CPU_DTS
+/include/ "tegra20-tamonten.dtsi"
/ {
model = "Avionic Design Medcom-Wide";
@@ -8,6 +8,7 @@
aliases {
usb0 = "/usb@c5008000";
+ sdhci0 = "/sdhci@c8000600";
};
memory {
diff --git a/board/avionic-design/dts/tegra20-plutux.dts
b/board/avionic-design/dts/tegra20-plutux.dts
index 3e6cce0..f574542 100644
--- a/board/avionic-design/dts/tegra20-plutux.dts
+++ b/board/avionic-design/dts/tegra20-plutux.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ ARCH_CPU_DTS
+/include/ "tegra20-tamonten.dtsi"
/ {
model = "Avionic Design Plutux";
@@ -8,6 +8,7 @@
aliases {
usb0 = "/usb@c5008000";
+ sdhci0 = "/sdhci@c8000600";
};
memory {
diff --git a/board/avionic-design/dts/tegra20-tec.dts
b/board/avionic-design/dts/tegra20-tec.dts
index bf3ff1d..376d279 100644
--- a/board/avionic-design/dts/tegra20-tec.dts
+++ b/board/avionic-design/dts/tegra20-tec.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ ARCH_CPU_DTS
+/include/ "tegra20-tamonten.dtsi"
/ {
model = "Avionic Design Tamonten Evaluation Carrier";
@@ -8,6 +8,7 @@
aliases {
usb0 = "/usb@c5008000";
+ sdhci0 = "/sdhci@c8000600";
};
memory {
diff --git a/board/compal/dts/tegra20-paz00.dts
b/board/compal/dts/tegra20-paz00.dts
index 31b064d..6476940 100644
--- a/board/compal/dts/tegra20-paz00.dts
+++ b/board/compal/dts/tegra20-paz00.dts
@@ -3,11 +3,13 @@
/include/ ARCH_CPU_DTS
/ {
-model = "Toshiba AC100 / Dynabook AZ";
-compatible = "compal,paz00", "nvidia,tegra20";
+ model = "Toshiba AC100 / Dynabook AZ";
+ compatible = "compal,paz00", "nvidia,tegra20";
aliases {
usb0 = "/usb@c5008000";
+ sdhci0 = "/sdhci@c8000600";
+ sdhci1 = "/sdhci@c800";
};
memory {
@@ -53,6
[U-Boot] [PATCH v3 2/3] Tegra: fdt: tamonten: Add common tamonten.dtsi file from linux
Tamonten boards (medcom-wide, plutux, and tec) use a different/new
dtsi file w/common settings.
Signed-off-by: Tom Warren
Acked-by: Thierry Reding
---
v3: new
board/avionic-design/dts/tegra20-tamonten.dtsi | 489
1 files changed, 489 insertions(+), 0 deletions(-)
create mode 100644 board/avionic-design/dts/tegra20-tamonten.dtsi
diff --git a/board/avionic-design/dts/tegra20-tamonten.dtsi
b/board/avionic-design/dts/tegra20-tamonten.dtsi
new file mode 100644
index 000..4766aba
--- /dev/null
+++ b/board/avionic-design/dts/tegra20-tamonten.dtsi
@@ -0,0 +1,489 @@
+/include/ "tegra20.dtsi"
+
+/ {
+ model = "Avionic Design Tamonten SOM";
+ compatible = "ad,tamonten", "nvidia,tegra20";
+
+ memory {
+ reg = <0x 0x2000>;
+ };
+
+ host1x {
+ hdmi {
+ vdd-supply = <&hdmi_vdd_reg>;
+ pll-supply = <&hdmi_pll_reg>;
+
+ nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+ nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ };
+ };
+
+ pinmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ ata {
+ nvidia,pins = "ata";
+ nvidia,function = "ide";
+ };
+ atb {
+ nvidia,pins = "atb", "gma", "gme";
+ nvidia,function = "sdio4";
+ };
+ atc {
+ nvidia,pins = "atc";
+ nvidia,function = "nand";
+ };
+ atd {
+ nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
+ "spia", "spib", "spic";
+ nvidia,function = "gmi";
+ };
+ cdev1 {
+ nvidia,pins = "cdev1";
+ nvidia,function = "plla_out";
+ };
+ cdev2 {
+ nvidia,pins = "cdev2";
+ nvidia,function = "pllp_out4";
+ };
+ crtp {
+ nvidia,pins = "crtp";
+ nvidia,function = "crt";
+ };
+ csus {
+ nvidia,pins = "csus";
+ nvidia,function = "vi_sensor_clk";
+ };
+ dap1 {
+ nvidia,pins = "dap1";
+ nvidia,function = "dap1";
+ };
+ dap2 {
+ nvidia,pins = "dap2";
+ nvidia,function = "dap2";
+ };
+ dap3 {
+ nvidia,pins = "dap3";
+ nvidia,function = "dap3";
+ };
+ dap4 {
+ nvidia,pins = "dap4";
+ nvidia,function = "dap4";
+ };
+ dta {
+ nvidia,pins = "dta", "dtd";
+ nvidia,function = "sdio2";
+ };
+ dtb {
+ nvidia,pins = "dtb", "dtc", "dte";
+ nvidia,function = "rsvd1";
+ };
+ dtf {
+ nvidia,pins = "dtf";
+ nvidia,function = "i2c3";
+ };
+ gmc {
+ nvidia,pins = "gmc";
+ nvidia,function = "uartd";
+ };
+ gpu7 {
+ nvidia,pins = "gpu7";
+ nvidia,function = "rtck";
+ };
+ gpv {
+ nvidia,pins = "gpv", "slxa", "slxk";
+ nvidia,function = "pcie";
+ };
+ hdint {
+ nvidia,pins = "hdint";
+ nvidia,function = "hdmi";
+ };
+ i2cp {
+ nvidia,pins = "i2cp";
+ nvidia,function = "i2cp";
+ };
+ irrx {
+ nvidia,pins = "irrx", "irtx";
+ nvidia,function = "uarta";
+ };
[U-Boot] [PATCH v3 3/3] Tegra: MMC: Add DT support to MMC driver for all T20 boards
tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc.
Tested on Seaboard, fully functional.
Tamonten boards (medcom-wide, plutux, and tec) use a different/new
dtsi file w/common settings.
Signed-off-by: Tom Warren
Signed-off-by: Thierry Reding
---
v2:
- all boards now call tegra_mmc_init once, w/no params
- count MMC controllers, not aliases
- AD boards (medcom/plutux/tec) use common tegra20-tamonten.dtsi
v3:
- move any power init inside board's pin_mux_mmc function, and/or
create pin_mux_mmc function if necessary.
- move board_mmc_init out of each board file and into ../common/board.c
arch/arm/include/asm/arch-tegra/mmc.h |2 +-
arch/arm/include/asm/arch-tegra/tegra_mmc.h | 13 +-
board/avionic-design/common/tamonten.c| 19 +--
board/compal/paz00/paz00.c| 26 +--
board/compulab/trimslice/trimslice.c | 25 +--
board/nvidia/common/board.c | 26 ++-
board/nvidia/harmony/harmony.c| 26 +--
board/nvidia/seaboard/seaboard.c | 25 +--
board/nvidia/whistler/whistler.c | 30 +--
board/toradex/colibri_t20_iris/colibri_t20_iris.c | 11 +-
drivers/mmc/tegra_mmc.c | 259 +
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
13 files changed, 216 insertions(+), 248 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra/mmc.h
b/arch/arm/include/asm/arch-tegra/mmc.h
index 5c95047..71ad407 100644
--- a/arch/arm/include/asm/arch-tegra/mmc.h
+++ b/arch/arm/include/asm/arch-tegra/mmc.h
@@ -22,6 +22,6 @@
#ifndef _TEGRA_MMC_H_
#define _TEGRA_MMC_H_
-int tegra_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio);
+void tegra_mmc_init(void);
#endif /* _TEGRA_MMC_H_ */
diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h
b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
index dd746ca..bd18f5f 100644
--- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h
+++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
@@ -27,6 +27,8 @@
#define TEGRA_SDMMC3_BASE 0xC8000400
#define TEGRA_SDMMC4_BASE 0xC8000600
+#define MAX_HOSTS 4 /* Max number of 'hosts'/controllers */
+
#ifndef __ASSEMBLY__
struct tegra_mmc {
unsigned intsysad; /* _SYSTEM_ADDRESS_0 */
@@ -119,12 +121,15 @@ struct tegra_mmc {
struct mmc_host {
struct tegra_mmc *reg;
+ int id; /* device id/number, 0-3 */
+ int enabled;/* 1 to enable, 0 to disable */
+ int width; /* Bus Width, 1, 4 or 8 */
+ enum periph_id mmc_id; /* Peripheral ID: PERIPH_ID_... */
+ struct fdt_gpio_state cd_gpio; /* Change Detect GPIO */
+ struct fdt_gpio_state pwr_gpio; /* Power GPIO */
+ struct fdt_gpio_state wp_gpio; /* Write Protect GPIO */
unsigned int version; /* SDHCI spec. version */
unsigned int clock; /* Current clock (MHz) */
- unsigned int base; /* Base address, SDMMC1/2/3/4 */
- enum periph_id mmc_id; /* Peripheral ID: PERIPH_ID_... */
- int pwr_gpio; /* Power GPIO */
- int cd_gpio;/* Change Detect GPIO */
};
#endif /* __ASSEMBLY__ */
diff --git a/board/avionic-design/common/tamonten.c
b/board/avionic-design/common/tamonten.c
index e6a932e..ea95e43 100644
--- a/board/avionic-design/common/tamonten.c
+++ b/board/avionic-design/common/tamonten.c
@@ -33,13 +33,8 @@
#include
#include
#include
-#include
#include
#include
-#ifdef CONFIG_TEGRA_MMC
-#include
-#endif
-
#ifdef CONFIG_BOARD_EARLY_INIT_F
void gpio_early_init(void)
@@ -54,7 +49,7 @@ void gpio_early_init(void)
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
-static void pin_mux_mmc(void)
+void pin_mux_mmc(void)
{
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
/* for write-protect GPIO PI6 */
@@ -62,16 +57,4 @@ static void pin_mux_mmc(void)
/* for CD GPIO PH2 */
pinmux_tristate_disable(PINGRP_ATD);
}
-
-/* this is a weak define that we are overriding */
-int board_mmc_init(bd_t *bd)
-{
- /* Enable muxes, etc. for SDMMC controllers */
- pin_mux_mmc();
-
- /* init dev 0, SD slot, with 4-bit bus */
- tegra_mmc_init(0, 4, GPIO_PI6, GPIO_PH2);
-
- return 0;
-}
#endif
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c
index 1447f47..d6e5c37 100644
--- a/board/compal/paz00/paz00.c
+++ b/board/compal/paz00/paz00.c
@@ -18,19 +18,14 @@
#include
#include
#include
-#include
#include
-#ifdef CONFIG_TEGRA_MMC
-#include
-#endif
-
#ifdef CONFIG_TEGRA_MMC
/*
* Routine: pin_mux_mmc
* Description: setup the pin muxes/tristate values for the SDMMC(s)
*/
-static void pin_mux_mmc(void)
+void pin_mux_mmc(void)
Re: [U-Boot] [PATCH 01/14] tegra: spi: rename tegra SPI drivers
On 02/12/2013 08:23 PM, Allen Martin wrote: > Rename tegra SPI drivers to tegra20_spi and tegra30_spi in preparation > for commonization and addition of tegra114_spi. This isn't logically quite right. Both types (sflash, slink) of SPI controller actually exist on Tegra20, so it isn't right to name them after the different chips. It is true that only one is kept for Tegra30 (slink). As such, it might make sense to simply drop this patch. > arch/arm/include/asm/arch-tegra/tegra_slink.h | 84 -- > arch/arm/include/asm/arch-tegra/tegra_spi.h | 75 - > arch/arm/include/asm/arch-tegra20/tegra20_spi.h | 75 + > arch/arm/include/asm/arch-tegra30/tegra30_spi.h | 84 ++ > board/nvidia/common/board.c |2 +- > board/nvidia/common/uart-spi-switch.c |2 +- > drivers/spi/Makefile|4 +- > drivers/spi/tegra20_spi.c | 330 ++ > drivers/spi/tegra30_spi.c | 343 > +++ > drivers/spi/tegra_slink.c | 343 > --- > drivers/spi/tegra_spi.c | 330 -- > include/configs/cardhu.h|2 +- > include/configs/trimslice.h |2 +- > 13 files changed, 838 insertions(+), 838 deletions(-) > delete mode 100644 arch/arm/include/asm/arch-tegra/tegra_slink.h > delete mode 100644 arch/arm/include/asm/arch-tegra/tegra_spi.h > create mode 100644 arch/arm/include/asm/arch-tegra20/tegra20_spi.h > create mode 100644 arch/arm/include/asm/arch-tegra30/tegra30_spi.h > create mode 100644 drivers/spi/tegra20_spi.c > create mode 100644 drivers/spi/tegra30_spi.c > delete mode 100644 drivers/spi/tegra_slink.c > delete mode 100644 drivers/spi/tegra_spi.c "git format-patch -M" might have made this easier to spot the changes during the renames, assuming there weren't too many edits to make it worthwhile. I didn't actually review the diffs, since I assume it was just a simple rename. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 03/14] tegra: spi: pull register structs out of headers
On 02/12/2013 08:23 PM, Allen Martin wrote: > Move register structs from headers into .c files and use common name. > This is in preparation of making common fdt front end for SPI > drivers. Why not move all the register defines too? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/14] tegra: spi: rename tegra SPI drivers
On 02/12/2013 08:23 PM, Allen Martin wrote: > Rename tegra SPI drivers to tegra20_spi and tegra30_spi in preparation > for commonization and addition of tegra114_spi. > board/nvidia/common/uart-spi-switch.c |2 +- I tend to think we should just rip out the UART/SPI switch cruft; it's just not that useful. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] btrfs support in uboot
Adnan Ali (1): Introduced btrfs file-system with btrload command Makefile |3 +- common/Makefile |1 + common/cmd_btr.c | 52 +++ fs/btrfs/Makefile | 51 +++ fs/btrfs/btrfs.c | 1131 + fs/fs.c | 117 +- include/btrfs.h | 398 +++ include/crc32c.h | 48 +++ include/fs.h |1 + 9 files changed, 1782 insertions(+), 20 deletions(-) create mode 100644 common/cmd_btr.c create mode 100644 fs/btrfs/Makefile create mode 100644 fs/btrfs/btrfs.c create mode 100644 include/btrfs.h create mode 100644 include/crc32c.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Introduced btrfs file-system with btrload command
This commit introduces btrfs file-system to read file
from volume/sub-volumes with btrload command. This
implementation has read-only support.
This btrfs implementation is based on syslinux btrfs
code.
---
Makefile |3 +-
common/Makefile |1 +
common/cmd_btr.c | 52 +++
fs/btrfs/Makefile | 51 +++
fs/btrfs/btrfs.c | 1131 +
fs/fs.c | 117 +-
include/btrfs.h | 398 +++
include/crc32c.h | 48 +++
include/fs.h |1 +
9 files changed, 1782 insertions(+), 20 deletions(-)
create mode 100644 common/cmd_btr.c
create mode 100644 fs/btrfs/Makefile
create mode 100644 fs/btrfs/btrfs.c
create mode 100644 include/btrfs.h
create mode 100644 include/crc32c.h
diff --git a/Makefile b/Makefile
index 3305e8c..8d2855a 100644
--- a/Makefile
+++ b/Makefile
@@ -270,7 +270,8 @@ LIBS-y += fs/libfs.o \
fs/reiserfs/libreiserfs.o \
fs/ubifs/libubifs.o \
fs/yaffs2/libyaffs2.o \
- fs/zfs/libzfs.o
+ fs/zfs/libzfs.o\
+fs/btrfs/libbtrfs.o
LIBS-y += net/libnet.o
LIBS-y += disk/libdisk.o
LIBS-y += drivers/bios_emulator/libatibiosemu.o
diff --git a/common/Makefile b/common/Makefile
index 54fcc81..4abf26b 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -96,6 +96,7 @@ COBJS-$(CONFIG_SYS_HUSH_PARSER) += cmd_exit.o
COBJS-$(CONFIG_CMD_EXT4) += cmd_ext4.o
COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o
COBJS-$(CONFIG_CMD_FAT) += cmd_fat.o
+COBJS-$(CONFIG_CMD_FAT) += cmd_btr.o
COBJS-$(CONFIG_CMD_FDC)$(CONFIG_CMD_FDOS) += cmd_fdc.o
COBJS-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o
COBJS-$(CONFIG_CMD_FDOS) += cmd_fdos.o
diff --git a/common/cmd_btr.c b/common/cmd_btr.c
new file mode 100644
index 000..f65261c
--- /dev/null
+++ b/common/cmd_btr.c
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2013 Codethink Limited
+ * Btrfs port to Uboot by
+ * Adnan Ali
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Boot support
+ */
+#include
+#include
+
+char SubvolName[MAX_SUBVOL_NAME];
+
+int do_btr_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+if(argc>5)
+ strcpy(SubvolName, argv[5]);
+else strcpy(SubvolName, ""); //no subvol defined
+
+return do_load(cmdtp, flag, argc, argv, FS_TYPE_BTR, 16);
+}
+
+
+U_BOOT_CMD(
+btrload,7, 0, do_btr_fsload,
+"load binary file from a btr filesystem",
+" [][subvol_name]\n"
+"- Load binary file 'filename' from 'dev' on 'interface'\n"
+" to address 'addr' from better filesystem.\n"
+" the load stops on end of file.\n"
+" subvol_name is used read that file from this subvolume.\n"
+" All numeric parameters are assumed to be hex."
+);
+
diff --git a/fs/btrfs/Makefile b/fs/btrfs/Makefile
new file mode 100644
index 000..a9e2021
--- /dev/null
+++ b/fs/btrfs/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2003
+# Pavel Bartusek, Sysgo Real-Time Solutions AG, p...@sysgo.de
+#
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)libbtrfs.o
+
+AOBJS =
+COBJS-$(CONFIG_FS_BTR) := btrfs.o
+
+SRCS := $(AOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS-y))
+
+
+all: $(LIB) $(AOBJS)
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_t
Re: [U-Boot] [PATCH 05/14] spi: add common fdt SPI driver interface
On 02/12/2013 08:23 PM, Allen Martin wrote:
> Add a common interface to fdt based SPI drivers. Each driver is
> represented by a table entry in fdt_spi_drivers[]. If there are
> multiple SPI drivers in the table, the first driver to return success
> from spi_init() will be registered as the SPI driver.
I don't think there should be a global concept of "the" SPI driver;
instances of both SPI blocks exist on Tegra20, so they should be able to
co-exist, using the SFLASH driver for 1 SPI port, and the SLINK driver
for the other 4 ports.
How does this patch interact with any SPI-related device manager work?
> +void spi_init(void)
> +{
> + int i;
> + int num_drivers = sizeof(fdt_spi_drivers) /
> + sizeof(struct fdt_spi_driver);
U-Boot doesn't have an ARSIZE/ARRAY_SIZE macro?
> diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h
> /* SPI */
> #define CONFIG_TEGRA30_SPI
> -#define CONFIG_TEGRA_SLINK_CTRLS 6
> +#define CONFIG_TEGRA30_SPI_CTRLS 6
Should that be in one of the other patches?
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Re: [U-Boot] [PATCH 09/14] tegra114: fdt: add CAR block
On 02/12/2013 08:23 PM, Allen Martin wrote:
> Add node for clock and reset controller hardware.
> diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
> + tegra_car: clock@60006000 {
> + compatible = "nvidia,tegra114-car", "nvidia,tegra30-car",
> "nvidia,tegra20-car";
The Tegra114 CAR isn't 100% backwards-compatible with either the Tegra20
nor Tegra30 CAR, so shouldn't include those compatible values.
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Re: [U-Boot] [PATCH 10/14] tegra114: fdt: add apbdma block
On 02/12/2013 08:23 PM, Allen Martin wrote:
> Add node for apbdma controller hardware.
> diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
> + apbdma: dma {
> + compatible = "nvidia,tegra114-apbdma", "nvidia,tegra30-apbdma",
> "nvidia,tegra20-apbdma";
Sam here; the HW isn't 100% backwards-compatible with any previous
generation, so only include the Tegra114 compatible value.
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Re: [U-Boot] [PATCH 08/14] tegra114: fdt: add compatible string for tegra114 SPI ctrl
On 02/12/2013 08:23 PM, Allen Martin wrote: > Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. > + COMPAT_NVIDIA_TEGRA114_SPI, /* Tegra 114 SPI controller */ Should probably be called TEGRA114_SLINK to match the actual value. > + COMPAT(NVIDIA_TEGRA114_SPI, "nvidia,tegra114-spi"), The value is nvidia,tegra114-slink. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 11/14] tegra114: fdt: add SPI blocks
On 02/12/2013 08:23 PM, Allen Martin wrote:
> Add nodes for t114 SPI controller hardware
s/t114/Tegra114/. Similar in patch 8/14 subject.
> diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
> + spi@7000d400 {
> + compatible = "nvidia,tegra114-spi";
> + reg = <0x7000d400 0x200>;
> + interrupts = <0 59 0x04>;
> + nvidia,dma-request-selector = <&apbdma 15>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + /* PERIPH_ID_SBC1, PLLP_OUT0 */
> + clocks = <&tegra_car 41>;
> + };
The status property should be last to match the kernel's device tree.
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Re: [U-Boot] [PATCH 13/14] tegra114: add SPI driver
On 02/12/2013 08:23 PM, Allen Martin wrote: > Subject: tegra114: add SPI driver This really touches the SPI sub-system more than Tegra, and the Tegra subsystem is just (and all of) Tegra not Tegra114-specific, so I'd re-title this: spi: tegra: add Tegra114 SPI driver similar s/tegra114:/tegra:/ in other patch subjects, many of which probably should be "ARM: tegra: ...". ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files
On 02/13/2013 02:44 PM, Tom Warren wrote:
> Linux dts files were used for those boards that didn't already
> have sdhci info populated. Tamonten has their own dtsi file with
> common sdhci nodes (sourced from Linux).
> diff --git a/dts/Makefile b/dts/Makefile
> index 922c78c..2ef31e9 100644
> --- a/dts/Makefile
> +++ b/dts/Makefile
> @@ -50,7 +50,7 @@ DT_BIN := $(obj)dt.dtb
> $(DT_BIN): $(TOPDIR)/board/$(VENDOR)/dts/$(DEVICE_TREE).dts
> rc=$$( \
> cat $< | $(CPP) -P $(DTS_CPPFLAGS) - | \
> - { { $(DTC) -R 4 -p 0x1000 -O dtb -o ${DT_BIN} - 2>&1 ; \
> + { { $(DTC) -R 4 -p 0x1000 -i $(TOPDIR)/board/$(VENDOR)/dts -i
> $(TOPDIR)/arch/$(ARCH)/dts -O dtb -o ${DT_BIN} - 2>&1 ; \
> echo $$? >&3 ; } | \
> grep -v '^DTC: dts->dtb on file' ; \
> } 3>&1 1>&2 ) ; \
Shouldn't this be a separate patch?
The one issue with this is that only newer versions of dtc support the
-i option. The version packaged with most distros won't support it.
That'll mean something like "MAKEALL -a arm" is going to fail for a lot
of people without some kind of explicit action (i.e. manually installing
a newer version of dtc).
That's why I suggested switching from /include/ to #include, and adding
the include path to the cpp command rather than dtc.
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Re: [U-Boot] [PATCH v3 2/3] Tegra: fdt: tamonten: Add common tamonten.dtsi file from linux
On 02/13/2013 02:44 PM, Tom Warren wrote: > Tamonten boards (medcom-wide, plutux, and tec) use a different/new > dtsi file w/common settings. > > Signed-off-by: Tom Warren > Acked-by: Thierry Reding > --- > v3: new If this was new in v3, how did Thierry ack it already? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC] [PATCH] Avoid R_ARM_ABS32 for bss start and end references
On Tue, Feb 12, 2013 at 06:27:27PM +0100, Albert ARIBAUD wrote: > This patch SHOULD NOT BE applied in any official U-boot tree! It is > submitted as an RFC and a request to test. I can confirm that this patch applied on top of 9c748e0 worked for my two kirkwood boards. One is in mainline (ib62x0) and one is not. Tested-by: Luka Perkov ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 3/3] Tegra: MMC: Add DT support to MMC driver for all T20 boards
On 02/13/2013 02:44 PM, Tom Warren wrote: > tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. > Tested on Seaboard, fully functional. > > Tamonten boards (medcom-wide, plutux, and tec) use a different/new > dtsi file w/common settings. > diff --git a/board/compulab/trimslice/trimslice.c > b/board/compulab/trimslice/trimslice.c > +#ifdef CONFIG_TEGRA_MMC It seems a little odd to add this ifdef when it's know that config option is enabled in the trimslice config file. I can somewhat understand leaving the ifdef in any other board files that already had it, but actively adding it here seems strange. > diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c > @@ -184,7 +187,6 @@ int board_init(void) > /* prepare the WB code to LP0 location */ > warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); > #endif > - > return 0; > } Unrelated change? > diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c > +static int process_nodes(const void *blob, int node_list[], int count) > + /* Mark position as used */ > + node_list[i] = -1; Is this actually necessary? I'll try and test these patches on all the Tegra20 boards I have tomorrow. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Fix bitmap offsets for non 8-bit LCDs
Currently bitmap logos don't interpret the X coordinate correctly if the bpp
is anything other than 8.
Signed-off-by: Andre Renaud
---
common/lcd.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/common/lcd.c b/common/lcd.c
index 66d4f94..ee47712 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -589,15 +589,16 @@ void bitmap_plot(int x, int y)
immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
cpm8xx_t *cp = &(immr->im_cpm);
#endif
+ unsigned bpix = NBITS(panel_info.vl_bpix);
debug("Logo: width %d height %d colors %d cmap %d\n",
BMP_LOGO_WIDTH, BMP_LOGO_HEIGHT, BMP_LOGO_COLORS,
ARRAY_SIZE(bmp_logo_palette));
bmap = &bmp_logo_bitmap[0];
- fb = (uchar *)(lcd_base + y * lcd_line_length + x);
+ fb = (uchar *)(lcd_base + y * lcd_line_length + x * bpix / 8);
- if (NBITS(panel_info.vl_bpix) < 12) {
+ if (bpix < 12) {
/* Leave room for default color map
* default case: generic system with no cmap (most likely 16bpp)
* cmap was set to the source palette, so no change is done.
@@ -648,7 +649,7 @@ void bitmap_plot(int x, int y)
}
else { /* true color mode */
u16 col16;
- fb16 = (ushort *)(lcd_base + y * lcd_line_length + x);
+ fb16 = (ushort *)fb;
for (i = 0; i < BMP_LOGO_HEIGHT; ++i) {
for (j = 0; j < BMP_LOGO_WIDTH; j++) {
col16 = bmp_logo_palette[(bmap[j]-16)];
--
1.7.9.5
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Re: [U-Boot] [RFC PATCH] Add support for Boundary Devices Nitrogen6x boards
Thanks for the review, Stefano. On 02/12/2013 02:12 AM, Stefano Babic wrote: On 30/01/2013 19:10, Eric Nelson wrote: This patch adds support for the Nitrogen6X board(s) from Boundary Devices. The boards are based on the i.MX6x processor family with two major variants: i.MX6Quad/6Dual i.MX6Dual-Lite/6Solo More specifically, the board variations are: nitrogen6q i.MX6Q/6D 1GB nitrogen6dl i.MX6DL 1GB nitrogen6s i.MX6S 512MB nitrogen6q2gi.MX6Q/6D 2GB nitrogen6dl2g i.MX6DL 2GB nitrogen6s1gi.MX6S 1GB Refer to http://boundarydevices.com/products/ for details. Hi Eric, some general comments in praparation your V2. I have only some minor points. - Try to split your patch in several patches, if possible. The patch covers different issues and the series will be easy to be review. This is mainly for the changes outside boards/boundary - I know it is not easy to split the rest. Understood. I submitted this as one big patch to show things in context. - I agree you put your script in the board directory instead opf trying to use CONFIG_EXTRA_ENV_SETTINGS. Cool. - Agree with the split of the configuration data (clocks.cfg and ddr setup). The same mechanism can be reused for other boards, too. Thanks. Note that there's a bit of hand-waving for things that don't quite fit, but the essential differences in memory setup are properly partitioned. - and agree with the nomenclature. My +1 to rename mx6x_pins.h to mx6q_pins.h as you suggest in the cover letter. Will do. I'll submit that before V2 of Nitrogen6X support so it can be discussed separately. Regards, Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 3/3] Tegra: MMC: Add DT support to MMC driver for all T20 boards
Hi, On Wed, Feb 13, 2013 at 4:17 PM, Stephen Warren wrote: > On 02/13/2013 02:44 PM, Tom Warren wrote: >> tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. >> Tested on Seaboard, fully functional. >> >> Tamonten boards (medcom-wide, plutux, and tec) use a different/new >> dtsi file w/common settings. > >> diff --git a/board/compulab/trimslice/trimslice.c >> b/board/compulab/trimslice/trimslice.c > >> +#ifdef CONFIG_TEGRA_MMC > > It seems a little odd to add this ifdef when it's know that config > option is enabled in the trimslice config file. I can somewhat > understand leaving the ifdef in any other board files that already had > it, but actively adding it here seems strange. > >> diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c > >> @@ -184,7 +187,6 @@ int board_init(void) >> /* prepare the WB code to LP0 location */ >> warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); >> #endif >> - >> return 0; >> } > > Unrelated change? > >> diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c >> +static int process_nodes(const void *blob, int node_list[], int count) > >> + /* Mark position as used */ >> + node_list[i] = -1; > > Is this actually necessary? I don't think it is in this case. It is useful when adding aliases from multiple compatible IDs, to mark those positions that are already taken. We don't do that here. > > I'll try and test these patches on all the Tegra20 boards I have tomorrow. > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] SMDK5250: Fix compiler warning for non-dt systems
On Tue, Feb 12, 2013 at 10:42 PM, Vivek Gautam wrote:
> Compiling for non-dt systems gives folowing warning:
> smdk5250.c: In function 'board_eth_init':
> smdk5250.c:152:6: warning: unused variable 'node' [-Wunused-variable]
>
> Declare variable 'node' only for dt enabled systems to remove this
> warning.
>
> Signed-off-by: Vivek Gautam
Acked-by: Simon Glass
> ---
> board/samsung/smdk5250/smdk5250.c |3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/board/samsung/smdk5250/smdk5250.c
> b/board/samsung/smdk5250/smdk5250.c
> index 7a5f132..2fa771e 100644
> --- a/board/samsung/smdk5250/smdk5250.c
> +++ b/board/samsung/smdk5250/smdk5250.c
> @@ -149,9 +149,10 @@ int board_eth_init(bd_t *bis)
> u32 smc_bw_conf, smc_bc_conf;
> struct fdt_sromc config;
> fdt_addr_t base_addr;
> - int node;
>
> #ifdef CONFIG_OF_CONTROL
> + int node;
> +
> node = decode_sromc(gd->fdt_blob, &config);
> if (node < 0) {
> debug("%s: Could not find sromc configuration\n", __func__);
> --
> 1.7.6.5
>
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Re: [U-Boot] [PATCH 2/2] spi: exynos: Fix compiler warnings for non-dt systems
On Tue, Feb 12, 2013 at 10:42 PM, Vivek Gautam wrote:
> Enclosing process_nodes() and spi_get_config() inside
> CONFIG_OF_CONTROL, since they are compiled only for DT systems.
>
> This fixes following warning:
> exynos_spi.c:391:12: warning: 'process_nodes' defined but not used
> [-Wunused-function]
>
> Signed-off-by: Vivek Gautam
Acked-by: Simon Glass
> ---
> drivers/spi/exynos_spi.c |2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c
> index be60ada..2260d59 100644
> --- a/drivers/spi/exynos_spi.c
> +++ b/drivers/spi/exynos_spi.c
> @@ -360,6 +360,7 @@ static inline struct exynos_spi *get_spi_base(int
> dev_index)
> * @param bus SPI bus structure to fill with information
> * @return 0 if ok, or -FDT_ERR_NOTFOUND if something was missing
> */
> +#ifdef CONFIG_OF_CONTROL
> static int spi_get_config(const void *blob, int node, struct spi_bus *bus)
> {
> bus->node = node;
> @@ -415,6 +416,7 @@ static int process_nodes(const void *blob, int
> node_list[], int count)
>
> return 0;
> }
> +#endif
>
> /* Sadly there is no error return from this function */
> void spi_init(void)
> --
> 1.7.6.5
>
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Re: [U-Boot] [PATCH v2 1/2] usb: ehci: exynos: Fix multiple FDT decode
Hi,
On Tue, Feb 12, 2013 at 10:26 PM, Vivek Gautam wrote:
> With current FDT support driver tries to parse device node
> twice in ehci_hcd_init() and ehci_hcd_stop(), which shouldn't
> happen ideally.
> Making provision to store data in a global structure and thereby
> passing its pointer when needed.
>
> Signed-off-by: Vivek Gautam
Nice patch.
> ---
>
> This patch comes up as a fix for earlier problem of multiple FDT
> decode. Actually no 'v1' present for this patch.
>
> drivers/usb/host/ehci-exynos.c | 40
> +++-
> 1 files changed, 11 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
> index 3ca4c5c..68f12fc 100644
> --- a/drivers/usb/host/ehci-exynos.c
> +++ b/drivers/usb/host/ehci-exynos.c
> @@ -42,9 +42,11 @@ DECLARE_GLOBAL_DATA_PTR;
> */
> struct exynos_ehci {
> struct exynos_usb_phy *usb;
> - unsigned int *hcd;
> + unsigned int hcd;
I think this should be a pointer. Perhaps a (struct ehci_hccr *?
> };
>
> +static struct exynos_ehci exynos;
> +
> static int exynos_usb_parse_dt(const void *blob, struct exynos_ehci *exynos)
> {
> unsigned int node;
> @@ -59,8 +61,8 @@ static int exynos_usb_parse_dt(const void *blob, struct
> exynos_ehci *exynos)
> /*
> * Get the base address for EHCI controller from the device node
> */
> - exynos->hcd = (unsigned int *)fdtdec_get_addr(blob, node, "reg");
> - if (exynos->hcd == NULL) {
> + exynos->hcd = fdtdec_get_addr(blob, node, "reg");
> + if (exynos->hcd < 0) {
You need to check for FDT_ADDR_NONE here.
> debug("Can't get the EHCI register address\n");
> return -ENXIO;
> }
> @@ -144,20 +146,13 @@ static void reset_usb_phy(struct exynos_usb_phy *usb)
> */
> int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor
> **hcor)
> {
> - struct exynos_ehci *exynos = NULL;
> -
> - exynos = (struct exynos_ehci *)
> - kzalloc(sizeof(struct exynos_ehci), GFP_KERNEL);
> - if (!exynos) {
> - debug("failed to allocate exynos ehci context\n");
> - return -ENOMEM;
> - }
> + struct exynos_ehci *ctx = &exynos;
>
> - exynos_usb_parse_dt(gd->fdt_blob, exynos);
> + exynos_usb_parse_dt(gd->fdt_blob, ctx);
>
> - setup_usb_phy(exynos->usb);
> + setup_usb_phy(ctx->usb);
>
> - *hccr = (struct ehci_hccr *)(exynos->hcd);
> + *hccr = (struct ehci_hccr *)(ctx->hcd);
> *hcor = (struct ehci_hcor *)((uint32_t) *hccr
> +
> HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
>
> @@ -165,8 +160,6 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr,
> struct ehci_hcor **hcor)
> (uint32_t)*hccr, (uint32_t)*hcor,
> (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
>
> - kfree(exynos);
> -
> return 0;
> }
>
> @@ -176,20 +169,9 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr,
> struct ehci_hcor **hcor)
> */
> int ehci_hcd_stop(int index)
> {
> - struct exynos_ehci *exynos = NULL;
> -
> - exynos = (struct exynos_ehci *)
> - kzalloc(sizeof(struct exynos_ehci), GFP_KERNEL);
> - if (!exynos) {
> - debug("failed to allocate exynos ehci context\n");
> - return -ENOMEM;
> - }
> -
> - exynos_usb_parse_dt(gd->fdt_blob, exynos);
> -
> - reset_usb_phy(exynos->usb);
> + struct exynos_ehci *ctx = &exynos;
>
> - kfree(exynos);
> + reset_usb_phy(ctx->usb);
>
> return 0;
> }
> --
> 1.7.6.5
>
Regards,
Simon
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[U-Boot] [PATCH] ehci-mx6: remove extraneous header mx6x_pins.h
Signed-off-by: Eric Nelson --- drivers/usb/host/ehci-mx6.c |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 1b20e41..c1ae3d9 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include "ehci.h" -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] EXYNOS5: SNOW: Add initial dts and config file
This patch set adds initial dts and configuration file for snow. These patches are moved into a seperate patch set from "EXYNOS5: Add audio support for Snow" Rajeshwari Shinde (2): EXYNOS5: Add initial DTS file for Snow. EXYNOS5: Snow: Add a configuration file board/samsung/dts/exynos5250-snow.dts | 69 + boards.cfg|1 + include/configs/snow.h| 33 3 files changed, 103 insertions(+), 0 deletions(-) create mode 100644 board/samsung/dts/exynos5250-snow.dts create mode 100644 include/configs/snow.h -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] EXYNOS5: Add initial DTS file for Snow.
This patch adds the DTS file for Snow Board.
Signed-off-by: Rajeshwari Shinde
Acked-by: Simon Glass
---
board/samsung/dts/exynos5250-snow.dts | 69 +
1 files changed, 69 insertions(+), 0 deletions(-)
create mode 100644 board/samsung/dts/exynos5250-snow.dts
diff --git a/board/samsung/dts/exynos5250-snow.dts
b/board/samsung/dts/exynos5250-snow.dts
new file mode 100644
index 000..360d3bd
--- /dev/null
+++ b/board/samsung/dts/exynos5250-snow.dts
@@ -0,0 +1,69 @@
+/*
+ * SAMSUNG Snow board device tree source
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ ARCH_CPU_DTS
+
+/ {
+ model = "Google Snow";
+ compatible = "google,snow", "samsung,exynos5250";
+
+ aliases {
+ i2c0 = "/i2c@12c6";
+ i2c1 = "/i2c@12c7";
+ i2c2 = "/i2c@12c8";
+ i2c3 = "/i2c@12c9";
+ i2c4 = "/i2c@12ca";
+ i2c5 = "/i2c@12cb";
+ i2c6 = "/i2c@12cc";
+ i2c7 = "/i2c@12cd";
+ spi0 = "/spi@12d2";
+ spi1 = "/spi@12d3";
+ spi2 = "/spi@12d4";
+ spi3 = "/spi@131a";
+ spi4 = "/spi@131b";
+ };
+
+ sromc@1225 {
+ bank = <1>;
+ srom-timing = <1 9 12 1 6 1 1>;
+ width = <2>;
+ lan@500 {
+ compatible = "smsc,lan9215", "smsc,lan";
+ reg = <0x500 0x100>;
+ phy-mode = "mii";
+ };
+ };
+
+ sound@12d6 {
+ samsung,i2s-epll-clock-frequency = <19200>;
+ samsung,i2s-sampling-rate = <48000>;
+ samsung,i2s-bits-per-sample = <16>;
+ samsung,i2s-channels = <2>;
+ samsung,i2s-lr-clk-framesize = <256>;
+ samsung,i2s-bit-clk-framesize = <32>;
+ samsung,codec-type = "max98095";
+ };
+
+ i2c@12cd {
+ soundcodec@22 {
+ reg = <0x22>;
+ compatible = "maxim,max98095-codec";
+ };
+ };
+
+ i2c@12c6 {
+ pmic@9 {
+ reg = <0x9>;
+ compatible = "maxim,max77686_pmic";
+ };
+ };
+};
--
1.7.4.4
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[U-Boot] [PATCH 2/2] EXYNOS5: Snow: Add a configuration file
This patch adds the configuration file for Snow Board and defines the same in boards.cfg. Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- boards.cfg |1 + include/configs/snow.h | 33 + 2 files changed, 34 insertions(+), 0 deletions(-) create mode 100644 include/configs/snow.h diff --git a/boards.cfg b/boards.cfg index 0507a9c..c13519e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -286,6 +286,7 @@ s5p_goni arm armv7 goni samsung smdkc100 arm armv7 smdkc100 samsungs5pc1xx origen arm armv7 origen samsungexynos s5pc210_universalarm armv7 universal_c210 samsungexynos +snowarm armv7 smdk5250 samsungexynos smdk5250arm armv7 smdk5250 samsungexynos smdkv310arm armv7 smdkv310 samsungexynos tratsarm armv7 trats samsungexynos diff --git a/include/configs/snow.h b/include/configs/snow.h new file mode 100644 index 000..b8460fd --- /dev/null +++ b/include/configs/snow.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2013 Samsung Electronics + * + * Configuration settings for the SAMSUNG EXYNOS5 Snow board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_SNOW_H +#define __CONFIG_SNOW_H + +#include + +#undef CONFIG_DEFAULT_DEVICE_TREE +#define CONFIG_DEFAULT_DEVICE_TREE exynos5250-snow + +#endif /* __CONFIG_SNOW_H */ -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2 V3] EXYNOS5: Add function to setup set ps hold
Hi,
On Tue, Feb 12, 2013 at 10:40 PM, Rajeshwari Shinde
wrote:
> This patch adds a function to set ps_hold data driving value high.
> This enables the machine to stay powered on even after the initial
> power-on condition goes away(e.g. power button).
>
> Acked-by: Simon Glass
Probably should take this out when you rev the version, unless you are
just fixing nits from that person.
> Signed-off-by: Rajeshwari Shinde
> ---
> Changes in V2:
> - Corrected the multi line comment style
> Changes in V3:
> - Renamed ps hold funstion to set_ps_hold_ctrl and made
> exynos5_set_ps_hold_ctrl specific for exynos5.
> arch/arm/cpu/armv7/exynos/power.c| 16
> arch/arm/include/asm/arch-exynos/power.h |9 +
> 2 files changed, 25 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/exynos/power.c
> b/arch/arm/cpu/armv7/exynos/power.c
> index d4bce6d..e09a678 100644
> --- a/arch/arm/cpu/armv7/exynos/power.c
> +++ b/arch/arm/cpu/armv7/exynos/power.c
> @@ -95,3 +95,19 @@ void set_dp_phy_ctrl(unsigned int enable)
> if (cpu_is_exynos5())
> exynos5_dp_phy_control(enable);
> }
> +
> +static void exynos5_set_ps_hold_ctrl(void)
> +{
> + struct exynos5_power *power =
> + (struct exynos5_power *)samsung_get_base_power();
> +
> + /* Set PS-Hold high */
> + setbits_le32(&power->ps_hold_control,
> + EXYNOS_PS_HOLD_CONTROL_DATA_HIGH);
> +}
> +
> +void set_ps_hold_ctrl(void)
Sorry to be a pain, but this has lost the power_ prefix. How about
power_set_ps_hold_ctrl() then?
> +{
> + if (cpu_is_exynos5())
> + exynos5_set_ps_hold_ctrl();
> +}
> diff --git a/arch/arm/include/asm/arch-exynos/power.h
> b/arch/arm/include/asm/arch-exynos/power.h
> index d2fdb59..f2f73fa 100644
> --- a/arch/arm/include/asm/arch-exynos/power.h
> +++ b/arch/arm/include/asm/arch-exynos/power.h
> @@ -864,4 +864,13 @@ void set_dp_phy_ctrl(unsigned int enable);
>
> #define EXYNOS_DP_PHY_ENABLE (1 << 0)
>
> +#define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH (1 << 8)
> +
> +/*
> + * Set ps_hold data driving value high
> + * This enables the machine to stay powered on
> + * after the initial power-on condition goes away
> + * (e.g. power button).
> + */
> +void set_ps_hold_ctrl(void);
> #endif
> --
> 1.7.4.4
>
Regards,
Simon
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Re: [U-Boot] [PATCH 1/2 V3] EXYNOS5: Add function to setup set ps hold
Dear Simon Glass,
On 14/02/13 15:53, Simon Glass wrote:
> Hi,
>
> On Tue, Feb 12, 2013 at 10:40 PM, Rajeshwari Shinde
> wrote:
>> This patch adds a function to set ps_hold data driving value high.
>> This enables the machine to stay powered on even after the initial
>> power-on condition goes away(e.g. power button).
>>
>> Acked-by: Simon Glass
>
> Probably should take this out when you rev the version, unless you are
> just fixing nits from that person.
>
>> Signed-off-by: Rajeshwari Shinde
>> ---
>> Changes in V2:
>> - Corrected the multi line comment style
>> Changes in V3:
>> - Renamed ps hold funstion to set_ps_hold_ctrl and made
>> exynos5_set_ps_hold_ctrl specific for exynos5.
>> arch/arm/cpu/armv7/exynos/power.c| 16
>> arch/arm/include/asm/arch-exynos/power.h |9 +
>> 2 files changed, 25 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/exynos/power.c
>> b/arch/arm/cpu/armv7/exynos/power.c
>> index d4bce6d..e09a678 100644
>> --- a/arch/arm/cpu/armv7/exynos/power.c
>> +++ b/arch/arm/cpu/armv7/exynos/power.c
>> @@ -95,3 +95,19 @@ void set_dp_phy_ctrl(unsigned int enable)
>> if (cpu_is_exynos5())
>> exynos5_dp_phy_control(enable);
>> }
>> +
>> +static void exynos5_set_ps_hold_ctrl(void)
>> +{
>> + struct exynos5_power *power =
>> + (struct exynos5_power *)samsung_get_base_power();
>> +
>> + /* Set PS-Hold high */
>> + setbits_le32(&power->ps_hold_control,
>> + EXYNOS_PS_HOLD_CONTROL_DATA_HIGH);
>> +}
>> +
>> +void set_ps_hold_ctrl(void)
>
> Sorry to be a pain, but this has lost the power_ prefix. How about
> power_set_ps_hold_ctrl() then?
I requested it as the exynos naming rule.
>
>> +{
>> + if (cpu_is_exynos5())
>> + exynos5_set_ps_hold_ctrl();
>> +}
>> diff --git a/arch/arm/include/asm/arch-exynos/power.h
>> b/arch/arm/include/asm/arch-exynos/power.h
>> index d2fdb59..f2f73fa 100644
>> --- a/arch/arm/include/asm/arch-exynos/power.h
>> +++ b/arch/arm/include/asm/arch-exynos/power.h
>> @@ -864,4 +864,13 @@ void set_dp_phy_ctrl(unsigned int enable);
>>
>> #define EXYNOS_DP_PHY_ENABLE (1 << 0)
>>
>> +#define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH (1 << 8)
>> +
>> +/*
>> + * Set ps_hold data driving value high
>> + * This enables the machine to stay powered on
>> + * after the initial power-on condition goes away
>> + * (e.g. power button).
>> + */
>> +void set_ps_hold_ctrl(void);
>> #endif
>> --
>> 1.7.4.4
>>
>
> Regards,
> Simon
>
Thanks.
Minkyu Kang.
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Re: [U-Boot] [PATCH v3 2/3] Tegra: fdt: tamonten: Add common tamonten.dtsi file from linux
On Wed, Feb 13, 2013 at 02:44:49PM -0700, Tom Warren wrote: > Tamonten boards (medcom-wide, plutux, and tec) use a different/new > dtsi file w/common settings. > > Signed-off-by: Tom Warren > Acked-by: Thierry Reding > --- > v3: new > > board/avionic-design/dts/tegra20-tamonten.dtsi | 489 > > 1 files changed, 489 insertions(+), 0 deletions(-) > create mode 100644 board/avionic-design/dts/tegra20-tamonten.dtsi > > diff --git a/board/avionic-design/dts/tegra20-tamonten.dtsi > b/board/avionic-design/dts/tegra20-tamonten.dtsi > new file mode 100644 > index 000..4766aba > --- /dev/null > +++ b/board/avionic-design/dts/tegra20-tamonten.dtsi > @@ -0,0 +1,489 @@ > +/include/ "tegra20.dtsi" It's a bit unfortunate that this can't use ARCH_CPU_DTS anymore because it isn't run through the preprocessor. With the Tegra30 Tamonten coming up I thought it might have been nice to share some parts of it, but given the amount of changes between Tegra20 and Tegra30 Tamonten I don't think that will be much of an option anyway. So this is fine with me. Thierry pgpzdbnBrezB6.pgp Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/3] Tegra: MMC: Add DT support for MMC to T20 boards
On Wed, Feb 13, 2013 at 02:44:47PM -0700, Tom Warren wrote: > This patchset adds device-tree support to the Tegra MMC driver. > All device config is done via properties in the DT files instead > of hard-coded config options/function arguments. > > I've tested this on my Seaboard and everything works fine, > including card detect. For the other T20 boards, I've used > the Linux kernel DTS files for the sdhci nodes where there > wasn't one already, or expanded the info that was already > there. Everything builds fine, but I haven't tested anything > but Seaboard. > > v2: Changes as per Stephen's & Simon's review > v3: Changes as per Stephen/Lucas/Thierry/Simon's feedback > > Tom Warren (3): > Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files > Tegra: fdt: tamonten: Add common tamonten.dtsi file from linux > Tegra: MMC: Add DT support to MMC driver for all T20 boards > > arch/arm/dts/tegra20.dtsi | 16 +- > arch/arm/include/asm/arch-tegra/mmc.h |2 +- > arch/arm/include/asm/arch-tegra/tegra_mmc.h | 13 +- > board/avionic-design/common/tamonten.c| 19 +- > board/avionic-design/dts/tegra20-medcom-wide.dts |3 +- > board/avionic-design/dts/tegra20-plutux.dts |3 +- > board/avionic-design/dts/tegra20-tamonten.dtsi| 489 > + > board/avionic-design/dts/tegra20-tec.dts |3 +- > board/compal/dts/tegra20-paz00.dts| 19 +- > board/compal/paz00/paz00.c| 26 +- > board/compulab/dts/tegra20-trimslice.dts | 14 + > board/compulab/trimslice/trimslice.c | 25 +- > board/nvidia/common/board.c | 26 +- > board/nvidia/dts/tegra20-harmony.dts | 18 + > board/nvidia/dts/tegra20-seaboard.dts | 10 +- > board/nvidia/dts/tegra20-ventana.dts | 15 + > board/nvidia/dts/tegra20-whistler.dts | 13 + > board/nvidia/harmony/harmony.c| 26 +- > board/nvidia/seaboard/seaboard.c | 25 +- > board/nvidia/whistler/whistler.c | 30 +- > board/toradex/colibri_t20_iris/colibri_t20_iris.c | 11 +- > board/toradex/dts/tegra20-colibri_t20_iris.dts|7 + > drivers/mmc/tegra_mmc.c | 259 +++ > dts/Makefile |2 +- > include/fdtdec.h |1 + > lib/fdtdec.c |1 + > 26 files changed, 815 insertions(+), 261 deletions(-) > create mode 100644 board/avionic-design/dts/tegra20-tamonten.dtsi The series, Tested-by: Thierry Reding on TEC and Medcom-Wide. I don't currently have access to a Plutux, but it should be fine too. Thierry pgpBKLfSL7YWS.pgp Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2 V3] EXYNOS5: Add function to setup set ps hold
Hi Minkyu,
On Wed, Feb 13, 2013 at 11:11 PM, Minkyu Kang wrote:
> Dear Simon Glass,
>
> On 14/02/13 15:53, Simon Glass wrote:
>> Hi,
>>
>> On Tue, Feb 12, 2013 at 10:40 PM, Rajeshwari Shinde
>> wrote:
>>> This patch adds a function to set ps_hold data driving value high.
>>> This enables the machine to stay powered on even after the initial
>>> power-on condition goes away(e.g. power button).
>>>
>>> Acked-by: Simon Glass
>>
>> Probably should take this out when you rev the version, unless you are
>> just fixing nits from that person.
>>
>>> Signed-off-by: Rajeshwari Shinde
>>> ---
>>> Changes in V2:
>>> - Corrected the multi line comment style
>>> Changes in V3:
>>> - Renamed ps hold funstion to set_ps_hold_ctrl and made
>>> exynos5_set_ps_hold_ctrl specific for exynos5.
>>> arch/arm/cpu/armv7/exynos/power.c| 16
>>> arch/arm/include/asm/arch-exynos/power.h |9 +
>>> 2 files changed, 25 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/exynos/power.c
>>> b/arch/arm/cpu/armv7/exynos/power.c
>>> index d4bce6d..e09a678 100644
>>> --- a/arch/arm/cpu/armv7/exynos/power.c
>>> +++ b/arch/arm/cpu/armv7/exynos/power.c
>>> @@ -95,3 +95,19 @@ void set_dp_phy_ctrl(unsigned int enable)
>>> if (cpu_is_exynos5())
>>> exynos5_dp_phy_control(enable);
>>> }
>>> +
>>> +static void exynos5_set_ps_hold_ctrl(void)
>>> +{
>>> + struct exynos5_power *power =
>>> + (struct exynos5_power *)samsung_get_base_power();
>>> +
>>> + /* Set PS-Hold high */
>>> + setbits_le32(&power->ps_hold_control,
>>> + EXYNOS_PS_HOLD_CONTROL_DATA_HIGH);
>>> +}
>>> +
>>> +void set_ps_hold_ctrl(void)
>>
>> Sorry to be a pain, but this has lost the power_ prefix. How about
>> power_set_ps_hold_ctrl() then?
>
> I requested it as the exynos naming rule.
Do you mean the exynos_ prefix? OK then. I suppose
exynos_power_set_ps_hold_ctrl() is just getting a bit silly.
Regards,
Simon
>
>>
>>> +{
>>> + if (cpu_is_exynos5())
>>> + exynos5_set_ps_hold_ctrl();
>>> +}
>>> diff --git a/arch/arm/include/asm/arch-exynos/power.h
>>> b/arch/arm/include/asm/arch-exynos/power.h
>>> index d2fdb59..f2f73fa 100644
>>> --- a/arch/arm/include/asm/arch-exynos/power.h
>>> +++ b/arch/arm/include/asm/arch-exynos/power.h
>>> @@ -864,4 +864,13 @@ void set_dp_phy_ctrl(unsigned int enable);
>>>
>>> #define EXYNOS_DP_PHY_ENABLE (1 << 0)
>>>
>>> +#define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH (1 << 8)
>>> +
>>> +/*
>>> + * Set ps_hold data driving value high
>>> + * This enables the machine to stay powered on
>>> + * after the initial power-on condition goes away
>>> + * (e.g. power button).
>>> + */
>>> +void set_ps_hold_ctrl(void);
>>> #endif
>>> --
>>> 1.7.4.4
>>>
>>
>> Regards,
>> Simon
>>
>
> Thanks.
> Minkyu Kang.
>
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Re: [U-Boot] [PATCH 1/2 V3] EXYNOS5: Add function to setup set ps hold
Dear Simon Glass,
On 14/02/13 16:24, Simon Glass wrote:
> Hi Minkyu,
>
> On Wed, Feb 13, 2013 at 11:11 PM, Minkyu Kang wrote:
>> Dear Simon Glass,
>>
>> On 14/02/13 15:53, Simon Glass wrote:
>>> Hi,
>>>
>>> On Tue, Feb 12, 2013 at 10:40 PM, Rajeshwari Shinde
>>> wrote:
This patch adds a function to set ps_hold data driving value high.
This enables the machine to stay powered on even after the initial
power-on condition goes away(e.g. power button).
Acked-by: Simon Glass
>>>
>>> Probably should take this out when you rev the version, unless you are
>>> just fixing nits from that person.
>>>
Signed-off-by: Rajeshwari Shinde
---
Changes in V2:
- Corrected the multi line comment style
Changes in V3:
- Renamed ps hold funstion to set_ps_hold_ctrl and made
exynos5_set_ps_hold_ctrl specific for exynos5.
arch/arm/cpu/armv7/exynos/power.c| 16
arch/arm/include/asm/arch-exynos/power.h |9 +
2 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/power.c
b/arch/arm/cpu/armv7/exynos/power.c
index d4bce6d..e09a678 100644
--- a/arch/arm/cpu/armv7/exynos/power.c
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -95,3 +95,19 @@ void set_dp_phy_ctrl(unsigned int enable)
if (cpu_is_exynos5())
exynos5_dp_phy_control(enable);
}
+
+static void exynos5_set_ps_hold_ctrl(void)
+{
+ struct exynos5_power *power =
+ (struct exynos5_power *)samsung_get_base_power();
+
+ /* Set PS-Hold high */
+ setbits_le32(&power->ps_hold_control,
+ EXYNOS_PS_HOLD_CONTROL_DATA_HIGH);
+}
+
+void set_ps_hold_ctrl(void)
>>>
>>> Sorry to be a pain, but this has lost the power_ prefix. How about
>>> power_set_ps_hold_ctrl() then?
>>
>> I requested it as the exynos naming rule.
>
> Do you mean the exynos_ prefix? OK then. I suppose
> exynos_power_set_ps_hold_ctrl() is just getting a bit silly.
>
No.
exynos's functions are named to set_* and get_*.
There are no prefix.
Because of it's a exynos specific function, and it is placed in power.c.
Thanks.
Minkyu Kang.
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[U-Boot] [PATCH 2/4] Tegra: Medcom-Wide: Enable NAND and boot script support
Boot script support brings Medcom-Wide in line with other Tegra boards. In order to enable booting a Linux kernel with initial ramdisk, also add support for the new FIT image type. Signed-off-by: Thierry Reding --- include/configs/medcom-wide.h | 34 -- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index bae4ba0..ea8e83f 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -44,14 +44,29 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT -#define CONFIG_ENV_IS_NOWHERE - /* SD/MMC */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC + +/* NAND support */ +#define CONFIG_CMD_NAND +#define CONFIG_TEGRA_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +/* Environment in NAND, aligned to start of last sector */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */ + /* USB host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA @@ -66,18 +81,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT - -#define CONFIG_FIT - -#define CONFIG_BOOTCOMMAND \ - "mmc rescan;" \ - "ext2load mmc 0 0x1700 /boot/uImage;" \ - "bootm" - /* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA @@ -85,6 +88,9 @@ #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK +/* support the new (FDT-based) image format */ +#define CONFIG_FIT + #include "tegra-common-post.h" #endif /* __CONFIG_H */ -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/4] Tegra: TEC: Enable boot script support
Boot script support brings TEC in line with other Tegra boards. To enable booting a Linux kernel with initial ramdisk, also include support for the new FIT image type. Signed-off-by: Thierry Reding --- include/configs/tec.h | 23 +++ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/include/configs/tec.h b/include/configs/tec.h index caeb9cd..64f6c65 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -50,6 +50,14 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC + /* NAND support */ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND @@ -73,18 +81,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT - -#define CONFIG_FIT - -#define CONFIG_BOOTCOMMAND \ - "mmc rescan;" \ - "ext2load mmc 0 0x1700 /boot/uImage;" \ - "bootm" - /* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA @@ -92,6 +88,9 @@ #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK +/* support the new (FDT-based) image format */ +#define CONFIG_FIT + #include "tegra-common-post.h" #endif /* __CONFIG_H */ -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/4] Tegra: Plutux: Enable NAND and boot script support
Boot script support brings Plutux in line with other Tegra boards. In order to enable booting a Linux kernel with initial ramdisk, also add support for the new FIT image type. Signed-off-by: Thierry Reding --- include/configs/plutux.h | 31 +++ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/include/configs/plutux.h b/include/configs/plutux.h index deee237..3332ea8 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -42,8 +42,7 @@ #define CONFIG_SYS_NS16550_COM1NV_PA_APB_UARTD_BASE #define CONFIG_BOARD_EARLY_INIT_F - -#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_BOARD_LATE_INIT /* SD/MMC */ #define CONFIG_MMC @@ -51,6 +50,23 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_FS_EXT4 +#define CONFIG_FS_FAT +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC + +/* NAND support */ +#define CONFIG_CMD_NAND +#define CONFIG_TEGRA_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +/* Environment in NAND, aligned to start of last sector */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sectors */ + /* USB host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA @@ -65,18 +81,9 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#define CONFIG_DOS_PARTITION -#define CONFIG_EFI_PARTITION -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT - +/* support the new (FDT-based) image format */ #define CONFIG_FIT -#define CONFIG_BOOTCOMMAND \ - "mmc rescan;" \ - "ext2load mmc 0 0x1700 /boot/uImage;" \ - "bootm" - #include "tegra-common-post.h" #endif /* __CONFIG_H */ -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] Tegra: All Tamonten-derived boards use onboard NAND
Move the nand-controller node to the tegra20-tamonten.dtsi so that it
can be shared between all derived boards.
Signed-off-by: Thierry Reding
---
This depends on Tom's "Tegra: MMC: Add DT support for MMC to T20 boards"
patches.
board/avionic-design/dts/tegra20-tamonten.dtsi | 11 +++
board/avionic-design/dts/tegra20-tec.dts | 11 ---
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/board/avionic-design/dts/tegra20-tamonten.dtsi
b/board/avionic-design/dts/tegra20-tamonten.dtsi
index 4766aba..0a95ac1 100644
--- a/board/avionic-design/dts/tegra20-tamonten.dtsi
+++ b/board/avionic-design/dts/tegra20-tamonten.dtsi
@@ -279,6 +279,17 @@
status = "okay";
};
+ nand-controller@70008000 {
+ nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
+ nvidia,width = <8>;
+ nvidia,timing = <26 100 20 80 20 10 12 10 70>;
+
+ nand@0 {
+ reg = <0>;
+ compatible = "hynix,hy27uf4g2b", "nand-flash";
+ };
+ };
+
i2c@7000c000 {
clock-frequency = <40>;
status = "okay";
diff --git a/board/avionic-design/dts/tegra20-tec.dts
b/board/avionic-design/dts/tegra20-tec.dts
index 376d279..694682c 100644
--- a/board/avionic-design/dts/tegra20-tec.dts
+++ b/board/avionic-design/dts/tegra20-tec.dts
@@ -32,17 +32,6 @@
clock-frequency = <21600>;
};
- nand-controller@70008000 {
- nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
- nvidia,width = <8>;
- nvidia,timing = <26 100 20 80 20 10 12 10 70>;
-
- nand@0 {
- reg = <0>;
- compatible = "hynix,hy27uf4g2b", "nand-flash";
- };
- };
-
i2c@7000c000 {
status = "disabled";
};
--
1.8.1.2
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