Re: [U-Boot] [PATCH 7/9 V2] EXYNOS5: CLOCK: Modify MPLL clock out for Exynos5250 Rev 1.0
Dear Rajeshwari Shinde,
On 20 June 2012 20:11, Rajeshwari Shinde wrote:
> MPLL clock-out of Exynos5250 Rev 1.0 is always at 1.6GHz.
> Adjust the divisor value to get 800MHz as needed by devices
> like UART etc
>
> Signed-off-by: Hatim Ali
> Signed-off-by: Rajeshwari Shinde
> ---
> Chnages in V2:
> - None
> arch/arm/cpu/armv7/exynos/clock.c | 12 +++-
> arch/arm/include/asm/arch-exynos/clock.h | 3 +++
> 2 files changed, 14 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/exynos/clock.c
> b/arch/arm/cpu/armv7/exynos/clock.c
> index 330bd75..dbd5f11 100644
> --- a/arch/arm/cpu/armv7/exynos/clock.c
> +++ b/arch/arm/cpu/armv7/exynos/clock.c
> @@ -98,7 +98,7 @@ static unsigned long exynos5_get_pll_clk(int pllreg)
> struct exynos5_clock *clk =
> (struct exynos5_clock *)samsung_get_base_clock();
> unsigned long r, m, p, s, k = 0, mask, fout;
> - unsigned int freq;
> + unsigned int freq, pll_div2_sel, mpll_fout_sel;
>
> switch (pllreg) {
> case APLL:
> @@ -155,6 +155,16 @@ static unsigned long exynos5_get_pll_clk(int pllreg)
> fout = m * (freq / (p * (1 << (s - 1;
> }
>
> + /* According to the user manual, in EVT1 MPLL always gives
> + * 1.6GHz clock, so divide by 2 to get 800MHz MPLL clock.*/
Please fix multiline comment style.
> + if (pllreg == MPLL) {
> + pll_div2_sel = readl(&clk->pll_div2_sel);
> + mpll_fout_sel = (pll_div2_sel >> MPLL_FOUT_SEL_SHIFT)
> + & MPLL_FOUT_SEL_MASK;
> + if (mpll_fout_sel == 0)
> + fout /= 2;
> + }
> +
> return fout;
> }
>
Thanks.
Minkyu Kang.
--
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Re: [U-Boot] [PATCH 9/9 V2] SMDK5250: Enable UART and MMC for Exynos5250 Rev 1.0
On 20 June 2012 20:11, Rajeshwari Shinde wrote:
> This patch sets UART3 and MMC channle 0 for Exynos5250 Rev 1.0
Please fix typo channle -> channel.
>
> Signed-off-by: Rajeshwari Shinde
> ---
> Chnages in V2:
> - None
> board/samsung/smdk5250/smdk5250.c | 6 +++---
> include/configs/smdk5250.h | 2 +-
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/board/samsung/smdk5250/smdk5250.c
> b/board/samsung/smdk5250/smdk5250.c
> index 3b078da..b593325 100644
> --- a/board/samsung/smdk5250/smdk5250.c
> +++ b/board/samsung/smdk5250/smdk5250.c
> @@ -130,13 +130,13 @@ int board_mmc_init(bd_t *bis)
> {
> int err;
>
> - err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
> + err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
> if (err) {
> - debug("SDMMC2 not configured\n");
> + debug("SDMMC0 not configured\n");
> return err;
> }
>
> - err = s5p_mmc_init(2, 4);
> + err = s5p_mmc_init(0, 8);
> return err;
> }
> #endif
Thanks.
Minkyu Kang.
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Re: [U-Boot] [RFC][PATCH] net: nfs: extend NFS_TIMEOUT
Hello, (2012/06/26 9:50), Tetsuyuki Kobayashi wrote: > (06/26/2012 06:34 AM), Wolfgang Denk wrote: > >> In message<4fe85b13.5080...@kmckk.co.jp> you wrote: >>> I tried nfs command on KZM-A9-GT board and it fails every time with "ERROR: >>> Cannot umount". >> >> KZM-A9-GT board? This is an out of tree port, isn't it? > Not yet, but trying now. > >> >> Are you sure the problems are not in the board specific code? > OK. I will try the same thing on an in-tree board (maybe, panda board) to > check if this is board specific or not. I did on a panda board. It has the same problem and this patch solves it. So this is not board specific problem. Please consider to change global setting of NFS_TIMEOUT in nfs.c. I hope someone else tries nfs command on the other board. Following is the detail I did: The default config of pand board disables NFS command. So add this line in omap4_panda.h #define COFNIG_CMD_NFS (This line must be after #include configs/omap4_common.h> I had trouble to use network on a panda board at the source from u-boot master git. Instead, I used source code from Linaro git. (I think this is another issue. Just focus NFS timeout now.) Before applying the patch: error occurs like this. Panda # usb start (Re)start USB... USB: Register 1313 NbrPorts 3 USB EHCI 1.00 scanning bus for devices... 3 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found scanning bus for ethernet devices... 1 Ethernet Device(s) found Panda # setenv ipaddr 192.168.1.162 Panda # setenv serverip 192.168.1.110 Panda # nfs /export/tmp/uImage Waiting for Ethernet connection... done. Using sms0 device File transfer via NFS from server 192.168.1.110; our IP address is 192.168.1.162 Filename '/export/tmp/uImage'. Load address: 0x8200 Loading: # # # # # # ##T T *** ERROR: Cannot umount Panda # After applying the patch: it seems OK. Panda # usb start (Re)start USB... USB: Register 1313 NbrPorts 3 USB EHCI 1.00 scanning bus for devices... 3 USB Device(s) found scanning bus for storage devices... 0 Storage Device(s) found scanning bus for ethernet devices... 1 Ethernet Device(s) found Panda # setenv ipaddr 192.168.1.162 Panda # setenv serverip 192.168.1.110 Panda # nfs /export/tmp/uImage Waiting for Ethernet connection... done. Using sms0 device File transfer via NFS from server 192.168.1.110; our IP address is 192.168.1.162 Filename '/export/tmp/uImage'. Load address: 0x8200 Loading: # # # # # # ## done Bytes transferred = 2230644 (220974 hex) Panda # -- Tetsuyuki Kobayashi ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] microblaze: Enable ubi support
2012/6/25 Stephan Linz : > Am Montag, den 25.06.2012, 09:22 +0200 schrieb Wolfgang Denk: >> Dear Michal Simek, >> >> In message <4fe7f154.80...@monstr.eu> you wrote: >> > On 06/21/2012 09:42 PM, Stephan Linz wrote: >> > > To save memory the UBIFS is disabled by default. >> > > >> > > The original patch was introdused with commit: >> > > 0114da7b06bd47b7f5c3f20a152dd11903b38fba >> > >> > This say nothing to me. >> > Format is Patch name and when sha1. >> > >> > Where is this patch? I can't see it in mainline repository? >> >> Correct. This commit does not exist in mainline. > > Yes, the commit was newer merged into mainline and lives for more than > one year in Microblaze custodian repo: > > http://git.denx.de/?p=u-boot/u-boot-microblaze.git;a=commitdiff;h=0114da7b06bd47b7f5c3f20a152dd11903b38fba I have there two branches - master and uboot. uboot follows mainline branch and master contain one your patch which was merged to mainline. That link is correct but it points to nonexisting branch. That patch was definitely there but that branch was delete quite some time ago. Wolfgang: How to run git-gc on this repository? I am ok to add this to mainline. Please add that two patches together and resubmit. Also I would prefer to define SYS_MALLOC_LEN based on SIZE. It means for example #defineCONFIG_SYS_MALLOC_LEN (SIZE *2) or similar. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC][PATCH] net: nfs: extend NFS_TIMEOUT
Dear Tetsuyuki Kobayashi, In message <4fe9711a.2090...@kmckk.co.jp> you wrote: > > >> Are you sure the problems are not in the board specific code? > > OK. I will try the same thing on an in-tree board (maybe, panda board) to > > check if this is board specific or not. > > I did on a panda board. It has the same problem and this patch solves it. So > this is not board specific problem. Please consider to change global setting > of NFS_TIMEOUT in nfs.c. net/nfs.c is not the right place to make board specific adjustments. I am still not convinced this is an issue with the global code. It could be your NFS server as well. If there are really boards which need longer timeouts, these should be set in the board config files. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Administration: An ingenious abstraction in politics, designed to receive the kicks and cuffs due to the premier or president. - Ambrose Bierce ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] microblaze: avoid compile error on systems without cfi flash
2012/6/25 Stephan Linz : > Am Montag, den 25.06.2012, 06:55 +0200 schrieb Michal Simek: >> On 06/21/2012 09:42 PM, Stephan Linz wrote: >> > Use XILINX_FLASH_START to set/unset FLASH and RAMENV. >> > >> > Error was: >> > board.c: In function 'board_init': >> > board.c:134: error: 'XILINX_FLASH_START' undeclared (first use in this >> > function) >> > board.c:134: error: (Each undeclared identifier is reported only once >> > board.c:134: error: for each function it appears in.) >> > >> > Signed-off-by: Stephan Linz >> > --- >> > include/configs/microblaze-generic.h | 14 +- >> > 1 files changed, 9 insertions(+), 5 deletions(-) >> > >> > diff --git a/include/configs/microblaze-generic.h >> > b/include/configs/microblaze-generic.h >> > index 295d123..2ef7d62 100644 >> > --- a/include/configs/microblaze-generic.h >> > +++ b/include/configs/microblaze-generic.h >> > @@ -31,6 +31,15 @@ >> > #define CONFIG_MICROBLAZE 1 >> > #define MICROBLAZE_V5 1 >> > >> > +/* linear flash memory */ >> > +#ifdef XILINX_FLASH_START >> > +#define FLASH >> > +#undef RAMENV /* hold environment in flash */ >> > +#else >> > +#undef FLASH >> > +#define RAMENV /* hold environment in RAM */ >> > +#endif >> > + >> > /* uart */ >> > #ifdef XILINX_UARTLITE_BASEADDR >> > # define CONFIG_XILINX_UARTLITE >> > @@ -164,9 +173,6 @@ >> > /* stack */ >> > #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE >> > >> > -/*#define RAMENV */ >> > -#define FLASH >> > - >> > #ifdef FLASH >> > # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START >> > # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE >> > @@ -200,8 +206,6 @@ >> > # define CONFIG_ENV_IS_NOWHERE 1 >> > # define CONFIG_ENV_SIZE 0x1000 >> > # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) >> > -/* hardware flash protection */ >> > -# define CONFIG_SYS_FLASH_PROTECTION >> >> What's wrong with hardware flash protection? > > Nothing, but it will defined twice. One time in line 182 and one time in > that line 204. I think the last one is wrong, because that define is > outside the Flash configuration context, or not? > > Sorry, I should split the patch. Should I do this? Two ways. 1. write it to description 2. create separate patch Option 2 is IMHO better. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/3] AM335x : Add USB support for AM335x in u-boot
> -Original Message- > From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom > Sent: Friday, June 22, 2012 9:34 PM > To: Sohanpal, Harman > Cc: u-boot@lists.denx.de; s...@denx.de; Gene Zarkhin > Subject: Re: [U-Boot] [PATCH v2 1/3] AM335x : Add USB support for AM335x > in u-boot > > On Fri, Jun 22, 2012 at 01:36:33PM +0530, Harman Sohanpal wrote: > > > From: Gene Zarkhin > > > > This patch adds USB support in uboot for AM335x. > > By default the USB 1 module is enabled. > > The support for USB 0 can be enabled by changing the > > USB base address and the phy control register address > > in the header file am335x.h. > > > > Signed-off-by: Gene Zarkhin > > Signed-off-by: Harman Sohanpal > > iirc this is because USB 1 has a full size connector and USB 0 has a > mini connector so 1 is used as "host" and 0 as "gadget". We need to > make this clear in the commit message and think about how to easily > build for one port or the other. Thanks! > Tom, Yes, you have mentioned the correct reason for this. I will clearly mention this thing in the commit message of the new set of patches I will be sending. Thanks, Harman ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/3] AM335x : Configs to add USB host support.
> -Original Message- > From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom > Sent: Friday, June 22, 2012 9:25 PM > To: Sohanpal, Harman > Cc: u-boot@lists.denx.de; s...@denx.de > Subject: Re: [U-Boot] [PATCH v2 2/3] AM335x : Configs to add USB host > support. > > On Fri, Jun 22, 2012 at 01:36:34PM +0530, Harman Sohanpal wrote: > > > This patch adds required configs in config file for > > am335x_evm to add support for usb host mode. > > To enable USB device mode, add CONFIG_MUSB_UDC in > > place of CONFIG_MUSB_HCD > > But you haven't tested / added support for device mode yet, so please > remove those references. > > [snip] > > +/* > > + * USB configuration > > + * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard > > + * Enable CONFIG_MUSB_UDC for Device functionalities. > > + */ > > +#define CONFIG_USB_AM335X > > +#define CONFIG_MUSB_HCD > > + > > +#ifdef CONFIG_USB_AM335X > > We don't need an extra test of CONFIG_USB_AM335X around this, just > CONFIG_MUSB_HCD and later MUSB_UCD. > > [snip] > > +#ifdef CONFIG_USB_KEYBOARD > > +#define CONFIG_SYS_USB_EVENT_POLL > > +#define CONFIG_PREBOOT "usb start" > > +#endif /* CONFIG_USB_KEYBOARD */ > > You didn't add nor test keyboard so please remove these bits until > U-Boot support is at the point where you could use one of these boards > over a display rather than USB console :) Thanks. > Tom, Thanks for the review. I have tested the device mode using usbtty on beaglebone. Although I have not tested keyboard so will remove those configs and would add it when tested. Also would remove the extra test of CONFIG_USB_AM335X in next set of patches. Thanks, Harman ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/3] AM335x: Add USB support in u-boot.
These patches add USB support in u-boot for AM335x. I have tested this code on AM335x evm and beaglebone in the host mode using mass storage class. For device mode, I have tested this on beaglebone using usbtty. CONFIG_MUSB_HCD has been enabled by default to make USB work in host mode. Gene Zarkhin (1): AM335x : Add USB support for AM335x in u-boot Harman Sohanpal (2): AM335x : Configs to add USB host support. musb_udc : Fix compile warning. drivers/usb/musb/Makefile|1 + drivers/usb/musb/am335x.c| 121 ++ drivers/usb/musb/am335x.h| 113 +++ drivers/usb/musb/musb_core.h |2 + drivers/usb/musb/musb_hcd.h |3 - include/configs/am335x_evm.h | 41 ++ include/usb.h|3 +- 7 files changed, 280 insertions(+), 4 deletions(-) create mode 100644 drivers/usb/musb/am335x.c create mode 100644 drivers/usb/musb/am335x.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/3] AM335x : Configs to add USB host support.
Adds required configs in config file for am335x_evm to add support for usb host mode. To enable USB device mode, add CONFIG_MUSB_UDC in place of CONFIG_MUSB_HCD. Tested using usbtty for device mode and mass storage for host mode. Signed-off-by: Harman Sohanpal --- Changes for v2: - #define cleanups. Changes for v3: - remove configs for usb as keyboard in host mode. - removed extra test of CONFIG_USB_AM335X. - changed commit messgae. include/configs/am335x_evm.h | 32 1 files changed, 32 insertions(+), 0 deletions(-) diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index d0fbc88..a1e16cc 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -165,6 +165,38 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #endif + +/* + * USB configuration + * Enable CONFIG_MUSB_HCD for Host functionalities MSC + * Enable CONFIG_MUSB_UDC for Device functionalities. + */ +#define CONFIG_USB_AM335X +#define CONFIG_MUSB_HCD + +#ifdef CONFIG_MUSB_HCD +#define CONFIG_CMD_USB + +#define CONFIG_USB_STORAGE +#define CONGIG_CMD_STORAGE +#define CONFIG_CMD_FAT + +#endif /* CONFIG_MUSB_HCD */ + +#ifdef CONFIG_MUSB_UDC +/* USB device configuration */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_USB_DEVICE +#define CONFIG_USB_TTY +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#endif /* CONFIG_SPL_BUILD */ +/* Change these to suit your needs */ +#define CONFIG_USBD_VENDORID0x0451 +#define CONFIG_USBD_PRODUCTID 0x5678 +#define CONFIG_USBD_MANUFACTURER"Texas Instruments" +#define CONFIG_USBD_PRODUCT_NAME"AM335xEVM" +#endif /* CONFIG_MUSB_UDC */ + /* Unsupported features */ #undef CONFIG_USE_IRQ -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 3/3] musb_udc : Fix compile warning.
Fix the compile warning : implicit declaration of musb_platform_init when CONFIG_MUSB_UDC is defined. The extern musb_platform_init was declared in musb_hcd.h but no such extern function was declared for musb_udc. So a common function has been declared in musb_core.h which can be used for both host mode and device mode. Signed-off-by: Harman Sohanpal --- Changes for v2: - none. Changes for v3: - none. drivers/usb/musb/musb_core.h |2 ++ drivers/usb/musb/musb_hcd.h |3 --- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h index a8adcce..14253f0 100644 --- a/drivers/usb/musb/musb_core.h +++ b/drivers/usb/musb/musb_core.h @@ -360,6 +360,8 @@ extern void musb_start(void); extern void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt); extern void write_fifo(u8 ep, u32 length, void *fifo_data); extern void read_fifo(u8 ep, u32 length, void *fifo_data); +extern int musb_platform_init(void); +extern void musb_platform_deinit(void); #if defined(CONFIG_USB_BLACKFIN) /* Every USB register is accessed as a 16-bit even if the value itself diff --git a/drivers/usb/musb/musb_hcd.h b/drivers/usb/musb/musb_hcd.h index dde7d37..5621f7e 100644 --- a/drivers/usb/musb/musb_hcd.h +++ b/drivers/usb/musb/musb_hcd.h @@ -105,8 +105,5 @@ extern unsigned char new[]; #define RH_REQ_ERR-1 #define RH_NACK 0x00 -/* extern functions */ -extern int musb_platform_init(void); -extern void musb_platform_deinit(void); #endif /* __MUSB_HCD_H__ */ -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/3] AM335x : Add USB support for AM335x in u-boot
From: Gene Zarkhin
Adds USB support in uboot for AM335x.
By default the USB 1 module is enabled.
The support for USB 0 can be enabled by changing the
USB base address and the phy control register address
in the header file am335x.h.
USB 1 has a full size connector so acts in host mode and
USB 0 has a mini connector so used in device mode.
By default, the support is added for host mode hence USB 1
has been enabled by default.
Signed-off-by: Gene Zarkhin
Signed-off-by: Harman Sohanpal
---
Changes for v2:
- none
Changes for v3:
- Changed commit message to specify why USB 1
has been enabled by default.
drivers/usb/musb/Makefile |1 +
drivers/usb/musb/am335x.c | 121 +
drivers/usb/musb/am335x.h | 113 ++
include/usb.h |3 +-
4 files changed, 237 insertions(+), 1 deletions(-)
create mode 100644 drivers/usb/musb/am335x.c
create mode 100644 drivers/usb/musb/am335x.h
diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile
index 20b5503..d00ec40 100644
--- a/drivers/usb/musb/Makefile
+++ b/drivers/usb/musb/Makefile
@@ -32,6 +32,7 @@ COBJS-$(CONFIG_USB_DAVINCI) += davinci.o
COBJS-$(CONFIG_USB_OMAP3) += omap3.o
COBJS-$(CONFIG_USB_DA8XX) += da8xx.o
COBJS-$(CONFIG_USB_AM35X) += am35x.o
+COBJS-$(CONFIG_USB_AM335X) += am335x.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/usb/musb/am335x.c b/drivers/usb/musb/am335x.c
new file mode 100644
index 000..4b59769
--- /dev/null
+++ b/drivers/usb/musb/am335x.c
@@ -0,0 +1,121 @@
+/*
+ * am335x.c - TI's AM335x platform specific usb wrapper functions.
+ *
+ * Author: gene Zarkhin
+ * Modified by: Harman Sohanpal
+ *
+ * Based on drivers/usb/musb/da8xx.c
+ *
+ * Copyright (c) 2012 Texas Instruments Incorporated
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include
+#include "am335x.h"
+
+/* MUSB platform configuration */
+struct musb_config musb_cfg = {
+ .regs = (struct musb_regs *)(AM335X_USB_OTG_CORE_BASE),
+ .timeout= AM335X_USB_OTG_TIMEOUT,
+ .musb_speed = 0,
+};
+
+/*
+ * Enable the USB phy
+ */
+static u8 phy_on(void)
+{
+ u32 timeout;
+ u32 regAddr = CM_REGISTERS + USB_CTRL0_REG_OFFSET;
+ u32 usb_ctrl_reg;
+
+ usb_ctrl_reg = readl(regAddr);
+ usb_ctrl_reg &= ~(CM_PHY_PWRDN | CM_PHY_OTG_PWRDN);
+ usb_ctrl_reg |= (OTGVDET_EN | OTGSESSENDEN);
+ writel(usb_ctrl_reg, regAddr);
+
+ timeout = musb_cfg.timeout;
+ writel(0x1, &am335x_usb_regs->ctrl);
+ udelay(6000);
+ while (timeout--) {
+ if ((readl(&am335x_usb_regs->ctrl) & SOFT_RESET_BIT) == 0)
+ return 1;
+ }
+ /* USB phy was not turned on */
+ return 0;
+}
+
+/*
+ * Disable the USB phy
+ */
+static void phy_off(void)
+{
+ u32 regAddr = CM_REGISTERS + USB_CTRL0_REG_OFFSET;
+ u32 usb_ctrl_reg;
+
+ usb_ctrl_reg = readl(regAddr);
+ usb_ctrl_reg |= (CM_PHY_PWRDN | CM_PHY_OTG_PWRDN);
+ writel(usb_ctrl_reg, regAddr);
+
+ /* Disable the USB module */
+ writel(PRCM_MODULE_DSBL, CM_PER_USB0_CLKCTRL);
+}
+
+/*
+ * This function performs platform specific initialization for usb0.
+ */
+int musb_platform_init(void)
+{
+ u32 timeout;
+ u32 revision;
+
+ /* USB */
+ /* PLL Gate set up */
+ writel(DPLL_CLKDCOLDO_GATE_CTRL, CM_CLKDCOLDO_DPLL_PER);
+
+ /* CLOCK */
+ writel(PRCM_MOD_EN, CM_PER_USB0_CLKCTRL);
+ timeout = musb_cfg.timeout;
+ while (timeout--) {
+ if (readl(CM_PER_USB0_CLKCTRL) != PRCM_MOD_EN)
+ continue;
+ else
+ break;
+ }
+ if (timeout == 0) {
+ printf("\nUSB module not enabled\nAborting");
+ return -1;
+ }
+
+ /* USB module fully functional */
+ /* start the on-chip usb phy and its pll */
+ if (phy_on() == 0)
+ return -1;
+ /* Returns zero if e.g. not clocked */
+ revision = readl(&am335x_usb_regs->revision);
+ if (revision == 0)
+ return -1;
+
+ return 0;
+}
+
+/*
+ * This function performs platform specific deinitialization for usb0.
+ */
+void musb_platform_d
[U-Boot] [PATCH 1/1] USB: EHCI: Initialize multiple USB controllers at once
Add support for command line "usb reset" or "usb start" to initialize
, "usb stop" to stop multiple USB controllers at once.
Other commands like "usb tree" also support multiple controllers.
New added definitions to be defined in header file are:
CONFIG_USB_INIT_MULTI
CONFIG_USB_MAX_CONTROLLER_COUNT
Signed-off-by: Jim Lin
---
common/cmd_usb.c | 10 +++
common/usb.c | 100 +++-
common/usb_hub.c |4 +
drivers/usb/host/ehci-hcd.c | 150 +---
drivers/usb/host/ehci-tegra.c |2 +-
drivers/usb/host/ehci.h |5 ++
include/usb.h | 10 +++
7 files changed, 237 insertions(+), 44 deletions(-)
diff --git a/common/cmd_usb.c b/common/cmd_usb.c
index 9eba271..4c01a78 100644
--- a/common/cmd_usb.c
+++ b/common/cmd_usb.c
@@ -553,7 +553,17 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
}
if (strncmp(argv[1], "tree", 4) == 0) {
printf("\nDevice Tree:\n");
+#ifdef CONFIG_USB_INIT_MULTI
+ for (i = 0; i < USB_MAX_DEVICE; i++) {
+ dev = usb_get_dev_index(i);
+ if (dev == NULL)
+ break;
+ if (dev->parent == NULL)
+ usb_show_tree(dev);
+ }
+#else
usb_show_tree(usb_get_dev_index(0));
+#endif
return 0;
}
if (strncmp(argv[1], "inf", 3) == 0) {
diff --git a/common/usb.c b/common/usb.c
index 1ec30bc..9fb0407 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -64,6 +64,10 @@
#define USB_HUB_DEBUG 0
#endif
+#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#endif
+
#define USB_PRINTF(fmt, args...) debug_cond(USB_DEBUG, fmt, ##args)
#define USB_HUB_PRINTF(fmt, args...) debug_cond(USB_HUB_DEBUG, fmt, ##args)
@@ -81,6 +85,86 @@ char usb_started; /* flag for the started/stopped USB status
*/
*/
static void usb_scan_devices(void);
+#ifdef CONFIG_USB_INIT_MULTI
+/***
+ * Init USB Device
+ */
+
+int usb_init(void)
+{
+ void *ctrl;
+ int i;
+ struct usb_device *dev;
+
+ running = 0;
+ dev_index = 0;
+ asynch_allowed = 1;
+ usb_hub_reset();
+
+ /* first make all devices unknown */
+ for (i = 0; i < USB_MAX_DEVICE; i++) {
+ memset(&usb_dev[i], 0, sizeof(struct usb_device));
+ usb_dev[i].devnum = -1;
+ }
+
+ /* init low_level USB */
+ printf("USB: ");
+ for (i = 0; i < CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
+ /* init low_level USB */
+ ctrl = usb_lowlevel_init(i);
+ /*
+* if lowlevel init is OK, scan the bus for devices
+* i.e. search HUBs and configure them
+*/
+ if (ctrl) {
+ running = 1;
+
+ printf("scanning bus for devices... ");
+ dev = usb_alloc_new_device(ctrl);
+ /*
+* device 0 is always present
+* (root hub, so let it analyze)
+*/
+ if (dev)
+ usb_new_device(dev);
+ }
+ }
+
+ if (running) {
+ if (!dev_index)
+ printf("No USB Device found\n");
+ else
+ printf("%d USB Device(s) found\n", dev_index);
+#ifdef CONFIG_USB_KEYBOARD
+ drv_usb_kbd_init();
+#endif
+ USB_PRINTF("scan end\n");
+ usb_started = 1;
+ return 0;
+ } else {
+ printf("Error, couldn't init Lowlevel part\n");
+ usb_started = 0;
+ return -1;
+ }
+}
+
+/**
+ * Stop USB this stops the LowLevel Part and deregisters USB devices.
+ */
+int usb_stop(void)
+{
+ int i;
+
+ if (usb_started) {
+ asynch_allowed = 1;
+ usb_started = 0;
+ usb_hub_reset();
+ for (i = 0; i < CONFIG_USB_MAX_CONTROLLER_COUNT; i++)
+ usb_lowlevel_stop(i);
+ }
+ return 0;
+}
+#else
/***
* Init USB Device
*/
@@ -126,6 +210,7 @@ int usb_stop(void)
}
return res;
}
+#endif
/*
* disables the asynch behaviour of the control message. This is used for data
@@ -747,11 +832,18 @@ struct usb_device *usb_get_dev_index(int index)
return &usb_dev[index];
}
-
+#ifdef CONFIG_USB_INIT_MULTI
+/* Save input pointer 'controller' into device structure.
+ * returns a pointer of a new device structure or NULL, if
+ * no
Re: [U-Boot] [PATCH 1/8] arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138
On Thu, 21 Jun 2012 09:37:09 +0200 Christian Riesch wrote: > Hi Mikhail, > > On Tue, Jun 12, 2012 at 11:15 PM, Mikhail Kshevetskiy > wrote: > > follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) > > of > > OMAP-L138 DSP+ARM Processor Technical Reference Manual > > Thanks for fixing this! Just out of curiosity: Did you hit any problem > or were you just comparing the code with the reference manual? Hard to say, I faced with memory initialization problem (caused by hardware bug). Before I hit a real problem, I study omap documentation and find disagreements with the code. So i just fix it. > > > > Signed-off-by: Mikhail Kshevetskiy > > --- > > arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c | 25 > > --- > > arch/arm/include/asm/arch-davinci/hardware.h|1 + > > 2 files changed, 19 insertions(+), 7 deletions(-) > > Acked-by: Christian Riesch > > For the calimain board > > Tested-by: Christian Riesch > > Regards, Christian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/6] arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138
follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of
OMAP-L138 DSP+ARM Processor Technical Reference Manual
Signed-off-by: Mikhail Kshevetskiy
---
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c | 26 +--
arch/arm/include/asm/arch-davinci/hardware.h|1 +
2 files changed, 20 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
index df7d6a2..ff2e2e3 100644
--- a/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
+++ b/arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
@@ -190,13 +190,21 @@ int da850_ddr_setup(void)
setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_LOCK);
setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_POWERDWN);
-
- setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_IOPWRDWN);
}
-
+ setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_IOPWRDWN);
writel(CONFIG_SYS_DA850_DDR2_DDRPHYCR, &dv_ddr2_regs_ctrl->ddrphycr);
- clrbits_le32(&davinci_syscfg1_regs->ddr_slew,
- (1 << DDR_SLEW_CMOSEN_BIT));
+
+ if (CONFIG_SYS_DA850_DDR2_SDBCR & (1 << DV_DDR_SDCR_DDR2EN_SHIFT)) {
+ /* DDR2 */
+ clrbits_le32(&davinci_syscfg1_regs->ddr_slew,
+ (1 << DDR_SLEW_DDR_PDENA_BIT) |
+ (1 << DDR_SLEW_CMOSEN_BIT));
+ } else {
+ /* MOBILE DDR */
+ setbits_le32(&davinci_syscfg1_regs->ddr_slew,
+ (1 << DDR_SLEW_DDR_PDENA_BIT) |
+ (1 << DDR_SLEW_CMOSEN_BIT));
+ }
/*
* SDRAM Configuration Register (SDCR):
@@ -216,7 +224,11 @@ int da850_ddr_setup(void)
writel(tmp, &dv_ddr2_regs_ctrl->sdbcr);
/* write memory configuration and timing */
- writel(CONFIG_SYS_DA850_DDR2_SDBCR2, &dv_ddr2_regs_ctrl->sdbcr2);
+ if (!(CONFIG_SYS_DA850_DDR2_SDBCR & (1 << DV_DDR_SDCR_DDR2EN_SHIFT))) {
+ /* MOBILE DDR only*/
+ writel(CONFIG_SYS_DA850_DDR2_SDBCR2,
+ &dv_ddr2_regs_ctrl->sdbcr2);
+ }
writel(CONFIG_SYS_DA850_DDR2_SDTIMR, &dv_ddr2_regs_ctrl->sdtimr);
writel(CONFIG_SYS_DA850_DDR2_SDTIMR2, &dv_ddr2_regs_ctrl->sdtimr2);
@@ -240,7 +252,7 @@ int da850_ddr_setup(void)
/* disable self refresh */
clrbits_le32(&dv_ddr2_regs_ctrl->sdrcr,
- DV_DDR_SDRCR_LPMODEN | DV_DDR_SDRCR_LPMODEN);
+ DV_DDR_SDRCR_LPMODEN | DV_DDR_SDRCR_MCLKSTOPEN);
writel(CONFIG_SYS_DA850_DDR2_PBBPR, &dv_ddr2_regs_ctrl->pbbpr);
return 0;
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index b145c6e..56e5743 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -505,6 +505,7 @@ struct davinci_syscfg1_regs {
((struct davinci_syscfg1_regs *)DAVINCI_SYSCFG1_BASE)
#define DDR_SLEW_CMOSEN_BIT4
+#define DDR_SLEW_DDR_PDENA_BIT 5
#define VTP_POWERDWN (1 << 6)
#define VTP_LOCK (1 << 7)
--
1.7.10
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[U-Boot] [PATCH 3/6] serial/ns16550: ns16550 has a different register layout on SOC_DA8XX
also fix NS16550_init() as we need 16x divider
Signed-off-by: Mikhail Kshevetskiy
---
drivers/serial/ns16550.c |2 +-
include/ns16550.h|9 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 0c23955..facadd2 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -52,7 +52,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor)
serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
serial_out(UART_LCRVAL, &com_port->lcr);
#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \
- defined(CONFIG_AM33XX)
+ defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX)
#if defined(CONFIG_APTIX)
/* /13 mode so Aptix 6MHz can hit 115200 */
diff --git a/include/ns16550.h b/include/ns16550.h
index e9d2eda..51cb5b4 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -46,6 +46,14 @@ struct NS16550 {
UART_REG(lsr); /* 5 */
UART_REG(msr); /* 6 */
UART_REG(spr); /* 7 */
+#ifdef CONFIG_SOC_DA8XX
+ UART_REG(reg8); /* 8 */
+ UART_REG(reg9); /* 9 */
+ UART_REG(revid1); /* A */
+ UART_REG(revid2); /* B */
+ UART_REG(pwr_mgmt); /* C */
+ UART_REG(mdr1); /* D */
+#else
UART_REG(mdr1); /* 8 */
UART_REG(reg9); /* 9 */
UART_REG(regA); /* A */
@@ -58,6 +66,7 @@ struct NS16550 {
UART_REG(ssr); /* 11*/
UART_REG(reg12);/* 12*/
UART_REG(osc_12m_sel); /* 13*/
+#endif
};
#define thr rbr
--
1.7.10
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[U-Boot] [PATCH 4/6] mtd/spi/spi_flash: support CMD_READ_ID=0x90 case
current code does not support spi flashes that have 0x90 read_id command,
so fix this
Signed-off-by: Mikhail Kshevetskiy
---
drivers/mtd/spi/spi_flash.c | 66 +++---
drivers/mtd/spi/spi_flash_internal.h |1 +
2 files changed, 47 insertions(+), 20 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index f689cc4..530b7b3 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -306,13 +306,44 @@ static const struct {
};
#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
+struct spi_flash *spi_analize_flash_probe(struct spi_slave *spi,
+ u8 *idcode, size_t idcode_len, u8 *id)
+{
+ struct spi_flash *flash = NULL;
+ int i, shift;
+ u8 *idp;
+
+#ifdef DEBUG
+ printf("SF: Got idcodes\n");
+ print_buffer(0, idcode, 1, idcode_len, 0);
+#endif
+
+ /* count the number of continuation bytes */
+ for (shift = 0, idp = idcode;
+shift < idcode_len && *idp == 0x7f;
+++shift, ++idp)
+ continue;
+
+ *id = *idp;
+ /* search the table for matches in shift and id */
+ for (i = 0; i < ARRAY_SIZE(flashes); ++i)
+ if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
+ /* we have a match, call probe */
+ flash = flashes[i].probe(spi, idp);
+ if (flash)
+ break;
+ }
+
+ return flash;
+}
+
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int spi_mode)
{
struct spi_slave *spi;
struct spi_flash *flash = NULL;
- int ret, i, shift;
- u8 idcode[IDCODE_LEN], *idp;
+ u8 cmd[4], idcode[IDCODE_LEN], id;
+ int ret;
spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
if (!spi) {
@@ -331,28 +362,23 @@ struct spi_flash *spi_flash_probe(unsigned int bus,
unsigned int cs,
if (ret)
goto err_read_id;
-#ifdef DEBUG
- printf("SF: Got idcodes\n");
- print_buffer(0, idcode, 1, sizeof(idcode), 0);
-#endif
+ flash = spi_analize_flash_probe(spi, idcode, sizeof(idcode), &id);
+ if (id == 0xff) {
+ /* try CMD_READ_ID_NEW command */
+ cmd[0] = CMD_READ_ID_NEW;
+ spi_flash_addr(0x00, cmd);
- /* count the number of continuation bytes */
- for (shift = 0, idp = idcode;
-shift < IDCODE_CONT_LEN && *idp == 0x7f;
-++shift, ++idp)
- continue;
+ ret = spi_flash_cmd_read(spi, cmd, sizeof(cmd),
+ idcode, sizeof(idcode));
+ if (ret)
+ goto err_read_id;
- /* search the table for matches in shift and id */
- for (i = 0; i < ARRAY_SIZE(flashes); ++i)
- if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
- /* we have a match, call probe */
- flash = flashes[i].probe(spi, idp);
- if (flash)
- break;
- }
+ flash = spi_analize_flash_probe(spi,
+ idcode, sizeof(idcode), &id);
+ }
if (!flash) {
- printf("SF: Unsupported manufacturer %02x\n", *idp);
+ printf("SF: Unsupported manufacturer %02x\n", id);
goto err_manufacturer_probe;
}
diff --git a/drivers/mtd/spi/spi_flash_internal.h
b/drivers/mtd/spi/spi_flash_internal.h
index 91e036a..b8bd5d5 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -14,6 +14,7 @@
/* Common commands */
#define CMD_READ_ID0x9f
+#define CMD_READ_ID_NEW0x90
#define CMD_READ_ARRAY_SLOW0x03
#define CMD_READ_ARRAY_FAST0x0b
--
1.7.10
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[U-Boot] [PATCH 2/6] arm/davinci/da850: add uart0 pinmux
Signed-off-by: Mikhail Kshevetskiy
---
arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c |5 +
arch/arm/include/asm/arch-davinci/hardware.h|1 +
arch/arm/include/asm/arch-davinci/pinmux_defs.h |1 +
3 files changed, 7 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
b/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
index fa07fb5..dbae5fa 100644
--- a/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
+++ b/arch/arm/cpu/arm926ejs/davinci/da850_pinmux.c
@@ -35,6 +35,11 @@ const struct pinmux_config spi1_pins_scs0[] = {
};
/* UART pin muxer settings */
+const struct pinmux_config uart0_pins_txrx[] = {
+ { pinmux(3), 2, 4 }, /* UART0_RXD */
+ { pinmux(3), 2, 5 }, /* UART0_TXD */
+};
+
const struct pinmux_config uart1_pins_txrx[] = {
{ pinmux(4), 2, 6 }, /* UART1_RXD */
{ pinmux(4), 2, 7 }, /* UART1_TXD */
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index 56e5743..76aca24 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -447,6 +447,7 @@ struct davinci_pllc_regs {
/* Clock IDs */
enum davinci_clk_ids {
DAVINCI_SPI0_CLKID = 2,
+ DAVINCI_UART0_CLKID = 2,
DAVINCI_UART2_CLKID = 2,
DAVINCI_MMC_CLKID = 2,
DAVINCI_MDIO_CLKID = 4,
diff --git a/arch/arm/include/asm/arch-davinci/pinmux_defs.h
b/arch/arm/include/asm/arch-davinci/pinmux_defs.h
index 07aceaa..eddb3f7 100644
--- a/arch/arm/include/asm/arch-davinci/pinmux_defs.h
+++ b/arch/arm/include/asm/arch-davinci/pinmux_defs.h
@@ -28,6 +28,7 @@ extern const struct pinmux_config spi1_pins_base[3];
extern const struct pinmux_config spi1_pins_scs0[1];
/* UART pin muxer settings */
+extern const struct pinmux_config uart0_pins_txrx[2];
extern const struct pinmux_config uart1_pins_txrx[2];
extern const struct pinmux_config uart2_pins_txrx[2];
extern const struct pinmux_config uart2_pins_rtscts[2];
--
1.7.10
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[U-Boot] [PATCH 6/6] MMC: u-boot-spl may be compiled without partition support
Signed-off-by: Mikhail Kshevetskiy --- drivers/mmc/mmc.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index aebe578..69df64a 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1253,7 +1253,9 @@ int mmc_startup(struct mmc *mmc) (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28, (mmc->cid[2] >> 24) & 0xf); +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) init_part(&mmc->block_dev); +#endif return 0; } -- 1.7.10 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/6] mtd/spi: add sst25l driver
current SST driver does not support well this types of flash, so use
linux-3.3 code as a base.
Signed-off-by: Mikhail Kshevetskiy
---
drivers/mtd/spi/Makefile |3 +-
drivers/mtd/spi/spi_flash.c |3 +
drivers/mtd/spi/spi_flash_internal.h |1 +
drivers/mtd/spi/sst25l.c | 372 ++
4 files changed, 378 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/spi/sst25l.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
index 90f8392..9285bf7 100644
--- a/drivers/mtd/spi/Makefile
+++ b/drivers/mtd/spi/Makefile
@@ -34,7 +34,8 @@ COBJS-$(CONFIG_SPI_FLASH_ATMEL) += atmel.o
COBJS-$(CONFIG_SPI_FLASH_EON) += eon.o
COBJS-$(CONFIG_SPI_FLASH_MACRONIX) += macronix.o
COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o
-COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o
+COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o
+COBJS-$(CONFIG_SPI_FLASH_SST25L) += sst25l.o
COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o
COBJS-$(CONFIG_SPI_FLASH_WINBOND) += winbond.o
COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 530b7b3..d2da542 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -285,6 +285,9 @@ static const struct {
#ifdef CONFIG_SPI_FLASH_SST
{ 0, 0xbf, spi_flash_probe_sst, },
#endif
+#ifdef CONFIG_SPI_FLASH_SST25L
+ { 0, 0xbf, spi_flash_probe_sst25l, },
+#endif
#ifdef CONFIG_SPI_FLASH_STMICRO
{ 0, 0x20, spi_flash_probe_stmicro, },
#endif
diff --git a/drivers/mtd/spi/spi_flash_internal.h
b/drivers/mtd/spi/spi_flash_internal.h
index b8bd5d5..89d9036 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -98,6 +98,7 @@ struct spi_flash *spi_flash_probe_atmel(struct spi_slave
*spi, u8 *idcode);
struct spi_flash *spi_flash_probe_eon(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode);
+struct spi_flash *spi_flash_probe_sst25l(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode);
struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode);
diff --git a/drivers/mtd/spi/sst25l.c b/drivers/mtd/spi/sst25l.c
new file mode 100644
index 000..9d7be0d
--- /dev/null
+++ b/drivers/mtd/spi/sst25l.c
@@ -0,0 +1,372 @@
+/*
+ * Driver for SST25L SPI Flash chips
+ *
+ * (C) Copyright 2000-2002
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ * Copyright 2008, Network Appliance Inc.
+ * Jason McMullan
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (tsi-chung.l...@freescale.com)
+ * Copyright (c) 2008-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include
+#include
+#include
+#include
+
+#include "spi_flash_internal.h"
+
+#define SST25L_CMD_WRSR0x01/* Write status register */
+#define SST25L_CMD_WRDI0x04/* Write disable */
+#define SST25L_CMD_RDSR0x05/* Read status register */
+#define SST25L_CMD_WREN0x06/* Write enable */
+#define SST25L_CMD_READ0x03/* High speed read */
+
+#define SST25L_CMD_EWSR0x50/* Enable write status register
*/
+#define SST25L_CMD_SECTOR_ERASE0x20/* Erase sector */
+#define SST25L_CMD_READ_ID 0x90/* Read device ID */
+#define SST25L_CMD_AAI_PROGRAM 0xaf/* Auto address increment */
+
+#define SST25L_STATUS_BUSY (1 << 0)/* Chip is busy */
+#define SST25L_STATUS_WREN (1 << 1)/* Write enabled */
+#define SST25L_STATUS_BP0 (1 << 2)/* Block protection 0 */
+#define SST25L_STATUS_BP1 (1 << 3)/* Block protection 1 */
+
+struct flash_info {
+ const char *name;
+ u16 device_id;
+ u32 page_size;
+ u32 nr_pages;
+ u32 erase_size;
+};
+
+struct sst25l_spi_flash {
+ struct spi_flashflash;
+ const struct flash_info *flash_info;
+};
+
+#define to_sst25l_spi_flash(x) container_of(x, struct sst25l_spi_flash, flash)
+
+static struct flash_info sst25l_flash_info[] = {
+ {"sst25vf010a", 0xbf49, 256, 512, 4096},
+ {"sst25lf020a", 0xbf43, 256, 1024, 4096},
+ {"sst25lf040a", 0xbf44, 256, 2048, 4096},
+};
+
+static inline int spi_write_sync(struct spi_slave *spi,
+ const u8 *data, size_t len)
+{
+ return spi_xfer(spi, 8 * len, data,
+ NULL, SPI_XFER_BEGIN | SPI_XFER_END);
+}
+
+static int sst25l_status(struct spi_flash *flash, int *status)
+{
+ unsigned char cmd_resp[2];
+ int err;
+
+ cmd_
[U-Boot] [PATCH V2 0/7] CPSW switch plus SPL net support
These patches add CPSW switch driver and enable support for it on TI AM335x based boards. This version is rebased on top of u-boot-ti/next. Also now CPSW driver uses internal controller memory for DMA descriptors so coherent allocator is no longer a requirement for this series. The second part of the series provides support for networking in SPL. These patches try to use network infrasctructure as is, without trying to cut some minimal set of it, so the resulting SPL image is quite big and only useful for boards with plenty of SRAM/OCRAM (like TI AM335x based ones). Chandan Nath (3): am33xx: CPSW init and definitions am33xx: pin mux defintions for CPSW switch am335x_evm: CPSW support Cyril Chemparathy (1): cpsw: add driver for cpsw ethernet device Ilya Yanok (3): am335x_evm: read the on-board EEPROM OMAP: networking support for SPL am335x_evm: enable networking in SPL arch/arm/cpu/armv7/am33xx/clock.c |8 +- arch/arm/cpu/armv7/omap-common/Makefile |3 + arch/arm/cpu/armv7/omap-common/spl.c |5 + arch/arm/cpu/armv7/omap-common/spl_eth.c | 50 ++ arch/arm/include/asm/arch-am33xx/common_def.h |2 + arch/arm/include/asm/arch-am33xx/cpu.h| 11 + arch/arm/include/asm/arch-am33xx/hardware.h |5 + arch/arm/include/asm/omap_common.h|4 + board/ti/am335x/evm.c | 175 - board/ti/am335x/mux.c | 47 ++ common/Makefile |6 + common/cmd_nvedit.c |6 +- common/env_common.c |3 +- drivers/net/Makefile |1 + drivers/net/cpsw.c| 988 + include/configs/am335x_evm.h | 25 +- include/cpsw.h| 51 ++ lib/Makefile | 10 +- lib/vsprintf.c|2 +- spl/Makefile |3 + 20 files changed, 1394 insertions(+), 11 deletions(-) create mode 100644 arch/arm/cpu/armv7/omap-common/spl_eth.c create mode 100644 drivers/net/cpsw.c create mode 100644 include/cpsw.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 2/7] am33xx: CPSW init and definitions
From: Chandan Nath
This patch adds platform-specific initialization for CPSW
switch on TI AM33XX SoCs.
CC: Tom Rini
Signed-off-by: Ilya Yanok
---
Changes from V1:
- rebased to u-boot-ti/next
arch/arm/cpu/armv7/am33xx/clock.c |8 +++-
arch/arm/include/asm/arch-am33xx/cpu.h | 11 +++
arch/arm/include/asm/arch-am33xx/hardware.h |5 +
3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c
b/arch/arm/cpu/armv7/am33xx/clock.c
index ddce213..0d91546 100644
--- a/arch/arm/cpu/armv7/am33xx/clock.c
+++ b/arch/arm/cpu/armv7/am33xx/clock.c
@@ -24,6 +24,7 @@
#define PRCM_MOD_EN0x2
#define PRCM_FORCE_WAKEUP 0x2
+#define PRCM_FUNCTL0x0
#define PRCM_EMIF_CLK_ACTIVITY BIT(2)
#define PRCM_L3_GCLK_ACTIVITY BIT(4)
@@ -38,7 +39,7 @@
#define CLK_MODE_SEL 0x7
#define CLK_MODE_MASK 0xfff8
#define CLK_DIV_SEL0xFFE0
-
+#define CPGMAC0_IDLE 0x3
const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
@@ -133,6 +134,11 @@ static void enable_per_clocks(void)
writel(PRCM_MOD_EN, &cmper->gpio3clkctrl);
while (readl(&cmper->gpio3clkctrl) != PRCM_MOD_EN)
;
+
+ /* Ethernet */
+ writel(PRCM_MOD_EN, &cmper->cpgmac0clkctrl);
+ while ((readl(&cmper->cpgmac0clkctrl) & CPGMAC0_IDLE) != PRCM_FUNCTL)
+ ;
}
static void mpu_pll_config(void)
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h
b/arch/arm/include/asm/arch-am33xx/cpu.h
index e63ab74..de9ee91 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -255,6 +255,17 @@ struct ctrl_stat {
#define OMAP_GPIO_CLEARDATAOUT 0x0190
#define OMAP_GPIO_SETDATAOUT 0x0194
+/* Control Device Register */
+struct ctrl_dev {
+ unsigned int deviceid; /* offset 0x00 */
+ unsigned int resv1[11];
+ unsigned int macid0l; /* offset 0x30 */
+ unsigned int macid0h; /* offset 0x34 */
+ unsigned int macid1l; /* offset 0x38 */
+ unsigned int macid1h; /* offset 0x3c */
+ unsigned int resv2[4];
+ unsigned int miisel;/* offset 0x50 */
+};
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL_STRICT_NAMES */
diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h
b/arch/arm/include/asm/arch-am33xx/hardware.h
index 0ec22eb..4b1c725 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware.h
@@ -46,6 +46,7 @@
/* Control Module Base Address */
#define CTRL_BASE 0x44E1
+#define CTRL_DEVICE_BASE 0x44E10600
/* PRCM Base Address */
#define PRCM_BASE 0x44E0
@@ -78,4 +79,8 @@
#define DDRPHY_0_CONFIG_BASE (CTRL_BASE + 0x1400)
#define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE
+/* CPSW Config space */
+#define AM335X_CPSW_BASE 0x4A10
+#define AM335X_CPSW_MDIO_BASE 0x4A101000
+
#endif /* __AM33XX_HARDWARE_H */
--
1.7.9.5
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[U-Boot] [PATCH V2 3/7] am33xx: pin mux defintions for CPSW switch
From: Chandan Nath
This patch adds pin mux settings for CPSW switch found on
TI AM335X based boards (MII and RGMII modes).
CC: Tom Rini
Signed-off-by: Ilya Yanok
---
Changes from V1:
- rebased to u-boot-ti/next
arch/arm/include/asm/arch-am33xx/common_def.h |2 ++
board/ti/am335x/mux.c | 47 +
2 files changed, 49 insertions(+)
diff --git a/arch/arm/include/asm/arch-am33xx/common_def.h
b/arch/arm/include/asm/arch-am33xx/common_def.h
index aa3b554..5a7b0f3 100644
--- a/arch/arm/include/asm/arch-am33xx/common_def.h
+++ b/arch/arm/include/asm/arch-am33xx/common_def.h
@@ -19,5 +19,7 @@
extern void enable_uart0_pin_mux(void);
extern void enable_mmc0_pin_mux(void);
extern void enable_i2c0_pin_mux(void);
+extern void enable_mii1_pin_mux(void);
+extern void enable_rgmii1_pin_mux(void);
#endif/*__COMMON_DEF_H__ */
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 9ccb436..327b2de 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -280,6 +280,43 @@ static struct module_pin_mux i2c0_pin_mux[] = {
{-1},
};
+static struct module_pin_mux rgmii1_pin_mux[] = {
+ {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */
+ {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE},/* RGMII1_RCTL */
+ {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
+ {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */
+ {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */
+ {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */
+ {OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */
+ {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */
+ {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE},/* RGMII1_RD3 */
+ {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE},/* RGMII1_RD2 */
+ {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE},/* RGMII1_RD1 */
+ {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE},/* RGMII1_RD0 */
+ {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
+ {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},/* MDIO_CLK */
+ {-1},
+};
+
+static struct module_pin_mux mii1_pin_mux[] = {
+ {OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */
+ {OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
+ {OFFSET(mii1_rxdv), MODE(0) | RXACTIVE},/* MII1_RXDV */
+ {OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
+ {OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
+ {OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
+ {OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */
+ {OFFSET(mii1_txclk), MODE(0) | RXACTIVE}, /* MII1_TXCLK */
+ {OFFSET(mii1_rxclk), MODE(0) | RXACTIVE}, /* MII1_RXCLK */
+ {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE},/* MII1_RXD3 */
+ {OFFSET(mii1_rxd2), MODE(0) | RXACTIVE},/* MII1_RXD2 */
+ {OFFSET(mii1_rxd1), MODE(0) | RXACTIVE},/* MII1_RXD1 */
+ {OFFSET(mii1_rxd0), MODE(0) | RXACTIVE},/* MII1_RXD0 */
+ {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
+ {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},/* MDIO_CLK */
+ {-1},
+};
+
/*
* Configure the pin mux for the module
*/
@@ -310,3 +347,13 @@ void enable_i2c0_pin_mux(void)
{
configure_module_pin_mux(i2c0_pin_mux);
}
+
+void enable_rgmii1_pin_mux(void)
+{
+ configure_module_pin_mux(rgmii1_pin_mux);
+}
+
+void enable_mii1_pin_mux(void)
+{
+ configure_module_pin_mux(mii1_pin_mux);
+}
--
1.7.9.5
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[U-Boot] [PATCH V2 4/7] am335x_evm: read the on-board EEPROM
Read the on-board EEPROM during startup to detect the version
of the board we are running on (as for now only BeagleBone vs
EVM detection is supported).
CC: Tom Rini
Signed-off-by: Ilya Yanok
---
Changes from V1:
- rebased to u-boot-ti/next
board/ti/am335x/evm.c | 72 +++--
1 file changed, 70 insertions(+), 2 deletions(-)
diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c
index f2e355c..0945037 100644
--- a/board/ti/am335x/evm.c
+++ b/board/ti/am335x/evm.c
@@ -14,6 +14,7 @@
*/
#include
+#include
#include
#include
#include
@@ -22,16 +23,83 @@
DECLARE_GLOBAL_DATA_PTR;
/*
+ * I2C Address of on-board EEPROM
+ */
+#define I2C_BASE_BOARD_ADDR0x50
+
+#define NO_OF_MAC_ADDR 3
+#define ETH_ALEN 6
+
+#define NAME_LEN 8
+
+struct am335x_baseboard_id {
+ unsigned int magic;
+ char name[NAME_LEN];
+ char version[4];
+ char serial[12];
+ char config[32];
+ char mac_addr[NO_OF_MAC_ADDR][ETH_ALEN];
+};
+
+static struct am335x_baseboard_id header;
+
+static inline int board_is_bone(void)
+{
+ return !strncmp(header.name, "A335BONE", NAME_LEN);
+}
+
+/*
+ * Read header information from EEPROM into global structure.
+ */
+int read_eeprom(void)
+{
+ /* Check if baseboard eeprom is available */
+ if (i2c_probe(I2C_BASE_BOARD_ADDR)) {
+ printf("Could not probe the EEPROM; something fundamentally "
+ "wrong on the I2C bus.\n");
+ return -ENODEV;
+ }
+
+ /* read the eeprom using i2c */
+ if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 2, (uchar *)&header,
+ sizeof(header))) {
+ printf("Could not read the EEPROM; something fundamentally"
+ " wrong on the I2C bus.\n");
+ return -EIO;
+ }
+
+ if (header.magic != 0xEE3355AA) {
+ /*
+* read the eeprom using i2c again,
+* but use only a 1 byte address
+*/
+ if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 1, (uchar *)&header,
+ sizeof(header))) {
+ printf("Could not read the EEPROM; something "
+ "fundamentally wrong on the I2C bus.\n");
+ return -EIO;
+ }
+
+ if (header.magic != 0xEE3355AA) {
+ printf("Incorrect magic number in EEPROM\n");
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+
+/*
* Basic board specific setup
*/
int board_init(void)
{
enable_uart0_pin_mux();
-#ifdef CONFIG_I2C
enable_i2c0_pin_mux();
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-#endif
+ if (read_eeprom() < 0)
+ printf("Could not get board ID.\n");
gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
--
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[U-Boot] [PATCH V2 6/7] OMAP: networking support for SPL
This patch adds support for networking in SPL. Some devices are
capable of loading SPL via network so it makes sense to load the
main U-Boot binary via network too. This patch tries to use
existing network code as much as possible. Unfortunately, it depends
on environment which in turn depends on other code so SPL size
is increased significantly. No effort was done to decouple network
code and environment so far.
CC: Tom Rini
Signed-off-by: Ilya Yanok
---
arch/arm/cpu/armv7/omap-common/Makefile |3 ++
arch/arm/cpu/armv7/omap-common/spl.c |5 +++
arch/arm/cpu/armv7/omap-common/spl_eth.c | 50 ++
arch/arm/include/asm/omap_common.h |4 +++
common/Makefile |6
common/cmd_nvedit.c |6 ++--
common/env_common.c |3 +-
lib/Makefile | 10 --
lib/vsprintf.c |2 +-
spl/Makefile |3 ++
10 files changed, 86 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_eth.c
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile
b/arch/arm/cpu/armv7/omap-common/Makefile
index 1394c3f..4945bdf 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -56,6 +56,9 @@ endif
ifdef CONFIG_SPL_YMODEM_SUPPORT
COBJS += spl_ymodem.o
endif
+ifdef CONFIG_SPL_ETH_SUPPORT
+COBJS += spl_eth.o
+endif
endif
ifndef CONFIG_SPL_BUILD
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
b/arch/arm/cpu/armv7/omap-common/spl.c
index 4d1ac85..e7127fb 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -176,6 +176,11 @@ void board_init_r(gd_t *id, ulong dummy)
spl_ymodem_load_image();
break;
#endif
+#ifdef CONFIG_SPL_ETH_SUPPORT
+ case BOOT_DEVICE_CPGMAC:
+ spl_eth_load_image();
+ break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
diff --git a/arch/arm/cpu/armv7/omap-common/spl_eth.c
b/arch/arm/cpu/armv7/omap-common/spl_eth.c
new file mode 100644
index 000..21d6e77
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/spl_eth.c
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+ *
+ * (C) Copyright 2012
+ * Ilya Yanok
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void spl_eth_load_image(void)
+{
+ int rv;
+
+ env_init();
+ env_relocate();
+ setenv("autoload", "yes");
+ load_addr = CONFIG_SYS_TEXT_BASE - sizeof(struct image_header);
+ rv = eth_initialize(gd->bd);
+ if (rv == 0) {
+ printf("No Ethernet devices found\n");
+ hang();
+ }
+ rv = NetLoop(BOOTP);
+ if (rv < 0) {
+ printf("Problem booting with BOOTP\n");
+ hang();
+ }
+ spl_parse_image_header((struct image_header *)load_addr);
+}
diff --git a/arch/arm/include/asm/omap_common.h
b/arch/arm/include/asm/omap_common.h
index 4e95eee..a433836 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -69,6 +69,7 @@ void preloader_console_init(void);
#define BOOT_DEVICE_MMC1 8
#define BOOT_DEVICE_MMC2 0
#define BOOT_DEVICE_UART 65
+#define BOOT_DEVICE_CPGMAC 70
#define BOOT_DEVICE_MMC2_2 0xFF
#endif
@@ -107,6 +108,9 @@ void spl_mmc_load_image(void);
/* YMODEM SPL functions */
void spl_ymodem_load_image(void);
+/* Ethernet SPL functions */
+void spl_eth_load_image(void);
+
#ifdef CONFIG_SPL_BOARD_INIT
void spl_board_init(void);
#endif
diff --git a/common/Makefile b/common/Makefile
index 6e23baa..15cbf43 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -190,6 +190,12 @@ endif
ifdef CONFIG_SPL_BUILD
COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
+COBJS-$(CONFIG_SPL_NET_SUPPORT) += cmd_nvedit.o
+COBJS-$(CONFIG_SPL_NET_SUPPORT) += command.o
+COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_common.o
+COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_nowhere.o
+COBJS-$(CONFIG_SPL_NET_SUPPORT)
[U-Boot] [PATCH V2 5/7] am335x_evm: CPSW support
From: Chandan Nath
This patch adds board-specific initialization for CPSW on
TI AM335X based boards. Tested on BeagleBone.
CC: Tom Rini
Signed-off-by: Ilya Yanok
---
Changes from V1:
- rebased to u-boot-ti/next
board/ti/am335x/evm.c| 91 ++
include/configs/am335x_evm.h | 20 +-
2 files changed, 110 insertions(+), 1 deletion(-)
diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c
index 0945037..16a52a0 100644
--- a/board/ti/am335x/evm.c
+++ b/board/ti/am335x/evm.c
@@ -15,13 +15,26 @@
#include
#include
+#include
#include
#include
#include
#include
+#include
+#include
DECLARE_GLOBAL_DATA_PTR;
+#define UART_RESET (0x1 << 1)
+#define UART_CLK_RUNNING_MASK 0x1
+#define UART_SMART_IDLE_EN (0x1 << 0x3)
+
+/* MII mode defines */
+#define MII_MODE_ENABLE0x0
+#define RGMII_MODE_ENABLE 0xA
+
+struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
/*
* I2C Address of on-board EEPROM
*/
@@ -105,3 +118,81 @@ int board_init(void)
return 0;
}
+
+#ifdef CONFIG_DRIVER_TI_CPSW
+static void cpsw_control(int enabled)
+{
+ /* VTP can be added here */
+
+ return;
+}
+
+static struct cpsw_slave_data cpsw_slaves[] = {
+ {
+ .slave_reg_ofs = 0x208,
+ .sliver_reg_ofs = 0xd80,
+ .phy_id = 0,
+ },
+ {
+ .slave_reg_ofs = 0x308,
+ .sliver_reg_ofs = 0xdc0,
+ .phy_id = 1,
+ },
+};
+
+static struct cpsw_platform_data cpsw_data = {
+ .mdio_base = AM335X_CPSW_MDIO_BASE,
+ .cpsw_base = AM335X_CPSW_BASE,
+ .mdio_div = 0xff,
+ .channels = 8,
+ .cpdma_reg_ofs = 0x800,
+ .slaves = 1,
+ .slave_data = cpsw_slaves,
+ .ale_reg_ofs= 0xd00,
+ .ale_entries= 1024,
+ .host_port_reg_ofs = 0x108,
+ .hw_stats_reg_ofs = 0x900,
+ .mac_control= (1 << 5),
+ .control= cpsw_control,
+ .host_port_num = 0,
+ .version= CPSW_CTRL_VERSION_2,
+};
+
+int board_eth_init(bd_t *bis)
+{
+ uint8_t mac_addr[6];
+ uint32_t mac_hi, mac_lo;
+
+ if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+ debug(" not set. Reading from E-fuse\n");
+ /* try reading mac address from efuse */
+ mac_lo = readl(&cdev->macid0l);
+ mac_hi = readl(&cdev->macid0h);
+ mac_addr[0] = mac_hi & 0xFF;
+ mac_addr[1] = (mac_hi & 0xFF00) >> 8;
+ mac_addr[2] = (mac_hi & 0xFF) >> 16;
+ mac_addr[3] = (mac_hi & 0xFF00) >> 24;
+ mac_addr[4] = mac_lo & 0xFF;
+ mac_addr[5] = (mac_lo & 0xFF00) >> 8;
+
+ if (is_valid_ether_addr(mac_addr))
+ eth_setenv_enetaddr("ethaddr", mac_addr);
+ else
+ return -1;
+ }
+
+ if (board_is_bone()) {
+ enable_mii1_pin_mux();
+ writel(MII_MODE_ENABLE, &cdev->miisel);
+ cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
+ PHY_INTERFACE_MODE_MII;
+ } else {
+ enable_rgmii1_pin_mux();
+ writel(RGMII_MODE_ENABLE, &cdev->miisel);
+ cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
+ PHY_INTERFACE_MODE_RGMII;
+ }
+
+ return cpsw_register(&cpsw_data);
+}
+#endif
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 89e2aa0..3f22f8a 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -21,11 +21,13 @@
#undef CONFIG_GZIP
#undef CONFIG_ZLIB
#undef CONFIG_SYS_HUSH_PARSER
-#undef CONFIG_CMD_NET
#include
#include
+#define CONFIG_DMA_COHERENT
+#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
+
#define CONFIG_ENV_SIZE0x400
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 * 1024))
#define CONFIG_SYS_PROMPT "U-Boot# "
@@ -167,4 +169,20 @@
/* Unsupported features */
#undef CONFIG_USE_IRQ
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_DRIVER_TI_CPSW
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_GIGE
+#define CONFIG_PHYLIB
+
#endif /* ! __CONFIG_AM335X_EVM_H */
--
1.7.9.5
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[U-Boot] [PATCH V2 1/7] cpsw: add driver for cpsw ethernet device
From: Cyril Chemparathy
CPSW is an on-chip ethernet switch that is found on various SoCs from Texas
Instruments. This patch adds a simple driver (based on the Linux driver) for
this hardware module.
This patch also adds support to clean and flush dcache during packet send
and receive.
Changes by Sandhya: Added support to clean and flush dcache during packet
send/receive and added timeouts.
CC: Tom Rini
Signed-off-by: Cyril Chemparathy
Signed-off-by: Chandan Nath
Signed-off-by: Satyanarayana, Sandhya
[ilya.yanok: Cleaned cache handling, some style cleanup, some small
fixes, use of internal RAM for descriptors]
Signed-off-by: Ilya Yanok
---
Changes from V1:
- rebased to u-boot-ti/next
- use internal RAM for descriptors (dma_alloc_coherent is no longer needed)
- fix timeout handling
drivers/net/Makefile |1 +
drivers/net/cpsw.c | 988 ++
include/cpsw.h | 51 +++
3 files changed, 1040 insertions(+)
create mode 100644 drivers/net/cpsw.c
create mode 100644 include/cpsw.h
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 430f90c..011cd51 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -71,6 +71,7 @@ COBJS-$(CONFIG_SMC9) += smc9.o
COBJS-$(CONFIG_SMC911X) += smc911x.o
COBJS-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
COBJS-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o
+COBJS-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o
COBJS-$(CONFIG_FMAN_ENET) += fsl_mdio.o
COBJS-$(CONFIG_TSI108_ETH) += tsi108_eth.o
COBJS-$(CONFIG_ULI526X) += uli526x.o
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
new file mode 100644
index 000..7473763
--- /dev/null
+++ b/drivers/net/cpsw.c
@@ -0,0 +1,988 @@
+/*
+ * CPSW Ethernet Switch Driver
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define BITMASK(bits) (BIT(bits) - 1)
+#define PHY_REG_MASK 0x1f
+#define PHY_ID_MASK0x1f
+#define NUM_DESCS (PKTBUFSRX * 2)
+#define PKT_MIN60
+#define PKT_MAX(1500 + 14 + 4 + 4)
+#define CLEAR_BIT 1
+#define GIGABITEN BIT(7)
+#define FULLDUPLEXEN BIT(0)
+#define MIIEN BIT(15)
+
+/* DMA Registers */
+#define CPDMA_TXCONTROL0x004
+#define CPDMA_RXCONTROL0x014
+#define CPDMA_SOFTRESET0x01c
+#define CPDMA_RXFREE 0x0e0
+#define CPDMA_TXHDP_VER1 0x100
+#define CPDMA_TXHDP_VER2 0x200
+#define CPDMA_RXHDP_VER1 0x120
+#define CPDMA_RXHDP_VER2 0x220
+#define CPDMA_TXCP_VER10x140
+#define CPDMA_TXCP_VER20x240
+#define CPDMA_RXCP_VER10x160
+#define CPDMA_RXCP_VER20x260
+
+#define CPDMA_RAM_ADDR 0x4a102000
+
+/* Descriptor mode bits */
+#define CPDMA_DESC_SOP BIT(31)
+#define CPDMA_DESC_EOP BIT(30)
+#define CPDMA_DESC_OWNER BIT(29)
+#define CPDMA_DESC_EOQ BIT(28)
+
+/*
+ * This timeout definition is a worst-case ultra defensive measure against
+ * unexpected controller lock ups. Ideally, we should never ever hit this
+ * scenario in practice.
+ */
+#define MDIO_TIMEOUT100 /* msecs */
+#define CPDMA_TIMEOUT 100 /* msecs */
+
+struct cpsw_mdio_regs {
+ u32 version;
+ u32 control;
+#define CONTROL_IDLE BIT(31)
+#define CONTROL_ENABLE BIT(30)
+
+ u32 alive;
+ u32 link;
+ u32 linkintraw;
+ u32 linkintmasked;
+ u32 __reserved_0[2];
+ u32 userintraw;
+ u32 userintmasked;
+ u32 userintmaskset;
+ u32 userintmaskclr;
+ u32 __reserved_1[20];
+
+ struct {
+ u32 access;
+ u32 physel;
+#define USERACCESS_GO BIT(31)
+#define USERACCESS_WRITE BIT(30)
+#define USERACCESS_ACK BIT(29)
+#define USERACCESS_READ(0)
+#define USERACCESS_DATA(0x)
+ } user[0];
+};
+
+struct cpsw_regs {
+ u32 id_ver;
+ u32 control;
+ u32 soft_reset;
+ u32 stat_port_en;
+ u32 ptype;
+};
+
+struct cpsw_slave_regs {
+ u32 max_blks;
+ u32 blk_cnt;
+ u32 flow_thresh;
+ u32 port_vlan;
+
[U-Boot] [PATCH V2 7/7] am335x_evm: enable networking in SPL
This patch adds support for networking in SPL on TI AM335x based
boards.
CC: Tom Rini
Signed-off-by: Ilya Yanok
---
board/ti/am335x/evm.c| 12
include/configs/am335x_evm.h |5 -
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c
index 16a52a0..5e09919 100644
--- a/board/ti/am335x/evm.c
+++ b/board/ti/am335x/evm.c
@@ -119,6 +119,18 @@ int board_init(void)
return 0;
}
+#ifdef CONFIG_SPL_BUILD
+int spl_board_init(void)
+{
+ enable_i2c0_pin_mux();
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ if (read_eeprom() < 0)
+ printf("Could not get board ID.\n");
+
+ return 0;
+}
+#endif
+
#ifdef CONFIG_DRIVER_TI_CPSW
static void cpsw_control(int enabled)
{
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 3f22f8a..c644968 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -127,8 +127,9 @@
/* Defines for SPL */
#define CONFIG_SPL
+#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_TEXT_BASE 0x402F0400
-#define CONFIG_SPL_MAX_SIZE(46 * 1024)
+#define CONFIG_SPL_MAX_SIZE(101 * 1024)
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
#define CONFIG_SPL_BSS_START_ADDR 0x8000
@@ -147,6 +148,8 @@
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_YMODEM_SUPPORT
+#define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SPL_ETH_SUPPORT
#define CONFIG_SPL_LDSCRIPT"$(CPUDIR)/omap-common/u-boot-spl.lds"
/*
--
1.7.9.5
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[U-Boot] [PATCH] Davinci: Utility for MMC boot
From: Alagu Sankar
This is a Linux command line tool specific to TI's Davinci platforms, for
flashing UBL (User Boot Loader), u-boot and u-boot Environment in the MMC/SD
card. This MMC/SD card can be used for booting Davinci platforms that supports
MMC/SD boot option.
This patch was submitted by Alagu Sankar
(http://www.mail-archive.com/u-boot@lists.denx.de/msg32309.html),
but couldn't make into mainline. Resubmitting the patch, with modifications to
build with u-boot, Fixed compilation issues and fixed uflash.c to write u-boot
properly.
Signed-off-by: Alagu Sankar
Signed-off-by: Rajashekhara, Sudhakar
Signed-off-by: Lad, Prabhakar
---
Makefile|2 +-
tools/Makefile |2 +-
tools/uflash/Makefile | 13 ++
tools/uflash/README | 125 +++
tools/uflash/config.txt | 11 ++
tools/uflash/uflash.c | 383 +++
6 files changed, 534 insertions(+), 2 deletions(-)
create mode 100644 tools/uflash/Makefile
create mode 100644 tools/uflash/README
create mode 100644 tools/uflash/config.txt
create mode 100644 tools/uflash/uflash.c
diff --git a/Makefile b/Makefile
index 7368f1f..c5afe9d 100644
--- a/Makefile
+++ b/Makefile
@@ -726,7 +726,7 @@ clean:
@rm -f $(obj)examples/api/demo{,.bin}
@rm -f $(obj)tools/bmp_logo$(obj)tools/easylogo/easylogo \
$(obj)tools/env/{fw_printenv,fw_setenv}\
- $(obj)tools/envcrc \
+ $(obj)tools/envcrc $(obj)tools/uflash/uflash \
$(obj)tools/gdb/{astest,gdbcont,gdbsend} \
$(obj)tools/gen_eth_addr$(obj)tools/img2srec \
$(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \
diff --git a/tools/Makefile b/tools/Makefile
index 8993fdd..e15c21e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -21,7 +21,7 @@
# MA 02111-1307 USA
#
-TOOLSUBDIRS =
+TOOLSUBDIRS = uflash
#
# Include this after HOSTOS HOSTARCH check
diff --git a/tools/uflash/Makefile b/tools/uflash/Makefile
new file mode 100644
index 000..8ade3c4
--- /dev/null
+++ b/tools/uflash/Makefile
@@ -0,0 +1,13 @@
+include $(TOPDIR)/config.mk
+
+all: $(obj)uflash
+
+HOSTCFLAGS_NOPED += -I $(SRCTREE)/include -DUSE_HOSTCC
+
+$(obj)uflash: $(SRCTREE)/tools/uflash/uflash.c $(SRCTREE)/lib/crc32.c
$(SRCTREE)/lib/errno.c
+ $(HOSTCC) $(HOSTCFLAGS_NOPED) $(HOSTLDFLAGS) -o $@ $^
+
+clean:
+ rm -f $(obj)uflash
+
+.PHONY: all clean
diff --git a/tools/uflash/README b/tools/uflash/README
new file mode 100644
index 000..8e9c22c
--- /dev/null
+++ b/tools/uflash/README
@@ -0,0 +1,125 @@
+This is a Linux command line tool specific to TI's Davinci platforms, for
+flashing UBL (User Boot Loader), u-boot and u-boot Environment in the MMC/SD
+card. This MMC/SD card can be used for booting Davinci platforms that supports
+MMC/SD boot option.
+
+For simplicity, MMC is used in the following section to represent both MMC and
+SD cards.
+
+
+Building uflash utility
+===
+Set the TOOLSUBDIRS macro in the tools/Makefile to contain uflash directory
+TOOLSUBDIRS = uflash
+
+While building the u-boot binary, the uflash utility is also built and is
placed
+under tools/uflash directory.
+
+
+Creating a Davinci bootable MMC card
+=
+This document is based on the assumption that UBL is used the primary boot
+loader for booting u-boot. For more information on Davinci Boot modes, please
+refer the TMS320DM644x DMSoC ARM Subsystem Reference Guide (SPRUE14A).
+
+The embedded ROM boot loader (RBL) in Davinci expects the bootable code
+descriptor to be present in sectors 1 to 25 of the MMC card. Sector 0 is used
+for storing DOS partition information. Hence the UBL descriptor is stored
+from sectors 1 till 24. The descriptor is 512 bytes in size and is replicated
+in each of these sectors. This is followed by the u-boot descriptor,
+environment space, UBL binary and u-boot binary as depicted below:
+
+___
+ | |
+ | Sector 0 - Partition Table |
+ |---|
+ |Sector 1 - UBL descriptor |
+ |---|
+ |Sector 2 - UBL descriptor |
+ |---|
+ | |
+ |---|
+ | Sector 24 - UBL descriptor |
+ |---|
+ | Sector 25 - u-boot descriptor|
+ |---|
+ | Sec
[U-Boot] [PATCH 1/3] KW: Move the memory register definitions into kirkwood.h
Signed-off-by: Marek Vasut Cc: Prafulla Wadaskar Cc: Wolfgang Denk --- arch/arm/cpu/arm926ejs/kirkwood/dram.c|2 -- arch/arm/include/asm/arch-kirkwood/kirkwood.h |4 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c b/arch/arm/cpu/arm926ejs/kirkwood/dram.c index 181b3e7..ccb6b03 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c @@ -30,8 +30,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define KW_REG_CPUCS_WIN_BAR(x)(KW_REGISTER(0x1500) + (x * 0x08)) -#define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + (x * 0x08)) /* * kw_sdram_bar - reads SDRAM Base Address Register */ diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h b/arch/arm/include/asm/arch-kirkwood/kirkwood.h index 47771d5..3933eac 100644 --- a/arch/arm/include/asm/arch-kirkwood/kirkwood.h +++ b/arch/arm/include/asm/arch-kirkwood/kirkwood.h @@ -77,6 +77,10 @@ #define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE #define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE +/* Kirkwood memory registers */ +#define KW_REG_CPUCS_WIN_BAR(x)(KW_REGISTER(0x1500) + ((x) * 0x08)) +#define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + ((x) * 0x08)) + #if defined (CONFIG_KW88F6281) #include #elif defined (CONFIG_KW88F6192) -- 1.7.10 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] KW: Add kw_adjust_dram() weak function
This function shall allow a board to adjust DRAM parameters in case
there are multiple versions of the board with different DRAM sizes.
Signed-off-by: Marek Vasut
Cc: Prafulla Wadaskar
Cc: Wolfgang Denk
---
arch/arm/cpu/arm926ejs/kirkwood/dram.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c
b/arch/arm/cpu/arm926ejs/kirkwood/dram.c
index ccb6b03..cdf0d21 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c
@@ -60,6 +60,15 @@ u32 kw_sdram_bs(enum memory_bank bank)
return result;
}
+/*
+ * kw_adjust_sdram - allow post init adjustment of DRAM size
+ */
+void __kw_adjust_dram(void)
+{
+}
+
+void kw_adjust_dram(void) __attribute__((weak, alias("__kw_adjust_dram")));
+
#ifndef CONFIG_SYS_BOARD_DRAM_INIT
int dram_init(void)
{
@@ -91,6 +100,8 @@ int dram_init(void)
gd->bd->bi_dram[i].size = 0;
}
+ kw_adjust_dram();
+
return 0;
}
--
1.7.10
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[U-Boot] [PATCH 3/3] Kirkwood: Add support for Ka-Ro TK71
Signed-off-by: Marek Vasut Cc: Prafulla Wadaskar Cc: Wolfgang Denk --- board/karo/tk71/Makefile | 45 +++ board/karo/tk71/kwbimage.cfg | 174 + board/karo/tk71/tk71.c | 178 ++ boards.cfg |1 + include/configs/tk71.h | 128 ++ 5 files changed, 526 insertions(+) create mode 100644 board/karo/tk71/Makefile create mode 100644 board/karo/tk71/kwbimage.cfg create mode 100644 board/karo/tk71/tk71.c create mode 100644 include/configs/tk71.h diff --git a/board/karo/tk71/Makefile b/board/karo/tk71/Makefile new file mode 100644 index 000..934e391 --- /dev/null +++ b/board/karo/tk71/Makefile @@ -0,0 +1,45 @@ +# +# Copyright (C) 2012 Marek Vasut +# on behalf of DENX Software Engineering GmbH +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := tk71.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/karo/tk71/kwbimage.cfg b/board/karo/tk71/kwbimage.cfg new file mode 100644 index 000..0166826 --- /dev/null +++ b/board/karo/tk71/kwbimage.cfg @@ -0,0 +1,174 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor +# Written-by: Prafulla Wadaskar +# +# adopted to TK71 by +# Nils Faerber +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x36543000 # DDR Controller Control Low +# bit 4:0=addr/cmd in smame cycle +# bit 5:0=clk is driven during self refresh, we don't care for APX +# bit 6:0=use recommended falling edge of clk for addr/cmd +# bit14:0=input buffer always powered up +# bit18:1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31:0=no additional STARTBURST delay + +DATA 0xFFD01408 0x1101355b # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20:TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x0034 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD
Re: [U-Boot] [Patch v2 1/2] Atmel : usb : add EHCI driver for Atmel SoC
Dear Bo Shen,
> Some Atmel SoC support USB EHCI, add the EHCI driver to support it.
>
> To enable the USB EHCI, add the following configuration options into
> board relative configuration file and remove USB OHCI options.
>
> #define CONFIG_USB_EHCI
> #define CONFIG_USB_EHCI_ATMEL
> #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
>
> Signed-off-by: Bo Shen
> ---
>
> Change since v1:
> Add WATCHDOG_RESET to avoid infinite loop.
>
> ---
> drivers/usb/host/Makefile |1 +
> drivers/usb/host/ehci-atmel.c | 68
> + 2 files changed, 69
> insertions(+)
> create mode 100644 drivers/usb/host/ehci-atmel.c
>
> diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
> index 59c3e57..4547f37 100644
> --- a/drivers/usb/host/Makefile
> +++ b/drivers/usb/host/Makefile
> @@ -36,6 +36,7 @@ COBJS-$(CONFIG_USB_SL811HS) += sl811-hcd.o
> # echi
> COBJS-$(CONFIG_USB_EHCI) += ehci-hcd.o
> COBJS-$(CONFIG_USB_EHCI_ARMADA100) += ehci-armada100.o utmi-armada100.o
> +COBJS-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o
> ifdef CONFIG_MPC512X
> COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-mpc512x.o
> else
> diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
> new file mode 100644
> index 000..21037fe
> --- /dev/null
> +++ b/drivers/usb/host/ehci-atmel.c
> @@ -0,0 +1,68 @@
> +/*
> + * (C) Copyright 2012
> + * Atmel Semiconductor
> + * Written-by: Bo Shen
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "ehci.h"
> +#include "ehci-core.h"
> +
> +int ehci_hcd_init(void)
> +{
> + at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> +
> + /* Enable UPLL */
Two spaces after UPLL, remove one.
> + writel(AT91_PMC_UPLLEN | AT91_PMC_BIASEN, &pmc->uckr);
> + while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU)
> + WATCHDOG_RESET();
Ok, this is an endless loop, can you add timeout?
> +
> + /* Enable USB Host clock */
> + writel(1 << ATMEL_ID_UHPHS, &pmc->pcer);
> +
> + hccr = (struct ehci_hccr *)ATMEL_BASE_EHCI;
> + hcor = (struct ehci_hcor *)((uint32_t)hccr +
> + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
> +
> + return 0;
> +}
> +
> +int ehci_hcd_stop(void)
> +{
> + at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
> +
> + /* Disable USB Host Clock */
> + writel(1 << ATMEL_ID_UHPHS, &pmc->pcdr);
> +
> + /* Disable UPLL */
> + writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr);
& ~XXX is enough, remove the () .
> + while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU)
> + WATCHDOG_RESET();
Ditto here
> +
> + return 0;
> +}
Otherwise it's good :-) One more rework and I'll apply it to usb tree.
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 2/3] KW: Add kw_adjust_dram() weak function
> -Original Message- > From: Marek Vasut [mailto:ma...@denx.de] > Sent: 26 June 2012 17:45 > To: u-boot@lists.denx.de > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > Subject: [PATCH 2/3] KW: Add kw_adjust_dram() weak function > > This function shall allow a board to adjust DRAM parameters in case > there are multiple versions of the board with different DRAM sizes. > > Signed-off-by: Marek Vasut > Cc: Prafulla Wadaskar > Cc: Wolfgang Denk > --- > arch/arm/cpu/arm926ejs/kirkwood/dram.c | 11 +++ Instead I would like to suggest to add function name as __kw_post_kwbconfig() This typically addresses to reconfigure the default configuration done by kwbimage.cfg, so the scope is not limited to DRAM configuration. Regards.. Prafulla . . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] Kirkwood: Add support for Ka-Ro TK71
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 26 June 2012 17:45
> To: u-boot@lists.denx.de
> Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk
> Subject: [PATCH 3/3] Kirkwood: Add support for Ka-Ro TK71
>
> Signed-off-by: Marek Vasut
> Cc: Prafulla Wadaskar
> Cc: Wolfgang Denk
> ---
> board/karo/tk71/Makefile | 45 +++
> board/karo/tk71/kwbimage.cfg | 174
> +
> board/karo/tk71/tk71.c | 178
> ++
> boards.cfg |1 +
> include/configs/tk71.h | 128 ++
> 5 files changed, 526 insertions(+)
> create mode 100644 board/karo/tk71/Makefile
> create mode 100644 board/karo/tk71/kwbimage.cfg
> create mode 100644 board/karo/tk71/tk71.c
> create mode 100644 include/configs/tk71.h
>
...snip...
> diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c
> new file mode 100644
> index 000..b2c1a62
> --- /dev/null
> +++ b/board/karo/tk71/tk71.c
> @@ -0,0 +1,178 @@
> +/*
> + * Copyright (C) 2012 Marek Vasut
> + * on behalf of DENX Software Engineering GmbH
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define TK71_OE_LOW (~0)
> +#define TK71_OE_HIGH (~0)
> +#define TK71_OE_VAL_LOW (0)
> +#define TK71_OE_VAL_HIGH (0)
> +
> +int board_early_init_f(void)
> +{
> + /*
> + * default gpio configuration
> + * There are maximum 64 gpios controlled through 2 sets of
> registers
> + * the below configuration configures mainly initial LED status
> + */
> + kw_config_gpio(TK71_OE_VAL_LOW,
> + TK71_OE_VAL_HIGH,
> + TK71_OE_LOW, TK71_OE_HIGH);
> +
> + /* Multi-Purpose Pins Functionality configuration */
> + u32 kwmpp_config[] = {
> + MPP0_NF_IO2,
> + MPP1_NF_IO3,
> + MPP2_NF_IO4,
> + MPP3_NF_IO5,
> + MPP4_NF_IO6,
> + MPP5_NF_IO7,
> + MPP6_SYSRST_OUTn,
> + MPP7_GPO,
> + MPP8_TW_SDA,
> + MPP9_TW_SCK,
> + MPP10_UART0_TXD,
> + MPP11_UART0_RXD,
> + MPP12_SD_CLK,
> + MPP13_SD_CMD,
> + MPP14_SD_D0,
> + MPP15_SD_D1,
> + MPP16_SD_D2,
> + MPP17_SD_D3,
> + MPP18_NF_IO0,
> + MPP19_NF_IO1,
> + MPP20_GE1_0,
> + MPP21_GE1_1,
> + MPP22_GE1_2,
> + MPP23_GE1_3,
> + MPP24_GE1_4,
> + MPP25_GE1_5,
> + MPP26_GE1_6,
> + MPP27_GE1_7,
> + MPP28_GPIO,
> + MPP29_GPIO,
> + MPP30_GE1_10,
> + MPP31_GE1_11,
> + MPP32_GE1_12,
> + MPP33_GE1_13,
> + MPP34_GPIO,
> + MPP35_GPIO,
> + MPP36_GPIO,
> + MPP37_GPIO,
> + MPP38_GPIO,
> + MPP39_GPIO,
> + MPP40_GPIO,
> + MPP41_GPIO,
> + MPP42_GPIO,
> + MPP43_GPIO,
> + MPP44_GPIO,
> + MPP45_GPIO,
> + MPP46_GPIO,
> + MPP47_GPIO,
> + MPP48_GPIO,
> + MPP49_GPIO,
> + 0
> + };
> + kirkwood_mpp_conf(kwmpp_config);
> +
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> + /*
> + * arch number of board
> + */
> + gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
> +
> + /* adress of boot parameters */
> + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
> +
> + return 0;
> +}
> +
> +void kw_adjust_dram(void)
> +{
> + unsigned long size = get_ram_size(PHYS_SDRAM_1,
> PHYS_SDRAM_1_SIZE);
> +
> + /* 256MB module, adjust BAR register */
> + if (size == 256 * 1024 * 1024)
> + writel(0x0ff1, KW_REG_CPUCS_WIN_SZ(0));
No hard coding please, please use register structures (preferred)
> +
> + gd->bd->bi_dram[0].si
Re: [U-Boot] [PATCH 3/3] Kirkwood: Add support for Ka-Ro TK71
Dear Prafulla Wadaskar,
> > -Original Message-
> > From: Marek Vasut [mailto:ma...@denx.de]
> > Sent: 26 June 2012 17:45
> > To: u-boot@lists.denx.de
> > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk
> > Subject: [PATCH 3/3] Kirkwood: Add support for Ka-Ro TK71
> >
> > Signed-off-by: Marek Vasut
> > Cc: Prafulla Wadaskar
> > Cc: Wolfgang Denk
> > ---
> >
> > board/karo/tk71/Makefile | 45 +++
> > board/karo/tk71/kwbimage.cfg | 174
> >
> > +
> >
> > board/karo/tk71/tk71.c | 178
> >
> > ++
> >
> > boards.cfg |1 +
> > include/configs/tk71.h | 128 ++
> > 5 files changed, 526 insertions(+)
> > create mode 100644 board/karo/tk71/Makefile
> > create mode 100644 board/karo/tk71/kwbimage.cfg
> > create mode 100644 board/karo/tk71/tk71.c
> > create mode 100644 include/configs/tk71.h
>
> ...snip...
>
> > diff --git a/board/karo/tk71/tk71.c b/board/karo/tk71/tk71.c
> > new file mode 100644
> > index 000..b2c1a62
> > --- /dev/null
> > +++ b/board/karo/tk71/tk71.c
> > @@ -0,0 +1,178 @@
> > +/*
> > + * Copyright (C) 2012 Marek Vasut
> > + * on behalf of DENX Software Engineering GmbH
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> > + * MA 02110-1301 USA
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +#define TK71_OE_LOW(~0)
> > +#define TK71_OE_HIGH (~0)
> > +#define TK71_OE_VAL_LOW(0)
> > +#define TK71_OE_VAL_HIGH (0)
> > +
> > +int board_early_init_f(void)
> > +{
> > + /*
> > +* default gpio configuration
> > +* There are maximum 64 gpios controlled through 2 sets of
> > registers
> > +* the below configuration configures mainly initial LED status
> > +*/
> > + kw_config_gpio(TK71_OE_VAL_LOW,
> > + TK71_OE_VAL_HIGH,
> > + TK71_OE_LOW, TK71_OE_HIGH);
> > +
> > + /* Multi-Purpose Pins Functionality configuration */
> > + u32 kwmpp_config[] = {
> > + MPP0_NF_IO2,
> > + MPP1_NF_IO3,
> > + MPP2_NF_IO4,
> > + MPP3_NF_IO5,
> > + MPP4_NF_IO6,
> > + MPP5_NF_IO7,
> > + MPP6_SYSRST_OUTn,
> > + MPP7_GPO,
> > + MPP8_TW_SDA,
> > + MPP9_TW_SCK,
> > + MPP10_UART0_TXD,
> > + MPP11_UART0_RXD,
> > + MPP12_SD_CLK,
> > + MPP13_SD_CMD,
> > + MPP14_SD_D0,
> > + MPP15_SD_D1,
> > + MPP16_SD_D2,
> > + MPP17_SD_D3,
> > + MPP18_NF_IO0,
> > + MPP19_NF_IO1,
> > + MPP20_GE1_0,
> > + MPP21_GE1_1,
> > + MPP22_GE1_2,
> > + MPP23_GE1_3,
> > + MPP24_GE1_4,
> > + MPP25_GE1_5,
> > + MPP26_GE1_6,
> > + MPP27_GE1_7,
> > + MPP28_GPIO,
> > + MPP29_GPIO,
> > + MPP30_GE1_10,
> > + MPP31_GE1_11,
> > + MPP32_GE1_12,
> > + MPP33_GE1_13,
> > + MPP34_GPIO,
> > + MPP35_GPIO,
> > + MPP36_GPIO,
> > + MPP37_GPIO,
> > + MPP38_GPIO,
> > + MPP39_GPIO,
> > + MPP40_GPIO,
> > + MPP41_GPIO,
> > + MPP42_GPIO,
> > + MPP43_GPIO,
> > + MPP44_GPIO,
> > + MPP45_GPIO,
> > + MPP46_GPIO,
> > + MPP47_GPIO,
> > + MPP48_GPIO,
> > + MPP49_GPIO,
> > + 0
> > + };
> > + kirkwood_mpp_conf(kwmpp_config);
> > +
> > + return 0;
> > +}
> > +
> > +int board_init(void)
> > +{
> > + /*
> > +* arch number of board
> > +*/
> > + gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
> > +
> > + /* adress of boot parameters */
> > + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
> > +
> > + return 0;
> > +}
> > +
> > +void kw_adjust_dram(void)
> > +{
> > + unsigned long size = get_ram_size(PHYS_SDRAM_1,
> > PHYS_SDRAM_1_SIZE);
> > +
> > + /* 256MB module
Re: [U-Boot] [PATCH 2/3] KW: Add kw_adjust_dram() weak function
Dear Prafulla Wadaskar, > > -Original Message- > > From: Marek Vasut [mailto:ma...@denx.de] > > Sent: 26 June 2012 17:45 > > To: u-boot@lists.denx.de > > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > > Subject: [PATCH 2/3] KW: Add kw_adjust_dram() weak function > > > > This function shall allow a board to adjust DRAM parameters in case > > there are multiple versions of the board with different DRAM sizes. > > > > Signed-off-by: Marek Vasut > > Cc: Prafulla Wadaskar > > Cc: Wolfgang Denk > > --- > > > > arch/arm/cpu/arm926ejs/kirkwood/dram.c | 11 +++ > > Instead I would like to suggest to add function name as > __kw_post_kwbconfig() what about using board_early_init_f() ? > This typically addresses to reconfigure the default configuration done by > kwbimage.cfg, so the scope is not limited to DRAM configuration. > > Regards.. > Prafulla . . . Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] KW: Add kw_adjust_dram() weak function
> -Original Message- > From: Marek Vasut [mailto:ma...@denx.de] > Sent: 26 June 2012 18:18 > To: Prafulla Wadaskar > Cc: u-boot@lists.denx.de; Wolfgang Denk > Subject: Re: [PATCH 2/3] KW: Add kw_adjust_dram() weak function > > Dear Prafulla Wadaskar, > > > > -Original Message- > > > From: Marek Vasut [mailto:ma...@denx.de] > > > Sent: 26 June 2012 17:45 > > > To: u-boot@lists.denx.de > > > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk > > > Subject: [PATCH 2/3] KW: Add kw_adjust_dram() weak function > > > > > > This function shall allow a board to adjust DRAM parameters in > case > > > there are multiple versions of the board with different DRAM > sizes. > > > > > > Signed-off-by: Marek Vasut > > > Cc: Prafulla Wadaskar > > > Cc: Wolfgang Denk > > > --- > > > > > > arch/arm/cpu/arm926ejs/kirkwood/dram.c | 11 +++ > > > > Instead I would like to suggest to add function name as > > __kw_post_kwbconfig() > > what about using board_early_init_f() ? I think that sound good. In that case you don't need to create any new function. Regards.. Prafulla . . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] Kirkwood: Add support for Ka-Ro TK71
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 26 June 2012 18:15
> To: Prafulla Wadaskar
> Cc: u-boot@lists.denx.de; Wolfgang Denk
> Subject: Re: [PATCH 3/3] Kirkwood: Add support for Ka-Ro TK71
>
> Dear Prafulla Wadaskar,
>
> > > -Original Message-
> > > From: Marek Vasut [mailto:ma...@denx.de]
> > > Sent: 26 June 2012 17:45
> > > To: u-boot@lists.denx.de
> > > Cc: Marek Vasut; Prafulla Wadaskar; Wolfgang Denk
> > > Subject: [PATCH 3/3] Kirkwood: Add support for Ka-Ro TK71
> > >
> > > Signed-off-by: Marek Vasut
> > > Cc: Prafulla Wadaskar
> > > Cc: Wolfgang Denk
> > > ---
> > >
> > > board/karo/tk71/Makefile | 45 +++
> > > board/karo/tk71/kwbimage.cfg | 174
...snip...
> > > +int board_init(void)
> > > +{
> > > + /*
> > > + * arch number of board
> > > + */
> > > + gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
> > > +
> > > + /* adress of boot parameters */
> > > + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +void kw_adjust_dram(void)
> > > +{
> > > + unsigned long size = get_ram_size(PHYS_SDRAM_1,
> > > PHYS_SDRAM_1_SIZE);
> > > +
> > > + /* 256MB module, adjust BAR register */
> > > + if (size == 256 * 1024 * 1024)
> > > + writel(0x0ff1, KW_REG_CPUCS_WIN_SZ(0));
> >
> > No hard coding please, please use register structures (preferred)
>
> Do we have any such structures defined ?
There are few structures in place but not for DRAM, let's do it, this was
missing part in early patches.
>
> > > +
> > > + gd->bd->bi_dram[0].size = size;
> > > + gd->ram_size = size;
> > > +}
> >
> > You have created kwbimage.cfg in this, it makes more sense to set
> 256MB
> > size by default in kwbimage.cfg. Or preferred use any existing
> > kwbimage.cfg (preferred)
>
> I don't think I follow. I always believe these are for setting up the
> platform,
> so at least one per platform is necessary.
Ideally YES, but if we have similar platforms and delta is very small like
tuning DRAM size, then for such things we can reuse existing one by supporting
additional post configuration using board_early_init_f()
This is something positive to avoid code duplication in a cleaner way.
>
> > The main idea of having such weak functions is to avoid code
> duplication
> > (kwbimage.cfg) for small manageable changes.
>
> But then, isn't this a bit out of scope of this patchset? Unifying
> kwbimages I
Yes, so please keep you board support patch separate (standalone)
>From DRAM patches.
Regards..
Prafulla . . .
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Re: [U-Boot] [RFC][PATCH] net: nfs: extend NFS_TIMEOUT
Hi Tetsuyuki, On Tue, Jun 26, 2012 at 3:52 AM, Wolfgang Denk wrote: > Dear Tetsuyuki Kobayashi, > > In message <4fe9711a.2090...@kmckk.co.jp> you wrote: >> >> >> Are you sure the problems are not in the board specific code? >> > OK. I will try the same thing on an in-tree board (maybe, panda board) to >> > check if this is board specific or not. >> >> I did on a panda board. It has the same problem and this patch solves it. So >> this is not board specific problem. Please consider to change global setting >> of NFS_TIMEOUT in nfs.c. > > net/nfs.c is not the right place to make board specific adjustments. > > I am still not convinced this is an issue with the global code. It > could be your NFS server as well. I'm not convinced either. It clearly depends on the speed of your server, the speed of the connection, the size of the file you are transferring, etc. > If there are really boards which need longer timeouts, these should be > set in the board config files. In fact I would rather the constant were not defined there at all... but it is. At a minimum it should look like this: #define HASHES_PER_LINE 65 /* Number of "loading" hashes per line */ #define NFS_RETRY_COUNT 30 +#ifdef CONFIG_NFS_TIMEOUT +#define NFS_TIMEOUT CONFIG_NFS_TIMEOUT +#else #define NFS_TIMEOUT 2000UL +#endif static int fs_mounted; static unsigned long rpc_id; ...with CONFIG_NFS_TIMEOUT defined for your board. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 09/14] arm/km: add support for external switch configuration
This patch add support for the configuration of an external switch from
the 88E6xxx series from Marvell trough an MDIO link using indirect
adressing. This can be used if we do not want to use an EEPROM for the
configuration.
This driver is not generic and was not tested on a lot of switches,
that's why we keep it in our keymile specific code, where the
assumptions of the implementations remain true.
Signed-off-by: Valentin Longchamp
---
changes for v2:
- nothing
changes for v3:
- more complete commit message
board/keymile/common/common.h |7 --
board/keymile/km_arm/managed_switch.c | 169 +++--
board/keymile/km_arm/managed_switch.h | 99 +++
3 files changed, 258 insertions(+), 17 deletions(-)
create mode 100644 board/keymile/km_arm/managed_switch.h
diff --git a/board/keymile/common/common.h b/board/keymile/common/common.h
index c58e565..e9abfcd 100644
--- a/board/keymile/common/common.h
+++ b/board/keymile/common/common.h
@@ -125,13 +125,6 @@ struct bfticu_iomap {
int ethernet_present(void);
int ivm_read_eeprom(void);
-
-int ext_switch_reg_write(const char *devname, u8 phy_addr, u8 port,
- u8 reg, u16 data);
-int ext_switch_reg_read(const char *devname, u8 phy_addr, u8 port,
- u8 reg, u16 *data);
-
-
int trigger_fpga_config(void);
int wait_for_fpga_config(void);
int fpga_reset(void);
diff --git a/board/keymile/km_arm/managed_switch.c
b/board/keymile/km_arm/managed_switch.c
index 482c18d..3b022cd 100644
--- a/board/keymile/km_arm/managed_switch.c
+++ b/board/keymile/km_arm/managed_switch.c
@@ -25,15 +25,43 @@
#include
#include
-#define SMI_HDR((0x8 | 0x1) << 12)
-#define SMI_BUSY_MASK (0x8000)
-#define SMIRD_OP (0x2 << 10)
-#define SMIWR_OP (0x1 << 10)
-#define SMI_MASK 0x1f
-#define PORT_SHIFT 5
+#include "managed_switch.h"
-#define COMMAND_REG0
-#define DATA_REG 1
+#if defined(CONFIG_KM_NUSA)
+struct switch_reg sw_conf[] = {
+ /* port 0, PIGY4, autoneg */
+ { PORT(0), PORT_PHY, NO_SPEED_FOR },
+ { PORT(0), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
+ { PHY(0), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
+ FULL_DUPLEX },
+ { PHY(0), PHY_SPEC_CTRL, AUTO_MDIX_EN },
+ /* port 1, unused */
+ { PORT(1), PORT_CTRL, PORT_DIS },
+ { PHY(1), PHY_CTRL, PHY_PWR_DOWN },
+ { PHY(1), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
+ /* port 2, unused */
+ { PORT(2), PORT_CTRL, PORT_DIS },
+ { PHY(2), PHY_CTRL, PHY_PWR_DOWN },
+ { PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
+ /* port 3, unused */
+ { PORT(3), PORT_CTRL, PORT_DIS },
+ { PHY(3), PHY_CTRL, PHY_PWR_DOWN },
+ { PHY(3), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
+ /* port 4, ICNEV, SerDes, SGMII */
+ { PORT(4), PORT_STATUS, NO_PHY_DETECT },
+ { PORT(4), PORT_PHY, SPEED_1000_FOR },
+ { PORT(4), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
+ { PHY(4), PHY_CTRL, PHY_PWR_DOWN },
+ { PHY(4), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
+ /* port 5, CPU_RGMII */
+ { PORT(5), PORT_PHY, RX_RGMII_TIM | TX_RGMII_TIM | FLOW_CTRL_EN |
+ FLOW_CTRL_FOR | LINK_VAL | LINK_FOR | FULL_DPX |
+ FULL_DPX_FOR | SPEED_1000_FOR },
+ { PORT(5), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
+ /* port 6, unused, this port has no phy */
+ { PORT(6), PORT_CTRL, PORT_DIS },
+};
+#endif
static int ext_switch_wait_rdy(const char *devname, u8 phy_addr)
{
@@ -59,7 +87,7 @@ static int ext_switch_wait_rdy(const char *devname, u8
phy_addr)
return 0;
}
-int ext_switch_reg_read(const char *devname, u8 phy_addr, u8 port,
+static int ext_switch_reg_read(const char *devname, u8 phy_addr, u8 port,
u8 reg, u16 *data)
{
int ret;
@@ -85,7 +113,7 @@ int ext_switch_reg_read(const char *devname, u8 phy_addr, u8
port,
return ret;
}
-int ext_switch_reg_write(const char *devname, u8 phy_addr, u8 port,
+static int ext_switch_reg_write(const char *devname, u8 phy_addr, u8 port,
u8 reg, u16 data)
{
int ret;
@@ -114,6 +142,127 @@ int ext_switch_reg_write(const char *devname, u8
phy_addr, u8 port,
return 0;
}
+static int ppu_enable(const char *devname, u8 phy_addr)
+{
+ int i, ret = 0;
+ u16 reg;
+
+ ret = ext_switch_reg_read(devname, phy_addr, GLOBAL, GLOBAL_CTRL, ®);
+ if (ret) {
+ printf("%s: Error reading global ctrl reg\n", __func__);
+ return ret;
+ }
+
+ reg |= PPU_ENABLE;
+
+ ret = ext_switch_reg_write(devname, phy_addr, GLOBAL, GLOBAL_CTRL, reg);
+ if (ret) {
+ printf("%s: Error writing global ctrl reg\n", __func__);
+ return ret;
+ }
+
+ for (i = 0; i < 1000; i++) {
+ ext_switch_reg_read(devname, phy_addr, GLOBAL, GLOBAL_STATUS,
+ ®);
+ if ((reg & 0xc000) == 0xc000)
+
Re: [U-Boot] [PATCH] arm: bugfix: Move vector table before jumping relocated code
On 06/25/2012 07:03 PM, Tetsuyuki Kobayashi wrote: > Hello, > > (06/26/2012 12:10 AM), Stephen Warren wrote: >> On 06/25/2012 06:40 AM, Tetsuyuki Kobayashi wrote: >>> Interrupts and exceptions doesn't work in relocated code. >>> It badly use IRQ_STACK_START_IN in rom area as interrupt stack. >>> It is because the vecotr table is not moved to ram area. >>> This patch moves vector table before jumping relocated code. >>> >>> Signed-off-by: Tetsuyuki Kobayashi >> >> CC'ing in some Tegra people. >> >> Tetsuyuki, you probably want to CC some OMAP people too. > > Thank you. > I don't know proper person to CC because I am very new in this ML. > I need some help .. > > '#if condition' in my patch is the same as the code setting VBAR right after > reset. > (in file arch/arm/cpu/armv7/start.S) I imagine the primary ARM custodian and the TI ARM sub-arch custodian (both now CC'd) would be a good place to start. You'd need to CC them anyway in order to get this patch checked in. >>> --- >>> arch/arm/cpu/armv7/start.S | 12 >>> 1 file changed, 12 insertions(+) >>> >>> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S >>> index 52f7f6e..5098f7b 100644 >>> --- a/arch/arm/cpu/armv7/start.S >>> +++ b/arch/arm/cpu/armv7/start.S >>> @@ -277,6 +277,18 @@ jump_2_ram: >>> mcr p15, 0, r0, c7, c10, 4 @ DSB >>> mcr p15, 0, r0, c7, c5, 4 @ ISB >>> #endif >>> +/* >>> + * Move vector table >>> + */ >>> +#if !defined(CONFIG_TEGRA2) >>> +#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) >>> + /* Set vector address in CP15 VBAR register */ >>> + ldr r0, =_start >>> + add r0, r0, r9 >>> + mcr p15, 0, r0, c12, c0, 0 @Set VBAR >>> +#endif >>> +#endif /* !Tegra2 */ >>> + >>> ldr r0, _board_init_r_ofs >>> adr r1, _start >>> add lr, r0, r1 >> >> > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] microblaze: Enable ubi support
Am Dienstag, den 26.06.2012, 10:52 +0200 schrieb Michal Simek: > 2012/6/25 Stephan Linz : > > Am Montag, den 25.06.2012, 09:22 +0200 schrieb Wolfgang Denk: > >> Dear Michal Simek, > >> > >> In message <4fe7f154.80...@monstr.eu> you wrote: > >> > On 06/21/2012 09:42 PM, Stephan Linz wrote: > >> > > To save memory the UBIFS is disabled by default. > >> > > > >> > > The original patch was introdused with commit: > >> > > 0114da7b06bd47b7f5c3f20a152dd11903b38fba > >> > > >> > This say nothing to me. > >> > Format is Patch name and when sha1. > >> > > >> > Where is this patch? I can't see it in mainline repository? > >> > >> Correct. This commit does not exist in mainline. > > > > Yes, the commit was newer merged into mainline and lives for more than > > one year in Microblaze custodian repo: > > > > http://git.denx.de/?p=u-boot/u-boot-microblaze.git;a=commitdiff;h=0114da7b06bd47b7f5c3f20a152dd11903b38fba > > I have there two branches - master and uboot. uboot follows mainline > branch and master contain one your patch > which was merged to mainline. > That link is correct but it points to nonexisting branch. > That patch was definitely there but that branch was delete quite some time > ago. Yes, it was in the net (?) branch that was deleted sometime. > > Wolfgang: How to run git-gc on this repository? > > I am ok to add this to mainline. Please add that two patches together > and resubmit. I'll do so (three patches -- see my other comment). > Also I would prefer to define SYS_MALLOC_LEN based on SIZE. > It means for example > #defineCONFIG_SYS_MALLOC_LEN (SIZE *2) > or similar. OK, I'll evaluate the best factor for this multiplication. br, Stephan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] microblaze: avoid compile error on systems without cfi flash
Am Dienstag, den 26.06.2012, 10:56 +0200 schrieb Michal Simek: > 2012/6/25 Stephan Linz : > > Am Montag, den 25.06.2012, 06:55 +0200 schrieb Michal Simek: > >> On 06/21/2012 09:42 PM, Stephan Linz wrote: > >> > Use XILINX_FLASH_START to set/unset FLASH and RAMENV. > >> > > >> > Error was: > >> > board.c: In function 'board_init': > >> > board.c:134: error: 'XILINX_FLASH_START' undeclared (first use in this > >> > function) > >> > board.c:134: error: (Each undeclared identifier is reported only once > >> > board.c:134: error: for each function it appears in.) > >> > > >> > Signed-off-by: Stephan Linz > >> > --- > >> > include/configs/microblaze-generic.h | 14 +- > >> > 1 files changed, 9 insertions(+), 5 deletions(-) > >> > > >> > --snip-- > >> > >> What's wrong with hardware flash protection? > > > > Nothing, but it will defined twice. One time in line 182 and one time in > > that line 204. I think the last one is wrong, because that define is > > outside the Flash configuration context, or not? > > > > Sorry, I should split the patch. Should I do this? > > Two ways. > 1. write it to description > 2. create separate patch > > Option 2 is IMHO better. Yes I do so. I'll split the patch and resubmit together with the UBI support patch. br, Stephan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net/sh-ether: Fix build by removing ECSIPR_BRCRXIP and other
Hi Nobuhiro Iwamatsu, On Mon, Jun 25, 2012 at 11:18 PM, Nobuhiro Iwamatsu wrote: > Hi, > > Joe, could you pick-up ths patch to your network repository? > This is bug fix to 201207. Yes. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] net/sh-ether: Fix build by removing ECSIPR_BRCRXIP and other
On Tue, Jun 26, 2012 at 1:03 PM, Joe Hershberger wrote: > Hi Nobuhiro Iwamatsu, > > On Mon, Jun 25, 2012 at 11:18 PM, Nobuhiro Iwamatsu > wrote: >> Hi, >> >> Joe, could you pick-up ths patch to your network repository? >> This is bug fix to 201207. > > Yes. Applied, thanks. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC][PATCH] net: nfs: extend NFS_TIMEOUT
On 06/26/2012 10:30 AM, Joe Hershberger wrote: > Hi Tetsuyuki, > > On Tue, Jun 26, 2012 at 3:52 AM, Wolfgang Denk wrote: >> Dear Tetsuyuki Kobayashi, >> >> In message <4fe9711a.2090...@kmckk.co.jp> you wrote: >>> > Are you sure the problems are not in the board specific code? OK. I will try the same thing on an in-tree board (maybe, panda board) to check if this is board specific or not. >>> >>> I did on a panda board. It has the same problem and this patch solves it. >>> So this is not board specific problem. Please consider to change global >>> setting of NFS_TIMEOUT in nfs.c. >> >> net/nfs.c is not the right place to make board specific adjustments. >> >> I am still not convinced this is an issue with the global code. It >> could be your NFS server as well. > > I'm not convinced either. It clearly depends on the speed of your > server, the speed of the connection, the size of the file you are > transferring, etc. Is the timeout for completing the transfer, or for making forward progress? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC][PATCH] net: nfs: extend NFS_TIMEOUT
Hi Scott, On Tue, Jun 26, 2012 at 1:34 PM, Scott Wood wrote: > On 06/26/2012 10:30 AM, Joe Hershberger wrote: >> Hi Tetsuyuki, >> >> On Tue, Jun 26, 2012 at 3:52 AM, Wolfgang Denk wrote: >>> Dear Tetsuyuki Kobayashi, >>> >>> In message <4fe9711a.2090...@kmckk.co.jp> you wrote: >> Are you sure the problems are not in the board specific code? > OK. I will try the same thing on an in-tree board (maybe, panda board) to > check if this is board specific or not. I did on a panda board. It has the same problem and this patch solves it. So this is not board specific problem. Please consider to change global setting of NFS_TIMEOUT in nfs.c. >>> >>> net/nfs.c is not the right place to make board specific adjustments. >>> >>> I am still not convinced this is an issue with the global code. It >>> could be your NFS server as well. >> >> I'm not convinced either. It clearly depends on the speed of your >> server, the speed of the connection, the size of the file you are >> transferring, etc. > > Is the timeout for completing the transfer, or for making forward progress? The timeout is reset each time that NetSetTimeout() is called. For NFS, that happens when a transfer starts, when the timeout occurs (a retry begins), and when a "read request" response comes from the server. I would bet that means it should be a timeout for making progress, but I'm not an NFS protocol expert. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] KW: Move the memory register definitions into kirkwood.h
Also add the CPUCS register definition. Signed-off-by: Marek Vasut Cc: Prafulla Wadaskar Cc: Wolfgang Denk --- arch/arm/cpu/arm926ejs/kirkwood/dram.c|2 -- arch/arm/include/asm/arch-kirkwood/kirkwood.h |9 + 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/kirkwood/dram.c b/arch/arm/cpu/arm926ejs/kirkwood/dram.c index 181b3e7..ccb6b03 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/dram.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/dram.c @@ -30,8 +30,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define KW_REG_CPUCS_WIN_BAR(x)(KW_REGISTER(0x1500) + (x * 0x08)) -#define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + (x * 0x08)) /* * kw_sdram_bar - reads SDRAM Base Address Register */ diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h b/arch/arm/include/asm/arch-kirkwood/kirkwood.h index 47771d5..33ae827 100644 --- a/arch/arm/include/asm/arch-kirkwood/kirkwood.h +++ b/arch/arm/include/asm/arch-kirkwood/kirkwood.h @@ -77,6 +77,15 @@ #define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE #define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE +/* Kirkwood memory registers */ +#define KW_REG_CPUCS_WIN_BAR(x)(KW_REGISTER(0x1500) + ((x) * 0x08)) +#define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + ((x) * 0x08)) + +#define KW_REG_CPUCS_WIN_ENABLE(1 << 0) +#define KW_REG_CPUCS_WIN_WR_PROTECT(1 << 1) +#define KW_REG_CPUCS_WIN_WIN0_CS(x)(((x) & 0x3) << 2) +#define KW_REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24) + #if defined (CONFIG_KW88F6281) #include #elif defined (CONFIG_KW88F6192) -- 1.7.10 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] Kirkwood: Add support for Ka-Ro TK71
Signed-off-by: Marek Vasut Cc: Prafulla Wadaskar Cc: Wolfgang Denk --- board/karo/tk71/Makefile | 45 +++ board/karo/tk71/kwbimage.cfg | 174 ++ board/karo/tk71/tk71.c | 174 ++ boards.cfg |1 + include/configs/tk71.h | 128 +++ 5 files changed, 522 insertions(+) create mode 100644 board/karo/tk71/Makefile create mode 100644 board/karo/tk71/kwbimage.cfg create mode 100644 board/karo/tk71/tk71.c create mode 100644 include/configs/tk71.h diff --git a/board/karo/tk71/Makefile b/board/karo/tk71/Makefile new file mode 100644 index 000..934e391 --- /dev/null +++ b/board/karo/tk71/Makefile @@ -0,0 +1,45 @@ +# +# Copyright (C) 2012 Marek Vasut +# on behalf of DENX Software Engineering GmbH +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := tk71.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/karo/tk71/kwbimage.cfg b/board/karo/tk71/kwbimage.cfg new file mode 100644 index 000..0166826 --- /dev/null +++ b/board/karo/tk71/kwbimage.cfg @@ -0,0 +1,174 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor +# Written-by: Prafulla Wadaskar +# +# adopted to TK71 by +# Nils Faerber +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x36543000 # DDR Controller Control Low +# bit 4:0=addr/cmd in smame cycle +# bit 5:0=clk is driven during self refresh, we don't care for APX +# bit 6:0=use recommended falling edge of clk for addr/cmd +# bit14:0=input buffer always powered up +# bit18:1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31:0=no additional STARTBURST delay + +DATA 0xFFD01408 0x1101355b # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20:TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x0034 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xF
Re: [U-Boot] [PATCH 6/9] CACHE: nand read/write: Test if start address is aligned
On 06/25/2012 08:33 PM, Marek Vasut wrote: > Dear Scott Wood, > >> On 06/25/2012 06:37 PM, Marek Vasut wrote: >>> Dear Scott Wood, >>> On 06/24/2012 07:17 PM, Marek Vasut wrote: > but that involves a lot of copying and therefore degrades performance > rapidly. Therefore disallow this possibility of unaligned load > address altogether if data cache is on. How about use the bounce buffer only if the address is misaligned? >>> >>> Not happening, bounce buffer is bullshit, >> >> Hacking up the common frontend with a new limitation because you can't >> be bothered to fix your drivers is bullshit. > > The drivers are not broken, they have hardware limitations. They're broken because they ignore those limitations. > And checking for > those has to be done as early as possible. Why? > And it's not a new common frontend! No, it's a compatibility-breaking change to the existing common frontend. >>> It's like driving a car in the wrong lane. Sure, you can do it, but it'll >>> eventually have some consequences. And using a bounce buffer is like >>> driving a tank in the wrong lane ... >> >> Using a bounce buffer is like parking your car before going into the >> building, rather than insisting the building's hallways be paved. > > The other is obviously faster, more comfortable and lets you carry more stuff > at > once. Then you end up needing buildings to be many times as large to give every cubicle an adjacent parking spot, maneuvering room, etc. You'll be breathing fumes all day, and it'll be a lot less comfortable to get even across the hallway without using a car, etc. Communication between coworkers would be limited to horns and obscene gestures. :-) > And if you drive a truck, you can dump a lot of payload instead of > carrying it back and forth from the building. That's why there's a special > garage for trucks possibly with cargo elevators etc. Yes, it's called targeted optimization rather than premature optimization. The corrective action a user has to take is the same as with this patch, except for an additional option of living with the slight performance penalty. >>> >>> Slight is very weak word here. >> >> Prove me wrong with benchmarks. > > Well, copying data back and forth is tremendous overhead. You don't need a > benchmark to calculate something like this: > > 133MHz SDRAM (pumped) gives you what ... 133 Mb/s throughput You're saying you get only a little more bandwidth from memory than you'd get from a 100 Mb/s ethernet port? Come on. Data buses are not one bit wide. And how fast can you pull data out of a NAND chip, even with DMA? > (now if it's DDR, dual/quad pumped, that doesn't give you any more advantage So such things were implemented for fun? > since you have to: send address, read the data, send address, write the data > ... What about bursts? I'm pretty sure you don't have to send the address separately for every single byte. > this is expensive ... without data cache on, even more so) Why do we care about "without data cache"? You don't need the bounce buffer in that case. > Now consider you do it via really dump memcpy, what happens: It looks like ARM U-Boot has an optimized memcpy. > 1) You need to read the data into register > 1a) Send address > 1b) Read the data into register > 2) You need to write the data to a new location > 2a) Send address > 2b) Write the data into the memory > > In the meantime, you get some refresh cycles etc. Now, if you take read and > write in 1 time unit and "send address" in 0.5 time unit (this gives total 3 > time units per one loop) and consider you're not doing sustained read/write, > you > should see you'll be able to copy at speed of about 133/3 ~= 40Mb/s > > If you want to load 3MB kernel at 40Mb/s onto an unaligned address via DMA, > the > DMA will deploy it via sustained write, that'll be at 10MB/s, therefore in > 300ms. But the subsequent copy will take another 600ms. On a p5020ds, using NAND hardware that doesn't do DMA at all, I'm able to load a 3MiB image from NAND in around 300-400 ms. This is with using memcpy_fromio() on an uncached hardware buffer. Again, I'm not saying that bounce buffers are always negligible overhead -- just that I doubt NAND is fast enough that it makes a huge difference in this specific case. How often does this actually happen? How much does it actually slow things down compared to the speed of the NAND chip? >>> >>> If the user is dumb, always. But if you tell the user how to milk the >>> most of the hardware, he'll be happier. >> >> So, if you use bounce buffers conditionally (based on whether the >> address is misaligned), there's no impact except to "dumb" users, and >> for those users they would merely get a performance degradation rather >> than breakage. How is this "bullshit"? > > Correct, but users will complain if they get a subpar performance. If you expend the minimal effort required to make the
Re: [U-Boot] [PATCH 6/9] CACHE: nand read/write: Test if start address is aligned
On 06/25/2012 08:16 PM, Marek Vasut wrote: > Dear Scott Wood, >> Note that in the case of "nand read.oob", depending on NAND page size >> and platform, there's a good chance that you're imposing an alignment >> restriction that is larger than the data being transferred even if the >> user asks to read the entire OOB. > > I don't think I completely follow here. Why should I need to have 64-byte alignment for transfering a 16-byte OOB? >> What about "nand write.yaffs2" or multi-page "nand read.raw", which deal >> with arrays of interleaved main+spare? With a small page NAND chip, >> you'll need cache lines that are 16 bytes or smaller to avoid unaligned >> transactions -- and those will bypass your front-end check (unless the >> user is so "stupid" as to want to modify the data after a raw-read, and >> do a raw-write of a particular page). > > Ok, I think I'm very stupid now, probably since I have high fever. I'll read > this after I sleep. Sorry Scott, I'm sure you're rolling out a valid point, > it's > just that I'm incapable of understanding it right now. Probably best to wait until you're feeling better for the rest of it, too. Hope you get well soon. In the specific case of NAND, how many NAND drivers use DMA at all? >>> >>> Many do, >> >> How many? Specifically, how many that have alignment restrictions, that >> would need to be fixed? > > At least all on the ARM architecture. And more will come, since ARM is on the > rise. atmel: no, doesn't use DMA davinci: no, doesn't use DMA kb9202: no, doesn't use DMA kirkwood: no, doesn't use DMA mxc: I don't think this uses DMA, but this driver scares me. :-) mxs: Even scarier. Looks like this one does use DMA. omap_gpmc: no, doesn't use DMA s3c64xx: no, doesn't use DMA spr: no, doesn't use DMA s3c2410: no, doesn't use DMA If this is about not wanting to touch the mxs_nand driver again, I sympathize. :-) >>> it's not only nand, it's all over the place. >> >> This patch is about NAND. > > Check the whole patchset ... and that still only covers a small part of it > all. Right, I think it's wrong elsewhere too when it's user interface, but I'll let the relevant custodians argue those cases. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/9] CACHE: nand read/write: Test if start address is aligned
Dear Scott Wood, > On 06/25/2012 08:33 PM, Marek Vasut wrote: > > Dear Scott Wood, > > > >> On 06/25/2012 06:37 PM, Marek Vasut wrote: > >>> Dear Scott Wood, > >>> > On 06/24/2012 07:17 PM, Marek Vasut wrote: > > but that involves a lot of copying and therefore degrades performance > > rapidly. Therefore disallow this possibility of unaligned load > > address altogether if data cache is on. > > How about use the bounce buffer only if the address is misaligned? > >>> > >>> Not happening, bounce buffer is bullshit, > >> > >> Hacking up the common frontend with a new limitation because you can't > >> be bothered to fix your drivers is bullshit. > > > > The drivers are not broken, they have hardware limitations. > > They're broken because they ignore those limitations. > > > And checking for > > those has to be done as early as possible. > > Why? Why keep an overhead. > > And it's not a new common frontend! > > No, it's a compatibility-breaking change to the existing common frontend. Well, those are corner cases, it's not like the people will start hitting it en- masse. I agree it should be somehow platform or even CPU specific. > >>> It's like driving a car in the wrong lane. Sure, you can do it, but > >>> it'll eventually have some consequences. And using a bounce buffer is > >>> like driving a tank in the wrong lane ... > >> > >> Using a bounce buffer is like parking your car before going into the > >> building, rather than insisting the building's hallways be paved. > > > > The other is obviously faster, more comfortable and lets you carry more > > stuff at once. > > Then you end up needing buildings to be many times as large to give > every cubicle an adjacent parking spot, maneuvering room, etc. You'll > be breathing fumes all day, and it'll be a lot less comfortable to get > even across the hallway without using a car, etc. Communication between > coworkers would be limited to horns and obscene gestures. :-) Ok, this has gone waaay out of hand here :-) > > And if you drive a truck, you can dump a lot of payload instead of > > carrying it back and forth from the building. That's why there's a > > special garage for trucks possibly with cargo elevators etc. > > Yes, it's called targeted optimization rather than premature optimization. > > The > corrective action a user has to take is the same as with this patch, > except for an additional option of living with the slight performance > penalty. > >>> > >>> Slight is very weak word here. > >> > >> Prove me wrong with benchmarks. > > > > Well, copying data back and forth is tremendous overhead. You don't need > > a benchmark to calculate something like this: > > > > 133MHz SDRAM (pumped) gives you what ... 133 Mb/s throughput > > You're saying you get only a little more bandwidth from memory than > you'd get from a 100 Mb/s ethernet port? Come on. Data buses are not > one bit wide. Good point, it was too late and I forgot to count that in. > And how fast can you pull data out of a NAND chip, even with DMA? > > > (now if it's DDR, dual/quad pumped, that doesn't give you any more > > advantage > > So such things were implemented for fun? > > > since you have to: send address, read the data, send address, write the > > data ... > > What about bursts? I'm pretty sure you don't have to send the address > separately for every single byte. If you do memcpy? You only have registers, sure, you can optimize it, but on intel for example, you don't have many of those. > > this is expensive ... without data cache on, even more so) > > Why do we care about "without data cache"? You don't need the bounce > buffer in that case. Correct, it's expensive in both cases though. > > Now consider you do it via really dump memcpy, what happens: > It looks like ARM U-Boot has an optimized memcpy. > > > 1) You need to read the data into register > > 1a) Send address > > 1b) Read the data into register > > 2) You need to write the data to a new location > > 2a) Send address > > 2b) Write the data into the memory > > > > In the meantime, you get some refresh cycles etc. Now, if you take read > > and write in 1 time unit and "send address" in 0.5 time unit (this gives > > total 3 time units per one loop) and consider you're not doing sustained > > read/write, you should see you'll be able to copy at speed of about > > 133/3 ~= 40Mb/s > > > > If you want to load 3MB kernel at 40Mb/s onto an unaligned address via > > DMA, the DMA will deploy it via sustained write, that'll be at 10MB/s, > > therefore in 300ms. But the subsequent copy will take another 600ms. > > On a p5020ds, using NAND hardware that doesn't do DMA at all, I'm able > to load a 3MiB image from NAND in around 300-400 ms. This is with using > memcpy_fromio() on an uncached hardware buffer. blazing almost half a second ... but everyone these days wants a faster boot, without memcpy, it can go down to 100ms or even less! And thi
Re: [U-Boot] [PATCH] arm: enable unaligned access on ARMv7
On 06/22/2012 04:15 AM, Albert ARIBAUD wrote: > Hi Lucas, > > On Tue, 05 Jun 2012 21:06:20 +0200, Lucas Stach wrote: >> Hi Stephen, >> >> Am Dienstag, den 05.06.2012, 12:42 -0600 schrieb Stephen Warren: >>> On 06/05/2012 11:47 AM, Lucas Stach wrote: Recent toolchains default to using the hardware feature for unaligned access on ARM v7, rather than doing the software fallback. According to ARM this is safe as all v7 implementations have to support this feature. (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471c/BABJFFAE.html) To avoid CPU hangs when doing unaligned memory access, we have to turn off alignment checking in our CPU initialisation code. (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0491c/CIHCGCFD.html) >>> >>> Does this behavior change trickle down to Linux/... too, or would >>> an OS completely re-initialize this state, and hence not be >>> affected? >>> >> >> Linux in particular does reinitialize this state and I expect any >> reasonable OS to do so. > > Then what is the point of enabling it on U-Boot? Does it fix some issue > whereby some mis-aligned piece of data cannot be properly aligned? > This is a new optimization feature in gcc 4.7 (and backported to some 4.6 versions like the ubuntu 12.04 arm cross compiler (4.6.3)): http://lists.linaro.org/pipermail/linaro-dev/2012-June/012360.html http://seabright.co.nz/2012/06/11/kernel-not-booting-with-linaro-gcc/ If you don't want to enable unaligned accesses, then "-mno-unaligned-access" needs to be added. Regards, Rob ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: rmobile: kzm9g: Adjust hardware setting in lowlevel_init.S
Hi Tetsuyuki, On Tue, 26 Jun 2012 11:30:16 +0900, Tetsuyuki Kobayashi wrote: > This patch depends on > Nobuhiro Iwamatsu's arm: rmobile: Add supoprt for KMC KZM-A9-GT board > Tetsuyuki Kobayashi's arm: rmobile: kzm9g: Modify sdram area Seems like a series to me -- you should post it as such, with patches numbered 1/N, 2/N etc. Should be easy as you probably already have them as a series of commits above master; git format-patch should generate the mails alright. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] USB: EHCI: Initialize multiple USB controllers at once
Dear Jim Lin, In message <4b9c9637d5087840a465bdcb251780e9e2d6eda...@hkmail02.nvidia.com> you wrote: > Add support for command line "usb reset" or "usb start" to initialize > , "usb stop" to stop multiple USB controllers at once. > Other commands like "usb tree" also support multiple controllers. Why would this be needed? U-Boot is not multi-tasking, so you can always access only a single USB device at a time ayway. And it is a decoumented design principle that U-Boot must not initialize any devices it does not use itself. So why? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A failure will not appear until a unit has passed final inspection. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Davinci: Utility for MMC boot
Dear Prabhakar Lad,
In message <1340708826-26707-1-git-send-email-prabhakar@ti.com> you wrote:
> From: Alagu Sankar
>
> This is a Linux command line tool specific to TI's Davinci platforms, for
> flashing UBL (User Boot Loader), u-boot and u-boot Environment in the MMC/SD
> card. This MMC/SD card can be used for booting Davinci platforms that supports
> MMC/SD boot option.
Do we also build UBL as part of the U-Boot source tree?
If not, then why is this tool supposed to be part of the U-Boot tree?
How does this work with a SPL?
> --- a/Makefile
> +++ b/Makefile
> @@ -726,7 +726,7 @@ clean:
> @rm -f $(obj)examples/api/demo{,.bin}
> @rm -f $(obj)tools/bmp_logo$(obj)tools/easylogo/easylogo \
> $(obj)tools/env/{fw_printenv,fw_setenv}\
> -$(obj)tools/envcrc \
> +$(obj)tools/envcrc $(obj)tools/uflash/uflash \
> $(obj)tools/gdb/{astest,gdbcont,gdbsend} \
> $(obj)tools/gen_eth_addr$(obj)tools/img2srec \
> $(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \
Please keep list sorted.
> +e. Using the 'uflash' utility, place the UBL and u-uoot binaries on the MMC
> + card. Copy the u-boot.bin to tools/uflash directory
Why is this copy operation needed?
And where is the UBL binary coming from?
> diff --git a/tools/uflash/config.txt b/tools/uflash/config.txt
> new file mode 100644
> index 000..f6acb22
> --- /dev/null
> +++ b/tools/uflash/config.txt
> @@ -0,0 +1,11 @@
> +bootargs=console=ttyS0,115200n8 root=/dev/mmcblk0p1 rootwait rootfstype=ext3
> rw
> +bootcmd=ext2load mmc 0 0x8070 boot/uImage; bootm 0x8070
> +bootdelay=1
> +baudrate=115200
> +bootfile="uImage"
> +stdin=serial
> +stdout=serial
> +stderr=serial
> +ethact=dm9000
> +videostd=ntsc
This looks like U-Boot environment settings? Why are these in the
tools/uflash/ directory? I would expect these are board specific?
For example, what in case a board uses a different baud rate?
Is this really supposed to be board independent? It doesn't look
so...
> +
And please, no trailing empty lines!
...
> + if (!strcmp(platform, "DM3XX")) {
> + if (!uboot_load_address)
> + uboot_load_address = DM3XX_UBOOT_LOAD_ADDRESS;
> + if (!uboot_entry_point)
> + uboot_entry_point = DM3XX_UBOOT_LOAD_ADDRESS;
> + }
> +
> + if (!strcmp(platform, "OMAPL138")) {
> + if (!uboot_load_address)
> + uboot_load_address = DA850_UBOOT_LOAD_ADDRESS;
> + if (!uboot_entry_point)
> + uboot_entry_point = DA850_UBOOT_LOAD_ADDRESS;
> + }
So this is actually all hardwired for a few very specific board
configurations, right?
.
> +static int get_file_size(char *fname)
> +{
> + FILE *fp;
> + int size;
> +
> + fp = fopen(fname, "rb");
> + if (fp == NULL) {
> + fprintf(stdout, "File %s Open Error : %s\n",
> + fname, strerror(errno));
> + return -1;
> + }
> +
> + fseek(fp, 0, SEEK_END);
> + size = ftell(fp);
> + fclose(fp);
Why not simply using stat() ?
> +static int write_file(int devfd, char *fname)
> +{
> + FILE *fp;
> + int readlen, writelen;
> +
> + fp = fopen(fname, "rb");
> + if (fp == NULL) {
> + fprintf(stderr, "File %s Open Error: %s",
> + fname, strerror(errno));
> + return -1;
> + }
> +
> + while ((readlen = fread(readbuf, 1, BLOCK_SIZE, fp)) > 0) {
> + if (readlen < BLOCK_SIZE)
> + memset(&readbuf[readlen], 0, BLOCK_SIZE-readlen);
> +
> + writelen = write(devfd, readbuf, BLOCK_SIZE);
> + if (writelen < BLOCK_SIZE) {
> + close(devfd);
> + return -1;
> + }
> + }
> +
> + fclose(fp);
You don't even print a warning or error message in case of read
errors? Ouch...
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
C makes it easy for you to shoot yourself in the foot. C++ makes that
harder, but when you do, it blows away your whole leg.
-- Bjarne Stroustrup
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[U-Boot] [PATCH 3/3] microblaze: Enable ubi support
Increase malloc area for UBI to >= 512k -- foreseeing of UBIFS set to 768k. To save memory in flash (CONFIG_SYS_MONITOR_LEN) the UBIFS is disabled by default. Signed-off-by: Stephan Linz --- include/configs/microblaze-generic.h | 20 ++-- 1 files changed, 18 insertions(+), 2 deletions(-) diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 2ef7d62..2fd2279 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -166,7 +166,7 @@ - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE) #defineCONFIG_SYS_MONITOR_END \ (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#defineCONFIG_SYS_MALLOC_LEN SIZE +#defineCONFIG_SYS_MALLOC_LEN (SIZE * 3) #defineCONFIG_SYS_MALLOC_BASE \ (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) @@ -273,6 +273,8 @@ # define CONFIG_CMD_FLASH # define CONFIG_CMD_IMLS # define CONFIG_CMD_JFFS2 +# define CONFIG_CMD_UBI +# undef CONFIG_CMD_UBIFS # if !defined(RAMENV) # define CONFIG_CMD_SAVEENV @@ -285,7 +287,21 @@ #endif #if defined(CONFIG_CMD_JFFS2) -/* JFFS2 partitions */ +# define CONFIG_MTD_PARTITIONS +#endif + +#if defined(CONFIG_CMD_UBIFS) +# define CONFIG_CMD_UBI +# define CONFIG_LZO +#endif + +#if defined(CONFIG_CMD_UBI) +# define CONFIG_MTD_PARTITIONS +# define CONFIG_RBTREE +#endif + +#if defined(CONFIG_MTD_PARTITIONS) +/* MTD partitions */ #define CONFIG_CMD_MTDPARTS/* mtdparts command line support */ #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_FLASH_CFI_MTD -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] microblaze: avoid compile error on systems without cfi flash
Use XILINX_FLASH_START to set/unset FLASH and RAMENV. Error was: board.c: In function 'board_init': board.c:134: error: 'XILINX_FLASH_START' undeclared (first use in this function) board.c:134: error: (Each undeclared identifier is reported only once board.c:134: error: for each function it appears in.) Signed-off-by: Stephan Linz --- include/configs/microblaze-generic.h | 12 +--- 1 files changed, 9 insertions(+), 3 deletions(-) diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 5f16820..2ef7d62 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -31,6 +31,15 @@ #defineCONFIG_MICROBLAZE 1 #defineMICROBLAZE_V5 1 +/* linear flash memory */ +#ifdef XILINX_FLASH_START +#defineFLASH +#undef RAMENV /* hold environment in flash */ +#else +#undef FLASH +#defineRAMENV /* hold environment in RAM */ +#endif + /* uart */ #ifdef XILINX_UARTLITE_BASEADDR # define CONFIG_XILINX_UARTLITE @@ -164,9 +173,6 @@ /* stack */ #defineCONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE -/*#define RAMENV */ -#defineFLASH - #ifdef FLASH # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] microblaze: remove wrong define CONFIG_SYS_FLASH_PROTECTION
CONFIG_SYS_FLASH_PROTECTION will defined twice. The second one is outside the flash configuration context and we can remove it safely. Signed-off-by: Stephan Linz --- include/configs/microblaze-generic.h |2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 295d123..5f16820 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -200,8 +200,6 @@ # define CONFIG_ENV_IS_NOWHERE 1 # define CONFIG_ENV_SIZE 0x1000 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) -/* hardware flash protection */ -# define CONFIG_SYS_FLASH_PROTECTION #endif /* !FLASH */ /* system ace */ -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: rmobile: Add supoprt for KMC KZM-A9-GT board
Hi, Albert. Thank you for your review. 2012/6/26 Albert ARIBAUD : > Hi Nobuhiro, > > On Thu, 21 Jun 2012 15:23:39 +0900, > Nobuhiro Iwamatsu wrote : > >> The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM, >> USB, Ethernet, and more. >> >> This patch supports the following functions: >> - 512MB DDR2-SDRAM >> - 16MB NOR Flash memory >> - Serial console (SCIF) >> - Ethernet (SMSC) >> - I2C >> >> Signed-off-by: Nobuhiro Iwamatsu >> --- >> arch/arm/include/asm/mach-types.h | 2 + >> board/kmc/kzm/Makefile | 51 ++ >> board/kmc/kzm/kzm.c | 142 + >> board/kmc/kzm/lowlevel_init.S | 308 >> + >> boards.cfg | 1 + >> include/configs/kzm_a9_gt.h | 164 >> 6 files changed, 668 insertions(+) >> create mode 100644 board/kmc/kzm/Makefile >> create mode 100644 board/kmc/kzm/kzm.c >> create mode 100644 board/kmc/kzm/lowlevel_init.S >> create mode 100644 include/configs/kzm_a9_gt.h > > Board should be also added to MAINTAINERS Oh, I will add . > >> diff --git a/arch/arm/include/asm/mach-types.h >> b/arch/arm/include/asm/mach-types.h >> index 2d5c3bc..98c992c 100644 >> --- a/arch/arm/include/asm/mach-types.h >> +++ b/arch/arm/include/asm/mach-types.h >> @@ -1106,6 +1106,8 @@ extern unsigned int __machine_arch_type; >> #define MACH_TYPE_ATDGP318 3494 >> #define MACH_TYPE_OMAP5_SEVM 3777 >> >> +#define MACH_TYPE_KZM9G 4140 >> + >> #ifdef CONFIG_ARCH_EBSA110 >> # ifdef machine_arch_type >> # undef machine_arch_type >> diff --git a/board/kmc/kzm/Makefile b/board/kmc/kzm/Makefile >> new file mode 100644 >> index 000..8601230 >> --- /dev/null >> +++ b/board/kmc/kzm/Makefile >> @@ -0,0 +1,51 @@ >> +# >> +# (C) Copyright 2012 Nobuhiro Iwamatsu >> +# (C) Copyright 2012 Renesas Solutions Corp. >> +# >> +# See file CREDITS for list of people who contributed to this >> +# project. >> +# >> +# This program is free software; you can redistribute it and/or >> +# modify it under the terms of the GNU General Public License as >> +# published by the Free Software Foundation; either version 2 of >> +# the License, or (at your option) any later version. >> +# >> +# This program is distributed in the hope that it will be useful, >> +# but WITHOUT ANY WARRANTY; without even the implied warranty of >> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> +# GNU General Public License for more details. >> +# >> +# You should have received a copy of the GNU General Public License >> +# along with this program; if not, write to the Free Software >> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, >> +# MA 02111-1307 USA >> +# >> + >> +include $(TOPDIR)/config.mk >> + >> +LIB = $(obj)lib$(BOARD).o >> + >> +COBJS := kzm.o >> +SOBJS := lowlevel_init.o >> + >> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) >> +OBJS := $(addprefix $(obj),$(COBJS)) >> +SOBJS := $(addprefix $(obj),$(SOBJS)) >> + >> +$(LIB): $(obj).depend $(OBJS) $(SOBJS) >> + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) >> + >> +clean: >> + rm -f $(SOBJS) $(OBJS) >> + >> +distclean: clean >> + rm -f $(LIB) core *.bak $(obj) .depend >> + >> +# >> + >> +# defines $(obj).depend target >> +include $(SRCTREE)/rules.mk >> + >> +sinclude $(obj).depend >> + >> +# >> diff --git a/board/kmc/kzm/kzm.c b/board/kmc/kzm/kzm.c >> new file mode 100644 >> index 000..ae0868e >> --- /dev/null >> +++ b/board/kmc/kzm/kzm.c >> @@ -0,0 +1,142 @@ >> +/* >> + * (C) Copyright 2012 Nobuhiro Iwamatsu >> + * (C) Copyright 2012 Renesas Solutions Corp. >> + * >> + * See file CREDITS for list of people who contributed to this >> + * project. >> + * >> + * This program is free software; you can redistribute it and/or >> + * modify it under the terms of the GNU General Public License as >> + * published by the Free Software Foundation; either version 2 of >> + * the License, or (at your option) any later version. >> + * >> + * This program is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + * >> + * You should have received a copy of the GNU General Public License >> + * along with this program; if not, write to the Free Software >> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, >> + * MA 02111-1307 USA >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define CS0BCR_D (0x06C00400) >> +#define CS4BCR_D (0x06C00400) >> +#define CS0WCR_D (0x55062C42) >> +#define CS4WCR_D (0x19051443) >> +#define CMNCR
Re: [U-Boot] [PATCH 1/2] bcm: Add GPIO driver for BCM2835 SoC
On 06/24/2012 11:21 AM, Vikram Narayanan wrote:
First off, it's great to see some patches for the chip. Thanks. Sorry
for being so nit-picky below; it's a tendency of mine...
It'd be nice to include a patch description here, so that something
shows up besides just the patch subject.
> diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h
> b/arch/arm/include/asm/arch-bcm2835/gpio.h
> +#define BCM2835_GPIO_BASE(0x7E20)
There's no need for brackets around simple numbers.
> +#define BCM2835_MAX_GPIOS53
I think that should be named either BCM2835_NUM_GPIOS or
BCM2835_MAX_GPIO; you can have a number of GPIOs or a maximum GPIO
number, but not a maximum GPIOs.
> +#define BCM2835_GPIO_FSEL_CLR_MASK (0x7)
The mask applies equally to set or clear; I'd rename this to just
BCM2835_GPIO_FSEL_MASK.
> +#define BCM2835_GPIO_OUTPUT (0x1)
I'd like to see a matching BCM2835_GPIO_INPUT function select value too;
even if the value is actually 0 so it doesn't matter, it's still good to
document it.
It would also be useful to define all the values for the function
selector, in order to extend this driver to provide pinmuxing in the
future, e.g.
#define BCM2835_GPIO_FSEL_ALT0 4
etc.
> +#define GPIO_TO_BANK(n) (n / 10)
> +#define GPIO_TO_PIN(n) (n % 10)
There are two kinds of bank relevant to the current driver, and perhaps
more in the HW. The macros should also be prefixed with the module name
to avoid conflicts. PIN isn't really a good name, since the GPIOs
themselves /are/ pins; how about SHIFT? I'd like to see these renamed
BCM2835_GPIO_FSEL_BANK/SHIFT, and also to add
BCM2835_GPIO_OTHER_BANK/SHIFT macros.
(or perhaps GENERAL or 1BIT instead of OTHER?)
> +struct bcm_gpio_regs {
> + u32 gpfsel[6];
> + u32 reserved1;
> + u32 gpset0;
> + u32 gpset1;
You could replace those two with gpset[2], and then use
BCM2835_GPIO_OTHER_BANK() to index into the array. That will simplify
the driver code a bit. The same applies to gpclr* and gplev* below.
> + u32 reserved2;
> + u32 gpclr0;
> + u32 gpclr1;
> + u32 reserved3;
> + u32 gplev0;
> + u32 gplev1;
There are quite a few more registers defined in the datasheet after
this. Even if the driver doesn't use them yet, it'd still be good to add
them here.
> +};
> diff --git a/drivers/gpio/rpi_gpio.c b/drivers/gpio/rpi_gpio.c
I think this should be named bcm2835_gpio.c, since it's a driver for the
SoC in general, rather than a particular board that uses the SoC.
> +struct bcm_gpio {
> + u32 bank;
> + u32 pin;
> +};
...
> +static int get_bank_pin(unsigned gpio, struct bcm_gpio *pio)
> +{
> + int bank = GPIO_TO_BANK(gpio);
> + int pin = GPIO_TO_PIN(gpio);
> +
> + if (!gpio_is_valid(gpio))
> + return -1;
> +
> + pin &= 0x09;
GPIO_TO_PIN already performs any required masking. Also, this line
doesn't work, because you want mod 9, not bitwise-and with 9.
> + pio->pin = pin;
> + pio->bank = bank;
> + return 0;
> +}
I'm not really sure that structure or function are useful; you can just
use macros BCM2835_GPIO_*_BANK/SHIFT directly in the code.
> +int gpio_request(unsigned gpio, const char *label)
> +{
> + return (gpio_is_valid(gpio)) ? 1 : 0;
> +}
> +
> +int gpio_free(unsigned gpio)
> +{
> + return 0;
> +}
Hmmm. Don't you want to do something like save the label away so you
know who requested the pin for what, and mark it requested so you can't
request it twice? IIRC, there's some "gpio info" command that will list
out all the GPIO owners, at least for some pre-existing GPIO drivers.
> +int gpio_direction_input(unsigned gpio)
> +{
> + struct bcm_gpio pio;
> + struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
> + unsigned val = 0;
There's no need to initialize val; it's unconditionally written to below
before it's used.
> +
> + if (get_bank_pin(gpio, &pio))
> + return -1;
I would drop that function call and the pio variable, and just use the
macros directly where needed.
> + val = readl(®->gpfsel[pio.bank]);
> + val &= ~(BCM2835_GPIO_FSEL_CLR_MASK << (pio.pin * 3));
That might be clearer as:
val &= ~(BCM2835_GPIO_FSEL_CLR_MASK << BCM2835_GPIO_FSEL_SHIFT(pin));
val |= ~(BCM2835_GPIO_OUTPUT << BCM2835_GPIO_FSEL_SHIFT(pin));
Similar for gpio_direction_output() below.
> + writel(val, reg->gpfsel[pio.bank]);
> +int gpio_get_value(unsigned gpio)
> +{
> + struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
> + unsigned val = 0;
> +
> + if (!gpio_is_valid(gpio))
> + return -1;
> +
> + val = (gpio < 32) ? readl(®->gplev0) : readl(®->gplev1);
How about:
val = readl(®->gplev[BCM2835_GPIO_OTHER_BANK(gpio)]);
> + gpio &= 0x1f;
That's not needed, since we extract only the bits we care about below
anyway.
> + return (val & (1 << gpio)) >> gpio;
That would be simpler as:
return (val >> BCM2835_GPIO_OTHER_SHIFT(gpio)) & 1;
>
Re: [U-Boot] [PATCH 2/2] rbpi: Add BCM2835 GPIO driver for raspberry pi
On 06/24/2012 11:22 AM, Vikram Narayanan wrote: > > Add the driver to the rpi_b's default config It looks like there's a blank line before the patch description there. Aside from that and the nit below, Acked-by: Stephen Warren > diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h > /* Devices */ > -/* None yet */ > +/* GPIO */ > +#define CONFIG_BCM2835_GPIO > + > No need to add an extra blank line there. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/4] net: sh_eth: clean up for the SH7757's code
The SH7757's ETHER can work using the SH7724's setting. So, the patch
modifies it.
Signed-off-by: Yoshihiro Shimoda
---
drivers/net/sh_eth.c |9 +
drivers/net/sh_eth.h | 14 ++
2 files changed, 3 insertions(+), 20 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index bb57e4d..1825059 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -376,12 +376,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
/* Configure e-mac registers */
-#if defined(CONFIG_CPU_SH7757)
- outl(ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP |
- ECSIPR_MPDIP | ECSIPR_ICDIP, ECSIPR(port));
-#else
outl(0, ECSIPR(port));
-#endif
/* Set Mac address */
val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 |
@@ -395,14 +390,12 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
outl(0, PIPR(port));
#endif
-#if !defined(CONFIG_CPU_SH7724)
+#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
outl(APR_AP, APR(port));
outl(MPR_MP, MPR(port));
#endif
#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(TPAUSER_TPAUSE, TPAUSER(port));
-#elif defined(CONFIG_CPU_SH7757)
- outl(TPAUSER_UNLIMITED, TPAUSER(port));
#endif
#if defined(CONFIG_CPU_SH7734)
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 50f4b69..5276be3 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -319,7 +319,7 @@ enum EESR_BIT {
EESR_FTC = 0x0020, EESR_TDE = 0x0010,
EESR_TFE = 0x0008, EESR_FRC = 0x0004,
EESR_RDE = 0x0002, EESR_RFE = 0x0001,
-#if defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
EESR_CND = 0x0800,
#endif
EESR_DLC = 0x0400,
@@ -426,9 +426,7 @@ enum FELIC_MODE_BIT {
#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
#define ECMR_CHG_DM(ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR |
ECMR_RXF | \
ECMR_TXF | ECMR_MCT)
-#elif CONFIG_CPU_SH7757
-#define ECMR_CHG_DM(ECMR_ZPF)
-#elif CONFIG_CPU_SH7724
+#elif CONFIG_CPU_SH7724 || CONFIG_CPU_SH7757
#define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF)
#else
#define ECMR_CHG_DM(ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT)
@@ -473,20 +471,12 @@ enum ECSIPR_STATUS_MASK_BIT {
/* APR */
enum APR_BIT {
-#ifdef CONFIG_CPU_SH7757
- APR_AP = 0x0001,
-#else
APR_AP = 0x0004,
-#endif
};
/* MPR */
enum MPR_BIT {
-#ifdef CONFIG_CPU_SH7757
- MPR_MP = 0x0001,
-#else
MPR_MP = 0x0006,
-#endif
};
/* TRSCER */
--
1.7.1
___
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[U-Boot] [PATCH 2/4] net: sh_eth: add SH_ETH_TYPE_ condition
At the moment, the driver supports the following CPUs:
- GETHER (Gigabit Ethernet) : SH7763, SH7734
- ETHER (Fast Ethernet): SH7724, SH7757
And the driver had the following "#if":
#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
- Those are for GETHER
#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
- This is for ETHER
So, for clean up the code, this patch adds SH_ETH_TYPE_GETHER and
SH_ETH_TYPE_ETHER. And then, the patch modifies the above "#if".
Signed-off-by: Yoshihiro Shimoda
---
drivers/net/sh_eth.c | 22 +-
drivers/net/sh_eth.h | 43 +++
2 files changed, 32 insertions(+), 33 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 1825059..262762d 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -1,5 +1,5 @@
/*
- * sh_eth.c - Driver for Renesas SH7763's ethernet controler.
+ * sh_eth.c - Driver for Renesas ethernet controler.
*
* Copyright (C) 2008, 2011 Renesas Solutions Corp.
* Copyright (c) 2008, 2011 Nobuhiro Iwamatsu
@@ -138,7 +138,7 @@ int sh_eth_recv(struct eth_device *dev)
static int sh_eth_reset(struct sh_eth_dev *eth)
{
int port = eth->port;
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
int ret = 0, i;
/* Start e-dmac transmitter and receiver */
@@ -208,7 +208,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
/* Point the controller to the tx descriptor list. Must use physical
addresses */
outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port));
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port));
outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port));
outl(0x01, TDFFR(port));/* Last discriptor bit */
@@ -276,7 +276,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
/* Point the controller to the rx descriptor list */
outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port));
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port));
outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port));
outl(RDFFR_RDLF, RDFFR(port));
@@ -370,7 +370,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl(0, TFTR(port));
outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port));
outl(RMCR_RST, RMCR(port));
-#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
+#if defined(SH_ETH_TYPE_GETHER)
outl(0, RPADIR(port));
#endif
outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
@@ -387,14 +387,10 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl(val, MALR(port));
outl(RFLR_RFL_MIN, RFLR(port));
-#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
+#if defined(SH_ETH_TYPE_GETHER)
outl(0, PIPR(port));
-#endif
-#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
outl(APR_AP, APR(port));
outl(MPR_MP, MPR(port));
-#endif
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(TPAUSER_TPAUSE, TPAUSER(port));
#endif
@@ -415,7 +411,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
/* Set the transfer speed */
if (phy->speed == 100) {
printf(SHETHER_NAME ": 100Base/");
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(GECMR_100B, GECMR(port));
#elif defined(CONFIG_CPU_SH7757)
outl(1, RTRATE(port));
@@ -424,13 +420,13 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
#endif
} else if (phy->speed == 10) {
printf(SHETHER_NAME ": 10Base/");
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(GECMR_10B, GECMR(port));
#elif defined(CONFIG_CPU_SH7757)
outl(0, RTRATE(port));
#endif
}
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
else if (phy->speed == 1000) {
printf(SHETHER_NAME ": 1000Base/");
outl(GECMR_1000B, GECMR(port));
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 5276be3..401ef69 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -99,6 +99,7 @@ struct sh_eth_dev {
/* Register Address */
#ifdef CONFIG_CPU_SH7763
+#define SH_ETH_TYPE_GETHER
#define BASE_IO_ADDR 0xfee0
#define EDSR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x)
@@ -137,6 +138,7 @@ struct sh_eth_dev {
#define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x05c0)
#elif defined(CONFIG_CPU_SH7757)
+#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xfef00
[U-Boot] [PATCH 3/4] net: sh_eth: modify the definitions of regsiter
The previous code had many similar definitions in each CPU.
This patch borrows from the sh_eth driver of Linux kernel.
Signed-off-by: Yoshihiro Shimoda
---
drivers/net/sh_eth.c | 108 -
drivers/net/sh_eth.h | 331 +++---
2 files changed, 258 insertions(+), 181 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 262762d..7b429e8 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -76,8 +76,8 @@ int sh_eth_send(struct eth_device *dev, void *packet, int len)
port_info->tx_desc_cur->td0 = TD_TACT | TD_TFP;
/* Restart the transmitter if disabled */
- if (!(inl(EDTRR(port)) & EDTRR_TRNS))
- outl(EDTRR_TRNS, EDTRR(port));
+ if (!(sh_eth_read(eth, EDTRR) & EDTRR_TRNS))
+ sh_eth_write(eth, EDTRR_TRNS, EDTRR);
/* Wait until packet is transmitted */
timeout = TIMEOUT_CNT;
@@ -129,25 +129,24 @@ int sh_eth_recv(struct eth_device *dev)
}
/* Restart the receiver if disabled */
- if (!(inl(EDRRR(port)) & EDRRR_R))
- outl(EDRRR_R, EDRRR(port));
+ if (!(sh_eth_read(eth, EDRRR) & EDRRR_R))
+ sh_eth_write(eth, EDRRR_R, EDRRR);
return len;
}
static int sh_eth_reset(struct sh_eth_dev *eth)
{
- int port = eth->port;
#if defined(SH_ETH_TYPE_GETHER)
int ret = 0, i;
/* Start e-dmac transmitter and receiver */
- outl(EDSR_ENALL, EDSR(port));
+ sh_eth_write(eth, EDSR_ENALL, EDSR);
/* Perform a software reset and wait for it to complete */
- outl(EDMR_SRST, EDMR(port));
+ sh_eth_write(eth, EDMR_SRST, EDMR);
for (i = 0; i < TIMEOUT_CNT ; i++) {
- if (!(inl(EDMR(port)) & EDMR_SRST))
+ if (!(sh_eth_read(eth, EDMR) & EDMR_SRST))
break;
udelay(1000);
}
@@ -159,9 +158,9 @@ static int sh_eth_reset(struct sh_eth_dev *eth)
return ret;
#else
- outl(inl(EDMR(port)) | EDMR_SRST, EDMR(port));
+ sh_eth_write(eth, sh_eth_read(eth, EDMR) | EDMR_SRST, EDMR);
udelay(3000);
- outl(inl(EDMR(port)) & ~EDMR_SRST, EDMR(port));
+ sh_eth_write(eth, sh_eth_read(eth, EDMR) & ~EDMR_SRST, EDMR);
return 0;
#endif
@@ -207,11 +206,11 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
/* Point the controller to the tx descriptor list. Must use physical
addresses */
- outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port));
+ sh_eth_write(eth, ADDR_TO_PHY(port_info->tx_desc_base), TDLAR);
#if defined(SH_ETH_TYPE_GETHER)
- outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port));
- outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port));
- outl(0x01, TDFFR(port));/* Last discriptor bit */
+ sh_eth_write(eth, ADDR_TO_PHY(port_info->tx_desc_base), TDFAR);
+ sh_eth_write(eth, ADDR_TO_PHY(cur_tx_desc), TDFXR);
+ sh_eth_write(eth, 0x01, TDFFR);/* Last discriptor bit */
#endif
err:
@@ -275,11 +274,11 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
cur_rx_desc->rd0 |= RD_RDLE;
/* Point the controller to the rx descriptor list */
- outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port));
+ sh_eth_write(eth, ADDR_TO_PHY(port_info->rx_desc_base), RDLAR);
#if defined(SH_ETH_TYPE_GETHER)
- outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port));
- outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port));
- outl(RDFFR_RDLF, RDFFR(port));
+ sh_eth_write(eth, ADDR_TO_PHY(port_info->rx_desc_base), RDFAR);
+ sh_eth_write(eth, ADDR_TO_PHY(cur_rx_desc), RDFXR);
+ sh_eth_write(eth, RDFFR_RDLF, RDFFR);
#endif
return ret;
@@ -364,38 +363,39 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
struct phy_device *phy;
/* Configure e-dmac registers */
- outl((inl(EDMR(port)) & ~EMDR_DESC_R) | EDMR_EL, EDMR(port));
- outl(0, EESIPR(port));
- outl(0, TRSCER(port));
- outl(0, TFTR(port));
- outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port));
- outl(RMCR_RST, RMCR(port));
+ sh_eth_write(eth, (sh_eth_read(eth, EDMR) & ~EMDR_DESC_R) | EDMR_EL,
+EDMR);
+ sh_eth_write(eth, 0, EESIPR);
+ sh_eth_write(eth, 0, TRSCER);
+ sh_eth_write(eth, 0, TFTR);
+ sh_eth_write(eth, (FIFO_SIZE_T | FIFO_SIZE_R), FDR);
+ sh_eth_write(eth, RMCR_RST, RMCR);
#if defined(SH_ETH_TYPE_GETHER)
- outl(0, RPADIR(port));
+ sh_eth_write(eth, 0, RPADIR);
#endif
- outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
+ sh_eth_write(eth, (FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR);
/* Configure e-mac registers */
- outl(0, ECSIPR(port));
+ sh_eth_write(eth, 0, ECSIPR);
/* Set Mac address */
val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 |
dev->enetaddr[2] << 8 | dev->enetaddr[3
[U-Boot] [PATCH 4/4] net: sh_eth: add support for SH7757's GETHER
SH7757 has 2 ETHERs and 2 GETHERs. This patch supports the SH7757's
GETHER. If CONFIG_SH_ETHER_USE_GETHER is defined using SH7757,
the driver handles the GETHER.
Signed-off-by: Yoshihiro Shimoda
---
drivers/net/sh_eth.h |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 13003ec..3703c55 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -282,8 +282,13 @@ static const u16
sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
#define SH_ETH_TYPE_GETHER
#define BASE_IO_ADDR 0xfee0
#elif defined(CONFIG_CPU_SH7757)
+#if defined(CONFIG_SH_ETHER_USE_GETHER)
+#define SH_ETH_TYPE_GETHER
+#define BASE_IO_ADDR 0xfee0
+#else
#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xfef0
+#endif
#elif defined(CONFIG_CPU_SH7724)
#define SH_ETH_TYPE_ETHER
#define BASE_IO_ADDR 0xA460
@@ -331,7 +336,11 @@ enum DMAC_T_BIT {
/* GECMR */
enum GECMR_BIT {
+#if defined(CONFIG_CPU_SH7757)
+ GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00,
+#else
GECMR_1000B = 0x01, GECMR_100B = 0x04, GECMR_10B = 0x00,
+#endif
};
/* EDRRR*/
--
1.7.1
___
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Re: [U-Boot] [RFC][PATCH] net: nfs: extend NFS_TIMEOUT
Hi Joe, Thank you for responding. (2012/06/27 0:30), Joe Hershberger wrote: On Tue, Jun 26, 2012 at 3:52 AM, Wolfgang Denk wrote: Dear Tetsuyuki Kobayashi, In message<4fe9711a.2090...@kmckk.co.jp> you wrote: Are you sure the problems are not in the board specific code? OK. I will try the same thing on an in-tree board (maybe, panda board) to check if this is board specific or not. I did on a panda board. It has the same problem and this patch solves it. So this is not board specific problem. Please consider to change global setting of NFS_TIMEOUT in nfs.c. net/nfs.c is not the right place to make board specific adjustments. I am still not convinced this is an issue with the global code. It could be your NFS server as well. I'm not convinced either. It clearly depends on the speed of your server, the speed of the connection, the size of the file you are transferring, etc. Yes, NFS_TIMEOUT should be configurable. If there are really boards which need longer timeouts, these should be set in the board config files. In fact I would rather the constant were not defined there at all... but it is. At a minimum it should look like this: #define HASHES_PER_LINE 65 /* Number of "loading" hashes per line */ #define NFS_RETRY_COUNT 30 +#ifdef CONFIG_NFS_TIMEOUT +#define NFS_TIMEOUT CONFIG_NFS_TIMEOUT +#else #define NFS_TIMEOUT 2000UL +#endif static int fs_mounted; static unsigned long rpc_id; ...with CONFIG_NFS_TIMEOUT defined for your board. Thanks. I agree this change. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/19] tegra: Add display driver and LCD support for Seaboard
Hi Tom, On Mon, Jun 25, 2012 at 2:03 PM, Tom Warren wrote: > Simon, > > > -Original Message- > > From: Stephen Warren [mailto:swar...@wwwdotorg.org] > > Sent: Wednesday, June 13, 2012 3:58 PM > > To: Simon Glass > > Cc: U-Boot Mailing List; Tom Warren > > Subject: Re: [PATCH v2 0/19] tegra: Add display driver and LCD support > for > > Seaboard > > > > On 06/13/2012 10:19 AM, Simon Glass wrote: > > > This series adds support for the Tegra2x's display peripheral. This > > > supports the LCD display on Seaboard and we use this to enable console > > > output in U-Boot on the LCD. > > > > Simon, > > > > This series doesn't apply to u-boot-tegra/master cleanly; there are a > couple > > trivial conflicts in arch/arm/cpu/armv7/tegra2/Makefile to resolve, but I > > had to apply the final patch completely by hand. > > > > When I run the resultant binary, I see the LCD backlight turn on, but the > > image on the LCD is wrong; it starts completely black without any text > > showing, then slowly fills in to white/gray with many horizontal and > > vertical black lines; I guess the LCD timing is incorrect - are there > > multiple different LCD models? Note that I am using a real Seaboard not a > > Springbank for this test. > > I don't see Stephen's LCD problems, but I don't see clear text on my > Seaboard T20-A03 dev system LCD, either. The text is blurred / almost > unreadable, especially the last line (cmd prompt). I don't know if it's the > scrolling change or the cache change, as previous incarnations (in the > Google repo, at least) were just fine. Power-cycling doesn't fix it. I > didn't test Ventana or Harmony. > > Please update the patchset so it (a) applies to u-boot-tegra/master and/or > /next, and (b) fixes the text corruption on the LCD. > Yes will do. I am not sure about the text corruption as I didn't see that, but perhaps the rebase has caused something to change. Will take a look. Regards Simon > > Tom > -- > nvpublic > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Davinci: Utility for MMC boot
Hi Wolfgang,
On Wed, Jun 27, 2012 at 03:12:07, Wolfgang Denk wrote:
> Dear Prabhakar Lad,
>
> In message <1340708826-26707-1-git-send-email-prabhakar@ti.com> you wrote:
> > From: Alagu Sankar
> >
> > This is a Linux command line tool specific to TI's Davinci platforms, for
> > flashing UBL (User Boot Loader), u-boot and u-boot Environment in the MMC/SD
> > card. This MMC/SD card can be used for booting Davinci platforms that
> > supports
> > MMC/SD boot option.
>
> Do we also build UBL as part of the U-Boot source tree?
>
No, we do not build UBL as part of U-Boot.
> If not, then why is this tool supposed to be part of the U-Boot tree?
>
> How does this work with a SPL?
>
This command has options to flash u-boot images to MMC/SD card. When SPL
is supported, this command can be used to flash the single SPL image to
MMC/SD card.
> > --- a/Makefile
> > +++ b/Makefile
> > @@ -726,7 +726,7 @@ clean:
> > @rm -f $(obj)examples/api/demo{,.bin}
> > @rm -f $(obj)tools/bmp_logo$(obj)tools/easylogo/easylogo \
> >$(obj)tools/env/{fw_printenv,fw_setenv}\
> > - $(obj)tools/envcrc \
> > + $(obj)tools/envcrc $(obj)tools/uflash/uflash \
> >$(obj)tools/gdb/{astest,gdbcont,gdbsend} \
> >$(obj)tools/gen_eth_addr$(obj)tools/img2srec \
> >$(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \
>
> Please keep list sorted.
>
Ok.
>
> > +e. Using the 'uflash' utility, place the UBL and u-uoot binaries on the MMC
> > + card. Copy the u-boot.bin to tools/uflash directory
>
> Why is this copy operation needed?
>
This copy is not needed as long as the path to u-boot.bin is specified
Correctly in command line.
> And where is the UBL binary coming from?
>
UBL binary is optional. We can flash only u-boot.bin.
>
>
> > diff --git a/tools/uflash/config.txt b/tools/uflash/config.txt
> > new file mode 100644
> > index 000..f6acb22
> > --- /dev/null
> > +++ b/tools/uflash/config.txt
> > @@ -0,0 +1,11 @@
> > +bootargs=console=ttyS0,115200n8 root=/dev/mmcblk0p1 rootwait
> > rootfstype=ext3 rw
> > +bootcmd=ext2load mmc 0 0x8070 boot/uImage; bootm 0x8070
> > +bootdelay=1
> > +baudrate=115200
> > +bootfile="uImage"
> > +stdin=serial
> > +stdout=serial
> > +stderr=serial
> > +ethact=dm9000
> > +videostd=ntsc
>
> This looks like U-Boot environment settings? Why are these in the
> tools/uflash/ directory? I would expect these are board specific?
> For example, what in case a board uses a different baud rate?
>
> Is this really supposed to be board independent? It doesn't look
> so...
>
I agree with this. Can you think of any other scenario?
> > +
>
> And please, no trailing empty lines!
>
Ok.
> ...
> > + if (!strcmp(platform, "DM3XX")) {
> > + if (!uboot_load_address)
> > + uboot_load_address = DM3XX_UBOOT_LOAD_ADDRESS;
> > + if (!uboot_entry_point)
> > + uboot_entry_point = DM3XX_UBOOT_LOAD_ADDRESS;
> > + }
> > +
> > + if (!strcmp(platform, "OMAPL138")) {
> > + if (!uboot_load_address)
> > + uboot_load_address = DA850_UBOOT_LOAD_ADDRESS;
> > + if (!uboot_entry_point)
> > + uboot_entry_point = DA850_UBOOT_LOAD_ADDRESS;
> > + }
>
> So this is actually all hardwired for a few very specific board
> configurations, right?
>
Yes.
> .
> > +static int get_file_size(char *fname)
> > +{
> > + FILE *fp;
> > + int size;
> > +
> > + fp = fopen(fname, "rb");
> > + if (fp == NULL) {
> > + fprintf(stdout, "File %s Open Error : %s\n",
> > + fname, strerror(errno));
> > + return -1;
> > + }
> > +
> > + fseek(fp, 0, SEEK_END);
> > + size = ftell(fp);
> > + fclose(fp);
>
> Why not simply using stat() ?
>
Yes that makes sense.
> > +static int write_file(int devfd, char *fname)
> > +{
> > + FILE *fp;
> > + int readlen, writelen;
> > +
> > + fp = fopen(fname, "rb");
> > + if (fp == NULL) {
> > + fprintf(stderr, "File %s Open Error: %s",
> > + fname, strerror(errno));
> > + return -1;
> > + }
> > +
> > + while ((readlen = fread(readbuf, 1, BLOCK_SIZE, fp)) > 0) {
> > + if (readlen < BLOCK_SIZE)
> > + memset(&readbuf[readlen], 0, BLOCK_SIZE-readlen);
> > +
> > + writelen = write(devfd, readbuf, BLOCK_SIZE);
> > + if (writelen < BLOCK_SIZE) {
> > + close(devfd);
> > + return -1;
> > + }
> > + }
> > +
> > + fclose(fp);
>
> You don't even print a warning or error message in case of read
> errors? Ouch...
>
Ok , I'll fix it in V2 version.
Thx,
--Prabhakar Lad
>
> Best regards,
>
> Wolfgang Denk
>
> --
> DENX Software Engineering GmbH, MD: Wolfgang Denk & Det
Re: [U-Boot] where is rootfs??
Hello thanks for respond. This method not woking good :( Do you have enything sugestion to modify rootfs files?? I find with vmlinux package gzip. In the gzip write files with rootfs. I don't now what I must do to rebuilit this vmlinux :/ Please help ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: rmobile: Add supoprt for KMC KZM-A9-GT board
Dear Nobuhiro Iwamatsu, In message you wrote: > ... > >> --- /dev/null > >> +++ b/board/kmc/kzm/lowlevel_init.S ... > >> + and_write32 LIFEC_SEC_SRC, 0xFFE7 > >> + > >> + and_write32 SRCR3, 0x7FFF > >> + and_write32 SMSTPCR2,0xFFFB > >> + and_write32 SRCR2, 0xFFFB > >> + write32 PLLECR, 0x > >> + > >> + cmp_loopPLLECR, 0x0F00, 0x > >> + cmp_loopFRQCRB, 0x8000, 0x > >> + > >> + write32 PLL0CR, 0x2D00 > >> + write32 PLL1CR, 0x1710 > >> + write32 FRQCRB, 0x96235880 > >> + cmp_loopFRQCRB, 0x8000, 0x > >> + > >> + write32 FLCKCR, 0x000B > >> + and_write32 SMSTPCR0, 0xFFFD > >> + > >> + and_write32 SRCR0, 0xFFFD > >> + write32 SMGPIOTIME, 0x0514 > >> + write32 SMCMT2TIME, 0x0514 > >> + write32 SMCPGTIME, 0x0514 > >> + write32 SMSYSCTIME, 0x0514 > >> + > >> + write32 DVFSCR4, 0x00092000 > >> + write32 DVFSCR5, 0x00DC > >> + write32 PLLECR, 0x > >> + cmp_loopPLLECR, 0x0F00, 0x > >> + > >> + write32 FRQCRA, 0x0012453C > >> + write32 FRQCRB, 0x80331350 > >> + cmp_loopFRQCRB, 0x8000, 0x > >> + write32 FRQCRD, 0x0B0B > >> + cmp_loopFRQCRD, 0x8000, 0x > >> + > >> + write32 PCLKCR, 0x0003 > >> + write32 VCLKCR1, 0x012F > >> + write32 VCLKCR2, 0x0119 > >> + write32 VCLKCR3, 0x0119 > >> + write32 ZBCKCR, 0x0002 > >> + write32 FLCKCR, 0x0005 > >> + write32 SD0CKCR, 0x0080 > >> + write32 SD1CKCR, 0x0080 > >> + write32 SD2CKCR, 0x0080 > >> + write32 FSIACKCR, 0x003F > >> + write32 FSIBCKCR, 0x003F > >> + write32 SUBCKCR, 0x0080 > >> + write32 SPUACKCR, 0x000B > >> + write32 SPUVCKCR, 0x000B > >> + write32 MSUCKCR, 0x013F > >> + write32 HSICKCR, 0x0080 > >> + write32 MFCK1CR, 0x003F > >> + write32 MFCK2CR, 0x003F > >> + write32 DSITCKCR, 0x0107 > >> + write32 DSI0PCKCR, 0x0313 > >> + write32 DSI1PCKCR, 0x130D > >> + write32 DSI0PHYCR, 0x2A800E0E > >> + write32 PLL0CR, 0x1E00 > >> + write32 PLL0CR, 0x2D00 > >> + write32 PLL1CR, 0x1710 > >> + write32 PLL2CR, 0x2780 > >> + write32 PLL3CR, 0x1D00 > >> + write32 PLL0STPCR, 0x0008 > >> + write32 PLL1STPCR, 0x000120C0 > >> + write32 PLL2STPCR, 0x00012000 > >> + write32 PLL3STPCR, 0x0030 > >> + write32 PLLECR, 0x000B > >> + cmp_loopPLLECR, 0x0B00, 0x0B00 > >> + > >> + write32 DVFSCR3, 0x000120F0 > >> + write32 MPMODE, 0x0020 > >> + write32 VREFCR, 0x028A > >> + write32 RMSTPCR0, 0xE4628087 > >> + write32 RMSTPCR1, 0x > >> + write32 RMSTPCR2, 0x53FF > >> + write32 RMSTPCR3, 0x > >> + write32 RMSTPCR4, 0x00800D3D > >> + write32 RMSTPCR5, 0xF3FF > >> + write32 SMSTPCR2, 0x > >> + write32 SRCR2, 0x0004 > >> + and_write32 PLLECR, 0xFFF7 > >> + cmp_loopPLLECR, 0x0800, 0x > >> + > >> + write32 HPBCTRL6, 0x0001 > >> + cmp_loopHPBCTRL6, 0x0001, 0x0001 > >> + > >> + write32 FRQCRD, 0x1414 > >> + cmp_loopFRQCRD, 0x8000, 0x > >> + > >> + write32 PLL3CR, 0x1D00 > >> + or_write32 PLLECR, 0x0008 > >> + cmp_loopPLLECR, 0x0800, 0x0800 > >> + > >> + or_write32 DLLCNT0A, 0x0002 > >> + write32 SDGENCNTA, 0x0005 > >> + cmp_loopSDGENCNTA, 0x, 0x > >> + > >> + write32 SDCR0A, 0xACC90159 > >> + write32 SDCR1A, 0x00010059 > >> + write32 SDWCRC0A, 0x50874114 > >> + write32 SDWCRC1A, 0x33199B37 > >> + write32 SDWCRC2A, 0x008F2313 > >> + write32 SDWCR00A, 0x31020707 > >> + write32 SDWCR01A, 0x0017040A > >> + write32 SDWCR10A, 0x31020707 > >> + write32 SDWCR11A, 0x0017040A > >> + write32 SDDRVCR0A, 0x0555 > >> + write32 SDWCR2A, 0x3000 > >> + or_write32 SDPCRA, 0x0080 > >> + cmp_loopSDPCRA, 0x0080, 0x0080 > >> + write32 SDGENCNTA, 0x2710 > >> + cmp_loopSDGENCNTA, 0x,
Re: [U-Boot] [PATCH 1/1] USB: EHCI: Initialize multiple USB controllers at once
Dear Jim Lin, sending the very same message eight (8!) times doesnot make it a bit more convincing - on contrary. In message <4b9c9637d5087840a465bdcb251780e9e2d6eda...@hkmail02.nvidia.com> you wrote: > > > U-Boot is not multi-tasking, so you can always access only a single > > USB device at a time ayway. And it is a decoumented design principle > > that U-Boot must not initialize any devices it does not use itself. > > > > So why? > Because of this complaint and request for devices under different controllers > to be working at same time. You make another claim here, but don't explain how this is supposed to work or whay the exact use case would be where this was needed. U-Boot will not be able to access multiple devices at the same time, so why would it be necessary to enable these? It should be sufficient to enable the controller that is responsible for the single device that is currently being used. > "One particularly annoying consequence of this is when you use the Seaboard > configuration on Springbank. > Seaboard selects Tegra's USB3 as "usb 0" device, which is the one you can use, > in order not to conflict with the flashing USB port USB1. > However, Springbank only exposes USB1 since USB3 is used internally for the > USB keyboard/mouse. As such, you cannot use the USB port on Springbank under > U-Boot at the moment. > " I have to admit that I cannot make any sense from this statement. The only thing I understand is that you are trying to use a configuration for one hardware (Seaboard) on another, incompatible hardware (Springbank). The simple answer to this problem is: don't do that, then. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Ordnung ist die Lust der Vernunft, aber Unordnung die Wonne der Phantasie - Paul Claudel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
