Re: [U-Boot] [PATCH v4 3/7] jz4740 nand spl files
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 01/05/2011 04:13 AM, Scott Wood wrote: > On Wed, Dec 08, 2010 at 12:20:45AM -0600, Xiangfu Liu wrote: >> Signed-off-by: Xiangfu Liu >> --- >> nand_spl/board/xburst/nanonote/Makefile | 96 >> nand_spl/board/xburst/nanonote/u-boot.lds | 63 ++ >> nand_spl/nand_boot_jz4740.c | 344 >> + >> 3 files changed, 503 insertions(+), 0 deletions(-) >> create mode 100644 nand_spl/board/xburst/nanonote/Makefile >> create mode 100644 nand_spl/board/xburst/nanonote/u-boot.lds >> create mode 100644 nand_spl/nand_boot_jz4740.c > > I don't see any of my comments on v3 addressed or responded to: > http://lists.denx.de/pipermail/u-boot/2010-December/083601.html > Hi Scott thanks the comments, I am working on the nand_boot_jz4740.c now. I try to using the system nand_boot.c, but it's need sometime. I will try to send another patch in next two days. thanks again. > NACK. > > -Scott > - -- Best Regards Xiangfu Liu http://www.openmobilefree.net -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.10 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iEYEARECAAYFAk0pdWYACgkQRRAEFRxkgLQNsQCfQKwtQzy8+6UjpeL6/BPlvTdn oBgAn2OoHToWrtFSik/OzW8mfirDu5ZU =Igmv -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC] armv7: fixloop: don't fixup if location is NULL
Hi Andreas, Le 08/01/2011 17:51, Andreas Bießmann a écrit : > Dear Albert ARIBAUD, > > Am 08.01.2011 um 13:18 schrieb Albert ARIBAUD: > >> Le 08/01/2011 11:49, Albert ARIBAUD a écrit : >> In my investigations for 'NULL fixup' (-> see http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/89864/focus=89906) pointed out that only symbols in 'absolute fixup' loop could be 'NULL' if there is a not aliased/empty weakly linked symbol. >> >> BTW: is such a situation normal? IIUC, it means there is a weakly linked >> symbol without *any* defintion, *and* it is referenced in the code. > > Yes you may have a weakly linked symbol which was declared but nowhere > implemented. See http://patchwork.ozlabs.org/patch/73647, this fixed such > a situation for arm920t/at91 style SoC. Not sure I follow you there. The example you give has a definition, admittedly for an empty function, right above the weak definition. My question is about cases where the weak symbol is declared and has no definition at all. Were you meaning to give an example of an undefined weak symbol being fixed so that it has at least a default definition? > BTW: Without the mentioned patch there was another issue with linking > (-> see http://patchwork.ozlabs.org/patch/73563). The linker introduced > a .plt section which could not be placed and lead to a segfault of linker. That's more of a linker bug to me. The plt sections are unused that I know of. They could probably be put after BSS and marked NOLOAD -- giving it a try would be a nice thing. >> Granted, maybe it is checked before it is referenced, but we may want to >> check for and report at build time if possible. Would that be useful? > > AFAIR there was a statement to remove those 'undefined weakly linked symbols' > from code. So it would be useful to have a tool to detect those symbols at > build > time. I'll have a look at what can be done. > regards > > Andreas Bießmann Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Work options for you
HeyheyHellohellogreetings!Hey!hey!Hello!hello!Yo!yo!Hola!Good dayGood-day!Good Day!Attention!AttentionWhat's happening?What's Happening??Howdy!howdyHowdy I found a internet media feed that you you may be interested to look over... it'll teach you to earn cash on this internet connection; http://bit.ly/eWGnSr";>click on this I felt comfortable quitting my job 2 weeks ago due to the ridiculously generous amount cash I was able to save; aikane ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 4/7] jz4740 nand driver
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 01/05/2011 04:16 AM, Scott Wood wrote: > On Wed, Dec 08, 2010 at 12:20:46AM -0600, Xiangfu Liu wrote: >> +writel(readl(EMC_NFECR) & ~EMC_NFECR_ECCE, EMC_NFECR); > > readl() and other I/O accessors take pointers, not integer addresses. Hi Scott I fixed the others error, only this one I don't know how to do that. can you point me to some example. thanks for your emails. > Use I/O accesors. > U-Boot coding style prohibits declarations mid-block. > Line length. > Please symbolically define what went into that magic number. > > -Scott > - -- Best Regards Xiangfu Liu http://www.openmobilefree.net -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.10 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iEYEARECAAYFAk0pj4wACgkQRRAEFRxkgLSOgwCfZV/I0kCA+AT9Vu1OlXm3sZdU 9PQAmQGVlXtBePoD3jo0KPympGLKAxu5 =Y7s7 -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] SMDK6400: Fix build error for smdk6400 nand_spl support
On 01/09/2011 03:33 PM, Minkyu Kang wrote: > Hi > > On 9 January 2011 10:14, seedshope wrote: >> On 01/08/2011 11:15 PM, Minkyu Kang wrote: >>> Dear seedshope, >>> >>> On 8 January 2011 00:53, seedshopewrote: From: seedshope Modify u-boot.lds from nand_spl/board/samsung/smdk6400. start.o: In function `clbss_l': nand_spl/board/samsung/smdk6400/start.S:357: undefined reference to `coloured_LED_init' nand_spl/board/samsung/smdk6400/start.S:358: undefined reference to `red_LED_on' start.o: In function `_rel_dyn_start_ofs': nand_spl/board/samsung/smdk6400/start.S:366: undefined reference to `__rel_dyn_start' start.o: In function `_rel_dyn_end_ofs': nand_spl/board/samsung/smdk6400/start.S:366: undefined reference to `__rel_dyn_end' start.o: In function `_dynsym_start_ofs': nand_spl/board/samsung/smdk6400/start.S:366: undefined reference to `__dynsym_start' Signed-off-by: seedshope diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 237dcfe..bde0357 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -353,10 +353,11 @@ clbss_l:str r2, [r0]/* clear loop...*/ add r0, r0, #4 cmp r0, r1 bne clbss_l - +#ifndef CONFIG_NAND_SPL >>> CONFIG_PRELOADER is better >> No, The nand_spl support can't find the define of coloured_LED_init and >> red_LED_on. >> It is base on the build error: >> >> make smdk6400_config >> make >> the error information as following: >> >> nand_spl/board/samsung/smdk6400/start.S:357: undefined reference to >> `coloured_LED_init' >> nand_spl/board/samsung/smdk6400/start.S:358: undefined reference to >> `red_LED_on' >> > Please add follow define at Makefile. > AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL > CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL ok, It may be a good method. But I worried other people will be difficult to see the process of the code running. So, if add #ifdef CONFIG_NAND_SPL, It is very clear. What do you think about it? Thanks, seedshope > Thanks > Minkyu Kang ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] mpc83xx: fix pcie configuration space read/write
Hello.
On 07-01-2011 15:42, Baidu Boy wrote:
> This patch fix a problem for the pcie enumeration when the mpc83xx pcie
> controller
> is connected with switch or we use both of the two pcie controller.
> Signed-off-by: Baidu Boy
> ---
> Changes for v2:
> - Avoid line wrap in the patch
> arch/powerpc/cpu/mpc83xx/pcie.c |8 ++--
> 1 files changed, 6 insertions(+), 2 deletions(-)
> diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
> index 46a706d..2a200b8 100644
> --- a/arch/powerpc/cpu/mpc83xx/pcie.c
> +++ b/arch/powerpc/cpu/mpc83xx/pcie.c
[...]
> @@ -324,6 +326,8 @@ void mpc83xx_pcie_init(int num_buses, struct pci_region
> **reg)
> num_buses = ARRAY_SIZE(mpc83xx_pcie_cfg_space);
> }
>
> - for (i = 0; i< num_buses; i++)
> + for (i = 0; i< num_buses; i++){
There should be space between ) and {.
> + pcie_index = i;
> mpc83xx_pcie_init_bus(i, reg[i]);
> + }
> }
WBR, Sergei
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Re: [U-Boot] [PATCH] mpc83xx: fix pcie configuration space read/write
Hello.
On 07-01-2011 15:29, Baidu Boy wrote:
> This patch fix a problem for the pcie enumeration when the mpc83xx pcie
> controller
> is connected with switch or we use both of the two pcie controller.
> Signed-off-by: Baidu Boy
> ---
> arch/powerpc/cpu/mpc83xx/pcie.c |8 ++--
> 1 files changed, 6 insertions(+), 2 deletions(-)
> diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c
> b/arch/powerpc/cpu/mpc83xx/pcie.c
> index 46a706d..2a200b8 100644
> --- a/arch/powerpc/cpu/mpc83xx/pcie.c
> +++ b/arch/powerpc/cpu/mpc83xx/pcie.c
[...]
> @@ -324,6 +326,8 @@ void mpc83xx_pcie_init(int num_buses, struct pci_region
> **reg)
> num_buses = ARRAY_SIZE(mpc83xx_pcie_cfg_space);
> }
>
> - for (i = 0; i< num_buses; i++)
> + for (i = 0; i< num_buses; i++){
There should be space between ) and {
> + pcie_index = i;
> mpc83xx_pcie_init_bus(i, reg[i]);
> + }
> }
WBR, Sergei
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Re: [U-Boot] [PATCH 5/7] powerpc/86xx: Enable common SRIO init code
Hello. On 06-01-2011 19:58, Kumar Gala wrote: > Add the needed defines and code to utilize the common 8xxx srio init > code to setup LAWs and modify device tree if we have SRIO enabled on a > board. > Signed-off-by: Kumar Gala > --- > arch/powerpc/cpu/mpc86xx/fdt.c|9 - > arch/powerpc/include/asm/immap_86xx.h |4 +++- > 2 files changed, 11 insertions(+), 2 deletions(-) > diff --git a/arch/powerpc/cpu/mpc86xx/fdt.c b/arch/powerpc/cpu/mpc86xx/fdt.c > index ff89ee5..3b96bf5 100644 > --- a/arch/powerpc/cpu/mpc86xx/fdt.c > +++ b/arch/powerpc/cpu/mpc86xx/fdt.c [...] > @@ -14,6 +14,9 @@ > DECLARE_GLOBAL_DATA_PTR; > > extern void ft_fixup_num_cores(void *blob); > +#ifdef CONFIG_SYS_HAS_SRIO > +extern void ft_srio_setup(void *blob); > +#endif There's no need to enclose the *extern* declaration within #ifdef. WBR, Sergei ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] SMDK6400: Fix build error for smdk6400 nand_spl support
Hello, On 9 January 2011 21:27, seedshope wrote: > On 01/09/2011 03:33 PM, Minkyu Kang wrote: >> >> Hi >> >> On 9 January 2011 10:14, seedshope wrote: >>> >>> On 01/08/2011 11:15 PM, Minkyu Kang wrote: Dear seedshope, On 8 January 2011 00:53, seedshope wrote: > > From: seedshope > > Modify u-boot.lds from nand_spl/board/samsung/smdk6400. > > start.o: In function `clbss_l': > nand_spl/board/samsung/smdk6400/start.S:357: undefined reference to > `coloured_LED_init' > nand_spl/board/samsung/smdk6400/start.S:358: undefined reference to > `red_LED_on' > start.o: In function `_rel_dyn_start_ofs': > nand_spl/board/samsung/smdk6400/start.S:366: undefined reference to > `__rel_dyn_start' > start.o: In function `_rel_dyn_end_ofs': > nand_spl/board/samsung/smdk6400/start.S:366: undefined reference to > `__rel_dyn_end' > start.o: In function `_dynsym_start_ofs': > nand_spl/board/samsung/smdk6400/start.S:366: undefined reference to > `__dynsym_start' > > Signed-off-by: seedshope > > diff --git a/arch/arm/cpu/arm1176/start.S > b/arch/arm/cpu/arm1176/start.S > index 237dcfe..bde0357 100644 > --- a/arch/arm/cpu/arm1176/start.S > +++ b/arch/arm/cpu/arm1176/start.S > @@ -353,10 +353,11 @@ clbss_l:str r2, [r0] /* > clear > loop... */ > add r0, r0, #4 > cmp r0, r1 > bne clbss_l > - > +#ifndef CONFIG_NAND_SPL CONFIG_PRELOADER is better >>> >>> No, The nand_spl support can't find the define of coloured_LED_init and >>> red_LED_on. >>> It is base on the build error: >>> >>> make smdk6400_config >>> make >>> the error information as following: >>> >>> nand_spl/board/samsung/smdk6400/start.S:357: undefined reference to >>> `coloured_LED_init' >>> nand_spl/board/samsung/smdk6400/start.S:358: undefined reference to >>> `red_LED_on' >>> >> Please add follow define at Makefile. >> AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL >> CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL > > ok, It may be a good method. > > But I worried other people will be difficult to see the process of the code > running. > So, if add #ifdef CONFIG_NAND_SPL, It is very clear. What do you think > about it? > Ah, already used CONFIG_NAND_SPL at start.S. OK, we can do this work (change from CONFIG_NAND_SPL to CONFIG_PRELOADER) at another patch. Thanks Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] NAND: mxc_nand reads/writes only first 512 bytes of each page
Hi, My target is a mx35 board (not yet in mainline). According to the manual and checking the register set and their functionality, the MX.35 has the same nand controller as the i.MX25 processor (MXC_NFC_V1_1 in the mxc_nand driver). Probably there is the same issue with the i.MX25, too. The storage is a Samsung 2GiB (8-bit), 2KB page, sector size 256KiB, and CONFIG_SYS_NAND_LARGEPAGE is set. The flash is recognized correctly. However, after reading/writing, only the first 512 bytes of each page are correct. The rest is filled with random bytes. Under Linux (2.6.37) everything works flawlessy, however the driver in Linux is quite different as what we have in u-boot, and this makes a comparison quite difficult. Any hint how can I better investigate this issue ? Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] NAND: mxc_nand reads/writes only first 512 bytes of each page
Hi, Stefano, 2011/1/9 Stefano Babic : > Hi, > > My target is a mx35 board (not yet in mainline). According to the manual > and checking the register set and their functionality, the MX.35 has the > same nand controller as the i.MX25 processor (MXC_NFC_V1_1 in the > mxc_nand driver). Probably there is the same issue with the i.MX25, too. > > The storage is a Samsung 2GiB (8-bit), 2KB page, sector size 256KiB, and > CONFIG_SYS_NAND_LARGEPAGE is set. > > The flash is recognized correctly. However, after reading/writing, only > the first 512 bytes of each page are correct. The rest is filled with > random bytes. Under Linux (2.6.37) everything works flawlessy, however > the driver in Linux is quite different as what we have in u-boot, and > this makes a comparison quite difficult. Any hint how can I better > investigate this issue ? Have you set the page_size correctly with the following register? 49.4.3.7 Reset Control and Sourse Register - RCSR: NFC_4K This bit is used to config the NandFlash page size. It is defined by PAGE_SIZE while boot up, and it can be configured by software after boot up. 0 not 4k page 1 4k page 8 NFC_FMS This bit is used to config the NandFlash page size.It is defined by PAGE_SIZE while boot up,and it can be configured by software after boot up. 0 not 2k page 1 2k page > > Best regards, > Stefano Babic > > -- > = > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de > = > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] SMDK6400: Fix build error for smdk6400 nand_spl support
On 01/09/2011 10:12 PM, Minkyu Kang wrote: > Hello, > > On 9 January 2011 21:27, seedshope wrote: >> On 01/09/2011 03:33 PM, Minkyu Kang wrote: >>> Hi >>> >>> On 9 January 2011 10:14, seedshopewrote: On 01/08/2011 11:15 PM, Minkyu Kang wrote: > Dear seedshope, > > On 8 January 2011 00:53, seedshope wrote: >> From: seedshope >> >> Modify u-boot.lds from nand_spl/board/samsung/smdk6400. >> >> start.o: In function `clbss_l': >> nand_spl/board/samsung/smdk6400/start.S:357: undefined reference to >> `coloured_LED_init' >> nand_spl/board/samsung/smdk6400/start.S:358: undefined reference to >> `red_LED_on' >> start.o: In function `_rel_dyn_start_ofs': >> nand_spl/board/samsung/smdk6400/start.S:366: undefined reference to >> `__rel_dyn_start' >> start.o: In function `_rel_dyn_end_ofs': >> nand_spl/board/samsung/smdk6400/start.S:366: undefined reference to >> `__rel_dyn_end' >> start.o: In function `_dynsym_start_ofs': >> nand_spl/board/samsung/smdk6400/start.S:366: undefined reference to >> `__dynsym_start' >> >> Signed-off-by: seedshope >> >> diff --git a/arch/arm/cpu/arm1176/start.S >> b/arch/arm/cpu/arm1176/start.S >> index 237dcfe..bde0357 100644 >> --- a/arch/arm/cpu/arm1176/start.S >> +++ b/arch/arm/cpu/arm1176/start.S >> @@ -353,10 +353,11 @@ clbss_l:str r2, [r0]/* >> clear >> loop...*/ >> add r0, r0, #4 >> cmp r0, r1 >> bne clbss_l >> - >> +#ifndef CONFIG_NAND_SPL > CONFIG_PRELOADER is better No, The nand_spl support can't find the define of coloured_LED_init and red_LED_on. It is base on the build error: make smdk6400_config make the error information as following: nand_spl/board/samsung/smdk6400/start.S:357: undefined reference to `coloured_LED_init' nand_spl/board/samsung/smdk6400/start.S:358: undefined reference to `red_LED_on' >>> Please add follow define at Makefile. >>> AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL >>> CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL >> ok, It may be a good method. >> >> But I worried other people will be difficult to see the process of the code >> running. >> So, if add #ifdef CONFIG_NAND_SPL, It is very clear. What do you think >> about it? >> > Ah, already used CONFIG_NAND_SPL at start.S. > OK, we can do this work (change from CONFIG_NAND_SPL to > CONFIG_PRELOADER) at another patch. Ok, I will send RR2 for SMDK6400 relate patch. Thanks, seedshope > Thanks > Minkyu Kang ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 3/5] jz4740 nand spl files
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Hi Scott > > I don't see any of my comments on v3 addressed or responded to: > http://lists.denx.de/pipermail/u-boot/2010-December/083601.html On 12/14/2010 08:05 AM, Scott Wood wrote: >> nand_spl/nand_boot_jz4740.c | 344 >> + > > As I asked last time, is there any reason you can't use the standard > nand_boot.c? Your non-SPL NAND driver looks like the type that would > work with it. thanks for point out, in next version patches, I will remove the nand_boot_jz4740.c > >> +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds >> +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) >> +AFLAGS += -DCONFIG_NAND_SPL >> +CFLAGS += -DCONFIG_NAND_SPL -O2 > > Are you sure you want -O2 and not -Os? What are the space constraints > for this SPL? > the nand_spl must less then 8kb. ~~~ #The boot program can load two areas of data from NAND flash to internal SRAM, one is the normal #area up to 8KB starting from NAND flash address 0, the other is the backup area up to 8KB starting #from NAND flash address 0x2000. After reset, the boot program will first read the normal area data #from NAND flash using hardware Reed-Solomon ECC. If no ECC error is detected or ECC error is #correctable, the boot program then branches to internal SRAM at 4 bytes offset. If it detects an #uncorrectable ECC error, it will continue to read the backup area of data from NAND flash using #hardware Reed-Solomon ECC. ~~~ I try to add "-Os", then I got some compile error: ~~~ mipsel-openwrt-linux-gcc -g -Os -D__KERNEL__ -DCONFIG_SYS_TEXT_BASE=0x8010 -I/home/xiangfu/workspace/PanGu/u-boot.upstream/include -fno-builtin -ffreestanding -nostdinc -isystem /home/xiangfu/workspace/PanGu/openwrt-xburst/staging_dir/toolchain-mipsel_gcc-4.3.3+cs_uClibc-0.9.30.1/usr/lib/gcc/mipsel-openwrt-linux-uclibc/4.3.3/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -msoft-float -march=4kc -mtune=4kc -mabicalls -mips32 -Wall -Wstrict-prototypes -fno-stack-protector -DCONFIG_NAND_SPL -Os -c -o jz4740_nand.o jz4740_nand.c jz4740_nand.c: In function 'board_nand_init': jz4740_nand.c:298: warning: implicit declaration of function 'usb_boot' cd /home/xiangfu/workspace/PanGu/u-boot.upstream/nand_spl/board/xburst/nanonote && mipsel-openwrt-linux-ld -Bstatic -T /home/xiangfu/workspace/PanGu/u-boot.upstream/nand_spl/board/xburst/nanonote/u-boot.lds -Ttext 0x8000 $UNDEF_SYM start.o usbboot.o nand_boot.o cpu.o jz4740.o jz_serial.o jz4740_nand.o \ -Map /home/xiangfu/workspace/PanGu/u-boot.upstream/nand_spl/u-boot-spl.map \ -o /home/xiangfu/workspace/PanGu/u-boot.upstream/nand_spl/u-boot-spl jz4740.o: In function `sdram_init': jz4740.c:(.text+0x60): undefined reference to `memcpy' ~~~ >> +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl.bin >> +dd bs=1024 count=8 if=/dev/zero of=$(nandobj)junk1 >> +cat $< $(nandobj)junk1 > $(nandobj)junk2 >> +dd bs=1024 count=8 if=$(nandobj)junk2 of=$(nandobj)junk3 >> +cat $(nandobj)junk3 $(nandobj)junk3 > $(nandobj)junk4 >> +dd bs=1024 count=256 if=/dev/zero of=$(nandobj)junk5 >> +cat $(nandobj)junk4 $(nandobj)junk5 > $(nandobj)junk6 >> +dd bs=1024 count=256 if=$(nandobj)junk6 of=$@ >> +rm -f $(nandobj)junk* > > Again, please explain what's going on here. Other boards don't do this. > add comments in "Makefile" in next patches. - -- Best Regards Xiangfu Liu http://www.openmobilefree.net -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.10 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iEYEARECAAYFAk0p2LEACgkQRRAEFRxkgLSVCwCeIQ3AC86hiUy98sBLoG8Zq1EE WP8An3a8aIyzzwDJ46I/wBNytwGyJTyK =YvtK -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] S3C64XX: timer: replace bss variable by gd
Dear Minkyu Kang, In message <4d22d6f7.3050...@samsung.com> you wrote: > Use the global data instead of bss variable, replace as follow. > timer_load_val -> timer_rate_hz > timestamp -> timer_reset_value I object against using variables wich have somewhat self-explanatory names for different purposes. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I program, therefore I am. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] S5P: timer: replace bss variable by gd
Dear Minkyu Kang, In message <4d22d59b.7030...@samsung.com> you wrote: > Use the global data instead of bss variable, replace as follow. > count_value -> timer_rate_hz > timestamp -> timer_reset_value > lastdec -> lastinc I object against using variables wich have somewhat self-explanatory names for different purposes. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Don't you know anything? I should have thought anyone knows that who knows anything about anything... - Terry Pratchett, _Soul Music_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 0/8] those series patches for add ben nanonote board
Hi Wolfgang those patches are for add xburst jz4740 and Ben NanoNote(named qi_lb60) to U-Boot some info about xburst jz4740: the xburst jz4740 is recently added to linux 2.6.36 and it's support the device Ben NanoNote out of box, this xburst jz4740 cpu have one feature is Boot From USB, there is a small rom in jz4740, but LOW some PIN, the cpu will boot to this small rom, then init cpu and USB module, then we can send 8KB bin file to the cpu by USB(by using 'xbboot' or 'usbboot'[1]). which means if your bootloader is borken,(the first few KBs in NAND) you can always boot the device from usb, then reflash the nand. in OpenMoko FreeRunner, there are NOR and NAND. when people broken the nand bootloader, it's must boot from NOR, reflash the bootloader back when people broken the NAND and NOR, he(she) must reflash by using JTAG but in Ben NanoNote, we just need boot from usb. flash the nand again :) BTW:there are a lot of PMP, Audio device in China use the Xburst cpu, but I think they are all base on u-boot 1.1.6. by working on Ben NanoNote (http://en.qi-hardware.com) one year, we try to update the u-boot to last version and send it to upstream. :) for more info about Ingenic Xburst JZ4740 http://www.ingenic.cn/eng/default.aspx http://www.linux-mips.org/wiki/Ingenic FIXED in [PATCH v3] 1. describe what Jz4740 SoC 2. remove the ENDIANNESS in config.mk 3. don't breaks the 80-charcter-wide rule 4. get rid of #if 0 5. use proper I/O accessors to access registers. 6. remove C++ comments, cleanup code style. FIXED in [PATCH v4] 1. add Entry to MAINTAINERS and boards.cfg 2. add ben nanonote(qi_lb60) to Makefile 3. tested with CROSS_COMPILE=mips_4KCle- ./MAKEALL mips_el FIXED in [PATCH v5] 1. remove nand_spl/nand_boot_jz4740.c 2. some cleanup Xiangfu Liu (8): those files are jz4740 base files this is jz4740 head file jz4740 nand spl files jz4740 nand driver add Ben NanoNote board add entry to MAINTAINERS and boards.cfg modify files for ben nanonote board add software usbboot MAINTAINERS |4 + MAKEALL |4 +- Makefile | 10 + arch/mips/cpu/xburst/Makefile | 50 + arch/mips/cpu/xburst/config.mk| 33 + arch/mips/cpu/xburst/cpu.c| 160 arch/mips/cpu/xburst/jz4740.c | 266 ++ arch/mips/cpu/xburst/jz_serial.c | 128 +++ arch/mips/cpu/xburst/start.S | 164 arch/mips/cpu/xburst/start_spl.S | 63 ++ arch/mips/cpu/xburst/timer.c | 172 arch/mips/cpu/xburst/usbboot.S| 841 ++ arch/mips/include/asm/global_data.h |9 + arch/mips/include/asm/jz4740.h| 1380 + arch/mips/lib/board.c |8 + arch/mips/lib/time.c |2 + board/xburst/nanonote/Makefile| 45 + board/xburst/nanonote/config.mk | 31 + board/xburst/nanonote/nanonote.c | 96 ++ board/xburst/nanonote/u-boot-nand.lds | 63 ++ boards.cfg|1 + drivers/mtd/nand/Makefile |1 + drivers/mtd/nand/jz4740_nand.c| 327 +++ include/configs/nanonote.h| 206 + include/configs/qi_lb60.h | 28 + nand_spl/board/xburst/nanonote/Makefile | 106 +++ nand_spl/board/xburst/nanonote/u-boot.lds | 63 ++ 27 files changed, 4260 insertions(+), 1 deletions(-) create mode 100644 arch/mips/cpu/xburst/Makefile create mode 100644 arch/mips/cpu/xburst/config.mk create mode 100644 arch/mips/cpu/xburst/cpu.c create mode 100644 arch/mips/cpu/xburst/jz4740.c create mode 100644 arch/mips/cpu/xburst/jz_serial.c create mode 100644 arch/mips/cpu/xburst/start.S create mode 100644 arch/mips/cpu/xburst/start_spl.S create mode 100644 arch/mips/cpu/xburst/timer.c create mode 100644 arch/mips/cpu/xburst/usbboot.S create mode 100644 arch/mips/include/asm/jz4740.h create mode 100644 board/xburst/nanonote/Makefile create mode 100644 board/xburst/nanonote/config.mk create mode 100644 board/xburst/nanonote/nanonote.c create mode 100644 board/xburst/nanonote/u-boot-nand.lds create mode 100644 drivers/mtd/nand/jz4740_nand.c create mode 100644 include/configs/nanonote.h create mode 100644 include/configs/qi_lb60.h create mode 100644 nand_spl/board/xburst/nanonote/Makefile create mode 100644 nand_spl/board/xburst/nanonote/u-boot.lds ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 1/8] those files are jz4740 base files
Signed-off-by: Xiangfu Liu Acked-by: Daniel Acked-by: ChangWei Jia --- arch/mips/cpu/xburst/Makefile| 50 +++ arch/mips/cpu/xburst/config.mk | 33 ++ arch/mips/cpu/xburst/cpu.c | 160 arch/mips/cpu/xburst/jz4740.c| 266 arch/mips/cpu/xburst/jz_serial.c | 128 ++ arch/mips/cpu/xburst/start.S | 164 arch/mips/cpu/xburst/start_spl.S | 63 +++ arch/mips/cpu/xburst/timer.c | 172 arch/mips/cpu/xburst/usbboot.S | 841 ++ 9 files changed, 1877 insertions(+), 0 deletions(-) create mode 100644 arch/mips/cpu/xburst/Makefile create mode 100644 arch/mips/cpu/xburst/config.mk create mode 100644 arch/mips/cpu/xburst/cpu.c create mode 100644 arch/mips/cpu/xburst/jz4740.c create mode 100644 arch/mips/cpu/xburst/jz_serial.c create mode 100644 arch/mips/cpu/xburst/start.S create mode 100644 arch/mips/cpu/xburst/start_spl.S create mode 100644 arch/mips/cpu/xburst/timer.c create mode 100644 arch/mips/cpu/xburst/usbboot.S diff --git a/arch/mips/cpu/xburst/Makefile b/arch/mips/cpu/xburst/Makefile new file mode 100644 index 000..a9a6e77 --- /dev/null +++ b/arch/mips/cpu/xburst/Makefile @@ -0,0 +1,50 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(CPU).o + +START = start.o +SOBJS-y= +COBJS-y = cpu.o timer.o jz_serial.o + +COBJS-$(CONFIG_JZ4740) += jz4740.o + +SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(START) $(LIB) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/mips/cpu/xburst/config.mk b/arch/mips/cpu/xburst/config.mk new file mode 100644 index 000..fc9b255 --- /dev/null +++ b/arch/mips/cpu/xburst/config.mk @@ -0,0 +1,33 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2) +MIPSFLAGS:=$(shell \ +if [ "$v" -lt "14" ]; then \ + echo "-mcpu=4kc"; \ +else \ + echo "-march=4kc -mtune=4kc"; \ +fi) + +MIPSFLAGS += -mabicalls -mips32 + +PLATFORM_CPPFLAGS += $(MIPSFLAGS) diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c new file mode 100644 index 000..7b87f8b --- /dev/null +++ b/arch/mips/cpu/xburst/cpu.c @@ -0,0 +1,160 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more det
[U-Boot] [PATCH v5 3/8] jz4740 nand spl files
Signed-off-by: Xiangfu Liu
Acked-by: Daniel
Acked-by: ChangWei Jia
---
nand_spl/board/xburst/nanonote/Makefile | 106 +
nand_spl/board/xburst/nanonote/u-boot.lds | 63 +
2 files changed, 169 insertions(+), 0 deletions(-)
create mode 100644 nand_spl/board/xburst/nanonote/Makefile
create mode 100644 nand_spl/board/xburst/nanonote/u-boot.lds
diff --git a/nand_spl/board/xburst/nanonote/Makefile
b/nand_spl/board/xburst/nanonote/Makefile
new file mode 100644
index 000..9775d14
--- /dev/null
+++ b/nand_spl/board/xburst/nanonote/Makefile
@@ -0,0 +1,106 @@
+#
+# (C) Copyright 2006
+# Stefan Roese, DENX Software Engineering, s...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS= -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_NAND_SPL_TEXT_BASE)
+AFLAGS += -DCONFIG_NAND_SPL
+CFLAGS += -DCONFIG_NAND_SPL -O2
+
+SOBJS = start.o usbboot.o
+COBJS = nand_boot.o cpu.o jz4740.o jz_serial.o jz4740_nand.o
+
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS := $(SOBJS) $(COBJS)
+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj:= $(OBJTREE)/nand_spl/
+
+ALL= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin
$(nandobj)u-boot-spl-16k.bin
+all: $(obj).depend $(ALL)
+
+#The boot program can load two areas of data from NAND flash to internal SRAM,
one is the normal
+#area up to 8KB starting from NAND flash address 0, the other is the backup
area up to 8KB starting
+#from NAND flash address 0x2000. After reset, the boot program will first read
the normal area data
+#from NAND flash using hardware Reed-Solomon ECC. If no ECC error is detected
or ECC error is
+#correctable, the boot program then branches to internal SRAM at 4 bytes
offset. If it detects an
+#uncorrectable ECC error, it will continue to read the backup area of data
from NAND flash using
+#hardware Reed-Solomon ECC.
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl.bin
+ dd bs=1024 count=8 if=/dev/zero of=$(nandobj)junk1
+ cat $< $(nandobj)junk1 > $(nandobj)junk2
+ dd bs=1024 count=8 if=$(nandobj)junk2 of=$(nandobj)junk3
+ cat $(nandobj)junk3 $(nandobj)junk3 > $(nandobj)junk4
+ dd bs=1024 count=256 if=/dev/zero of=$(nandobj)junk5
+ cat $(nandobj)junk4 $(nandobj)junk5 > $(nandobj)junk6
+ dd bs=1024 count=256 if=$(nandobj)junk6 of=$@
+ rm -f $(nandobj)junk*
+
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl: $(OBJS)
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
+ -Map $(nandobj)u-boot-spl.map \
+ -o $(nandobj)u-boot-spl
+
+# create symbolic links for common files
+$(obj)start.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/mips/cpu/xburst/start_spl.S $@
+
+$(obj)usbboot.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/mips/cpu/xburst/usbboot.S $@
+
+$(obj)cpu.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/mips/cpu/xburst/cpu.c $@
+
+$(obj)jz4740.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/mips/cpu/xburst/jz4740.c $@
+
+$(obj)jz_serial.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/mips/cpu/xburst/jz_serial.c $@
+
+$(obj)nand_boot.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/nand_spl/nand_boot.c $@
+
+$(obj)jz4740_nand.c:
+ @rm -f $@
+ @ln -s $(TOPDIR)/drivers/mtd/nand/jz4740_nand.c $@
+
+$(obj)%.o: $(obj)%.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o: $(obj)%.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
diff --git a/nand_spl/board/xburst/nanonote/u-boot.lds
b/nand_spl/board/xburst/nanonote/u-boot.lds
new file mode 100644
index 000..7042388
--- /dev/null
+++ b/nand_spl/board/xburst/nanonote/u-boot.lds
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2005
+ * Ingenic Semiconductor,
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your opti
[U-Boot] [PATCH v5 2/8] this is jz4740 head file
Signed-off-by: Xiangfu Liu Acked-by: Daniel Acked-by: ChangWei Jia --- arch/mips/include/asm/jz4740.h | 1380 1 files changed, 1380 insertions(+), 0 deletions(-) create mode 100644 arch/mips/include/asm/jz4740.h diff --git a/arch/mips/include/asm/jz4740.h b/arch/mips/include/asm/jz4740.h new file mode 100644 index 000..5be26dc --- /dev/null +++ b/arch/mips/include/asm/jz4740.h @@ -0,0 +1,1380 @@ +/* + * Include file for Ingenic Semiconductor's JZ4740 CPU. + */ +#ifndef __JZ4740_H__ +#define __JZ4740_H__ + +#include +#include + +/* Boot ROM Specification */ +/* NOR Boot config */ +#define JZ4740_NORBOOT_8BIT0x /* 8-bit data bus flash */ +#define JZ4740_NORBOOT_16BIT 0x10101010 /* 16-bit data bus flash */ +#define JZ4740_NORBOOT_32BIT 0x20202020 /* 32-bit data bus flash */ +/* NAND Boot config */ +#define JZ4740_NANDBOOT_B8R3 0x /* 8-bit bus & 3 row cycles */ +#define JZ4740_NANDBOOT_B8R2 0xf0f0f0f0 /* 8-bit bus & 2 row cycles */ +#define JZ4740_NANDBOOT_B16R3 0x0f0f0f0f /* 16-bit bus & 3 row cycles */ +#define JZ4740_NANDBOOT_B16R2 0x /* 16-bit bus & 2 row cycles */ + +/* Register Definitions */ +#defineCPM_BASE0xB000 +#defineINTC_BASE 0xB0001000 +#defineTCU_BASE0xB0002000 +#defineWDT_BASE0xB0002000 +#defineRTC_BASE0xB0003000 +#defineGPIO_BASE 0xB001 +#defineAIC_BASE0xB002 +#defineICDC_BASE 0xB002 +#defineMSC_BASE0xB0021000 +#defineUART0_BASE 0xB003 +#defineI2C_BASE0xB0042000 +#defineSSI_BASE0xB0043000 +#defineSADC_BASE 0xB007 +#defineEMC_BASE0xB301 +#defineDMAC_BASE 0xB302 +#defineUHC_BASE0xB303 +#defineUDC_BASE0xB304 +#defineLCD_BASE0xB305 +#defineSLCD_BASE 0xB305 +#defineCIM_BASE0xB306 +#defineETH_BASE0xB310 + +/* + * INTC (Interrupt Controller) + */ +#define INTC_ISR (INTC_BASE + 0x00) +#define INTC_IMR (INTC_BASE + 0x04) +#define INTC_IMSR (INTC_BASE + 0x08) +#define INTC_IMCR (INTC_BASE + 0x0c) +#define INTC_IPR (INTC_BASE + 0x10) + + +/* 1st-level interrupts */ +#define IRQ_I2C1 +#define IRQ_UHC3 +#define IRQ_UART0 9 +#define IRQ_SADC 12 +#define IRQ_MSC14 +#define IRQ_RTC15 +#define IRQ_SSI16 +#define IRQ_CIM17 +#define IRQ_AIC18 +#define IRQ_ETH19 +#define IRQ_DMAC 20 +#define IRQ_TCU2 21 +#define IRQ_TCU1 22 +#define IRQ_TCU0 23 +#define IRQ_UDC24 +#define IRQ_GPIO3 25 +#define IRQ_GPIO2 26 +#define IRQ_GPIO1 27 +#define IRQ_GPIO0 28 +#define IRQ_IPU29 +#define IRQ_LCD30 + +/* 2nd-level interrupts */ +#define IRQ_DMA_0 32 /* 32 to 37 for DMAC channel 0 to 5 */ +#define IRQ_GPIO_0 48 /* 48 to 175 for GPIO pin 0 to 127 */ + +/* + * RTC + */ +#define RTC_RCR(RTC_BASE + 0x00) /* RTC Control Register */ +#define RTC_RSR(RTC_BASE + 0x04) /* RTC Second Register */ +#define RTC_RSAR (RTC_BASE + 0x08) /* RTC Second Alarm Register */ +#define RTC_RGR(RTC_BASE + 0x0c) /* RTC Regulator Register */ + +#define RTC_HCR(RTC_BASE + 0x20) /* Hibernate Control Register */ +#define RTC_HWFCR (RTC_BASE + 0x24) /* Hibernate Wakeup Filter Counter Reg */ +#define RTC_HRCR (RTC_BASE + 0x28) /* Hibernate Reset Counter Register */ +#define RTC_HWCR (RTC_BASE + 0x2c) /* Hibernate Wakeup Control Register */ +#define RTC_HWRSR (RTC_BASE + 0x30) /* Hibernate Wakeup Status Register */ +#define RTC_HSPR (RTC_BASE + 0x34) /* Hibernate Scratch Pattern Register */ + + +/* RTC Control Register */ +#define RTC_RCR_WRDY (1 << 7) /* Write Ready Flag */ +#define RTC_RCR_HZ (1 << 6) /* 1Hz Flag */ +#define RTC_RCR_HZIE (1 << 5) /* 1Hz Interrupt Enable */ +#define RTC_RCR_AF (1 << 4) /* Alarm Flag */ +#define RTC_RCR_AIE(1 << 3) /* Alarm Interrupt Enable */ +#define RTC_RCR_AE (1 << 2) /* Alarm Enable */ +#define RTC_RCR_RTCE (1 << 0) /* RTC Enable */ + +/* RTC Regulator Register */ +#define RTC_RGR_LOCK (1 << 31) /* Lock Bit */ +#define RTC_RGR_ADJC_BIT 16 +#define RTC_RGR_ADJC_MASK (0x3ff << RTC_RGR_ADJC_BIT) +#define RTC_RGR_NC1HZ_BIT 0 +#define RTC_RGR_NC1HZ_MASK (0x << RTC_RGR_NC1HZ_BIT) + +/* Hibernate Control Register */ +#define RTC_HCR_PD (1 << 0) /* Power Down */ + +/* Hibernate Wakeup Filter Counter Register */ +#define RTC_HWFCR_BIT 5 +#define RTC_HWFCR_MASK (0x7ff << RTC_HWFCR_BIT) +
[U-Boot] [PATCH v5 4/8] jz4740 nand driver
Signed-off-by: Xiangfu Liu
Acked-by: Daniel
Acked-by: ChangWei Jia
---
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/jz4740_nand.c | 315
2 files changed, 316 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/nand/jz4740_nand.c
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..bf2a8f9 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -50,6 +50,7 @@ COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o
+COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
endif
COBJS := $(COBJS-y)
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
new file mode 100644
index 000..32b41ef
--- /dev/null
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -0,0 +1,315 @@
+/*
+ * Platform independend driver for JZ4740.
+ *
+ * Copyright (c) 2007 Ingenic Semiconductor Inc.
+ * Author:
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+#include
+
+#include
+#include
+#include
+
+#ifdef CONFIG_NAND_SPL
+#define printf(arg...) do {} while (0)
+#endif
+
+#define JZ_NAND_DATA_ADDR ((void __iomem *)0xB800)
+#define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000)
+#define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x1)
+
+#define BIT(x) (1 << (x))
+#define JZ_NAND_ECC_CTRL_ENCODING BIT(3)
+#define JZ_NAND_ECC_CTRL_RSBIT(2)
+#define JZ_NAND_ECC_CTRL_RESET BIT(1)
+#define JZ_NAND_ECC_CTRL_ENABLEBIT(0)
+
+#define EMC_SMCR1_OPT_NAND 0x094c4400
+/* Optimize the timing of nand */
+
+static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
+ .eccbytes = 72,
+ .eccpos = {
+ 12, 13, 14, 15, 16, 17, 18, 19,
+ 20, 21, 22, 23, 24, 25, 26, 27,
+ 28, 29, 30, 31, 32, 33, 34, 35,
+ 36, 37, 38, 39, 40, 41, 42, 43,
+ 44, 45, 46, 47, 48, 49, 50, 51,
+ 52, 53, 54, 55, 56, 57, 58, 59,
+ 60, 61, 62, 63, 64, 65, 66, 67,
+ 68, 69, 70, 71, 72, 73, 74, 75,
+ 76, 77, 78, 79, 80, 81, 82, 83},
+ .oobfree = {
+ {.offset = 2,
+.length = 10},
+ {.offset = 84,
+.length = 44}}
+};
+
+#ifdef CONFIG_NAND_SPL
+#if (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R3)
+ #define NAND_BUS_WIDTH 8
+ #define NAND_ROW_CYCLE 3
+#elif (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R2)
+ #define NAND_BUS_WIDTH 8
+ #define NAND_ROW_CYCLE 2
+#elif (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B16R3)
+ #define NAND_BUS_WIDTH 16
+ #define NAND_ROW_CYCLE 3
+#elif (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B16R2)
+ #define NAND_BUS_WIDTH 16
+ #define NAND_ROW_CYCLE 2
+#endif
+
+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd->priv;
+#if NAND_BUS_WIDTH == 16
+ for (i = 0; i < len; i += 2)
+ buf[i] = readw(this->IO_ADDR_R);
+#elif NAND_BUS_WIDTH == 8
+ for (i = 0; i < len; i++)
+ buf[i] = readb(this->IO_ADDR_R);
+#endif
+}
+
+static u_char nand_read_byte(struct mtd_info *mtd)
+{
+ struct nand_chip *this = mtd->priv;
+ return readb(this->IO_ADDR_R);
+}
+#endif
+
+static int is_reading;
+
+static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+ struct nand_chip *this = mtd->priv;
+
+ if (ctrl & NAND_CTRL_CHANGE) {
+ if (ctrl & NAND_ALE)
+ this->IO_ADDR_W = JZ_NAND_ADDR_ADDR;
+ else if (ctrl & NAND_CLE)
+ this->IO_ADDR_W = JZ_NAND_CMD_ADDR;
+ else
+ this->IO_ADDR_W = JZ_NAND_DATA_ADDR;
+
+ if (ctrl & NAND_NCE)
+ writel(readl(EMC_NFCSR) | EMC_NFCSR_NFCE1, EMC_NFCSR);
+ else
+ writel(readl(EMC_NFCSR) & ~EMC_NFCSR_NFCE1, EMC_NFCSR);
+ }
+
+ if (cmd != NAND_CMD_NONE)
+ writeb(cmd, this->IO_ADDR_W);
+}
+
+static int jz_nand_device_ready(struct mtd_info *mtd)
+{
+ return (readl(GPIO_PXPIN(2)) & 0x4000) ? 1 : 0;
+}
+
+void board_nand_select_device(struct nand_chip *nand, int chip)
+{
+ /*
+* Don't use "chip" to address the NAND device,
+* generate the cs from the address where it is encoded.
+*/
+}
+
+static int jz_nand_rs_calculate_ecc(struct mtd_info* mtd, const u_char* dat,
+ u_char* ecc_code)
+{
+ uint32_t status;
+ int i;
+ volatile u8 *paraddr = (volatile u8 *)EMC_NFPAR0;
+
+ if (is_rea
[U-Boot] [PATCH v5 5/8] add Ben NanoNote board
Signed-off-by: Xiangfu Liu
Acked-by: Daniel
Acked-by: ChangWei Jia
---
board/xburst/nanonote/Makefile| 45 +++
board/xburst/nanonote/config.mk | 31 +
board/xburst/nanonote/nanonote.c | 96 +++
board/xburst/nanonote/u-boot-nand.lds | 63 ++
include/configs/nanonote.h| 206 +
include/configs/qi_lb60.h | 28 +
6 files changed, 469 insertions(+), 0 deletions(-)
create mode 100644 board/xburst/nanonote/Makefile
create mode 100644 board/xburst/nanonote/config.mk
create mode 100644 board/xburst/nanonote/nanonote.c
create mode 100644 board/xburst/nanonote/u-boot-nand.lds
create mode 100644 include/configs/nanonote.h
create mode 100644 include/configs/qi_lb60.h
diff --git a/board/xburst/nanonote/Makefile b/board/xburst/nanonote/Makefile
new file mode 100644
index 000..2f5b4be
--- /dev/null
+++ b/board/xburst/nanonote/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2006
+# Ingenic Semiconductor,
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := $(BOARD).o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/xburst/nanonote/config.mk b/board/xburst/nanonote/config.mk
new file mode 100644
index 000..858e6a2
--- /dev/null
+++ b/board/xburst/nanonote/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2006 Qi Hardware, Inc.
+# Author: Xiangfu Liu
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Qi Hardware, Inc. Ben NanoNote (QI_LB60)
+#
+
+ifndef TEXT_BASE
+# ROM version
+# TEXT_BASE = 0x8800
+
+# RAM version
+TEXT_BASE = 0x8010
+endif
diff --git a/board/xburst/nanonote/nanonote.c b/board/xburst/nanonote/nanonote.c
new file mode 100644
index 000..1a577e0
--- /dev/null
+++ b/board/xburst/nanonote/nanonote.c
@@ -0,0 +1,96 @@
+/*
+ * Authors: Xiangfu Liu
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 3 of the License, or (at your option) any later version.
+ */
+
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void gpio_init(void)
+{
+ /* Initialize NAND Flash Pins */
+ __gpio_as_nand();
+
+ /* Initialize SDRAM pins */
+ __gpio_as_sdram_16bit_4720();
+
+ /* Initialize LCD pins */
+ __gpio_as_lcd_18bit();
+
+ /* Initialize MSC pins */
+ __gpio_as_msc();
+
+ /* Initialize Other pins */
+ unsigned int i;
+ for (i = 0; i < 7; i++){
+ __gpio_as_input(GPIO_KEYIN_BASE + i);
+ __gpio_enable_pull(GPIO_KEYIN_BASE + i);
+ }
+
+ for (i = 0; i < 8; i++) {
+ __gpio_as_output(GPIO_KEYOUT_BASE + i);
+ __gpio_clear_pin(GPIO_KEYOUT_BASE + i);
+ }
+
+ __gpio_as_input(GPIO_KEYIN_8);
+ __gpio_enable_pull(GPIO_KEYIN_8);
+
+ /* enable the TP4, TP5 as UART0 */
+ __gpio_jtag_to_uart0();
+
+ __gpio_as_output(GPIO_AUDIO_POP);
+ __gpio_set_pin(GPIO_AUDIO_POP);
+
+
[U-Boot] [PATCH v5 6/8] add entry to MAINTAINERS and boards.cfg
Signed-off-by: Xiangfu Liu Acked-by: Daniel Acked-by: ChangWei Jia --- MAINTAINERS |4 boards.cfg |1 + 2 files changed, 5 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index ba83f71..0482a5f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -906,6 +906,10 @@ Stefan Roese vct_xxx MIPS32 4Kc +Xiangfu Liu + + qi_lb60 MIPS32 jz4740 + # # Nios-II Systems: # # # diff --git a/boards.cfg b/boards.cfg index 94b8745..2802a5c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -210,6 +210,7 @@ EP2500 m68kmcf52x2 ep2500 Mercury microblaze-generic microblaze microblaze microblaze-generic xilinx purple mipsmips tb0229 mipsmips +qi_lb60 mipsmips PCI5441 nios2 nios2 pci5441 psyent PK1C20 nios2 nios2 pk1c20 psyent EVB64260 powerpc 74xx_7xxevb64260- - EVB64260 -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 7/8] modify files for ben nanonote board
Signed-off-by: Xiangfu Liu
Acked-by: Daniel
Acked-by: ChangWei Jia
---
MAKEALL |4 +++-
Makefile| 10 ++
arch/mips/include/asm/global_data.h |9 +
arch/mips/lib/board.c |8
arch/mips/lib/time.c|2 ++
5 files changed, 32 insertions(+), 1 deletions(-)
diff --git a/MAKEALL b/MAKEALL
index a732e6a..7297367 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -530,7 +530,9 @@ LIST_mips=" \
## MIPS Systems(little endian)
#
-LIST_mips4kc_el=""
+LIST_mips4kc_el=" \
+ qi_lb60
+"
LIST_mips5kc_el=""
diff --git a/Makefile b/Makefile
index 9055028..838bd23 100644
--- a/Makefile
+++ b/Makefile
@@ -1176,6 +1176,16 @@ qemu_mips_config : unconfig
@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
+#
+## MIPS32 XBurst jz4740
+#
+qi_lb60_config : unconfig
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
+ @echo "Compile NAND boot image for QI LB60"
+ @$(MKCONFIG) -a qi_lb60 mips xburst nanonote xburst
+ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+
#
# Nios
#
diff --git a/arch/mips/include/asm/global_data.h
b/arch/mips/include/asm/global_data.h
index 271a290..256f242 100644
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -39,6 +39,15 @@
typedefstruct global_data {
bd_t*bd;
unsigned long flags;
+#if defined(CONFIG_JZSOC)
+/* There are other clocks in the jz4740 */
+unsigned long cpu_clk;/* CPU core clock */
+unsigned long sys_clk;/* System bus clock */
+unsigned long per_clk;/* Peripheral bus clock */
+unsigned long mem_clk;/* Memory bus clock */
+unsigned long dev_clk;/* Device clock */
+unsigned long fb_base;/* base address of framebuffer */
+#endif
unsigned long baudrate;
unsigned long have_console; /* serial_init() was called */
phys_size_t ram_size; /* RAM size */
diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c
index f317124..9115055 100644
--- a/arch/mips/lib/board.c
+++ b/arch/mips/lib/board.c
@@ -136,10 +136,18 @@ static int init_baudrate (void)
* argument, and returns an integer return code, where 0 means
* "continue" and != 0 means "fatal error, hang the system".
*/
+
+#if defined(CONFIG_JZSOC)
+extern int jzsoc_init(void);
+#endif
+
typedef int (init_fnc_t) (void);
init_fnc_t *init_sequence[] = {
board_early_init_f,
+#if defined(CONFIG_JZSOC)
+ jzsoc_init, /* init gpio/clocks/dram etc. */
+#endif
timer_init,
env_init, /* initialize environment */
#ifdef CONFIG_INCA_IP
diff --git a/arch/mips/lib/time.c b/arch/mips/lib/time.c
index 0e66441..653be6c 100644
--- a/arch/mips/lib/time.c
+++ b/arch/mips/lib/time.c
@@ -24,6 +24,7 @@
#include
#include
+#ifndef CONFIG_JZSOC
static unsigned long timestamp;
/* how many counter cycles in a jiffy */
@@ -96,3 +97,4 @@ ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
}
+#endif
--
1.7.0.4
___
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Re: [U-Boot] [PATCH] S3C64XX: timer: replace bss variable by gd
Dear Reinhard Meyer, In message <4d2582f6.2040...@emk-elektronik.de> you wrote: > > >> timer_load_val -> timer_rate_hz > >> timestamp -> timer_reset_value > > I am not too happy about this "misuse" of gd->variables making them > "misnomers" and the code harder to read. I'm not happy with this as well, and I actually will not accept the patch because of that. > timer_rate_hz is supposed to hold the rate at which the high > speed timer increments. > > timer_reset_value supposedly holds the high speed timer's value when > timer_reset() is called. > > There was a discussion started about this a while ago, but came to no > conclusion... I suggested this before: --- Forwarded Message Date:Thu, 16 Dec 2010 15:12:41 +0100 From:Wolfgang Denk To: Reinhard Meyer cc: U-Boot user list , h...@denx.de Subject: Re: [U-Boot] arm926ejs, timer: ... Maybe we should lean back and have a look at what Linux is doing in this area? The recent patch series "64-bit sched_clock" on the lak ML seems to fit pretty well :-) See http://thread.gmane.org/gmane.linux.ports.arm.kernel/99740 Can we copy from Linux? ... --- End of Forwarded Message Unfortunately it seems nobody had time or resources to have a look yet. I think we should fix this for real now, and not continue to implement one SoC specific version or workaround after the other. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de If you hear an onion ring, answer it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 8/8] add software usbboot
Signed-off-by: Xiangfu Liu Acked-by: Daniel Acked-by: ChangWei Jia --- drivers/mtd/nand/jz4740_nand.c | 12 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c index 32b41ef..b15c4ea 100644 --- a/drivers/mtd/nand/jz4740_nand.c +++ b/drivers/mtd/nand/jz4740_nand.c @@ -285,6 +285,18 @@ extern int serial_init(void); pll_init(); serial_init(); sdram_init(); + +#if defined(CONFIG_NANONOTE) +#define KEY_U_OUT (32 * 2 + 16) +#define KEY_U_IN(32 * 3 + 19) + __gpio_as_input(KEY_U_IN); + __gpio_enable_pull(KEY_U_IN); + __gpio_as_output(KEY_U_OUT); + __gpio_clear_pin(KEY_U_OUT); + + if (__gpio_get_pin(KEY_U_IN) == 0) + usb_boot(); +#endif #endif uint32_t reg; -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] git merge summary
Hi all, In message Detlev Zundel wrote: > > > may I ask again for opinions about enabling that feature? > > I also would like to see it. Wolfgang, is there anything that you > don't like about this option? Do you have any comments or pros or cons for/against this request? Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de How does a project get to be a year late? ... One day at a time. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] common: introduce a genutils.h file
Dear Heiko Schocher, In message <1292232393-26481-1-git-send-email...@denx.de> you wrote: > as discussed in thread > http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/76654 > > and as a result of this discussion Michael Zaidman > proposed to create a genutils.h, see: > > http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/78692 > > So, introduce this genutils.h, as BUILD_BUG_ON is also > needed in sensor support. > > Signed-off-by: Heiko Schocher > cc: Michael Zaidman > --- > maybe I should include genutils.h in common.h ? > > include/genutils.h | 30 ++ I do not like the idea of adding yet another nonstandard header file with just a few definitions in it. Linux defines this is include/linux/kernel.h, i. e. in a pretty central place, and we should porobably do the same. How about adding it to include/common.h instead? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The only way to get rid of a temptation is to yield to it. - Oscar Wilde ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2 v2] hwmon: do not init sensors on startup
Dear Heiko Schocher, In message <1292232401-26523-1-git-send-email...@denx.de> you wrote: > The U-Boot Design Principles[1] clearly say: > > Initialize devices only when they are needed within U-Boot, i.e. don't > initialize the Ethernet interface(s) unless U-Boot performs a download > over Ethernet; don't initialize any IDE or USB devices unless U-Boot > actually tries to load files from these, etc. (and don't forget to > shut down these devices after using them - otherwise nasty things may > happen when you try to boot your OS). > > So, do not initialize and read the sensors on startup. > > Signed-off-by: Heiko Schocher > cc: Wolfgang Denk > > --- > - changes since v1 > add comments from Wolfgang Denk > use BUILD_BUG_ON to create a compileerror if there are > defined more than 32 sensors. Please resubmit with the BUILD_BUG_ON patch. Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I paid too much for it, but its worth it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_net.c: fix build breakage
Dear Wolfgang Denk, In message <1293120266-28753-1-git-send-email...@denx.de> you wrote: > Commit 722b061 "autocomplete: remove runtime handler install" caused > some boards (like NETTA2_V2) to break with errors like these: > > cmd_net.c:296: error: expected expression before ',' token > > Fix this. > > Signed-off-by: Wolfgang Denk > Cc: Mike Frysinger > --- > common/cmd_net.c |1 + > 1 files changed, 1 insertions(+), 0 deletions(-) Applied. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Even if you can deceive people about a product through misleading statements, sooner or later the product will speak for itself. - Hajime Karatsu ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] examples: update do_reset prototype
Dear Mike Frysinger, In message <1292797013-2940-1-git-send-email-vap...@gentoo.org> you wrote: > One more place that was missed during the do_reset() unification. > > Signed-off-by: Mike Frysinger > --- > examples/api/libgenwrap.c |3 ++- > 1 files changed, 2 insertions(+), 1 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de C makes it easy for you to shoot yourself in the foot. C++ makes that harder, but when you do, it blows away your whole leg. -- Bjarne Stroustrup ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tqm5200.c: fix warning: 'edid_buf' defined but not used
Dear Wolfgang Denk, In message <1293130738-19657-1-git-send-email...@denx.de> you wrote: > Commit 98e6956 "mpc52xx: add support for tqm52xx based board charon" > casued build warnings on some systems. Fix these. > > Signed-off-by: Wolfgang Denk > Cc: Heiko Schocher > --- > board/tqc/tqm5200/tqm5200.c |3 ++- > 1 files changed, 2 insertions(+), 1 deletions(-) Applied (after fixing the 'casued' typo). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de ...the increased productivity fostered by a friendly environment and quality tools is essential to meet ever increasing demands for software. - M. D. McIlroy, E. N. Pinson and B. A. Tague ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] env: re-add support for auto-completion
Dear Mike Frysinger, In message <1292622719-28646-1-git-send-email-vap...@gentoo.org> you wrote: > Currently, only basic completion is supported (no globs), but this is > what we had previously. > > Signed-off-by: Mike Frysinger > --- > v2 > - sort the results > > common/command.c|3 +-- > common/env_common.c | 40 +++- > include/common.h|1 + > include/search.h|7 +++ > lib/hashtable.c | 20 > lib/qsort.c |6 ++ > 6 files changed, 50 insertions(+), 27 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I don't care if you *ARE* on a bondage-and-discipline post-technical system pawned off by the nation's largest oughta-be-illegal monopoly who cannot escape the sins of their forefathers -- namely, using the wrong slash for directories when the C language and its brethren use it for something else that's very important. -- Tom Christiansen in <55oabg$1j...@csnews.cs.colorado.edu> ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] Clarify applicable licensing terms in COPYING file.
Dear Wolfgang Denk, In message <1292706041-7010-1-git-send-email...@denx.de> you wrote: > Signed-off-by: Wolfgang Denk > --- > v2: Rephrase as suggested by Scott Wood in > http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/71743/focus=71761 Applied. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A girl with a future avoids the man with a past. -- Evan Esar, "The Humor of Humor" ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] config_cmd_defaults.h: new header for common u-boot command defaults
Dear Mike Frysinger, In message <1292889429-19902-1-git-send-email-vap...@gentoo.org> you wrote: > We have config_defaults.h which are random configuration settings that > everyone gets by default. We also have config_cmd_default.h which is a > recommended list of defaults but boards have to opt into. Now we have > config_cmd_defaults.h which is a list of defaults that everyone gets > and has to actively opt out of. > > For now, we populate it with the bootm command which previously was > unable to be disabled. > > Signed-off-by: Mike Frysinger > --- > common/Makefile |2 +- > include/config_cmd_defaults.h | 14 ++ > mkconfig |1 + > 3 files changed, 16 insertions(+), 1 deletions(-) > create mode 100644 include/config_cmd_defaults.h Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A list is only as strong as its weakest link.-- Don Knuth ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] load_addr: move to common env code
Dear Mike Frysinger, In message <1292958507-5584-1-git-send-email-vap...@gentoo.org> you wrote: > Rather than keep the load_addr definition with the bootm code (which > just happens to use this), move it to the common env code. This way > we can disable bootm support completely while retaining load_addr > usage with many other commands. > > Signed-off-by: Mike Frysinger > --- > common/cmd_bootm.c |1 - > common/cmd_nvedit.c |2 ++ > 2 files changed, 2 insertions(+), 1 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Don't put off for tomorrow what you can do today, because if you enjoy it today you can do it again tomorrow. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_mem: localize state variables
Dear Mike Frysinger, In message <1293028829-16057-1-git-send-email-vap...@gentoo.org> you wrote: > These "last" variables aren't used outside of this file, so add static. > > Signed-off-by: Mike Frysinger > --- > common/cmd_mem.c |6 +++--- > 1 files changed, 3 insertions(+), 3 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The heart is not a logical organ. -- Dr. Janet Wallace, "The Deadly Years", stardate 3479.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd editing: mark erase/tab seqs constant
Dear Mike Frysinger, In message <1293028845-16111-1-git-send-email-vap...@gentoo.org> you wrote: > These strings are only read, so no need to have them be writable. > > Signed-off-by: Mike Frysinger > --- > common/main.c |4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Death. Destruction. Disease. Horror. That's what war is all about. That's what makes it a thing to be avoided. -- Kirk, "A Taste of Armageddon", stardate 3193.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cfi_flash: avoid flash_verbose when possible
Dear Mike Frysinger, In message <1293028873-16231-1-git-send-email-vap...@gentoo.org> you wrote: > The flash_verbose logic is only used by the CFI MTD layer, so if we aren't > using that, disable the logic completely. > > Signed-off-by: Mike Frysinger > --- > drivers/mtd/cfi_flash.c |6 ++ > 1 files changed, 6 insertions(+), 0 deletions(-) Applied, thanks. Stefan, this is somewhat global and looks simple enough - hope this is OK with you. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "The great question... which I have not been able to answer... is, `What does woman want?'" - Sigmund Freud ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] miiphy: convert to linux/mii.h
Dear Mike Frysinger, In message <1293136812-8577-1-git-send-email-vap...@gentoo.org> you wrote: > The include/miiphy.h header duplicates a lot of things from linux/mii.h. > So punt all the things that overlap to keep the API simple and to make > merging between U-Boot and Linux simpler. > > Signed-off-by: Mike Frysinger > --- > note: i tried to build test this, but it's currently pretty hard > considering many boards are broken already. when i wrote it > against v2010.09, things seemed to be ok then. some tree greps > don't find anything for me to update either. > > arch/arm/cpu/arm920t/at91rm9200/lxt972.c | 14 ++-- > arch/arm/cpu/arm926ejs/davinci/lxt972.c | 14 ++-- > arch/arm/cpu/ixp/npe/miiphy.c| 16 +++--- > arch/arm/cpu/ixp/npe/npe.c |8 +- > arch/powerpc/cpu/mpc8xx/fec.c|4 +- > arch/powerpc/cpu/ppc4xx/miiphy.c | 72 > board/Marvell/rd6281a/rd6281a.c |4 +- > board/actux1/actux1.c|4 +- > board/csb272/csb272.c|6 +- > board/csb472/csb472.c|6 +- > board/evb64260/eth.c | 16 +++--- > board/freescale/mpc8260ads/mpc8260ads.c | 12 ++-- > board/freescale/mpc8560ads/mpc8560ads.c |6 +- > board/manroland/uc100/uc100.c|4 +- > board/netphone/netphone.c|8 +- > board/netta/netta.c |8 +- > board/netta2/netta2.c|8 +- > board/prodrive/p3mx/mv_eth.c | 30 +- > board/sbc8560/sbc8560.c |6 +- > board/stx/stxgp3/stxgp3.c|6 +- > board/stx/stxssa/stxssa.c|6 +- > board/stx/stxxtc/stxxtc.c|6 +- > board/tqc/tqm8xx/tqm8xx.c|6 +- > common/cmd_mii.c | 29 +- > common/miiphyutil.c | 50 > drivers/net/4xx_enet.c | 10 ++-- > drivers/net/altera_tse.c | 14 ++-- > drivers/net/altera_tse.h |2 - > drivers/net/davinci_emac.c | 16 +++--- > drivers/net/designware.c | 54 +- > drivers/net/eepro100.c |2 +- > drivers/net/fec_mxc.c| 20 +++--- > drivers/net/fsl_mcdmafec.c |2 +- > drivers/net/inca-ip_sw.c |6 +- > drivers/net/mcffec.c |2 +- > drivers/net/mcfmii.c | 14 ++-- > drivers/net/ns7520_eth.c | 36 ++-- > drivers/net/ns9750_eth.c | 51 - > drivers/net/phy/mv88e61xx.c |2 +- > drivers/net/smc911x.c| 12 ++-- > drivers/net/tsec.c | 50 > drivers/qe/uec_phy.c | 68 +++--- > drivers/qe/uec_phy.h | 18 -- > include/miiphy.h | 89 > +++--- > include/tsec.h |2 - > 45 files changed, 361 insertions(+), 458 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The heart is not a logical organ. -- Dr. Janet Wallace, "The Deadly Years", stardate 3479.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] asm-offsets: generate bd_t size
Dear Mike Frysinger, In message <1293213443-11027-1-git-send-email-vap...@gentoo.org> you wrote: > Some ports set up the board info structure at the same time as the global > data structure, and largely keep them together. So generate a define for > the board info struct too. > > Signed-off-by: Mike Frysinger > --- > lib/asm-offsets.c |3 +++ > 1 files changed, 3 insertions(+), 0 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de That said, there may be good reasons for what you did beyond obsequi- ous sycophantic parody. Perhaps you might be so kind as to elucidate. -- Tom Christiansen in <5ldjbm$jt...@csnews.cs.colorado.edu> ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] powerpc/fsl-pci: Determine pci_controller based on cfg addr for dts fixup
Dear Kumar Gala,
In message <1294183251-4905-1-git-send-email-ga...@kernel.crashing.org> you
wrote:
> Previously we passed in a specifically named struct pci_controller to
> determine if we had setup the particular PCI bus. Now we can search for
> the struct so we dont have to depend on the name or the struct being
> statically allocated.
>
> Introduced new find_hose_by_cfg_addr() to get back a pci_controller struct
> back by searching for it means we can do things like dynamically allocate
> them or not have to expose the static structures to all users.
>
> Signed-off-by: Kumar Gala
> ---
> * Merged with find_hose_by_cfg_addr patch
> * Fixed find_hose_by_cfg_addr to have { } for multiline for
>
> arch/powerpc/include/asm/fsl_pci.h | 43 ++-
> drivers/pci/fsl_pci_init.c |5 +++-
> drivers/pci/pci.c | 12 ++
> include/pci.h |1 +
> 4 files changed, 20 insertions(+), 41 deletions(-)
Acked-by: Wolfgang Denk
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
I have a theory that it's impossible to prove anything, but I can't
prove it.
___
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Re: [U-Boot] [PATCH] MAINTAINERS: sort Blackfin entries
Dear Mike Frysinger, In message <1292796854-2842-1-git-send-email-vap...@gentoo.org> you wrote: > Signed-off-by: Mike Frysinger > --- > MAINTAINERS | 49 ++--- > 1 files changed, 22 insertions(+), 27 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I have a theory that it's impossible to prove anything, but I can't prove it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] powerpc/8xxx: Add new hwconfig APIs to address early parsing used by DDR init
There are several users of the hwconfig APIs (8xxx DDR) before we have
the environment properly setup. This causes issues because of the
numerous ways the environment might be accessed because of the
non-volatile memory it might be stored in. Additionally the access
might be so early that memory isn't even properly setup for us.
Towards resolving these issues we provide versions of all the hwconfig
APIs that can be passed in a buffer to parse and leave it to the caller
to determine how to allocate and populate the buffer.
We use the _f naming convention for these new APIs even though they are
perfectly useable after relocation and the environment being ready.
We also now warn if the non-f APIs are called before the environment is
ready to allow users to address the issues.
Finally, we convert the 8xxx DDR code to utilize the new APIs to
hopefully address the issue once and for all. We have the 8xxx DDR code
create a buffer on the stack and populate it via getenv_f().
Signed-off-by: Kumar Gala
---
arch/powerpc/cpu/mpc8xxx/ddr/options.c | 72 +++---
common/hwconfig.c | 86 +---
include/hwconfig.h | 68 +++--
3 files changed, 149 insertions(+), 77 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
index c641e85..568682d 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
@@ -13,6 +13,8 @@
#include "ddr.h"
+#define HWCONFIG_BUFFER_SIZE 128
+
/* Board-specific functions defined in each board's ddr.c */
extern void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
@@ -24,6 +26,15 @@ unsigned int populate_memctl_options(int
all_DIMMs_registered,
unsigned int ctrl_num)
{
unsigned int i;
+ char buffer[HWCONFIG_BUFFER_SIZE];
+ char *buf = NULL;
+
+ /*
+* Extract hwconfig from environment since we have not properly setup
+* the environment but need it for ddr config params
+*/
+ if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ buf = buffer;
/* Chip select options. */
@@ -221,7 +232,7 @@ unsigned int populate_memctl_options(int
all_DIMMs_registered,
* should be a subset of the requested configuration.
*/
#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
- if (hwconfig_sub("fsl_ddr", "ctlr_intlv")) {
+ if (hwconfig_sub_f("fsl_ddr", "ctlr_intlv", buf)) {
if (pdimm[0].n_ranks == 0) {
printf("There is no rank on CS0 for controller %d.
Because only"
" rank on CS0 and ranks chip-select interleaved
with CS0"
@@ -234,19 +245,25 @@ unsigned int populate_memctl_options(int
all_DIMMs_registered,
* test null first. if CONFIG_HWCONFIG is not defined
* hwconfig_arg_cmp returns non-zero
*/
- if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv",
"null")) {
+ if (hwconfig_subarg_cmp_f("fsl_ddr", "ctlr_intlv",
+ "null", buf)) {
popts->memctl_interleaving = 0;
debug("memory controller interleaving
disabled.\n");
- } else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv",
"cacheline"))
+ } else if (hwconfig_subarg_cmp_f("fsl_ddr",
+"ctlr_intlv",
+"cacheline", buf))
popts->memctl_interleaving_mode =
FSL_DDR_CACHE_LINE_INTERLEAVING;
- else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv",
"page"))
+ else if (hwconfig_subarg_cmp_f("fsl_ddr", "ctlr_intlv",
+ "page", buf))
popts->memctl_interleaving_mode =
FSL_DDR_PAGE_INTERLEAVING;
- else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv",
"bank"))
+ else if (hwconfig_subarg_cmp_f("fsl_ddr", "ctlr_intlv",
+ "bank", buf))
popts->memctl_interleaving_mode =
FSL_DDR_BANK_INTERLEAVING;
- else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv",
"superbank"))
+ else if (hwconfig_subarg_cmp_f("fsl_ddr", "ctlr_intlv",
+ "superbank", buf))
popts->memctl_interleaving_mode =
FSL_DDR_SUPERBAN
[U-Boot] [PATCH 1/2] powerpc/8xxx: Move fsl_is_spd() into generic 8xxx ddr code
Move the parsing of hwconfig to determine if to use spd into common code
so we can share it across all boards instead of duplicating it
everywhere.
Signed-off-by: Kumar Gala
---
arch/powerpc/cpu/mpc8xxx/ddr/options.c | 22 +-
arch/powerpc/include/asm/fsl_ddr_sdram.h |3 ++-
board/freescale/corenet_ds/ddr.c | 18 ++
3 files changed, 25 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
index 774c0e4..c641e85 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008, 2010 Freescale Semiconductor, Inc.
+ * Copyright 2008, 2010-2011 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
@@ -387,3 +387,23 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo)
"Memory controller interleaving disabled.\n");
}
}
+
+int fsl_use_spd(void)
+{
+ int use_spd = 0;
+
+#ifdef CONFIG_DDR_SPD
+ /* if hwconfig is not enabled, or "sdram" is not defined, use spd */
+ if (hwconfig_sub("fsl_ddr", "sdram")) {
+ if (hwconfig_subarg_cmp("fsl_ddr", "sdram", "spd"))
+ use_spd = 1;
+ else if (hwconfig_subarg_cmp("fsl_ddr", "sdram", "fixed"))
+ use_spd = 0;
+ else
+ use_spd = 1;
+ } else
+ use_spd = 1;
+#endif
+
+ return use_spd;
+}
diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h
b/arch/powerpc/include/asm/fsl_ddr_sdram.h
index 17d4b31..c6258db 100644
--- a/arch/powerpc/include/asm/fsl_ddr_sdram.h
+++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2008-2010 Freescale Semiconductor, Inc.
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -213,6 +213,7 @@ typedef struct memctl_options_s {
} memctl_options_t;
extern phys_size_t fsl_ddr_sdram(void);
+extern int fsl_use_spd(void);
typedef struct fixed_ddr_parm{
int min_freq;
diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c
index 2ee0188..85b6c78 100644
--- a/board/freescale/corenet_ds/ddr.c
+++ b/board/freescale/corenet_ds/ddr.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -288,24 +288,10 @@ void fsl_ddr_board_options(memctl_options_t *popts,
phys_size_t initdram(int board_type)
{
phys_size_t dram_size;
- int use_spd = 0;
puts("Initializing");
-#ifdef CONFIG_DDR_SPD
- /* if hwconfig is not enabled, or "sdram" is not defined, use spd */
- if (hwconfig_sub("fsl_ddr", "sdram")) {
- if (hwconfig_subarg_cmp("fsl_ddr", "sdram", "spd"))
- use_spd = 1;
- else if (hwconfig_subarg_cmp("fsl_ddr", "sdram", "fixed"))
- use_spd = 0;
- else
- use_spd = 1;
- } else
- use_spd = 1;
-#endif
-
- if (use_spd) {
+ if (fsl_use_spd()) {
puts("using SPD\n");
dram_size = fsl_ddr_sdram();
} else {
--
1.7.2.3
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Re: [U-Boot] [PATCH 4/4] powerpc: Add LINK_OFF calls in early C-code.
Dear Joakim Tjernlund,
In message <1292838435-14958-4-git-send-email-joakim.tjernl...@transmode.se>
you wrote:
> Only these 2 call sites depends on fixups for my mpc8321 based
> board.
>
> Signed-off-by: Joakim Tjernlund
> ---
> arch/powerpc/cpu/mpc83xx/cpu_init.c |2 +-
> arch/powerpc/lib/board.c|2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c
> b/arch/powerpc/cpu/mpc83xx/cpu_init.c
> index 7a1cae7..88d9dd8 100644
> --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
> +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
> @@ -507,7 +507,7 @@ int prt_83xx_rsr(void)
> sep = " ";
> for (i = 0; i < n; i++)
> if (rsr & bits[i].mask) {
> - printf("%s%s", sep, bits[i].desc);
> + printf("%s%s", sep, LINK_OFF(bits[i].desc));
> sep = ", ";
> }
Is my understanding correct that these changes are sufficient only for
your board, and only for your current configuration? And that your
code would break (resp. require more LINK_OFF fixups) if you would -
for example - decide to enable CONFIG_DISPLAY_AER_FULL in your board
configuration (cf. print_83xx_arb_event() above in the same source
file) ?
I object against such a fragile and insular approach.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
It is impractical for the standard to attempt to constrain the
behavior of code that does not obey the constraints of the standard.
- Doug Gwyn
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[U-Boot] [PATCH v2 2/2] powerpc/8xxx: Add new hwconfig APIs to address early parsing used by DDR init
There are several users of the hwconfig APIs (8xxx DDR) before we have
the environment properly setup. This causes issues because of the
numerous ways the environment might be accessed because of the
non-volatile memory it might be stored in. Additionally the access
might be so early that memory isn't even properly setup for us.
Towards resolving these issues we provide versions of all the hwconfig
APIs that can be passed in a buffer to parse and leave it to the caller
to determine how to allocate and populate the buffer.
We use the _f naming convention for these new APIs even though they are
perfectly useable after relocation and the environment being ready.
We also now warn if the non-f APIs are called before the environment is
ready to allow users to address the issues.
Finally, we convert the 8xxx DDR code to utilize the new APIs to
hopefully address the issue once and for all. We have the 8xxx DDR code
create a buffer on the stack and populate it via getenv_f().
Signed-off-by: Kumar Gala
---
* Add a comment about the buffer size
arch/powerpc/cpu/mpc8xxx/ddr/options.c | 78 ++---
common/hwconfig.c | 86 +---
include/hwconfig.h | 68 +++--
3 files changed, 155 insertions(+), 77 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
index c641e85..0e7097b 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
@@ -13,6 +13,14 @@
#include "ddr.h"
+/*
+ * Use our own stack based buffer before relocation to allow accessing longer
+ * hwconfig strings that might be in the environment before we've relocated.
+ * This is pretty fragile on both the use of stack and if the buffer is big
+ * enough. However we will get a warning from getenv_f for the later.
+ */
+#define HWCONFIG_BUFFER_SIZE 128
+
/* Board-specific functions defined in each board's ddr.c */
extern void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
@@ -24,6 +32,15 @@ unsigned int populate_memctl_options(int
all_DIMMs_registered,
unsigned int ctrl_num)
{
unsigned int i;
+ char buffer[HWCONFIG_BUFFER_SIZE];
+ char *buf = NULL;
+
+ /*
+* Extract hwconfig from environment since we have not properly setup
+* the environment but need it for ddr config params
+*/
+ if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0)
+ buf = buffer;
/* Chip select options. */
@@ -221,7 +238,7 @@ unsigned int populate_memctl_options(int
all_DIMMs_registered,
* should be a subset of the requested configuration.
*/
#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
- if (hwconfig_sub("fsl_ddr", "ctlr_intlv")) {
+ if (hwconfig_sub_f("fsl_ddr", "ctlr_intlv", buf)) {
if (pdimm[0].n_ranks == 0) {
printf("There is no rank on CS0 for controller %d.
Because only"
" rank on CS0 and ranks chip-select interleaved
with CS0"
@@ -234,19 +251,25 @@ unsigned int populate_memctl_options(int
all_DIMMs_registered,
* test null first. if CONFIG_HWCONFIG is not defined
* hwconfig_arg_cmp returns non-zero
*/
- if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv",
"null")) {
+ if (hwconfig_subarg_cmp_f("fsl_ddr", "ctlr_intlv",
+ "null", buf)) {
popts->memctl_interleaving = 0;
debug("memory controller interleaving
disabled.\n");
- } else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv",
"cacheline"))
+ } else if (hwconfig_subarg_cmp_f("fsl_ddr",
+"ctlr_intlv",
+"cacheline", buf))
popts->memctl_interleaving_mode =
FSL_DDR_CACHE_LINE_INTERLEAVING;
- else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv",
"page"))
+ else if (hwconfig_subarg_cmp_f("fsl_ddr", "ctlr_intlv",
+ "page", buf))
popts->memctl_interleaving_mode =
FSL_DDR_PAGE_INTERLEAVING;
- else if (hwconfig_subarg_cmp("fsl_ddr", "ctlr_intlv",
"bank"))
+ else if (hwconfig_subarg_cmp_f("fsl_ddr", "ctlr_intlv",
+ "bank", buf))
popts->memctl_interleaving_mode =
FSL_DDR_BANK_INTERLEAVING;
-
Re: [U-Boot] [PATCH] fsl_pci: Update PCIe boot ouput
On Dec 28, 2010, at 5:47 PM, Peter Tyser wrote: > This change does the following: > - Adds printing of negotiated link width. This information can be > useful when debugging PCIe issues. > - Makes it optional for boards to implement board_serdes_name(). > Previously boards that did not implement it would print unsightly > output such as "PCIE1: Connected to ..." > - Rewords the PCIe boot output to reduce line length and to make it > clear that the "base address XYZ" value refers to the base address of > the internal processor PCIe registers and not a standard PCI BAR > value. > - Changes "PCIE" output to the standard "PCIe" > > Before change: > PCIE1: connected to as Root Complex (base addr ef008000) > 01:00.0 - 10b5:8518 - Bridge device > 02:01.0- 10b5:8518 - Bridge device > 02:02.0- 10b5:8518 - Bridge device > 02:03.0- 10b5:8518 - Bridge device > PCIE1: Bus 00 - 05 > PCIE2: connected to as Endpoint (base addr ef009000) > PCIE2: Bus 06 - 06 > > After change: > PCIe1: Root Complex of PEX8518 Switch, x4, regs @ 0xef008000 > 01:00.0 - 10b5:8518 - Bridge device > 02:01.0- 10b5:8518 - Bridge device > 02:02.0- 10b5:8518 - Bridge device > 02:03.0- 10b5:8518 - Bridge device > PCIe1: Bus 00 - 05 > PCIe2: Endpoint of VPX Fabric A, x2, regs @ 0xef009000 > PCIe2: Bus 06 - 06 > > Signed-off-by: Peter Tyser > --- > This applies to Kumar's u-boot-85xx.git 'dev' branch. applied to 85xx - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] mpc83xx: Make start.S true PIC
Dear Joakim Tjernlund, In message <1292838435-14958-1-git-send-email-joakim.tjernl...@transmode.se> you wrote: > Remove dependencies on link address. Use GOT and > add an new function to calculate the actual address. > > Signed-off-by: Joakim Tjernlund > --- > arch/powerpc/cpu/mpc83xx/start.S | 35 +++ > 1 files changed, 27 insertions(+), 8 deletions(-) It seems this code introduces some subtle changes. > - lis r4, (CONFIG_SYS_MONITOR_BASE)@h > - ori r4, r4, (CONFIG_SYS_MONITOR_BASE)@l > - addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET > - mtlr r5 The original code references CONFIG_SYS_MONITOR_BASE. > + bl add_flash_base ... > +add_flash_base: > + /* Check if already inside flash address space. */ > + /* if so, do not add CONFIG_SYS_FLASH_BASE */ > + lis r4, (CONFIG_SYS_FLASH_BASE)@h > + ori r4, r4, (CONFIG_SYS_FLASH_BASE)@l > + cmplw cr0, r3, r4 > + ble cr0, 2f /* r3 < r4 ? */ > + lis r6, > (CONFIG_SYS_FLASH_BASE+(CONFIG_SYS_FLASH_SIZE*1024*1024-1))@h > + ori r6, r6, > (CONFIG_SYS_FLASH_BASE+(CONFIG_SYS_FLASH_SIZE*1024*1024-1))@l > + cmplw cr0, r3, r6 > + blelr cr0 /* r3 < r6 ? */ > +2: add r3,r3,r4 > + blr But your new code does not reference CONFIG_SYS_MONITOR_BASE at all, but uses CONFIG_SYS_FLASH_BASE instead. On which boards has this been tested? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Q: How many DEC repairman does it take to fix a flat ? A: Five; four to hold the car up and one to swap tires. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] powerpc/fsl-pci: Determine pci_controller based on cfg addr for dts fixup
On Jan 9, 2011, at 2:01 PM, Wolfgang Denk wrote:
> Dear Kumar Gala,
>
> In message <1294183251-4905-1-git-send-email-ga...@kernel.crashing.org> you
> wrote:
>> Previously we passed in a specifically named struct pci_controller to
>> determine if we had setup the particular PCI bus. Now we can search for
>> the struct so we dont have to depend on the name or the struct being
>> statically allocated.
>>
>> Introduced new find_hose_by_cfg_addr() to get back a pci_controller struct
>> back by searching for it means we can do things like dynamically allocate
>> them or not have to expose the static structures to all users.
>>
>> Signed-off-by: Kumar Gala
>> ---
>> * Merged with find_hose_by_cfg_addr patch
>> * Fixed find_hose_by_cfg_addr to have { } for multiline for
>>
>> arch/powerpc/include/asm/fsl_pci.h | 43 ++-
>> drivers/pci/fsl_pci_init.c |5 +++-
>> drivers/pci/pci.c | 12 ++
>> include/pci.h |1 +
>> 4 files changed, 20 insertions(+), 41 deletions(-)
>
> Acked-by: Wolfgang Denk
applied to 85xx
- k
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Re: [U-Boot] [PATCH 01/15] powerpc/fsl-pci: Add generic code to setup PCIe controllers
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Since all the PCIe controllers are connected over SERDES on the SoCs we > can utilize is_serdes_configured() to determine if a controller is > enabled. After which we can setup the ATMUs and LAWs for the controller > in a common fashion and allow board code to specify what the controller > is connected to for reporting reasons. > > We also provide a per controller (rather than all) for some systems that > may have special requirements. > > Finally, we refactor the code used by the P1022DS to utilize the new > generic code. > > Signed-off-by: Kumar Gala > --- > arch/powerpc/include/asm/fsl_pci.h | 10 +++ > board/freescale/p1022ds/p1022ds.c | 67 +-- > drivers/pci/fsl_pci_init.c | 127 > 3 files changed, 139 insertions(+), 65 deletions(-) applied to 85xx - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 02/15] powerpc/85xx: Rework MPC8572DS pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in MPC8572DS board and utliize the common > fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > Signed-off-by: Kumar Gala > --- > board/freescale/mpc8572ds/law.c |8 +-- > board/freescale/mpc8572ds/mpc8572ds.c | 100 ++-- > 2 files changed, 20 insertions(+), 88 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ * added signed off by Chenhui Zhao - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 03/15] powerpc/85xx: Rework P2020DS pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in P2020DS board and utliize the common > fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > Signed-off-by: Kumar Gala > --- > board/freescale/p2020ds/law.c |8 +-- > board/freescale/p2020ds/p2020ds.c | 114 - > 2 files changed, 12 insertions(+), 110 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ Added attribution to Leo Li's original P2020 DS serdes clean up patches. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/15] powerpc/85xx: Rework MPC8544DS pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in MPC8544DS board and utliize the common > fsl_pcie_init_ctrl(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > We don't use the full fsl_pcie_init_ctrl() since we have to handle PCIE3 > specially to setup the additional memory map region and we utilize a > single LAW to cover the controller. > > Signed-off-by: Kumar Gala > --- > board/freescale/mpc8544ds/law.c | 10 +--- > board/freescale/mpc8544ds/mpc8544ds.c | 110 +++-- > 2 files changed, 37 insertions(+), 83 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/15] powerpc/85xx: Rework MPC8536DS pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in MPC8536DS board and utliize the common > fsl_pcie_init_board(). > > Signed-off-by: Kumar Gala > --- > board/freescale/mpc8536ds/mpc8536ds.c | 125 ++-- > 1 files changed, 24 insertions(+), 101 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 06/15] powerpc/86xx: Rework MPC8641HPCN pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in MPC8641HPCN board and utliize the common > fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > Signed-off-by: Kumar Gala > --- > board/freescale/mpc8641hpcn/law.c |7 +--- > board/freescale/mpc8641hpcn/mpc8641hpcn.c | 56 +--- > 2 files changed, 11 insertions(+), 52 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 07/15] powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in MPC8548CDS board and utliize the common > fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > Signed-off-by: Kumar Gala > --- > board/freescale/mpc8548cds/law.c| 10 +-- > board/freescale/mpc8548cds/mpc8548cds.c | 46 ++- > 2 files changed, 16 insertions(+), 40 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/4] powerpc: Add LINK_OFF calls in early C-code.
Wolfgang Denk wrote on 2011/01/09 21:29:04:
>
> Dear Joakim Tjernlund,
>
> In message <1292838435-14958-4-git-send-email-joakim.tjernl...@transmode.se>
> you wrote:
> > Only these 2 call sites depends on fixups for my mpc8321 based
> > board.
> >
> > Signed-off-by: Joakim Tjernlund
> > ---
> > arch/powerpc/cpu/mpc83xx/cpu_init.c |2 +-
> > arch/powerpc/lib/board.c|2 +-
> > 2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c
> > b/arch/powerpc/cpu/mpc83xx/cpu_init.c
> > index 7a1cae7..88d9dd8 100644
> > --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
> > +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
> > @@ -507,7 +507,7 @@ int prt_83xx_rsr(void)
> > sep = " ";
> > for (i = 0; i < n; i++)
> >if (rsr & bits[i].mask) {
> > - printf("%s%s", sep, bits[i].desc);
> > + printf("%s%s", sep, LINK_OFF(bits[i].desc));
> > sep = ", ";
> >}
>
>
> Is my understanding correct that these changes are sufficient only for
> your board, and only for your current configuration? And that your
> code would break (resp. require more LINK_OFF fixups) if you would -
> for example - decide to enable CONFIG_DISPLAY_AER_FULL in your board
> configuration (cf. print_83xx_arb_event() above in the same source
> file) ?
It would break only if link address != load address. That is, if you
want to use my new CONFIG_SYS_TRUE_PIC feature and be able to load
u-boot at any address regardless of link address you would
have to add LINK_OFF calls into print_83xx_arb_event() too if
you want to use it.
>
> I object against such a fragile and insular approach.
Considering you were tempted to add my previous approach which
had LINK_OFF calls all over I don't see were this objection comes
from. Have you changed your mind?
Jocke
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Re: [U-Boot] [PATCH 09/15] powerpc/85xx: Rework TQM boards pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in TQM 85xx boards and utliize the common > fsl_pcie_init_board(). > > Signed-off-by: Kumar Gala > CC: w...@denx.de > --- > board/tqc/tqm85xx/law.c |9 + > board/tqc/tqm85xx/tqm85xx.c | 41 - > 2 files changed, 13 insertions(+), 37 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 10/15] powerpc/85xx: Rework MPC8568MDS pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in MPC8568MDS board and utliize the common > fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > Signed-off-by: Kumar Gala > --- > board/freescale/mpc8568mds/law.c|6 +--- > board/freescale/mpc8568mds/mpc8568mds.c | 52 +++ > 2 files changed, 19 insertions(+), 39 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 11/15] powerpc/85xx: Rework MPC8569MDS pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in MPC8569MDS board and utliize the common > fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > Signed-off-by: Kumar Gala > --- > board/freescale/mpc8569mds/law.c|4 +-- > board/freescale/mpc8569mds/mpc8569mds.c | 44 -- > 2 files changed, 7 insertions(+), 41 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 12/15] powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in P1_P2_RDB boards and utliize the common > fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > Signed-off-by: Kumar Gala > --- > board/freescale/p1_p2_rdb/law.c |6 +--- > board/freescale/p1_p2_rdb/pci.c | 64 +- > 2 files changed, 10 insertions(+), 60 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 13/15] powerpc/86xx: Rework MPC8610HPCD pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in MPC8610HPCD board and utliize the common > fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > Signed-off-by: Kumar Gala > --- > board/freescale/mpc8610hpcd/law.c |8 +--- > board/freescale/mpc8610hpcd/mpc8610hpcd.c | 80 + > 2 files changed, 25 insertions(+), 63 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 14/15] powerpc/86xx: Rework SBC8641 pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in SBC8641 board and utliize the common > fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > Signed-off-by: Kumar Gala > CC: Paul Gortmaker > --- > board/sbc8641d/law.c |4 --- > board/sbc8641d/sbc8641d.c | 63 +--- > 2 files changed, 2 insertions(+), 65 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 15/15] powerpc/85xx: Rework SBC8548 pci_init_board to use common FSL PCIe code
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote: > Remove duplicated code in SBC8548 board and utliize the common > fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI > controllers based on which PCIe controllers are enabled. > > Signed-off-by: Kumar Gala > CC: Paul Gortmaker > --- > board/sbc8548/law.c |8 --- > board/sbc8548/sbc8548.c | 50 -- > 2 files changed, 13 insertions(+), 45 deletions(-) applied to 85xx, fixed commit typo s/utliize/utilize/ - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] mpc83xx: Make start.S true PIC
Wolfgang Denk wrote on 2011/01/09 21:44:08: > > Dear Joakim Tjernlund, > > In message <1292838435-14958-1-git-send-email-joakim.tjernl...@transmode.se> > you wrote: > > Remove dependencies on link address. Use GOT and > > add an new function to calculate the actual address. > > > > Signed-off-by: Joakim Tjernlund > > --- > > arch/powerpc/cpu/mpc83xx/start.S | 35 +++ > > 1 files changed, 27 insertions(+), 8 deletions(-) > > It seems this code introduces some subtle changes. > > > - lis r4, (CONFIG_SYS_MONITOR_BASE)@h > > - ori r4, r4, (CONFIG_SYS_MONITOR_BASE)@l > > - addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET > > - mtlr r5 > > The original code references CONFIG_SYS_MONITOR_BASE. > > > + bl add_flash_base > ... > > +add_flash_base: > > + /* Check if already inside flash address space. */ > > + /* if so, do not add CONFIG_SYS_FLASH_BASE */ > > + lis r4, (CONFIG_SYS_FLASH_BASE)@h > > + ori r4, r4, (CONFIG_SYS_FLASH_BASE)@l > > + cmplw cr0, r3, r4 > > + ble cr0, 2f /* r3 < r4 ? */ > > + lis r6, (CONFIG_SYS_FLASH_BASE+(CONFIG_SYS_FLASH_SIZE*1024*1024-1))@h > > + ori r6, r6, > > (CONFIG_SYS_FLASH_BASE+(CONFIG_SYS_FLASH_SIZE*1024*1024-1))@l > > + cmplw cr0, r3, r6 > > + blelr cr0/* r3 < r6 ? */ > > +2: add r3,r3,r4 > > + blr > > But your new code does not reference CONFIG_SYS_MONITOR_BASE at all, > but uses CONFIG_SYS_FLASH_BASE instead. You can't assume a fixed address when doing PIC therefore the change. > > > On which boards has this been tested? Only on our custom 83xx boards. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] mpc83xx: Add true PIC support.
Dear Joakim Tjernlund, In message <1292838435-14958-3-git-send-email-joakim.tjernl...@transmode.se> you wrote: > By copying the GOT to the end of the INIT_RAM(dcache) > and relocating it there, it is much esier to > support true PIC on u-boot. This cannot handle > FIXUP so C code that depends on fixups before relocation to RAM > must use LINK_OFF to calculate the difference. ... > + /* > + * Copy GOT to cache and relocate it > + * This assumes there is enough space at the end > + * INIT_RAM to hold a copy of the GOT. > + */ Is it correct to assume that system will crash horribly if for some reason the GOT should not fit? And this means that there is no way to adapt this approach to systems where initial RAM is restrictd and not big enough to hold a copy of the GOT? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 08/15] powerpc/8xxx: Rework XES boards pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8xxx XES boards and utilize the common
fsl_pcie_init_board().
Signed-off-by: Kumar Gala
CC: Peter Tyser
---
* Fix commit message copy/paste issue per Peter T.
* Fixed utilize typo per Peter T.
* removed PCI2 on xpedite520x per Peter T.
* Removed duplicate/now unused MPC8xxx defines per Peter T.
board/xes/common/fsl_8xxx_pci.c | 110 +--
board/xes/xpedite517x/law.c |8 ---
board/xes/xpedite520x/law.c |8 ---
board/xes/xpedite537x/law.c | 12
board/xes/xpedite550x/law.c | 12
5 files changed, 13 insertions(+), 137 deletions(-)
diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c
index 4135849..28c83c7 100644
--- a/board/xes/common/fsl_8xxx_pci.c
+++ b/board/xes/common/fsl_8xxx_pci.c
@@ -34,57 +34,16 @@
#ifdef CONFIG_PCI1
static struct pci_controller pci1_hose;
#endif
-#ifdef CONFIG_PCIE1
-static struct pci_controller pcie1_hose;
-#endif
-#ifdef CONFIG_PCIE2
-static struct pci_controller pcie2_hose;
-#endif
-#ifdef CONFIG_PCIE3
-static struct pci_controller pcie3_hose;
-#endif
-
-/*
- * 85xx and 86xx share naming conventions, but different layout.
- * Correlate names to CPU-specific values to share common
- * PCI code.
- */
-#if defined(CONFIG_MPC85xx)
-#define MPC8xxx_DEVDISR_PCIE1 MPC85xx_DEVDISR_PCIE
-#define MPC8xxx_DEVDISR_PCIE2 MPC85xx_DEVDISR_PCIE2
-#define MPC8xxx_DEVDISR_PCIE3 MPC85xx_DEVDISR_PCIE3
-#define MPC8xxx_PORDEVSR_IO_SELMPC85xx_PORDEVSR_IO_SEL
-#define MPC8xxx_PORDEVSR_IO_SEL_SHIFT MPC85xx_PORDEVSR_IO_SEL_SHIFT
-#define MPC8xxx_PORBMSR_HA MPC85xx_PORBMSR_HA
-#define MPC8xxx_PORBMSR_HA_SHIFT MPC85xx_PORBMSR_HA_SHIFT
-#elif defined(CONFIG_MPC86xx)
-#define MPC8xxx_DEVDISR_PCIE1 MPC86xx_DEVDISR_PCIEX1
-#define MPC8xxx_DEVDISR_PCIE2 MPC86xx_DEVDISR_PCIEX2
-#define MPC8xxx_DEVDISR_PCIE3 0 /* 8641 doesn't have PCIe3 */
-#define MPC8xxx_PORDEVSR_IO_SELMPC8641_PORDEVSR_IO_SEL
-#define MPC8xxx_PORDEVSR_IO_SEL_SHIFT MPC8641_PORDEVSR_IO_SEL_SHIFT
-#define MPC8xxx_PORBMSR_HA MPC8641_PORBMSR_HA
-#define MPC8xxx_PORBMSR_HA_SHIFT MPC8641_PORBMSR_HA_SHIFT
-#endif
void pci_init_board(void)
{
- struct fsl_pci_info pci_info[3];
int first_free_busno = 0;
- int num = 0;
- int pcie_ep;
- __maybe_unused int pcie_configured;
-#if defined(CONFIG_MPC85xx)
+#ifdef CONFIG_PCI1
+ int pcie_ep;
+ struct fsl_pci_info pci_info;
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-#elif defined(CONFIG_MPC86xx)
- immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
-#endif
u32 devdisr = in_be32(&gur->devdisr);
-
-#ifdef CONFIG_PCI1
- u32 pordevsr = in_be32(&gur->pordevsr);
uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD;
uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB;
@@ -92,8 +51,13 @@ void pci_init_board(void)
uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000;
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
- SET_STD_PCI_INFO(pci_info[num], 1);
- pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
+ SET_STD_PCI_INFO(pci_info, 1);
+ set_next_law(pci_info.mem_phys,
+ law_size_bits(pci_info.mem_size), pci_info.law);
+ set_next_law(pci_info.io_phys,
+ law_size_bits(pci_info.io_size), pci_info.law);
+
+ pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs);
printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n",
pci_32 ? 32 : 64,
pcix ? "PCIX" : "PCI",
@@ -102,66 +66,18 @@ void pci_init_board(void)
pcie_ep ? "agent" : "host",
pci_arb ? "arbiter" : "external-arbiter");
- first_free_busno = fsl_pci_init_port(&pci_info[num++],
+ first_free_busno = fsl_pci_init_port(&pci_info,
&pci1_hose, first_free_busno);
} else {
printf("PCI1: disabled\n");
}
#elif defined CONFIG_MPC8548
+ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
/* PCI1 not present on MPC8572 */
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
#endif
-#ifdef CONFIG_PCIE1
- pcie_configured = is_serdes_configured(PCIE1);
-
- if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) {
- SET_STD_PCIE_INFO(pci_info[num], 1);
- pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf("PCIE1: connected as %s\n",
- pcie_ep ? "Endpoint" : "Root Complex");
- first_f
Re: [U-Boot] [PATCH v2 08/15] powerpc/8xxx: Rework XES boards pci_init_board to use common FSL PCIe code
On Jan 9, 2011, at 2:54 PM, Kumar Gala wrote: > Remove duplicated code in MPC8xxx XES boards and utilize the common > fsl_pcie_init_board(). > > Signed-off-by: Kumar Gala > CC: Peter Tyser > --- > * Fix commit message copy/paste issue per Peter T. > * Fixed utilize typo per Peter T. > * removed PCI2 on xpedite520x per Peter T. > * Removed duplicate/now unused MPC8xxx defines per Peter T. > > board/xes/common/fsl_8xxx_pci.c | 110 +-- > board/xes/xpedite517x/law.c |8 --- > board/xes/xpedite520x/law.c |8 --- > board/xes/xpedite537x/law.c | 12 > board/xes/xpedite550x/law.c | 12 > 5 files changed, 13 insertions(+), 137 deletions(-) applied to 85xx - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/9] make the hwconfig buffer deeper
On Jan 7, 2011, at 5:23 PM, Kumar Gala wrote: > > On Jan 7, 2011, at 11:52 AM, Wolfgang Denk wrote: > >> Dear York Sun, >> >> In message <1294418957.8466.8.ca...@oslab-l1> you wrote: >>> >>> fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1_cs2_cs3,ecc=off,addr_hash=false >>> >>> With the buffer size 128, the sub function gets >>> "ctlr_intlv=cacheline,bank_intlv=cs0_". It is not because the buffer is >>> not enough, but the stack has been trashed. I have debug log if you need >>> it. >> >> This is yet another problem, then. > > So I figured the problem out and need to rework the hwconfig API to fix it. > > We need some new versions of the APIs that take a buffer for use early before > boot. I've posted: http://patchwork.ozlabs.org/patch/78045/ http://patchwork.ozlabs.org/patch/78046/ Which should resolve the hwconfig issue and not require the patch to bump the size up. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/85xx: Rework corenet_ds pci_init_board to use common FSL PCIe code
On Jan 6, 2011, at 10:41 AM, Kumar Gala wrote: > Remove duplicated code in corenet_ds boards and utilize the common > fsl_pcie_init_board(). > > Signed-off-by: Kumar Gala > --- > board/freescale/corenet_ds/pci.c | 118 +- > 1 files changed, 2 insertions(+), 116 deletions(-) applied to 85xx - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] mpc83xx: Add true PIC support.
Wolfgang Denk wrote on 2011/01/09 21:54:34: > > Dear Joakim Tjernlund, > > In message <1292838435-14958-3-git-send-email-joakim.tjernl...@transmode.se> > you wrote: > > By copying the GOT to the end of the INIT_RAM(dcache) > > and relocating it there, it is much esier to > > support true PIC on u-boot. This cannot handle > > FIXUP so C code that depends on fixups before relocation to RAM > > must use LINK_OFF to calculate the difference. > ... > > + /* > > +* Copy GOT to cache and relocate it > > +* This assumes there is enough space at the end > > +* INIT_RAM to hold a copy of the GOT. > > +*/ > > Is it correct to assume that system will crash horribly if for some > reason the GOT should not fit? Yes ATM. I considered adding tests but it will cost more space and I am not sure how to report the error this early. > > And this means that there is no way to adapt this approach to systems > where initial RAM is restrictd and not big enough to hold a copy of > the GOT? Can't think of one, you need somewhere to put the GOT. You can work on reducing the GOT size though. Jocke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] ARM: print gcc version
Dear Alexander Holler,
In message <1292863117-3175-1-git-send-email-hol...@ahsoftware.de> you wrote:
> It might be useful to see what compiler version was used to compile u-boot.
> ---
> arch/arm/lib/board.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
> index 96c0e30..df90b5e 100644
> --- a/arch/arm/lib/board.c
> +++ b/arch/arm/lib/board.c
> @@ -75,7 +75,7 @@ extern void dataflash_print_info(void);
> #endif
>
> const char version_string[] =
> - U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")"CONFIG_IDENT_STRING;
> + U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ", gcc " __VERSION__
> ")"CONFIG_IDENT_STRING;
I understand your intention, but I'm not really happy with it.
So far, the version_string is mostly architecture and system independent.
I haven't seen any comments about this, but I can imagine that we want
such information globally.
On the other hand, that would require changes to many files, and the
gcc __VERSION__ string is pretty long on some systems, which may cause
additional problems.
I also doubt that we need this information with each boot message
(where it just slows down booting).
Would it not be sufficient to add this to the code of do_version() so
we can get this information when we want it, i. e. when running the
"version" command?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
As long as we're going to reinvent the wheel again, we might as well
try making it round this time.- Mike Dennison
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[U-Boot] [PATCH v2 1/7] powerpc/8xxx: Refactor SRIO initialization into common code
Moved the SRIO init out of corenet_ds and into common code for
8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe
controllers for SRIO.
We utilize the fact that SRIO is over serdes to determine if its
configured or not and thus can setup the LAWs needed for it dynamically.
We additionally update the device tree (to remove the SRIO nodes) if the
board doesn't have SRIO enabled.
Introduced the following standard defines for board config.h:
CONFIG_SYS_HAS_SRIO - Chip has SRIO or not
CONFIG_SRIO1 - Board has SRIO 1 port available
CONFIG_SRIO2 - Board has SRIO 2 port available
(where 'n' is the port #)
CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot
CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup)
CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup)
[ These mimic what we have for PCI and PCIe controllers ]
Signed-off-by: Kumar Gala
---
* Removed ifdef protection around externs per Sergei
arch/powerpc/cpu/mpc85xx/cpu_init.c |8 +++-
arch/powerpc/cpu/mpc85xx/fdt.c |7 ++-
arch/powerpc/cpu/mpc8xxx/Makefile |1 +
arch/powerpc/cpu/mpc8xxx/fdt.c | 21
arch/powerpc/cpu/mpc8xxx/srio.c | 86 +++
arch/powerpc/include/asm/fsl_law.h |1 +
board/freescale/corenet_ds/corenet_ds.c | 44
include/configs/corenet_ds.h| 17 +++---
8 files changed, 131 insertions(+), 54 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc8xxx/srio.c
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 4a6cc65..98c70e9 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
*
* (C) Copyright 2003 Motorola Inc.
* Modified by Xianghua Xiao, x.x...@motorola.com
@@ -40,6 +40,8 @@
DECLARE_GLOBAL_DATA_PTR;
+extern void srio_init(void);
+
#ifdef CONFIG_QE
extern qe_iop_conf_t qe_iop_conf_tab[];
extern void qe_config_iopin(u8 port, u8 pin, int dir,
@@ -384,6 +386,10 @@ int cpu_init_r(void)
/* needs to be in ram since code uses global static vars */
fsl_serdes_init();
+#ifdef CONFIG_SYS_HAS_SRIO
+ srio_init();
+#endif
+
#if defined(CONFIG_MP)
setup_mp();
#endif
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 53e0596..e7e6a67 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, w...@denx.de.
@@ -38,6 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
extern void ft_qe_setup(void *blob);
extern void ft_fixup_num_cores(void *blob);
+extern void ft_srio_setup(void *blob);
#ifdef CONFIG_MP
#include "mp.h"
@@ -478,4 +479,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
fdt_fixup_qportals(blob);
#endif
+
+#ifdef CONFIG_SYS_HAS_SRIO
+ ft_srio_setup(blob);
+#endif
}
diff --git a/arch/powerpc/cpu/mpc8xxx/Makefile
b/arch/powerpc/cpu/mpc8xxx/Makefile
index 95c73be..99332e6 100644
--- a/arch/powerpc/cpu/mpc8xxx/Makefile
+++ b/arch/powerpc/cpu/mpc8xxx/Makefile
@@ -16,6 +16,7 @@ endif
COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
COBJS-$(CONFIG_FSL_LBC) += fsl_lbc.o
+COBJS-$(CONFIG_SYS_HAS_SRIO) += srio.o
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index 54e60bb..e9dbdc2 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -28,6 +28,7 @@
#include
#include
#include
+#include
#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx))
static int ft_del_cpuhandle(void *blob, int cpuhandle)
@@ -239,3 +240,23 @@ int fdt_fixup_phy_connection(void *blob, int offset, enum
fsl_phy_enet_if phyc)
return fdt_setprop_string(blob, offset, "phy-connection-type",
fsl_phy_enet_if_str[phyc]);
}
+
+#ifdef CONFIG_SYS_HAS_SRIO
+void ft_srio_setup(void *blob)
+{
+#ifdef CONFIG_SRIO1
+ if (!is_serdes_configured(SRIO1)) {
+ fdt_del_node_and_alias(blob, "rio0");
+ }
+#else
+ fdt_del_node_and_alias(blob, "rio0");
+#endif
+#ifdef CONFIG_SRIO2
+ if (!is_serdes_configured(SRIO2)) {
+ fdt_del_node_and_alias(blob, "rio1");
+ }
+#else
+ fdt_del_node_and_alias(blob, "rio1");
+#endif
+}
+#endif
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
new file mode 100644
index 000..e46d328
--- /dev/null
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -0,0 +1,86 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/
[U-Boot] [PATCH v2 5/7] powerpc/86xx: Enable common SRIO init code
Add the needed defines and code to utilize the common 8xxx srio init
code to setup LAWs and modify device tree if we have SRIO enabled on a
board.
Signed-off-by: Kumar Gala
---
* Removed ifdef protection around extern per Sergei
* Added missing call to srio_init
arch/powerpc/cpu/mpc86xx/cpu_init.c |7 ++-
arch/powerpc/cpu/mpc86xx/fdt.c|7 ++-
arch/powerpc/include/asm/immap_86xx.h |4 +++-
3 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/cpu/mpc86xx/cpu_init.c
b/arch/powerpc/cpu/mpc86xx/cpu_init.c
index 1d35c0c..cf3e4d6 100644
--- a/arch/powerpc/cpu/mpc86xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu_init.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004,2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2004,2009-2011 Freescale Semiconductor, Inc.
* Jeff Brown
* Srikanth Srinivasan (srikanth.sriniva...@freescale.com)
*
@@ -34,6 +34,7 @@
#include
#include
+extern void srio_init(void);
void setup_bats(void);
DECLARE_GLOBAL_DATA_PTR;
@@ -80,6 +81,10 @@ int cpu_init_r(void)
/* needs to be in ram since code uses global static vars */
fsl_serdes_init();
+#ifdef CONFIG_SYS_HAS_SRIO
+ srio_init();
+#endif
+
#if defined(CONFIG_MP)
setup_mp();
#endif
diff --git a/arch/powerpc/cpu/mpc86xx/fdt.c b/arch/powerpc/cpu/mpc86xx/fdt.c
index ff89ee5..c3cd062 100644
--- a/arch/powerpc/cpu/mpc86xx/fdt.c
+++ b/arch/powerpc/cpu/mpc86xx/fdt.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008,2010 Freescale Semiconductor, Inc.
+ * Copyright 2008, 2011 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -14,6 +14,7 @@
DECLARE_GLOBAL_DATA_PTR;
extern void ft_fixup_num_cores(void *blob);
+extern void ft_srio_setup(void *blob);
void ft_cpu_setup(void *blob, bd_t *bd)
{
@@ -58,4 +59,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
ft_fixup_num_cores(blob);
#endif
+
+#ifdef CONFIG_SYS_HAS_SRIO
+ ft_srio_setup(blob);
+#endif
}
diff --git a/arch/powerpc/include/asm/immap_86xx.h
b/arch/powerpc/include/asm/immap_86xx.h
index 4e60cbb..cc338e4 100644
--- a/arch/powerpc/include/asm/immap_86xx.h
+++ b/arch/powerpc/include/asm/immap_86xx.h
@@ -1,7 +1,7 @@
/*
* MPC86xx Internal Memory Map
*
- * Copyright 2004 Freescale Semiconductor
+ * Copyright 2004, 2011 Freescale Semiconductor
* Jeff Brown (jeff...@freescale.com)
* Srikanth Srinivasan (srikanth.sriniva...@freescale.com)
*
@@ -1205,6 +1205,8 @@ typedef struct ccsr_gur {
#define MPC86xx_DEVDISR_PCI1 0x8000
#define MPC86xx_DEVDISR_PCIE1 0x4000
#define MPC86xx_DEVDISR_PCIE2 0x2000
+#define MPC86xx_DEVDISR_SRIO 0x0008
+#define MPC86xx_DEVDISR_RMSG 0x0004
#define MPC86xx_DEVDISR_CPU0 0x8000
#define MPC86xx_DEVDISR_CPU1 0x4000
#define MPC86xx_RSTCR_HRST_REQ 0x0002
--
1.7.2.3
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Re: [U-Boot] [PATCH v3] ftgmac100: support of gigabit eth ftgmac100
Dear Macpaul Lin, In message <1292921986-23419-1-git-send-email-macp...@andestech.com> you wrote: > Add Faraday's ftgmac100 (gigabit ethernet) > MAC controller's driver. > > Signed-off-by: Macpaul Lin > --- > Changes for v2: >- Coding Style cleanup >- Makefile Order sorted >- Volatile statement eliminated >- Error handling added >- Autonegotiation timeout value rechecked >- Link speed detection code is reduced >- Logic of autonegotiation and Link speed update reorganized >- Redundent registers offset table cleared >- The explaination of sub configuration of this > driver has moved into README > > Changes for v3: >- Coding Style clean up about > - 2 continue blank line > - incorrect multi-line comment style > - useless else statement and return value statement > - make multi-line statement into single line which doesn't exceed 80 chars > - brance with multi-line statement (comments included before one line > code) > > README | 12 + > drivers/net/Makefile|1 + > drivers/net/ftgmac100.c | 570 > +++ > drivers/net/ftgmac100.h | 255 + > include/netdev.h|1 + > 5 files changed, 839 insertions(+), 0 deletions(-) > create mode 100644 drivers/net/ftgmac100.c > create mode 100644 drivers/net/ftgmac100.h Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Madness takes its toll. Please have exact change. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3] fsl_esdhc: Add the workaround for erratum ESDHC136 (enable on P4080)
From: Roy Zang
False multi-bit ECC errors will be reported by the eSDHC buffer which
can trigger a reset request.
We disable all ECC error checking on SDHC.
Signed-off-by: Roy Zang
Signed-off-by: Kumar Gala
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++
arch/powerpc/cpu/mpc85xx/cpu_init.c | 10 +-
include/configs/P4080DS.h |1 +
3 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index d5c34c8..4e2cb4a 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -56,6 +56,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC135)
puts("Work-around for Erratum ESDHC135 enabled\n");
#endif
+#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC136)
+ puts("Work-around for Erratum ESDHC136 enabled\n");
+#endif
return 0;
}
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 4a6cc65..c14b622 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
*
* (C) Copyright 2003 Motorola Inc.
* Modified by Xianghua Xiao, x.x...@motorola.com
@@ -388,6 +388,14 @@ int cpu_init_r(void)
setup_mp();
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC136
+ {
+ void *p;
+ p = (void *)CONFIG_SYS_DCSRBAR + 0x20520;
+ setbits_be32(p, 1 << (31 - 14));
+ }
+#endif
+
#ifdef CONFIG_SYS_LBC_LCRR
/*
* Modify the CLKDIV field of LCRR register to improve the writing
diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index a15dd76..4dd7faa 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -37,6 +37,7 @@
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC136
#define CONFIG_SYS_P4080_ERRATUM_CPU22
#define CONFIG_SYS_P4080_ERRATUM_SERDES8
--
1.6.0.6
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[U-Boot] [PATCH 1/3] fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080)
From: Jerry Huang
Do not issue a manual asynchronous CMD12. Instead, use a (software)
synchronous CMD12 or AUTOCMD12 to abort data transfer.
Signed-off-by: Jerry Huang
Signed-off-by: Roy Zang
Signed-off-by: Kumar Gala
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |5 -
drivers/mmc/fsl_esdhc.c | 10 +-
include/configs/P4080DS.h |4 +++-
3 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 2d32532..0c4820c 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2010 Freescale Semiconductor, Inc.
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -50,6 +50,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
#if defined(CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN)
puts("Work-around for DDR MSYNC_IN Erratum enabled\n");
#endif
+#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC111)
+ puts("Work-around for Erratum ESDHC111 enabled\n");
+#endif
return 0;
}
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index cef2859..fe94164 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2007,2010 Freescale Semiconductor, Inc
+ * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
* Andy Fleming
*
* Based vaguely on the pxa mmc code:
@@ -79,6 +79,9 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
if (data->blocks > 1) {
xfertyp |= XFERTYP_MSBSEL;
xfertyp |= XFERTYP_BCEN;
+#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC111
+ xfertyp |= XFERTYP_AC12EN;
+#endif
}
if (data->flags & MMC_DATA_READ)
@@ -234,6 +237,11 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
+#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC111
+ if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
+ return 0;
+#endif
+
esdhc_write32(®s->irqstat, -1);
sync();
diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index 21b48e9..705b226 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -35,6 +35,8 @@
#define CONFIG_ICS307_REFCLK_HZ3000 /* ICS307 ref clk
freq */
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+
#define CONFIG_SYS_P4080_ERRATUM_CPU22
#define CONFIG_SYS_P4080_ERRATUM_SERDES8
--
1.6.0.6
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[U-Boot] [PATCH 2/3] fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)
From: Roy Zang
The default value of the SRS, VS18 and VS30 and ADMAS fields in the host
controller capabilities register (HOSTCAPBLT) are incorrect. The default
of these bits should be zero instead of one.
Clear these bits out when we read HOSTCAPBLT.
Signed-off-by: Roy Zang
Signed-off-by: Kumar Gala
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++
drivers/mmc/fsl_esdhc.c |5 +
include/configs/P4080DS.h |1 +
3 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 0c4820c..d5c34c8 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -53,6 +53,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC111)
puts("Work-around for Erratum ESDHC111 enabled\n");
#endif
+#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC135)
+ puts("Work-around for Erratum ESDHC135 enabled\n");
+#endif
return 0;
}
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index fe94164..d01c926 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -472,6 +472,11 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg
*cfg)
voltage_caps = 0;
caps = regs->hostcapblt;
+
+#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135
+ caps = caps & ~(ESDHC_HOSTCAPBLT_SRS |
+ ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
+#endif
if (caps & ESDHC_HOSTCAPBLT_VS18)
voltage_caps |= MMC_VDD_165_195;
if (caps & ESDHC_HOSTCAPBLT_VS30)
diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index 705b226..a15dd76 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -36,6 +36,7 @@
#define CONFIG_ICS307_REFCLK_HZ3000 /* ICS307 ref clk
freq */
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
#define CONFIG_SYS_P4080_ERRATUM_CPU22
#define CONFIG_SYS_P4080_ERRATUM_SERDES8
--
1.6.0.6
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Re: [U-Boot] [PATCH v2 8/9] mpc85xx: Implement workaround for erratum DDR-A003
On Dec 17, 2010, at 5:59 PM, York Sun wrote:
> Erratum DDR-A003 requires workaround to correctly set RCW10 for registered
> DIMM.
> Also adding polling after enabling DDR controller to ensure completion.
>
> Signed-off-by: York Sun
> ---
> arch/powerpc/cpu/mpc85xx/cmd_errata.c|4 ++
> arch/powerpc/cpu/mpc85xx/ddr-gen3.c | 81 +-
> arch/powerpc/include/asm/fsl_ddr_sdram.h | 19 +++
> include/configs/P4080DS.h|1 +
> 4 files changed, 104 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> index d73f3d7..9edaa0b 100644
> --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> @@ -47,6 +47,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc,
> char * const argv[])
> #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22)
> puts("Work-around for Erratum CPU22 enabled\n");
> #endif
> +#ifdef CONFIG_SYS_FSL_NMG_DDR_A003
change this to CONFIG_SYS_FSL_ERRATUM_DDR_A003
> + puts("Work-around for Erratum DDR-A003 enabled\n");
> +#endif
> +
> return 0;
> }
- k
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Re: [U-Boot] [PATCH v2 3/9] mpc8xxx: Enable ECC on/off control in hwconfig
On Dec 17, 2010, at 5:59 PM, York Sun wrote:
> diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
> b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
> index 774c0e4..38260f5 100644
> --- a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
> +++ b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
> @@ -81,10 +81,13 @@ unsigned int populate_memctl_options(int
> all_DIMMs_registered,
> /* Operational Mode Paramters */
>
> /* Pick ECC modes */
> -#ifdef CONFIG_DDR_ECC
> - popts->ECC_mode = 1; /* 0 = disabled, 1 = enabled */
> -#else
> popts->ECC_mode = 0; /* 0 = disabled, 1 = enabled */
> +#ifdef CONFIG_DDR_ECC
> + if (hwconfig_sub("fsl_ddr", "ecc")) {
> + if (hwconfig_subarg_cmp("fsl_ddr", "ecc", "on"))
> + popts->ECC_mode = 1;
> + } else
> + popts->ECC_mode = 1;
> #endif
> popts->ECC_init_using_memctl = 1; /* 0 = use DMA, 1 = use memctl */
You'll need to update to use hwconfig_sub_f() & hwconfig_subarg_cmp_f()
- k
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Re: [U-Boot] [PATCH] update VCMA9 port
Dear =?UTF-8?q?David=20M=C3=BCller?=, In message <1292926154-19802-1-git-send-email-d.muel...@elsoft.ch> you wrote: > > This patch brings the VCMA9 port in sync with the latest U-Boot > version by doing the following: > - do the necessary adjustments to support the ARM relocation feature > - use the CFI flash driver (and removing the old one) > - various cleanups and coding style fixes ... > diff --git a/board/mpl/vcma9/config.mk b/board/mpl/vcma9/config.mk > index e345913..fef5308 100644 > --- a/board/mpl/vcma9/config.mk > +++ b/board/mpl/vcma9/config.mk ... > -#CONFIG_SYS_TEXT_BASE = 0x30F8 > -CONFIG_SYS_TEXT_BASE = 0x33F8 > +CONFIG_SYS_TEXT_BASE = 0x0 Please move this line into your board config file, and drop the config.mk file. > diff --git a/board/mpl/vcma9/lowlevel_init.S b/board/mpl/vcma9/lowlevel_init.S > index 062e868..cb1518b 100644 > --- a/board/mpl/vcma9/lowlevel_init.S > +++ b/board/mpl/vcma9/lowlevel_init.S > @@ -4,9 +4,9 @@ > * Copyright (C) 1999 2000 2001 Erik Mouw (j.a.k.m...@its.tudelft.nl) and > * Jan-Derk Bakker (j.d.bak...@its.tudelft.nl) > * > - * Modified for the Samsung SMDK2410 by > - * (C) Copyright 2002 I understand this file was created using copy & paste; why do you think it is legal to remove the original copyright notice? > + * Modified for MPL VCMA9 by > * David Mueller, ELSOFT AG, We don't need this here. This information is present in the commit logs. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de You Don't Have To Be 'Damned' To Work Here, But It Helps!!! - Terry Pratchett, _Eric_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC] armv7: fixloop: don't fixup if location is NULL
Hi Albert, Am 09.01.2011 um 10:00 schrieb Albert ARIBAUD: > Hi Andreas, > > Le 08/01/2011 17:51, Andreas Bießmann a écrit : >> Dear Albert ARIBAUD, >> >> Am 08.01.2011 um 13:18 schrieb Albert ARIBAUD: >> >>> Le 08/01/2011 11:49, Albert ARIBAUD a écrit : >>> > In my investigations for 'NULL fixup' (-> see > http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/89864/focus=89906) > pointed out that only symbols in 'absolute fixup' loop could be 'NULL' > if there is a not aliased/empty weakly linked symbol. >>> >>> BTW: is such a situation normal? IIUC, it means there is a weakly linked >>> symbol without *any* defintion, *and* it is referenced in the code. >> >> Yes you may have a weakly linked symbol which was declared but nowhere >> implemented. See http://patchwork.ozlabs.org/patch/73647, this fixed such >> a situation for arm920t/at91 style SoC. > > Not sure I follow you there. Ok, so I may got you wrong before. > The example you give has a definition, admittedly for an empty function, > right above the weak definition. My question is about cases where the weak > symbol is declared and has no definition at all. Were you meaning to give an > example of an undefined > weak symbol being fixed so that it has at least a default definition? The mentioned patch did define an empty function stub to have a default definition for this case (board_reset()). This fixed two points a) the patch sets an address for board_reset() in .dynsym section other than '0' as it was before that patch b) the patch fixed an (maybe) linker bug which let the linker segfault if no .plt section was placed in linker script The real point behind that is the fact that I could never see a '0' in .rel.dyn section's first 4 bytes. But I did see the value '0' in address part of .dynsym section when I did have a undefined weakly linked symbol. Therefore I doubt the 'armv7: fixloop: don't fixup if location is NULL' patch do something meaningful. My first approach to get my board working was similar to that patch. But further investigation pointed out that it was wrong! In my case the .rel.dyn section got corrupted due to some bss manipulation before bss setup. That corruption did set the address segment of .rel.dyn entry to another value which lead to an aborted write later on (you know the story). >> BTW: Without the mentioned patch there was another issue with linking >> (-> see http://patchwork.ozlabs.org/patch/73563). The linker introduced >> a .plt section which could not be placed and lead to a segfault of linker. > > That's more of a linker bug to me. Maybe .. > The plt sections are unused that I know of. could not find any meaningful definition about that. AFAIR one doc showed some connection to runtime library loading ... Nevertheless the content of .plt section in my case was not really clear to me. > They could probably be put after BSS and marked NOLOAD -- giving it a try > would be a nice thing. I needed to add .plt to my linker script, did not try NOLOAD til now. regards Andreas Bießmann ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] microblaze: Disabling interrupt should return 1 if was enabled
Dear Michal Simek, In message <1292936565-24677-1-git-send-email-mon...@monstr.eu> you wrote: > Microblaze implement enable/disable interrupts through MSR > that's why disable_interrupts function should return 1 when interrupt > was enabled. Return 0 when interrupt was disabled. > > Signed-off-by: John Linn > Signed-off-by: Michal Simek > --- > arch/microblaze/cpu/interrupts.c |4 +++- > 1 files changed, 3 insertions(+), 1 deletions(-) Acked-by: Wolfgang Denk Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A stone was placed at a ford in a river with the inscription: "When this stone is covered it is dangerous to ford here." ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.
Dear Alessandro Rubini,
In message <20101229231004.ga17...@mail.gnudd.com> you wrote:
>
> > #define writeb(v,c) ({ __iowmb(); __arch_putb(v,c); v;})
> >
> > (note the additional 'v;') should result in correct code, too.
>
> Yes, that's good. Also "0" may work, and may be more readable, (or not,
> according to who reads it).
'0' looks wrong to me, as it changes behaviour. Keep in mind that the
previous implemention usually looks like this:
#define writeb(val,addr) (*(volatile unsigned char *)(addr)) = (val)
The value of this should be "val", not 0.
> > #define writeb(v,c) do { __iowmb(); __arch_putb(v,c); } while (0)
> >
> > do the same with a slightly different syntax, so these patches are
> > fine, too.
>
> It's not just different syntax, it's different semantics.
This is true. Thanks for pointing out.
> The ({...}) trick turns statements into expressions, while the "do
> {...} while(0)" does not. I'd better not forbid statements like
>
> while (reg = readb(addr), reg != VALUE) { }
>
> or
>
> if (readb(addr) == VALUE) { ... }
>
> or
> swtich (readb(addr)) { ... }
Here you are mixing things up. There is no issue with the read*()
code, only the write*() code is affected.
And while no person ion a sane mind of state should use write*() in
such a context, I agree that for the sake of backward compatibility we
should change the code. Patch follows.
> While I agree they may in general not be clean, I can forsee
> meaningful uses. Moreover, I'd better allow expression-looking macros
> to really behave like expressions -- otherwise error messages are quite
> hard to understand for the unaquainted.
Agreed. But the write*() "functions" are considered to return void,
so there should not be any such issues.
> IMHO, the only reason to use "do {} while(0)" over statemente
> expressions is being portable but in u-boot we are gcc-specific
> anyways.
This is wrong interpretation, too; nothing in this construct is GCC
specific.
Best regards,
Wolfgang Denk
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[U-Boot] [PATCH v4] ARM: Avoid compiler optimization for readb, writeb and friends.
From: Alexander Holler
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.
Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations
when
gcc 4.5.1 is used.
Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current
headers.
Signed-off-by: Alexander Holler
Signed-off-by: Dirk Behme
Signed-off-by: Wolfgang Denk
Cc: Alessandro Rubini
---
arch/arm/include/asm/io.h | 32
1 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index ff1518e..3886f15 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -117,21 +117,29 @@ extern inline void __raw_readsl(unsigned int addr, void
*data, int longlen)
*buf++ = __arch_getl(addr);
}
-#define __raw_writeb(v,a) __arch_putb(v,a)
-#define __raw_writew(v,a) __arch_putw(v,a)
-#define __raw_writel(v,a) __arch_putl(v,a)
+#define __raw_writeb(v,a) __arch_putb(v,a)
+#define __raw_writew(v,a) __arch_putw(v,a)
+#define __raw_writel(v,a) __arch_putl(v,a)
-#define __raw_readb(a) __arch_getb(a)
-#define __raw_readw(a) __arch_getw(a)
-#define __raw_readl(a) __arch_getl(a)
+#define __raw_readb(a) __arch_getb(a)
+#define __raw_readw(a) __arch_getw(a)
+#define __raw_readl(a) __arch_getl(a)
-#define writeb(v,a)__arch_putb(v,a)
-#define writew(v,a)__arch_putw(v,a)
-#define writel(v,a)__arch_putl(v,a)
+/*
+ * TODO: The kernel offers some more advanced versions of barriers, it might
+ * have some advantages to use them instead of the simple one here.
+ */
+#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#define __iormb() dmb()
+#define __iowmb() dmb()
+
+#define writeb(v,c)({ __iowmb(); __arch_putb(v,c); v; })
+#define writew(v,c)({ __iowmb(); __arch_putw(v,c); v; })
+#define writel(v,c)({ __iowmb(); __arch_putl(v,c); v; })
-#define readb(a) __arch_getb(a)
-#define readw(a) __arch_getw(a)
-#define readl(a) __arch_getl(a)
+#define readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; })
+#define readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; })
+#define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; })
/*
* The compiler seems to be incapable of optimising constants
--
1.7.3.4
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Re: [U-Boot] [PATCH v3] ARM: Avoid compiler optimization for usages of readb, writeb and friends.
Dear Dirk Behme, In message <4d1f1841.5060...@googlemail.com> you wrote: > > Do you like to test the patch in the attachment? I named it 'v4'. Please send patches inline. > After some thinking and testing, it seems to me that the volatile > optimization issue this patch shall fix is only with the readx() > macros. So the idea is to drop all writex() changes done in the v3 > version of this patch. With dropping the writex() changes, we would > drop all issues we discussed with e.g. the GCC statement-expression > and the do while workaround, too. This makes no sense. Even if we experience problems only with read*() at the moment, we should to the Rigth Thing (TM) and fix both the read*() and write*() functions. Please have a look a the patch I just posted, http://patchwork.ozlabs.org/patch/78056/ Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I wish Captain Vimes were here. He wouldn't have known what to do either, but he's got a much better vocabulary to be baffled in. - Terry Pratchett, _Guards! Guards!_ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/8] armv7: cache maintenance operations for armv7
Dear Albert ARIBAUD, In message <4d286f58.9010...@free.fr> you wrote: > > I know we consider multi-board u-boot binaries when boards are variant > of a given SoC, that's one reason why we wanted relocation. I'm not sure > about multi-SoC when SoC is a variant of a given cpu, though. Wolfgang, > your opinion? Unless we see a specific example which uses this feature, we should not add provisions that make the code more complicated than needed. And when we start supporting such a feature, we should probably do this based on a device tree approach. > > Although this function is non-empty, flush_dcache_range() is in turn > > empty. Effect will be the same, right? > > Yes the effect is the same, but your patch results in a non-trivially > empty function; I'd prefer it to be visibly empty when we compile > without cache support. Yes, that's my opinion, too. > Just because Linux uses armv7-a for a v7 arch does not mean we must have > it for u-boot. For starters, U-boot does not always boot Linux. :) > > As for out-dated compilers, that's the question I'm asking: do we > consider e.g. ELDK 4.2 as outdated or not? It won't accept armv7-a. That's a catch question. Yes, ELDK 4.2 is outdated. But it is still one of the most stable versions of a tool chain known to me, especially when it comes to using the very same tool versions across several architectures. I cannot see any benefits of this code change that would justiify such a breakage. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "The bad reputation UNIX has gotten is totally undeserved, laid on by people who don't understand, who have not gotten in there and tried anything." -- Jim Joyce, owner of Jim Joyce's UNIX Bookstore ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/8] armv7: add PL310 support to u-boot
Dear Aneesh V,
In message <1293018898-13253-6-git-send-email-ane...@ti.com> you wrote:
> Add support for some of the key maintenance operations
> - Invalidate all
> - Invalidate range
> - Flush(clean & invalidate) all
> - Flush range
Can you please use a more descriptive subject, and commit message?
I have no idea what a "PL310" might be - is this a new board? Or a new
SoC? or a new Ethernet controller?
And what exactly are "key maintenance operations"? Looks as if you
were talking about basic cache operations?
> --- /dev/null
> +++ b/arch/arm/include/asm/pl310.h
...
> +/* Register offsets */
> +#define PL310_CACHE_TYPE 0x004
> +#define PL310_AUX_CTRL 0x104
> +
> +#define PL310_CACHE_SYNC 0x730
> +#define PL310_INVAL_LINE_PA 0x770
> +#define PL310_INVAL_WAY 0x77C
> +#define PL310_CLEAN_LINE_PA 0x7B0
> +#define PL310_CLEAN_INVAL_WAY0x7FC
> +#define PL310_CLEAN_INVAL_LINE_PA0x7F0
NAK. Please use a C struct instead.
> --- a/arch/arm/lib/Makefile
> +++ b/arch/arm/lib/Makefile
> @@ -42,6 +42,7 @@ COBJS-y += cache.o
> ifndef CONFIG_SYS_NO_CP15_CACHE
> COBJS-y += cache-cp15.o
> endif
> +COBJS-$(CONFIG_SYS_USE_PL310) += cache-pl310.o
> COBJS-y += interrupts.o
> COBJS-y += reset.o
There is no documentation for CONFIG_SYS_USE_PL310, and there is no
use of this variable.
Also, it seems CONFIG_SYS_PL310 would be more appropriate.
...
> +static void pl310_cache_sync(void)
> +{
> + __raw_writel(0, CONFIG_SYS_PL310_BASE + PL310_CACHE_SYNC);
> +}
Please use a proper C struct instead of base address plus offset.
Please fix globally.
...
> + for (pa = start; pa < stop; pa = pa + line_size)
> + __raw_writel(pa, CONFIG_SYS_PL310_BASE +
> + PL310_CLEAN_INVAL_LINE_PA);
Please use braces for multiline statements.
Best regards,
Wolfgang Denk
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Re: [U-Boot] [PATCH 6/8] armv7: adapt omap4 to the new cache maintenance framework
Dear Aneesh V,
In message <1293018898-13253-7-git-send-email-ane...@ti.com> you wrote:
> adapt omap4 to the new layered cache maintenance framework
>
> Signed-off-by: Aneesh V
> +/*
> + * Outer cache related functions
> + */
> +#ifndef CONFIG_SYS_NO_DCACHE
Do we really need such a #define? Where is CONFIG_SYS_NO_DCACHE
documented?
> +void v7_setup_outer_cache_ops(void)
> +{
> +#ifndef CONFIG_L2_OFF
Should this be CONFIG_L2_OFF or CONFIG_SYS_L2_OFF? Where is
CONFIG_SYS_L2_OFF documented?
> @@ -45,3 +47,18 @@ lowlevel_init:
>*/
> bl s_init
> pop {ip, pc}
> +
> +set_pl310_ctrl_reg:
> +PUSH {r4-r11, lr}@ save registers - ROM code may pollute
> + @ our registers
> +LDR r12, =0x102 @ Set PL310 control register - value in R0
> +SMC #0 @ call ROM Code API to set control register
> +POP {r4-r11, pc}
Indentation by TAB, please.
Best regards,
Wolfgang Denk
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH 7/8] armv7: adapt omap3 to the new cache maintenance framework
Dear Aneesh V,
In message <1293018898-13253-8-git-send-email-ane...@ti.com> you wrote:
> adapt omap3 to the new layered cache maintenance framework
...
> +/* Declarations */
Please drop this comment. Everybody sees what this is.
> +#ifndef CONFIG_L2_OFF
> /*
> - * Writing to AuxCR in U-boot using SMI for GP DEV
> - * Currently SMI in Kernel on ES2 devices seems to have an issue
> - * Once that is resolved, we can postpone this config to kernel
> + * Invalidate L2-cache from secure mode
>*/
Why not change this into simple
/* Invalidate L2-cache from secure mode */
?
...
> +static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
> +{
> + u32 i, num_params = *parameters;
> + u32 *sram_scratch_space = (u32 *)OMAP3_PUBLIC_SRAM_SCRATCH_AREA;
> + /*
> + * copy the parameters to an un-cached area to avoid coherency
> + * issues
> + */
> + for (i = 0; i < num_params; i++) {
> + __raw_writel(*parameters, sram_scratch_space);
> + parameters++;
> + sram_scratch_space++;
> + }
Do you have unlimited storage there? Or should you add some check not
to exceed some maximum size?
> + } else {
> + struct emu_hal_params emu_romcode_params;
> + emu_romcode_params.num_params = 1;
> + emu_romcode_params.param1 = acr;
> + omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR,
> +(u32 *)&emu_romcode_params);
Please add a blank line between declarations and code (fix globally).
> +static void omap3_setup_aux_cr(void)
> +{
> + /* Workaround for Cortex-A8 errata: #454179 #430973
> + * Set "IBE" bit
...
Incorrect multiline comment style.
...
> diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h
> b/arch/arm/include/asm/arch-omap3/sys_proto.h
> index 4a28ba1..25f54ea 100644
> --- a/arch/arm/include/asm/arch-omap3/sys_proto.h
> +++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
> @@ -27,6 +27,11 @@ typedef struct {
> char *nand_string;
> } omap3_sysinfo;
>
> +struct __attribute__ ((__packed__)) emu_hal_params {
> + u32 num_params;
> + u32 param1;
> +};
Why exactly do we need the "__attribute__ ((__packed__))" here?
Best regards,
Wolfgang Denk
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Re: [U-Boot] [PATCH v2 1/3] MX5: Add initial support for MX53 processor
Dear Jason Liu, In message <1293024212-4858-1-git-send-email-r64...@freescale.com> you wrote: > Add initial support for Freescale MX53 processor, > > - Add the iomux support and the pin definition, > - Add the regs definition, clean up some unused def from mx51, > - Add the low level init support, make use the freq input of setup_pll macro ... > + ldr r0, =\pll What does '\p' mean ? > + ldr r1, W_DP_OP_\freq What does '\f' mean? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "Don't try to outweird me, three-eyes. I get stranger things than you free with my breakfast cereal." - Zaphod Beeblebrox in "Hitchhiker's Guide to the Galaxy" ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 1/8] MX5: Add initial support for MX53 processor
Dear Jason Liu, In message <1294129662-680-1-git-send-email-r64...@freescale.com> you wrote: > Add initial support for Freescale MX53 processor, > > - Add the iomux support and the pin definition, > - Add the regs definition, clean up some unused def from mx51, > - Add the low level init support, make use the freq input of setup_pll macro ... > + ldr r0, =\pll ... > + ldr r1, W_DP_OP_\freq Please see previous post. What do these escape sequences mean? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The only solution is ... a balance of power. We arm our side with exactly that much more. A balance of power -- the trickiest, most difficult, dirtiest game of them all. But the only one that preserves both sides. -- Kirk, "A Private Little War", stardate 4211.8 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] mpc83xx: Make start.S true PIC
Dear Joakim Tjernlund, In message you wrote: > > > But your new code does not reference CONFIG_SYS_MONITOR_BASE at all, > > but uses CONFIG_SYS_FLASH_BASE instead. > > You can't assume a fixed address when doing PIC therefore the change. I understand this change is intentionally, then? > > On which boards has this been tested? > > Only on our custom 83xx boards. Can you please try at least on one (or more) of the standard eval boards as well? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Conquest is easy. Control is not. -- Kirk, "Mirror, Mirror", stardate unknown ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] mpc83xx: Make start.S true PIC
Wolfgang Denk wrote on 2011/01/10 00:25:59: > > Dear Joakim Tjernlund, > > In message > you > wrote: > > > > > But your new code does not reference CONFIG_SYS_MONITOR_BASE at all, > > > but uses CONFIG_SYS_FLASH_BASE instead. > > > > You can't assume a fixed address when doing PIC therefore the change. > > I understand this change is intentionally, then? Yes it is needed, otherwise is isn't PIC as you assume a fixed start address. The FLASH base is the same in both cases. > > > > On which boards has this been tested? > > > > Only on our custom 83xx boards. > > Can you please try at least on one (or more) of the standard eval > boards as well? Don't have one. We borrowed a board during early development but this board has been returned long ago. Jocke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 1/8] MX5: Add initial support for MX53 processor
Hi, Wolfgang, 2011/1/10 Wolfgang Denk : > Dear Jason Liu, > > In message <1294129662-680-1-git-send-email-r64...@freescale.com> you wrote: >> Add initial support for Freescale MX53 processor, >> >> - Add the iomux support and the pin definition, >> - Add the regs definition, clean up some unused def from mx51, >> - Add the low level init support, make use the freq input of setup_pll macro > ... >> + ldr r0, =\pll > ... >> + ldr r1, W_DP_OP_\freq > > Please see previous post. What do these escape sequences mean? In order to evaluate the macro parameter, we need put escape sequences before the param. See, http://sourceware.org/binutils/docs-2.21/as/Macro.html#Macro for detailed information. > > Best regards, > > Wolfgang Denk > > -- > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de > The only solution is ... a balance of power. We arm our side with > exactly that much more. A balance of power -- the trickiest, most > difficult, dirtiest game of them all. But the only one that preserves > both sides. > -- Kirk, "A Private Little War", stardate 4211.8 > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/3] MX5: Add initial support for MX53 processor
Hi, Wolfgang, 2011/1/10 Wolfgang Denk : > Dear Jason Liu, > > In message <1293024212-4858-1-git-send-email-r64...@freescale.com> you wrote: >> Add initial support for Freescale MX53 processor, >> >> - Add the iomux support and the pin definition, >> - Add the regs definition, clean up some unused def from mx51, >> - Add the low level init support, make use the freq input of setup_pll macro > ... >> + ldr r0, =\pll > > What does '\p' mean ? In order to evaluate the macro parameter, we need put escape sequences before the param. See, http://sourceware.org/binutils/docs-2.21/as/Macro.html#Macro for detailed information. > >> + ldr r1, W_DP_OP_\freq > > What does '\f' mean? Ditto, > > > Best regards, > > Wolfgang Denk > > -- > DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de > "Don't try to outweird me, three-eyes. I get stranger things than you > free with my breakfast cereal." > - Zaphod Beeblebrox in "Hitchhiker's Guide to the Galaxy" > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] S5P: timer: replace bss variable by gd
Dear Wolfgang Denk, On 10 January 2011 01:14, Wolfgang Denk wrote: > Dear Minkyu Kang, > > In message <4d22d59b.7030...@samsung.com> you wrote: >> Use the global data instead of bss variable, replace as follow. >> count_value -> timer_rate_hz >> timestamp -> timer_reset_value >> lastdec -> lastinc > > I object against using variables wich have somewhat self-explanatory > names for different purposes. > Yes, I know. If so, do I have to add new variables at global_data? Maybe that is not good way too. How you think? One more question, what is the purpose of tbl and tbu? Thanks Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] spi: add new driver for OpenCores tiny_spi
This patch adds support for OpenCores tiny_spi.
http://opencores.org/project,tiny_spi
Signed-off-by: Thomas Chou
---
for u-boot
v2, use const and clean up as Mike suggested.
drivers/spi/Makefile |1 +
drivers/spi/oc_tiny_spi.c | 240 +
2 files changed, 241 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/oc_tiny_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index e34a124..8ad1d7f 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -35,6 +35,7 @@ COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
+COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
diff --git a/drivers/spi/oc_tiny_spi.c b/drivers/spi/oc_tiny_spi.c
new file mode 100644
index 000..b61cb7a
--- /dev/null
+++ b/drivers/spi/oc_tiny_spi.c
@@ -0,0 +1,240 @@
+/*
+ * Opencore tiny_spi driver
+ *
+ * http://opencores.org/project,tiny_spi
+ *
+ * based on bfin_spi.c
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ * Copyright (C) 2010 Thomas Chou
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define TINY_SPI_RXDATA 0
+#define TINY_SPI_TXDATA 4
+#define TINY_SPI_STATUS 8
+#define TINY_SPI_CONTROL 12
+#define TINY_SPI_BAUD 16
+
+#define TINY_SPI_STATUS_TXE 0x1
+#define TINY_SPI_STATUS_TXR 0x2
+
+struct tiny_spi_host {
+ ulong base;
+ uint freq;
+ uint baudwidth;
+};
+static const struct tiny_spi_host tiny_spi_host_list[] =
+ CONFIG_SYS_TINY_SPI_LIST;
+
+struct tiny_spi_slave {
+ struct spi_slave slave;
+ const struct tiny_spi_host *host;
+ uint mode;
+ uint baud;
+ uint flg;
+};
+#define to_tiny_spi_slave(s) container_of(s, struct tiny_spi_slave, slave)
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return bus < ARRAY_SIZE(tiny_spi_host_list) && gpio_is_valid(cs);
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+ struct tiny_spi_slave *tiny_spi = to_tiny_spi_slave(slave);
+ unsigned int cs = slave->cs;
+ gpio_set_value(cs, tiny_spi->flg);
+ debug("%s: SPI_CS_GPIO:%x\n", __func__, gpio_get_value(cs));
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+ struct tiny_spi_slave *tiny_spi = to_tiny_spi_slave(slave);
+ unsigned int cs = slave->cs;
+ gpio_set_value(cs, !tiny_spi->flg);
+ debug("%s: SPI_CS_GPIO:%x\n", __func__, gpio_get_value(cs));
+}
+
+void spi_set_speed(struct spi_slave *slave, uint hz)
+{
+ struct tiny_spi_slave *tiny_spi = to_tiny_spi_slave(slave);
+ const struct tiny_spi_host *host = tiny_spi->host;
+ tiny_spi->baud = min(DIV_ROUND_UP(host->freq, hz * 2),
+(1 << host->baudwidth)) - 1;
+ debug("%s: speed %u actual %u\n", __func__, hz,
+ host->freq / ((tiny_spi->baud + 1) * 2));
+}
+
+void spi_init(void)
+{
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int hz, unsigned int mode)
+{
+ struct tiny_spi_slave *tiny_spi;
+
+ if (!spi_cs_is_valid(bus, cs) || gpio_request(cs, "tiny_spi"))
+ return NULL;
+
+ tiny_spi = malloc(sizeof(*tiny_spi));
+ if (!tiny_spi)
+ return NULL;
+ memset(tiny_spi, 0, sizeof(*tiny_spi));
+
+ tiny_spi->slave.bus = bus;
+ tiny_spi->slave.cs = cs;
+ tiny_spi->host = &tiny_spi_host_list[bus];
+ tiny_spi->mode = mode & (SPI_CPOL | SPI_CPHA);
+ tiny_spi->flg = mode & SPI_CS_HIGH ? 1 : 0;
+ spi_set_speed(&tiny_spi->slave, hz);
+
+ debug("%s: bus:%i cs:%i base:%lx\n", __func__,
+ bus, cs, tiny_spi->host->base);
+ return &tiny_spi->slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ struct tiny_spi_slave *tiny_spi = to_tiny_spi_slave(slave);
+ gpio_free(slave->cs);
+ free(tiny_spi);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+ struct tiny_spi_slave *tiny_spi = to_tiny_spi_slave(slave);
+ const struct tiny_spi_host *host = tiny_spi->host;
+ debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
+ gpio_direction_output(slave->cs, !tiny_spi->flg);
+ writel(tiny_spi->mode, host->base + TINY_SPI_CONTROL);
+ writel(tiny_spi->baud, host->base + TINY_SPI_BAUD);
+ return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+ debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
+}
+
+#ifndef CONFIG_TINY_SPI_IDLE_VAL
+# define CONFIG_TINY_SPI_IDLE_VAL 0xff
+#endif
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
+void *din, unsigned long flags)
+{
+ const struct tiny_spi_host *host = to_tiny_spi_slave(slave)->host;
+ const u8 *t
[U-Boot] [PATCH V2 0/5] Add Pantheon soc and dkb board support
This patch set add the Pantheon soc and dkb board support. V2: This patch seris update the seperate mv_common part as suggested. Lei Wen (5): mv: seperate kirkwood and armada from common setting ARM: Add Support for Marvell Pantheon Familiy SoCs serial: add pantheon soc support mvmfp: add MFP configuration support for PANTHEON Pantheon: Add Board Support for Marvell dkb board MAINTAINERS |4 + arch/arm/cpu/arm926ejs/pantheon/Makefile | 46 ++ arch/arm/cpu/arm926ejs/pantheon/cpu.c | 78 ++ arch/arm/cpu/arm926ejs/pantheon/dram.c| 130 arch/arm/cpu/arm926ejs/pantheon/timer.c | 204 + arch/arm/include/asm/arch-armada100/config.h | 50 ++ arch/arm/include/asm/arch-kirkwood/config.h | 145 ++ arch/arm/include/asm/arch-pantheon/config.h | 44 ++ arch/arm/include/asm/arch-pantheon/cpu.h | 79 ++ arch/arm/include/asm/arch-pantheon/mfp.h | 42 + arch/arm/include/asm/arch-pantheon/pantheon.h | 54 +++ board/Marvell/dkb/Makefile| 51 ++ board/Marvell/dkb/dkb.c | 53 +++ boards.cfg|1 + drivers/gpio/mvmfp.c |2 + drivers/serial/serial.c |2 + include/configs/aspenite.h|1 + include/configs/dkb.h | 64 include/configs/mv-common.h | 147 +++--- 19 files changed, 1071 insertions(+), 126 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/pantheon/Makefile create mode 100644 arch/arm/cpu/arm926ejs/pantheon/cpu.c create mode 100644 arch/arm/cpu/arm926ejs/pantheon/dram.c create mode 100644 arch/arm/cpu/arm926ejs/pantheon/timer.c create mode 100644 arch/arm/include/asm/arch-armada100/config.h create mode 100644 arch/arm/include/asm/arch-kirkwood/config.h create mode 100644 arch/arm/include/asm/arch-pantheon/config.h create mode 100644 arch/arm/include/asm/arch-pantheon/cpu.h create mode 100644 arch/arm/include/asm/arch-pantheon/mfp.h create mode 100644 arch/arm/include/asm/arch-pantheon/pantheon.h create mode 100644 board/Marvell/dkb/Makefile create mode 100644 board/Marvell/dkb/dkb.c create mode 100644 include/configs/dkb.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 1/5] mv: seperate kirkwood and armada from common setting
Since there are lots of difference between kirkwood and armada series, it is better to seperate them but still keep the most common file shared by all marvell platform in the mv-common configure file. This patch move the kirkwood only driver definitoin in mv-common to the /config.h. This patch is tested with compilation for armada100 and guruplug. Signed-off-by: Lei Wen --- arch/arm/include/asm/arch-armada100/config.h | 50 + arch/arm/include/asm/arch-kirkwood/config.h | 145 + include/configs/aspenite.h |1 + include/configs/mv-common.h | 147 -- 4 files changed, 217 insertions(+), 126 deletions(-) create mode 100644 arch/arm/include/asm/arch-armada100/config.h create mode 100644 arch/arm/include/asm/arch-kirkwood/config.h diff --git a/arch/arm/include/asm/arch-armada100/config.h b/arch/arm/include/asm/arch-armada100/config.h new file mode 100644 index 000..9995b1a --- /dev/null +++ b/arch/arm/include/asm/arch-armada100/config.h @@ -0,0 +1,50 @@ +/* + * (C) Copyright 2010 + * Marvell Semiconductor + * Written-by: Lei Wen + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +/* + * This file should be included in board config header file. + * + * It supports common definitions for Armada100 platform + */ + +#ifndef _ARMD1_CONFIG_H +#define _ARMD1_CONFIG_H + +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ + +#define CONFIG_SYS_TCLK(14745600) /* NS16550 clk config */ +#define CONFIG_SYS_HZ_CLOCK(325) /* Timer Freq. 3.25MHZ */ +#define CONFIG_MARVELL_MFP /* Enable mvmfp driver */ +#define MV_MFPR_BASE ARMD1_MFPR_BASE +#define MV_UART_CONSOLE_BASE ARMD1_UART1_BASE +#define CONFIG_SYS_NS16550_IER (1 << 6)/* Bit 6 in UART_IER register + represents UART Unit Enable */ +/* + * There is no internal RAM in ARMADA100, using DRAM + * TBD: dcache to be used for this + */ +#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_TEXT_BASE - 0x0020) +#define CONFIG_NR_DRAM_BANKS_MAX 2 + +#endif /* _ARMD1_CONFIG_H */ diff --git a/arch/arm/include/asm/arch-kirkwood/config.h b/arch/arm/include/asm/arch-kirkwood/config.h new file mode 100644 index 000..7c6d63b --- /dev/null +++ b/arch/arm/include/asm/arch-kirkwood/config.h @@ -0,0 +1,145 @@ +/* + * (C) Copyright 2010 + * Marvell Semiconductor + * Written-by: Lei Wen + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +/* + * This file should be included in board config header file. + * + * It supports common definitions for Kirkwood platform + */ + +#ifndef _KW_CONFIG_H +#define _KW_CONFIG_H + +#if defined (CONFIG_KW88F6281) +#include +#elif defined (CONFIG_KW88F6192) +#include +#else +#error "SOC Name not defined" +#endif /* CONFIG_KW88F6281 */ + +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ + +#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ +#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ +#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ + +/* + * By default kwbimage.cfg from board specific folder is used + * If for some board, different configuration file need to be used, + * CONFIG_SYS_KWD_CONFIG should be defined in b
