svn commit: r334619 - head/sys/conf
Author: br
Date: Mon Jun 4 16:20:22 2018
New Revision: 334619
URL: https://svnweb.freebsd.org/changeset/base/334619
Log:
Fix build: ignore a GCC 7.2.0 warning which says that third argument of
memset(3) should contain the number of elements multiplied by the element
size.
Sponsored by: DARPA, AFRL
Modified:
head/sys/conf/kern.mk
Modified: head/sys/conf/kern.mk
==
--- head/sys/conf/kern.mk Mon Jun 4 15:44:17 2018(r334618)
+++ head/sys/conf/kern.mk Mon Jun 4 16:20:22 2018(r334619)
@@ -67,6 +67,9 @@ CWARNEXTRA+= -Wno-error=misleading-indentation
\
-Wno-error=shift-overflow \
-Wno-error=tautological-compare
.endif
+.if ${COMPILER_VERSION} >= 70200
+CWARNEXTRA+= -Wno-error=memset-elt-size
+.endif
.if ${COMPILER_VERSION} >= 8
CWARNEXTRA+= -Wno-error=packed-not-aligned
.endif
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svn commit: r334620 - head/share/mk
Author: br
Date: Mon Jun 4 16:21:18 2018
New Revision: 334620
URL: https://svnweb.freebsd.org/changeset/base/334620
Log:
Sort GCC warning flags and remove duplicates.
Sponsored by: DARPA, AFRL
Modified:
head/share/mk/bsd.sys.mk
Modified: head/share/mk/bsd.sys.mk
==
--- head/share/mk/bsd.sys.mkMon Jun 4 16:20:22 2018(r334619)
+++ head/share/mk/bsd.sys.mkMon Jun 4 16:21:18 2018(r334620)
@@ -141,19 +141,17 @@ CWARNFLAGS+= -Wno-error=misleading-indentation
\
# GCC 7.1.0
.if ${COMPILER_TYPE} == "gcc" && ${COMPILER_VERSION} >= 70100
-CWARNFLAGS+= -Wno-error=deprecated \
- -Wno-error=pointer-compare \
+CWARNFLAGS+= -Wno-error=bool-operation \
+ -Wno-error=deprecated \
+ -Wno-error=expansion-to-defined \
+ -Wno-error=format-overflow \
-Wno-error=format-truncation\
-Wno-error=implicit-fallthrough \
- -Wno-error=expansion-to-defined \
-Wno-error=int-in-bool-context \
- -Wno-error=bool-operation \
- -Wno-error=format-overflow \
- -Wno-error=stringop-overflow\
-Wno-error=memset-elt-size \
- -Wno-error=int-in-bool-context \
- -Wno-error=unused-const-variable\
- -Wno-error=nonnull
+ -Wno-error=nonnull \
+ -Wno-error=pointer-compare \
+ -Wno-error=stringop-overflow
.endif
# How to handle FreeBSD custom printf format specifiers.
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svn commit: r335000 - head/sys/riscv/riscv
Author: br Date: Tue Jun 12 16:19:27 2018 New Revision: 335000 URL: https://svnweb.freebsd.org/changeset/base/335000 Log: Align virtual addressing entries. This is required due to C-compressed ISA extension option being turned on. This fixes SMP operation in QEMU. Sponsored by: DARPA, AFRL Modified: head/sys/riscv/riscv/locore.S Modified: head/sys/riscv/riscv/locore.S == --- head/sys/riscv/riscv/locore.S Tue Jun 12 14:54:17 2018 (r334999) +++ head/sys/riscv/riscv/locore.S Tue Jun 12 16:19:27 2018 (r335000) @@ -156,6 +156,8 @@ _start: or s2, s2, t0 sfence.vma csrwsptbr, s2 + + .align 2 va: /* Setup supervisor trap vector */ @@ -284,6 +286,8 @@ ENTRY(mpentry) or s2, s2, t0 sfence.vma csrwsptbr, s2 + + .align 2 mpva: /* Setup supervisor trap vector */ la t0, cpu_exception_handler ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r335005 - head/sys/riscv/riscv
Author: br
Date: Tue Jun 12 16:47:33 2018
New Revision: 335005
URL: https://svnweb.freebsd.org/changeset/base/335005
Log:
Release secondary cores from WFI (wait for interrupt) by sending them
an IPI.
This does not work however yet in QEMU. As a temporary workaround set
software interrupt pending bit manually on a local core to ensure WFI
doesn't halt the hart.
This is required to smpboot in QEMU.
Sponsored by: DARPA, AFRL
Modified:
head/sys/riscv/riscv/mp_machdep.c
Modified: head/sys/riscv/riscv/mp_machdep.c
==
--- head/sys/riscv/riscv/mp_machdep.c Tue Jun 12 16:45:52 2018
(r335004)
+++ head/sys/riscv/riscv/mp_machdep.c Tue Jun 12 16:47:33 2018
(r335005)
@@ -181,6 +181,7 @@ riscv64_cpu_attach(device_t dev)
static void
release_aps(void *dummy __unused)
{
+ uintptr_t mask;
int cpu, i;
if (mp_ncpus == 1)
@@ -191,6 +192,14 @@ release_aps(void *dummy __unused)
atomic_store_rel_int(&aps_ready, 1);
+ /* Wake up the other CPUs */
+ mask = 0;
+
+ for (i = 1; i < mp_ncpus; i++)
+ mask |= (1 << i);
+
+ sbi_send_ipi(&mask);
+
printf("Release APs\n");
for (i = 0; i < 2000; i++) {
@@ -216,6 +225,11 @@ init_secondary(uint64_t cpu)
/* Setup the pcpu pointer */
pcpup = &__pcpu[cpu];
__asm __volatile("mv gp, %0" :: "r"(pcpup));
+
+ /* Workaround: make sure wfi doesn't halt the hart */
+ intr_disable();
+ csr_set(sie, SIE_SSIE);
+ csr_set(sip, SIE_SSIE);
/* Spin until the BSP releases the APs */
while (!aps_ready)
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svn commit: r335006 - in head/sys: conf riscv/riscv
Author: br
Date: Tue Jun 12 17:07:30 2018
New Revision: 335006
URL: https://svnweb.freebsd.org/changeset/base/335006
Log:
Add simplebus-like RISC-V SoC bus.
This is required in order to probe and attach devices described under
"riscv-virtio-soc" node of DTS.
Sponsored by: DARPA, AFRL
Added:
head/sys/riscv/riscv/soc.c (contents, props changed)
Modified:
head/sys/conf/files.riscv
Modified: head/sys/conf/files.riscv
==
--- head/sys/conf/files.riscv Tue Jun 12 16:47:33 2018(r335005)
+++ head/sys/conf/files.riscv Tue Jun 12 17:07:30 2018(r335006)
@@ -46,6 +46,7 @@ riscv/riscv/nexus.c standard
riscv/riscv/ofw_machdep.c optionalfdt
riscv/riscv/pmap.c standard
riscv/riscv/riscv_console.coptionalrcons
+riscv/riscv/soc.c standard
riscv/riscv/stack_machdep.coptionalddb | stack
riscv/riscv/support.S standard
riscv/riscv/swtch.Sstandard
Added: head/sys/riscv/riscv/soc.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/riscv/riscv/soc.c Tue Jun 12 17:07:30 2018(r335006)
@@ -0,0 +1,111 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+struct soc_softc {
+ device_tdev;
+};
+
+static int
+soc_probe(device_t dev)
+{
+
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ if (!ofw_bus_is_compatible(dev, "riscv-virtio-soc"))
+ return (ENXIO);
+
+ device_set_desc(dev, "RISC-V SoC");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+soc_attach(device_t dev)
+{
+ struct soc_softc *sc;
+ phandle_t node;
+
+ sc = device_get_softc(dev);
+ sc->dev = dev;
+
+ node = ofw_bus_get_node(dev);
+ if (node == -1)
+ return (ENXIO);
+
+ simplebus_init(dev, node);
+
+ /*
+* Allow devices to identify.
+*/
+ bus_generic_probe(dev);
+
+ /*
+* Now walk the OFW tree and attach top-level devices.
+*/
+ for (node = OF_child(node); node > 0; node = OF_peer(node))
+ simplebus_add_device(dev, node, 0, NULL, -1, NULL);
+
+ return (bus_generic_attach(dev));
+}
+
+static int
+soc_detach(device_t dev)
+{
+
+ return (0);
+}
+
+static device_method_t soc_methods[] = {
+ DEVMETHOD(device_probe, soc_probe),
+ DEVMETHOD(device_attach,soc_attach),
+ DEVMETHOD(device_detach,soc_detach),
+ DEVMETHOD_END
+};
+
+DEFINE_CLASS_1(soc, soc_driver, soc_methods, sizeof(struct soc_softc),
+simplebus_driver);
+static devclass_t soc_devclass;
+EARLY_DRIVER_MODULE(soc, simplebus, soc_driver, soc_devclass, 0, 0,
+BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
+MODULE_VERSION(soc, 1);
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svn commit: r335007 - in head/sys: conf riscv/conf riscv/include riscv/riscv
r != 0) {
+ rman_deactivate_resource(r);
+ return (err);
+ }
}
+
return (0);
}
@@ -375,16 +378,17 @@ static int
nexus_ofw_map_intr(device_t dev, device_t child, phandle_t iparent, int icells,
pcell_t *intr)
{
- int irq;
+ struct intr_map_data_fdt *fdt_data;
+ size_t len;
+ u_int irq;
- if (icells == 3) {
- irq = intr[1];
- if (intr[0] == 0)
- irq += 32; /* SPI */
- else
- irq += 16; /* PPI */
- } else
- irq = intr[0];
+ len = sizeof(*fdt_data) + icells * sizeof(pcell_t);
+ fdt_data = (struct intr_map_data_fdt *)intr_alloc_map_data(
+ INTR_MAP_DATA_FDT, len, M_WAITOK | M_ZERO);
+ fdt_data->iparent = iparent;
+ fdt_data->ncells = icells;
+ memcpy(fdt_data->cells, intr, icells * sizeof(pcell_t));
+ irq = intr_map_irq(NULL, iparent, (struct intr_map_data *)fdt_data);
return (irq);
}
Added: head/sys/riscv/riscv/plic.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/riscv/riscv/plic.c Tue Jun 12 17:45:15 2018(r335007)
@@ -0,0 +1,254 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include "pic_if.h"
+
+#definePLIC_NIRQS 32
+#definePLIC_PRIORITY(n)(0x00 + (n) * 0x4)
+#definePLIC_ENABLE(n, h) (0x002000 + (h) * 0x80 + (n) / 32)
+#definePLIC_THRESHOLD(h) (0x20 + (h) * 0x1000 + 0x0)
+#definePLIC_CLAIM(h) (0x20 + (h) * 0x1000 + 0x4)
+
+struct plic_irqsrc {
+ struct intr_irqsrc isrc;
+ u_int irq;
+};
+
+struct plic_softc {
+ device_tdev;
+ struct resource * intc_res;
+ struct plic_irqsrc isrcs[PLIC_NIRQS];
+};
+
+#defineRD4(sc, reg)\
+bus_read_4(sc->intc_res, (reg))
+#defineWR4(sc, reg, val) \
+bus_write_4(sc->intc_res, (reg), (val))
+
+static inline void
+plic_irq_dispatch(struct plic_softc *sc, u_int irq,
+struct trapframe *tf)
+{
+ struct plic_irqsrc *src;
+
+ src = &sc->isrcs[irq];
+
+ if (intr_isrc_dispatch(&src->isrc, tf) != 0)
+ device_printf(sc->dev, "Stray irq %u detected\n", irq);
+}
+
+static int
+plic_intr(void *arg)
+{
+ struct plic_softc *sc;
+ struct trapframe *tf;
+ uint32_t pending;
+ uint32_t cpu;
+
+ sc = arg;
+ cpu = PCPU_GET(cpuid);
+
+ pending = RD4(sc, PLIC_CLAIM(cpu));
+ if (pending) {
+ tf = curthread->td_intr_frame;
+ plic_irq_dispatch(sc, pending, tf);
+ WR4(sc, PLIC_CLAIM(cpu), pending);
+ }
+
+ return (FILTER_HANDLED);
+}
+
+static void
+plic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
+{
+ struct plic_softc *sc;
+ struct plic_irqsrc *src;
+ uint32
svn commit: r335008 - head/sys/riscv/conf
Author: br Date: Tue Jun 12 17:55:40 2018 New Revision: 335008 URL: https://svnweb.freebsd.org/changeset/base/335008 Log: Include VirtIO devices to the GENERIC configuration file. These are now available in QEMU/RISC-V. Sponsored by: DARPA, AFRL Modified: head/sys/riscv/conf/GENERIC Modified: head/sys/riscv/conf/GENERIC == --- head/sys/riscv/conf/GENERIC Tue Jun 12 17:45:15 2018(r335007) +++ head/sys/riscv/conf/GENERIC Tue Jun 12 17:55:40 2018(r335008) @@ -81,11 +81,21 @@ options INTRNG # RISC-V SBI console device rcons +# VirtIO support +device virtio # Generic VirtIO bus (required) +device virtio_pci # VirtIO PCI device +device vtnet # VirtIO Ethernet device +device virtio_blk # VirtIO Block device +device virtio_mmio # VirtIO MMIO bus + # Uncomment for memory disk # options MD_ROOT # options MD_ROOT_SIZE=32768 # 32MB ram disk # makeoptions MFS_IMAGE=/path/to/img # options ROOTDEVNAME=\"ufs:/dev/md0\" + +# Uncomment for virtio block device +# options ROOTDEVNAME=\"ufs:/dev/vtbd0\" # Debugging support. Always need this: optionsKDB # Enable kernel debugger support. ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r335047 - head/sys/riscv/riscv
Author: br Date: Wed Jun 13 10:32:21 2018 New Revision: 335047 URL: https://svnweb.freebsd.org/changeset/base/335047 Log: Don't jump to VA space until kernel is ready. This fixes the race when first core sets up the pagetables, while secondary cores do translating the address of __riscv_boot_ap. This now allows us to smpboot in QEMU with 8 cores just fine. Sponsored by: DARPA, AFRL Modified: head/sys/riscv/riscv/locore.S Modified: head/sys/riscv/riscv/locore.S == --- head/sys/riscv/riscv/locore.S Wed Jun 13 09:28:47 2018 (r335046) +++ head/sys/riscv/riscv/locore.S Wed Jun 13 10:32:21 2018 (r335047) @@ -263,6 +263,21 @@ END(mpentry) * Called by a core when it is being brought online. */ ENTRY(mpentry) + /* +* Calculate the offset to __riscv_boot_ap +* for the current core, cpuid is in a0. +*/ + li t1, 4 + mulwt1, t1, a0 + /* Get the pointer */ + la t0, __riscv_boot_ap + add t0, t0, t1 + +1: + /* Wait the kernel to be ready */ + lw t1, 0(t0) + beqzt1, 1b + /* Setup stack pointer */ la t0, secondary_stacks li t1, (PAGE_SIZE * KSTACK_PAGES) @@ -296,20 +311,6 @@ mpva: /* Ensure sscratch is zero */ li t0, 0 csrwsscratch, t0 - /* -* Calculate the offset to __riscv_boot_ap -* for current core, cpuid in a0. -*/ - li t1, 4 - mulwt1, t1, a0 - /* Get pointer */ - la t0, __riscv_boot_ap - add t0, t0, t1 - -1: - /* Wait the kernel to be ready */ - lw t1, 0(t0) - beqzt1, 1b callinit_secondary END(mpentry) ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r335211 - head/sys/dev/virtio/mmio
Author: br
Date: Fri Jun 15 16:19:10 2018
New Revision: 335211
URL: https://svnweb.freebsd.org/changeset/base/335211
Log:
Make virtio queue re-initialization steps to be similar to
original initialization, so we don't miss few registers to
configure.
This fixes vtnet(4) operation with QEMU's virtio-net-device.
Tested in QEMU with FreeBSD/RISC-V.
Reviewed by: bryanv
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D15821
Modified:
head/sys/dev/virtio/mmio/virtio_mmio.c
Modified: head/sys/dev/virtio/mmio/virtio_mmio.c
==
--- head/sys/dev/virtio/mmio/virtio_mmio.c Fri Jun 15 16:18:39 2018
(r335210)
+++ head/sys/dev/virtio/mmio/virtio_mmio.c Fri Jun 15 16:19:10 2018
(r335211)
@@ -512,7 +512,8 @@ vtmmio_alloc_virtqueues(device_t dev, int flags, int n
if (sc->vtmmio_vqs == NULL)
return (ENOMEM);
- vtmmio_write_config_4(sc, VIRTIO_MMIO_GUEST_PAGE_SIZE, 1 << PAGE_SHIFT);
+ vtmmio_write_config_4(sc, VIRTIO_MMIO_GUEST_PAGE_SIZE,
+ (1 << PAGE_SHIFT));
for (idx = 0; idx < nvqs; idx++) {
vqx = &sc->vtmmio_vqs[idx];
@@ -537,10 +538,10 @@ vtmmio_alloc_virtqueues(device_t dev, int flags, int n
VIRTIO_MMIO_VRING_ALIGN);
#if 0
device_printf(dev, "virtqueue paddr 0x%08lx\n",
- (uint64_t)virtqueue_paddr(vq));
+ (uint64_t)virtqueue_paddr(vq));
#endif
vtmmio_write_config_4(sc, VIRTIO_MMIO_QUEUE_PFN,
- virtqueue_paddr(vq) >> PAGE_SHIFT);
+ virtqueue_paddr(vq) >> PAGE_SHIFT);
vqx->vtv_vq = *info->vqai_vq = vq;
vqx->vtv_no_intr = info->vqai_intr == NULL;
@@ -592,6 +593,9 @@ vtmmio_reinit(device_t dev, uint64_t features)
vtmmio_negotiate_features(dev, features);
+ vtmmio_write_config_4(sc, VIRTIO_MMIO_GUEST_PAGE_SIZE,
+ (1 << PAGE_SHIFT));
+
for (idx = 0; idx < sc->vtmmio_nvqs; idx++) {
error = vtmmio_reinit_virtqueue(sc, idx);
if (error)
@@ -766,6 +770,13 @@ vtmmio_reinit_virtqueue(struct vtmmio_softc *sc, int i
if (error)
return (error);
+ vtmmio_write_config_4(sc, VIRTIO_MMIO_QUEUE_NUM, size);
+ vtmmio_write_config_4(sc, VIRTIO_MMIO_QUEUE_ALIGN,
+ VIRTIO_MMIO_VRING_ALIGN);
+#if 0
+ device_printf(sc->dev, "virtqueue paddr 0x%08lx\n",
+ (uint64_t)virtqueue_paddr(vq));
+#endif
vtmmio_write_config_4(sc, VIRTIO_MMIO_QUEUE_PFN,
virtqueue_paddr(vq) >> PAGE_SHIFT);
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svn commit: r335369 - head/share/mk
Author: br
Date: Tue Jun 19 13:28:02 2018
New Revision: 335369
URL: https://svnweb.freebsd.org/changeset/base/335369
Log:
Don't use TARGET_ARCH in this file, use MACHINE_ARCH instead.
TARGET_ARCH is not defined when building ports/packages.
Sponsored by: DARPA, AFRL
Modified:
head/share/mk/bsd.cpu.mk
Modified: head/share/mk/bsd.cpu.mk
==
--- head/share/mk/bsd.cpu.mkTue Jun 19 12:16:19 2018(r335368)
+++ head/share/mk/bsd.cpu.mkTue Jun 19 13:28:02 2018(r335369)
@@ -366,7 +366,7 @@ CFLAGS += -mcpu=8540 -Wa,-me500 -mspe=yes -mabi=spe -m
.endif
.if ${MACHINE_CPUARCH} == "riscv"
-.if ${TARGET_ARCH:Mriscv*sf}
+.if ${MACHINE_ARCH:Mriscv*sf}
CFLAGS += -march=rv64imac -mabi=lp64
ACFLAGS += -march=rv64imac -mabi=lp64
.else
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svn commit: r335370 - head/contrib/llvm/projects/libunwind/src
Author: br Date: Tue Jun 19 14:46:59 2018 New Revision: 335370 URL: https://svnweb.freebsd.org/changeset/base/335370 Log: o Implement unw_getcontext() o Restore floating-point registers in jumpto() These are required to native cross build GCC and GDB (both do require libc++ and libunwind). These are not tested. Sponsored by: DARPA, AFRL Modified: head/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S head/contrib/llvm/projects/libunwind/src/UnwindRegistersSave.S Modified: head/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S == --- head/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S Tue Jun 19 13:28:02 2018(r335369) +++ head/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S Tue Jun 19 14:46:59 2018(r335370) @@ -488,6 +488,41 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind14Regis // .p2align 2 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind15Registers_riscv6jumptoEv) +#ifdef __riscv_float_abi_double + fldf0, (8 * 32 + 8 * 0)(a0) + fldf1, (8 * 32 + 8 * 1)(a0) + fldf2, (8 * 32 + 8 * 2)(a0) + fldf3, (8 * 32 + 8 * 3)(a0) + fldf4, (8 * 32 + 8 * 4)(a0) + fldf5, (8 * 32 + 8 * 5)(a0) + fldf6, (8 * 32 + 8 * 6)(a0) + fldf7, (8 * 32 + 8 * 7)(a0) + fldf8, (8 * 32 + 8 * 8)(a0) + fldf9, (8 * 32 + 8 * 9)(a0) + fldf10, (8 * 32 + 8 * 10)(a0) + fldf11, (8 * 32 + 8 * 11)(a0) + fldf12, (8 * 32 + 8 * 12)(a0) + fldf13, (8 * 32 + 8 * 13)(a0) + fldf14, (8 * 32 + 8 * 14)(a0) + fldf15, (8 * 32 + 8 * 15)(a0) + fldf16, (8 * 32 + 8 * 16)(a0) + fldf17, (8 * 32 + 8 * 17)(a0) + fldf18, (8 * 32 + 8 * 18)(a0) + fldf19, (8 * 32 + 8 * 19)(a0) + fldf20, (8 * 32 + 8 * 20)(a0) + fldf21, (8 * 32 + 8 * 21)(a0) + fldf22, (8 * 32 + 8 * 22)(a0) + fldf23, (8 * 32 + 8 * 23)(a0) + fldf24, (8 * 32 + 8 * 24)(a0) + fldf25, (8 * 32 + 8 * 25)(a0) + fldf26, (8 * 32 + 8 * 26)(a0) + fldf27, (8 * 32 + 8 * 27)(a0) + fldf28, (8 * 32 + 8 * 28)(a0) + fldf29, (8 * 32 + 8 * 29)(a0) + fldf30, (8 * 32 + 8 * 30)(a0) + fldf31, (8 * 32 + 8 * 31)(a0) +#endif + // x0 is zero ldx1, (8 * 1)(a0) ldx2, (8 * 2)(a0) @@ -521,8 +556,6 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind15Regis ldx30, (8 * 30)(a0) ldx31, (8 * 31)(a0) ldx10, (8 * 10)(a0) // restore a0 - - /* RISCVTODO: restore FPU registers */ ret // jump to ra Modified: head/contrib/llvm/projects/libunwind/src/UnwindRegistersSave.S == --- head/contrib/llvm/projects/libunwind/src/UnwindRegistersSave.S Tue Jun 19 13:28:02 2018(r335369) +++ head/contrib/llvm/projects/libunwind/src/UnwindRegistersSave.S Tue Jun 19 14:46:59 2018(r335370) @@ -665,8 +665,83 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext) #elif defined(__riscv) -/* RISCVTODO */ +# +# extern int unw_getcontext(unw_context_t* thread_state) +# +# On entry: +# thread_state pointer is in a0 +# +DEFINE_LIBUNWIND_FUNCTION(unw_getcontext) + // x0 is zero + sdx1, (8 * 1)(a0) + sdx2, (8 * 2)(a0) + sdx3, (8 * 3)(a0) + sdx4, (8 * 4)(a0) + sdx5, (8 * 5)(a0) + sdx6, (8 * 6)(a0) + sdx7, (8 * 7)(a0) + sdx8, (8 * 8)(a0) + sdx9, (8 * 9)(a0) + sdx10, (8 * 10)(a0) + sdx11, (8 * 11)(a0) + sdx12, (8 * 12)(a0) + sdx13, (8 * 13)(a0) + sdx14, (8 * 14)(a0) + sdx15, (8 * 15)(a0) + sdx16, (8 * 16)(a0) + sdx17, (8 * 17)(a0) + sdx18, (8 * 18)(a0) + sdx19, (8 * 19)(a0) + sdx20, (8 * 20)(a0) + sdx21, (8 * 21)(a0) + sdx22, (8 * 22)(a0) + sdx23, (8 * 23)(a0) + sdx24, (8 * 24)(a0) + sdx25, (8 * 25)(a0) + sdx26, (8 * 26)(a0) + sdx27, (8 * 27)(a0) + sdx28, (8 * 28)(a0) + sdx29, (8 * 29)(a0) + sdx30, (8 * 30)(a0) + sdx31, (8 * 31)(a0) +#ifdef __riscv_float_abi_double + fsdf0, (8 * 32 + 8 * 0)(a0) + fsdf1, (8 * 32 + 8 * 1)(a0) + fsdf2, (8 * 32 + 8 * 2)(a0) + fsdf3, (8 * 32 + 8 * 3)(a0) + fsdf4, (8 * 32 + 8 * 4)(a0) + fsdf5, (8 * 32 + 8 * 5)(a0) + fsdf6, (8 * 32 + 8 * 6)(a0) + fsdf7, (8 * 32 + 8 * 7)(a0) + fsdf8, (8 * 32 + 8 * 8)(a0) + fsdf9, (8 * 32 + 8 * 9)(a0) + fsdf10, (8 * 32 + 8 * 10)(a0) + fsdf11, (8 * 32 + 8 * 11)(a0) + fsdf12, (8 * 32 + 8 * 12)(a0) + fsdf13, (8 * 32 + 8 * 13)(a0) + fsdf14, (8 * 32 + 8 * 14)(a0) + fsdf15, (8 * 32 + 8 * 15)(a0) + fsdf16, (8 * 32 + 8 * 16)(a0) + fsdf17, (8 * 32 + 8 * 17)(a0) + fsdf18, (8 * 32 + 8 * 18)(a0) + fsdf19, (8 * 32 + 8 * 19)(a0) + fsdf20, (8 * 32 + 8 * 20)(a0) + fsdf21, (8 * 32 + 8 * 21)(a0) + fsdf22, (8 * 32 + 8 * 22)(a0) + fsdf23, (8 * 32 + 8 * 23)(a0) + fsdf24,
svn commit: r335475 - head/sys/vm
Author: br
Date: Thu Jun 21 11:43:54 2018
New Revision: 335475
URL: https://svnweb.freebsd.org/changeset/base/335475
Log:
Fix uma_zalloc_pcpu_arg() operation in case of !SMP build.
Reviewed by: mjg
Sponsored by: DARPA, AFRL
Modified:
head/sys/vm/uma_core.c
Modified: head/sys/vm/uma_core.c
==
--- head/sys/vm/uma_core.c Thu Jun 21 11:24:20 2018(r335474)
+++ head/sys/vm/uma_core.c Thu Jun 21 11:43:54 2018(r335475)
@@ -2234,13 +2234,19 @@ void *
uma_zalloc_pcpu_arg(uma_zone_t zone, void *udata, int flags)
{
void *item;
+#ifdef SMP
int i;
MPASS(zone->uz_flags & UMA_ZONE_PCPU);
+#endif
item = uma_zalloc_arg(zone, udata, flags &~ M_ZERO);
if (item != NULL && (flags & M_ZERO)) {
+#ifdef SMP
CPU_FOREACH(i)
bzero(zpcpu_get_cpu(item, i), zone->uz_size);
+#else
+ bzero(item, zone->uz_size);
+#endif
}
return (item);
}
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svn commit: r335477 - head/sys/riscv/riscv
Author: br
Date: Thu Jun 21 11:52:09 2018
New Revision: 335477
URL: https://svnweb.freebsd.org/changeset/base/335477
Log:
PLIC driver was sponsored by ECATS contract, not CTSRD one.
Modified:
head/sys/riscv/riscv/plic.c
Modified: head/sys/riscv/riscv/plic.c
==
--- head/sys/riscv/riscv/plic.c Thu Jun 21 11:49:21 2018(r335476)
+++ head/sys/riscv/riscv/plic.c Thu Jun 21 11:52:09 2018(r335477)
@@ -5,8 +5,9 @@
* All rights reserved.
*
* This software was developed by SRI International and the University of
- * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
- * ("CTSRD"), as part of the DARPA CRASH research programme.
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
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svn commit: r328044 - head/lib/libpmcstat
Author: br
Date: Tue Jan 16 09:31:01 2018
New Revision: 328044
URL: https://svnweb.freebsd.org/changeset/base/328044
Log:
Fix bug: increment the value of pmcstat_npmcs instead of moving pointer
to the next int position.
Bug was introduced in r324959 ("Extract a set of pmcstat functions and
interfaces to the new internal library -- libpmcstat.")
This fixes pmcstat top mode (-T) operation.
Example: pmcstat -n1 -S clock.hard -T
Reported by: Peter Holm
Sponsored by: DARPA, AFRL
Modified:
head/lib/libpmcstat/libpmcstat_logging.c
Modified: head/lib/libpmcstat/libpmcstat_logging.c
==
--- head/lib/libpmcstat/libpmcstat_logging.cTue Jan 16 08:00:07 2018
(r328043)
+++ head/lib/libpmcstat/libpmcstat_logging.cTue Jan 16 09:31:01 2018
(r328044)
@@ -101,7 +101,7 @@ pmcstat_pmcid_add(pmc_id_t pmcid, pmcstat_interned_str
pr->pr_pmcid = pmcid;
pr->pr_pmcname = ps;
- pr->pr_pmcin = *pmcstat_npmcs++;
+ pr->pr_pmcin = (*pmcstat_npmcs)++;
pr->pr_samples = 0;
pr->pr_dubious_frames = 0;
pr->pr_merge = prm == NULL ? pr : prm;
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svn commit: r328130 - head/sys/arm64/arm64
Author: br
Date: Thu Jan 18 16:20:09 2018
New Revision: 328130
URL: https://svnweb.freebsd.org/changeset/base/328130
Log:
Set the base address of translation table 0.
This fixes operation on Qualcomm Snapdragon and some other platforms.
During boot time on subsystems initialization we have some amount of
kernel threads created, then scheduler gives CPU time to each thread.
Eventually scheduler returns CPU execution back to thread 0. In this
case writing zero to ttbr0 in cpu_switch leads Qualcomm board to
reboot (asynchronously, CPU continues execution).
Similar to other kernel threads install a valid physical address
(kernel pmap) to user page table base register ttbr0.
Reviewed by: andrew
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D13536
Modified:
head/sys/arm64/arm64/machdep.c
Modified: head/sys/arm64/arm64/machdep.c
==
--- head/sys/arm64/arm64/machdep.c Thu Jan 18 15:28:49 2018
(r328129)
+++ head/sys/arm64/arm64/machdep.c Thu Jan 18 16:20:09 2018
(r328130)
@@ -715,6 +715,9 @@ init_proc0(vm_offset_t kstack)
thread0.td_pcb->pcb_vfpcpu = UINT_MAX;
thread0.td_frame = &proc0_tf;
pcpup->pc_curpcb = thread0.td_pcb;
+
+ /* Set the base address of translation table 0. */
+ thread0.td_proc->p_md.md_l0addr = READ_SPECIALREG(ttbr0_el1);
}
typedef struct {
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svn commit: r328132 - head/sys/dev/uart
Author: br
Date: Thu Jan 18 17:43:32 2018
New Revision: 328132
URL: https://svnweb.freebsd.org/changeset/base/328132
Log:
Support for UART device found in Qualcomm Snapdragon 410E SoC.
Tested on DragonBoard 410c.
Reviewed by: andrew
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D13972
Modified:
head/sys/dev/uart/uart_dev_msm.c
head/sys/dev/uart/uart_dev_msm.h
Modified: head/sys/dev/uart/uart_dev_msm.c
==
--- head/sys/dev/uart/uart_dev_msm.cThu Jan 18 16:22:05 2018
(r328131)
+++ head/sys/dev/uart/uart_dev_msm.cThu Jan 18 17:43:32 2018
(r328132)
@@ -37,7 +37,6 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
#include
#include
@@ -122,9 +121,6 @@ msm_uart_param(struct uart_bas *bas, int baudrate, int
return (EINVAL);
}
uart_setreg(bas, UART_DM_MR2, ulcon);
-
- /* Set 115200 for both TX and RX. */
- uart_setreg(bas, UART_DM_CSR, UART_DM_CSR_115200);
uart_barrier(bas);
return (0);
@@ -143,6 +139,8 @@ static int
msm_probe(struct uart_bas *bas)
{
+ bas->regiowidth = 4;
+
return (0);
}
@@ -202,8 +200,7 @@ msm_init(struct uart_bas *bas, int baudrate, int datab
SETREG(bas, UART_DM_CR, UART_DM_RESET_STALE_INT);
/* Enable/Disable Rx/Tx DM interfaces */
- /* Disable Data Mover for now. */
- uart_setreg(bas, UART_DM_DMEN, 0x0);
+ uart_setreg(bas, UART_DM_DMEN, UART_DM_DMEN_RX_SC_ENABLE);
/* Enable transmitter and receiver */
uart_setreg(bas, UART_DM_CR, UART_DM_CR_RX_ENABLE);
@@ -239,6 +236,7 @@ msm_putc(struct uart_bas *bas, int c)
while ((uart_getreg(bas, UART_DM_ISR) & UART_DM_TX_READY) == 0
&& --limit)
DELAY(4);
+ SETREG(bas, UART_DM_CR, UART_DM_CLEAR_TX_READY);
}
/* FIFO is ready, write number of characters to be written */
uart_setreg(bas, UART_DM_NO_CHARS_FOR_TX, 1);
@@ -324,7 +322,11 @@ static kobj_method_t msm_methods[] = {
int
msm_bus_probe(struct uart_softc *sc)
{
+ struct uart_bas *bas;
+ bas = &sc->sc_bas;
+ bas->regiowidth = 4;
+
sc->sc_txfifosz = 64;
sc->sc_rxfifosz = 64;
@@ -570,7 +572,8 @@ static struct uart_class uart_msm_class = {
};
static struct ofw_compat_data compat_data[] = {
- {"qcom,msm-uartdm", (uintptr_t)&uart_msm_class},
- {NULL, (uintptr_t)NULL},
+ {"qcom,msm-uartdm-v1.4",(uintptr_t)&uart_msm_class},
+ {"qcom,msm-uartdm", (uintptr_t)&uart_msm_class},
+ {NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);
Modified: head/sys/dev/uart/uart_dev_msm.h
==
--- head/sys/dev/uart/uart_dev_msm.hThu Jan 18 16:22:05 2018
(r328131)
+++ head/sys/dev/uart/uart_dev_msm.hThu Jan 18 17:43:32 2018
(r328132)
@@ -177,6 +177,11 @@ enum UART_DM_BITS_PER_CHAR {
/* UART Data Mover Enable Register */
#defineUART_DM_DMEN0x3c
+/*
+ * Single-Character mode for RX channel (every character received
+ * is zero-padded into a word).
+ */
+#define UART_DM_DMEN_RX_SC_ENABLE (1 << 5)
/* Number of characters for Transmission */
#defineUART_DM_NO_CHARS_FOR_TX 0x40
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svn commit: r328133 - head/sys/dev/uart
Author: br
Date: Thu Jan 18 18:19:31 2018
New Revision: 328133
URL: https://svnweb.freebsd.org/changeset/base/328133
Log:
UART Clock Selection Register holds a divider value for a supplied clock,
not a final baud rate. The value for this register has to be calculated.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/uart/uart_dev_msm.h
Modified: head/sys/dev/uart/uart_dev_msm.h
==
--- head/sys/dev/uart/uart_dev_msm.hThu Jan 18 17:43:32 2018
(r328132)
+++ head/sys/dev/uart/uart_dev_msm.hThu Jan 18 18:19:31 2018
(r328133)
@@ -80,22 +80,6 @@ enum UART_DM_BITS_PER_CHAR {
/* UART Clock Selection Register, write only */
#defineUART_DM_CSR 0x08
-#define UART_DM_CSR_115200 0xff
-#define UART_DM_CSR_57600 0xee
-#define UART_DM_CSR_38400 0xdd
-#define UART_DM_CSR_28800 0xcc
-#define UART_DM_CSR_19200 0xbb
-#define UART_DM_CSR_14400 0xaa
-#define UART_DM_CSR_9600 0x99
-#define UART_DM_CSR_7200 0x88
-#define UART_DM_CSR_4800 0x77
-#define UART_DM_CSR_3600 0x66
-#define UART_DM_CSR_2400 0x55
-#define UART_DM_CSR_1200 0x44
-#define UART_DM_CSR_6000x33
-#define UART_DM_CSR_3000x22
-#define UART_DM_CSR_1500x11
-#define UART_DM_CSR_75 0x00
/* UART DM TX FIFO Registers - 4, write only */
#defineUART_DM_TF(x) (0x70 + (4 * (x)))
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svn commit: r328402 - head/sys/dev/usb/controller
Author: br
Date: Thu Jan 25 16:58:23 2018
New Revision: 328402
URL: https://svnweb.freebsd.org/changeset/base/328402
Log:
Add basic driver for Qualcomm USB 2.0 EHCI controller.
This driver relies on system initialization in u-boot.
Tested on DragonBoard 410c.
Sponsored by: DARPA, AFRL
Added:
head/sys/dev/usb/controller/ehci_msm.c (contents, props changed)
Added: head/sys/dev/usb/controller/ehci_msm.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/usb/controller/ehci_msm.c Thu Jan 25 16:58:23 2018
(r328402)
@@ -0,0 +1,231 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by BAE Systems, the University of Cambridge
+ * Computer Laboratory, and Memorial University under DARPA/AFRL contract
+ * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
+ * (TC) research program.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include "opt_bus.h"
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+struct ehci_msm_softc {
+ ehci_softc_tbase;
+ struct resource *res[3];
+};
+
+static struct resource_spec ehci_msm_spec[] = {
+ { SYS_RES_MEMORY, 0, RF_ACTIVE },
+ { SYS_RES_MEMORY, 1, RF_ACTIVE },
+ { SYS_RES_IRQ, 0, RF_ACTIVE },
+ { -1, 0 }
+};
+
+#defineEHCI_HC_DEVSTR "Qualcomm USB 2.0 controller"
+
+static device_attach_t ehci_msm_attach;
+static device_detach_t ehci_msm_detach;
+
+static int
+ehci_msm_probe(device_t dev)
+{
+
+ if (!ofw_bus_is_compatible(dev, "qcom,ci-hdrc"))
+ return (ENXIO);
+
+ device_set_desc(dev, EHCI_HC_DEVSTR);
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+ehci_msm_attach(device_t dev)
+{
+ struct ehci_msm_softc *esc;
+ bus_space_handle_t bsh;
+ ehci_softc_t *sc;
+ int err;
+
+ esc = device_get_softc(dev);
+ sc = &esc->base;
+ sc->sc_bus.parent = dev;
+ sc->sc_bus.devices = sc->sc_devices;
+ sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
+ sc->sc_bus.dma_bits = 32;
+
+ if (bus_alloc_resources(dev, ehci_msm_spec, esc->res)) {
+ device_printf(dev, "could not allocate resources\n");
+ return (ENXIO);
+ }
+
+ sc->sc_io_tag = rman_get_bustag(esc->res[0]);
+
+ /* Get all DMA memory */
+ if (usb_bus_mem_alloc_all(&sc->sc_bus,
+ USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc)) {
+ return (ENOMEM);
+ }
+
+ /* EHCI registers */
+ sc->sc_io_tag = rman_get_bustag(esc->res[0]);
+ bsh = rman_get_bushandle(esc->res[0]);
+ sc->sc_io_size = rman_get_size(esc->res[0]);
+
+ if (bus_space_subregion(sc->sc_io_tag, bsh, 0x100,
+ sc->sc_io_size, &sc->sc_io_hdl) != 0)
+ panic("%s: unable to subregion USB host registers",
+ device_get_name(dev));
+
+ sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
+ if (!sc->sc_bus.bdev) {
+ device_printf(dev, "Could not add USB device\n");
+ goto error;
+ }
+ device_set_ivars(sc-
svn commit: r328403 - head/sys/dev/sdhci
Author: br
Date: Thu Jan 25 17:00:35 2018
New Revision: 328403
URL: https://svnweb.freebsd.org/changeset/base/328403
Log:
Add support for SDHCI controller found in Qualcomm Snapdragon 410e.
Tested on DragonBoard 410c.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/sdhci/sdhci_fdt.c
Modified: head/sys/dev/sdhci/sdhci_fdt.c
==
--- head/sys/dev/sdhci/sdhci_fdt.c Thu Jan 25 16:58:23 2018
(r328402)
+++ head/sys/dev/sdhci/sdhci_fdt.c Thu Jan 25 17:00:35 2018
(r328403)
@@ -63,10 +63,12 @@ __FBSDID("$FreeBSD$");
#defineSDHCI_FDT_ARMADA38X 1
#defineSDHCI_FDT_GENERIC 2
#defineSDHCI_FDT_XLNX_ZY7 3
+#defineSDHCI_FDT_QUALCOMM 4
static struct ofw_compat_data compat_data[] = {
{ "marvell,armada-380-sdhci", SDHCI_FDT_ARMADA38X },
{ "sdhci_generic", SDHCI_FDT_GENERIC },
+ { "qcom,sdhci-msm-v4", SDHCI_FDT_QUALCOMM },
{ "xlnx,zy7_sdhci", SDHCI_FDT_XLNX_ZY7 },
{ NULL, 0 }
};
@@ -200,6 +202,10 @@ sdhci_fdt_probe(device_t dev)
break;
case SDHCI_FDT_GENERIC:
device_set_desc(dev, "generic fdt SDHCI controller");
+ break;
+ case SDHCI_FDT_QUALCOMM:
+ sc->quirks = SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE;
+ device_set_desc(dev, "Qualcomm FDT SDHCI controller");
break;
case SDHCI_FDT_XLNX_ZY7:
sc->quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
___
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svn commit: r328404 - in head/sys: arm/mv/armada38x arm/xilinx conf
Author: br Date: Thu Jan 25 17:16:29 2018 New Revision: 328404 URL: https://svnweb.freebsd.org/changeset/base/328404 Log: o Move sdhci_fdt to the generic files list. o Include Qualcomm EHCI and UART drivers to the build. Sponsored by: DARPA, AFRL Modified: head/sys/arm/mv/armada38x/files.armada38x head/sys/arm/xilinx/files.zynq7 head/sys/conf/files Modified: head/sys/arm/mv/armada38x/files.armada38x == --- head/sys/arm/mv/armada38x/files.armada38x Thu Jan 25 17:00:35 2018 (r328403) +++ head/sys/arm/mv/armada38x/files.armada38x Thu Jan 25 17:16:29 2018 (r328404) @@ -9,4 +9,3 @@ arm/mv/armada38x/armada38x_mp.c optional smp arm/mv/armada38x/pmsu.cstandard arm/mv/armada38x/armada38x_rtc.c optional mv_rtc fdt arm/mv/armada38x/armada38x_pl310.c optional pl310 -dev/sdhci/sdhci_fdt.c optional sdhci Modified: head/sys/arm/xilinx/files.zynq7 == --- head/sys/arm/xilinx/files.zynq7 Thu Jan 25 17:00:35 2018 (r328403) +++ head/sys/arm/xilinx/files.zynq7 Thu Jan 25 17:16:29 2018 (r328404) @@ -12,7 +12,6 @@ arm/xilinx/zy7_devcfg.c standard arm/xilinx/zy7_mp.coptional smp dev/cadence/if_cgem.c optional cgem -dev/sdhci/sdhci_fdt.c optional sdhci arm/xilinx/zy7_ehci.c optional ehci arm/xilinx/uart_dev_cdnc.c optional uart arm/xilinx/zy7_gpio.c optional gpio Modified: head/sys/conf/files == --- head/sys/conf/files Thu Jan 25 17:00:35 2018(r328403) +++ head/sys/conf/files Thu Jan 25 17:16:29 2018(r328404) @@ -3013,6 +3013,7 @@ dev/scc/scc_dev_quicc.c optional scc quicc dev/scc/scc_dev_sab82532.c optional scc dev/scc/scc_dev_z8530.coptional scc dev/sdhci/sdhci.c optional sdhci +dev/sdhci/sdhci_fdt.c optional sdhci fdt dev/sdhci/sdhci_fdt_gpio.c optional sdhci fdt gpio dev/sdhci/sdhci_if.m optional sdhci dev/sdhci/sdhci_acpi.c optional sdhci acpi @@ -3182,6 +3183,7 @@ dev/uart/uart_bus_puc.c optional uart puc dev/uart/uart_bus_scc.coptional uart scc dev/uart/uart_core.c optional uart dev/uart/uart_dbg.coptional uart gdb +dev/uart/uart_dev_msm.coptional uart uart_msm fdt dev/uart/uart_dev_mvebu.c optional uart uart_mvebu dev/uart/uart_dev_ns8250.c optional uart uart_ns8250 | uart uart_snps dev/uart/uart_dev_pl011.c optional uart pl011 @@ -3205,6 +3207,7 @@ dev/usb/controller/musb_otg_atmelarm.coptional musb a dev/usb/controller/dwc_otg.c optional dwcotg dev/usb/controller/dwc_otg_fdt.c optional dwcotg fdt dev/usb/controller/ehci.c optional ehci +dev/usb/controller/ehci_msm.c optional ehci_msm fdt dev/usb/controller/ehci_pci.c optional ehci pci dev/usb/controller/ohci.c optional ohci dev/usb/controller/ohci_pci.c optional ohci pci ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r328402 - head/sys/dev/usb/controller
On Thu, Jan 25, 2018 at 06:12:04PM +0100, Emmanuel Vadot wrote: > > Log: > > Add basic driver for Qualcomm USB 2.0 EHCI controller. > > This driver relies on system initialization in u-boot. > > > > Tested on DragonBoard 410c. > > > > Sponsored by: DARPA, AFRL > > > > Added: > > head/sys/dev/usb/controller/ehci_msm.c (contents, props changed) > > > > The code looks like the generic-ehci, would it be better to subclass > generic-ehci to fdt and add qualcomm quirks if necessary ? > Hi Emmanuel This driver is incomplete currently and requires initialization in u-boot. Both system clocks and EHCI subsystem, also Qualcomm power management device requires full initialization. My goal will be to extend this driver and proceed full initialization required for Qualcomm EHCI. The u-boot option CONFIG_DM_DEVICE_REMOVE=n must be added in order to keep devices initialized before jumping to FreeBSD. We will need to get rid of these by adding some code to this driver I guess. Thanks. Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r331347 - in head: etc/mtree include sys/conf sys/dev/tcp_log sys/kern sys/netinet usr.bin/netstat
We don't have atomic_fetchadd_64 for mips32 I think
Ruslan
On Thu, Mar 22, 2018 at 09:40:08AM +, Jonathan T. Looney wrote:
> Author: jtl
> Date: Thu Mar 22 09:40:08 2018
> New Revision: 331347
> URL: https://svnweb.freebsd.org/changeset/base/331347
>
> Log:
> Add the "TCP Blackbox Recorder" which we discussed at the developer
> summits at BSDCan and BSDCam in 2017.
>
> The TCP Blackbox Recorder allows you to capture events on a TCP connection
> in a ring buffer. It stores metadata with the event. It optionally stores
> the TCP header associated with an event (if the event is associated with a
> packet) and also optionally stores information on the sockets.
>
> It supports setting a log ID on a TCP connection and using this to correlate
> multiple connections that share a common log ID.
>
> You can log connections in different modes. If you are doing a coordinated
> test with a particular connection, you may tell the system to put it in
> mode 4 (continuous dump). Or, if you just want to monitor for errors, you
> can put it in mode 1 (ring buffer) and dump all the ring buffers associated
> with the connection ID when we receive an error signal for that connection
> ID. You can set a default mode that will be applied to a particular ratio
> of incoming connections. You can also manually set a mode using a socket
> option.
>
> This commit includes only basic probes. rrs@ has added quite an abundance
> of probes in his TCP development work. He plans to commit those soon.
>
> There are user-space programs which we plan to commit as ports. These read
> the data from the log device and output pcapng files, and then let you
> analyze the data (and metadata) in the pcapng files.
>
> Reviewed by:gnn (previous version)
> Obtained from: Netflix, Inc.
> Relnotes: yes
> Differential Revision: https://reviews.freebsd.org/D11085
>
> Added:
> head/sys/dev/tcp_log/
> head/sys/dev/tcp_log/tcp_log_dev.c (contents, props changed)
> head/sys/dev/tcp_log/tcp_log_dev.h (contents, props changed)
> head/sys/netinet/tcp_log_buf.c (contents, props changed)
> head/sys/netinet/tcp_log_buf.h (contents, props changed)
> Modified:
> head/etc/mtree/BSD.include.dist
> head/include/Makefile
> head/sys/conf/files
> head/sys/kern/subr_witness.c
> head/sys/netinet/tcp.h
> head/sys/netinet/tcp_input.c
> head/sys/netinet/tcp_output.c
> head/sys/netinet/tcp_subr.c
> head/sys/netinet/tcp_timer.c
> head/sys/netinet/tcp_usrreq.c
> head/sys/netinet/tcp_var.h
> head/usr.bin/netstat/inet.c
> head/usr.bin/netstat/main.c
> head/usr.bin/netstat/netstat.1
> head/usr.bin/netstat/netstat.h
>
> Modified: head/etc/mtree/BSD.include.dist
> ==
> --- head/etc/mtree/BSD.include.dist Thu Mar 22 08:32:39 2018
> (r331346)
> +++ head/etc/mtree/BSD.include.dist Thu Mar 22 09:40:08 2018
> (r331347)
> @@ -158,6 +158,8 @@
> ..
> speaker
> ..
> +tcp_log
> +..
> usb
> ..
> vkbd
>
> Modified: head/include/Makefile
> ==
> --- head/include/Makefile Thu Mar 22 08:32:39 2018(r331346)
> +++ head/include/Makefile Thu Mar 22 09:40:08 2018(r331347)
> @@ -47,7 +47,7 @@ LSUBDIRS= cam/ata cam/mmc cam/nvme cam/scsi \
> dev/hwpmc dev/hyperv \
> dev/ic dev/iicbus dev/io dev/lmc dev/mfi dev/mmc dev/nvme \
> dev/ofw dev/pbio dev/pci ${_dev_powermac_nvram} dev/ppbus dev/smbus \
> - dev/speaker dev/vkbd dev/wi \
> + dev/speaker dev/tcp_log dev/vkbd dev/wi \
> fs/devfs fs/fdescfs fs/msdosfs fs/nandfs fs/nfs fs/nullfs \
> fs/procfs fs/smbfs fs/udf fs/unionfs \
> geom/cache geom/concat geom/eli geom/gate geom/journal geom/label \
>
> Modified: head/sys/conf/files
> ==
> --- head/sys/conf/files Thu Mar 22 08:32:39 2018(r331346)
> +++ head/sys/conf/files Thu Mar 22 09:40:08 2018(r331347)
> @@ -3161,6 +3161,7 @@ dev/syscons/star/star_saver.c optional star_saver
> dev/syscons/syscons.coptional sc
> dev/syscons/sysmouse.c optional sc
> dev/syscons/warp/warp_saver.coptional warp_saver
> +dev/tcp_log/tcp_log_dev.coptional inet | inet6
> dev/tdfx/tdfx_linux.coptional tdfx_linux tdfx compat_linux
> dev/tdfx/tdfx_pci.c optional tdfx pci
> dev/ti/if_ti.c optional ti pci
> @@ -4309,6 +4310,7 @@ netinet/tcp_debug.c optional tcpdebug
> netinet/tcp_fastopen.c optional inet tcp_rfc7413 | inet6
> tcp_rfc7413
> netinet/tcp_hostcache.c optional inet | inet6
> netinet/tcp_input.c optional inet | inet6
> +netinet/tcp_l
Re: svn commit: r331347 - in head: etc/mtree include sys/conf sys/dev/tcp_log sys/kern sys/netinet usr.bin/netstat
Also can this be pluggable ?
It looks like it is optional device which means it can free up some space in
embedded environment when unused
Ruslan
On Thu, Mar 22, 2018 at 02:16:06PM +, Ruslan Bukin wrote:
> We don't have atomic_fetchadd_64 for mips32 I think
>
> Ruslan
>
> On Thu, Mar 22, 2018 at 09:40:08AM +, Jonathan T. Looney wrote:
> > Author: jtl
> > Date: Thu Mar 22 09:40:08 2018
> > New Revision: 331347
> > URL: https://svnweb.freebsd.org/changeset/base/331347
> >
> > Log:
> > Add the "TCP Blackbox Recorder" which we discussed at the developer
> > summits at BSDCan and BSDCam in 2017.
> >
> > The TCP Blackbox Recorder allows you to capture events on a TCP connection
> > in a ring buffer. It stores metadata with the event. It optionally stores
> > the TCP header associated with an event (if the event is associated with a
> > packet) and also optionally stores information on the sockets.
> >
> > It supports setting a log ID on a TCP connection and using this to
> > correlate
> > multiple connections that share a common log ID.
> >
> > You can log connections in different modes. If you are doing a coordinated
> > test with a particular connection, you may tell the system to put it in
> > mode 4 (continuous dump). Or, if you just want to monitor for errors, you
> > can put it in mode 1 (ring buffer) and dump all the ring buffers
> > associated
> > with the connection ID when we receive an error signal for that connection
> > ID. You can set a default mode that will be applied to a particular ratio
> > of incoming connections. You can also manually set a mode using a socket
> > option.
> >
> > This commit includes only basic probes. rrs@ has added quite an abundance
> > of probes in his TCP development work. He plans to commit those soon.
> >
> > There are user-space programs which we plan to commit as ports. These read
> > the data from the log device and output pcapng files, and then let you
> > analyze the data (and metadata) in the pcapng files.
> >
> > Reviewed by: gnn (previous version)
> > Obtained from:Netflix, Inc.
> > Relnotes: yes
> > Differential Revision:https://reviews.freebsd.org/D11085
> >
> > Added:
> > head/sys/dev/tcp_log/
> > head/sys/dev/tcp_log/tcp_log_dev.c (contents, props changed)
> > head/sys/dev/tcp_log/tcp_log_dev.h (contents, props changed)
> > head/sys/netinet/tcp_log_buf.c (contents, props changed)
> > head/sys/netinet/tcp_log_buf.h (contents, props changed)
> > Modified:
> > head/etc/mtree/BSD.include.dist
> > head/include/Makefile
> > head/sys/conf/files
> > head/sys/kern/subr_witness.c
> > head/sys/netinet/tcp.h
> > head/sys/netinet/tcp_input.c
> > head/sys/netinet/tcp_output.c
> > head/sys/netinet/tcp_subr.c
> > head/sys/netinet/tcp_timer.c
> > head/sys/netinet/tcp_usrreq.c
> > head/sys/netinet/tcp_var.h
> > head/usr.bin/netstat/inet.c
> > head/usr.bin/netstat/main.c
> > head/usr.bin/netstat/netstat.1
> > head/usr.bin/netstat/netstat.h
> >
> > Modified: head/etc/mtree/BSD.include.dist
> > ==
> > --- head/etc/mtree/BSD.include.dist Thu Mar 22 08:32:39 2018
> > (r331346)
> > +++ head/etc/mtree/BSD.include.dist Thu Mar 22 09:40:08 2018
> > (r331347)
> > @@ -158,6 +158,8 @@
> > ..
> > speaker
> > ..
> > +tcp_log
> > +..
> > usb
> > ..
> > vkbd
> >
> > Modified: head/include/Makefile
> > ==
> > --- head/include/Makefile Thu Mar 22 08:32:39 2018(r331346)
> > +++ head/include/Makefile Thu Mar 22 09:40:08 2018(r331347)
> > @@ -47,7 +47,7 @@ LSUBDIRS= cam/ata cam/mmc cam/nvme cam/scsi \
> > dev/hwpmc dev/hyperv \
> > dev/ic dev/iicbus dev/io dev/lmc dev/mfi dev/mmc dev/nvme \
> > dev/ofw dev/pbio dev/pci ${_dev_powermac_nvram} dev/ppbus dev/smbus \
> > - dev/speaker dev/vkbd dev/wi \
> > + dev/speaker dev/tcp_log dev/vkbd dev/wi \
> > fs/devfs fs/fdescfs fs/msdosfs fs/nandfs fs/nfs fs/nullfs \
> > fs/procfs fs/smbfs fs/udf fs/unionfs \
> > geom/cache geom/concat geom/eli geom/gate geom/journal geom/label \
> >
> > Modified: head/sys/conf/files
> >
Re: svn commit: r331347 - in head: etc/mtree include sys/conf sys/dev/tcp_log sys/kern sys/netinet usr.bin/netstat
Look at these https://ci.freebsd.org/job/FreeBSD-head-mips-build/lastBuild/console https://ci.freebsd.org/job/FreeBSD-head-powerpc-build/lastBuild/console Example make -j5 TARGET=mips TARGET_ARCH=mipsel kernel-toolchain make -j5 TARGET=mips TARGET_ARCH=mipsel KERNCONF=CANNA buildkernel Ruslan On Thu, Mar 22, 2018 at 03:39:23PM +, Jonathan Looney wrote: >A tinderbox build didn't complain about atomic_fetchadd_64, so I assume it >is OK. >Yes, this can be made optional, if there is a need for that. >Jonathan >On Thu, Mar 22, 2018 at 2:22 PM, Ruslan Bukin ><[1]ruslan.bu...@cl.cam.ac.uk> wrote: > > Also can this be pluggable ? > It looks like it is optional device which means it can free up some > space in embedded environment when unused > Ruslan > On Thu, Mar 22, 2018 at 02:16:06PM +, Ruslan Bukin wrote: > > We don't have atomic_fetchadd_64 for mips32 I think > > > > Ruslan > > > > On Thu, Mar 22, 2018 at 09:40:08AM +, Jonathan T. Looney wrote: > > > Author: jtl > > > Date: Thu Mar 22 09:40:08 2018 > > > New Revision: 331347 > > > URL: [2]https://svnweb.freebsd.org/changeset/base/331347 > > > > > > Log: > > >  Add the "TCP Blackbox Recorder" which we discussed at the > developer > > >  summits at BSDCan and BSDCam in 2017. > > > > > >  The TCP Blackbox Recorder allows you to capture events on a TCP > connection > > >  in a ring buffer. It stores metadata with the event. It > optionally stores > > >  the TCP header associated with an event (if the event is > associated with a > > >  packet) and also optionally stores information on the sockets. > > > > > >  It supports setting a log ID on a TCP connection and using this > to correlate > > >  multiple connections that share a common log ID. > > > > > >  You can log connections in different modes. If you are doing a > coordinated > > >  test with a particular connection, you may tell the system to > put it in > > >  mode 4 (continuous dump). Or, if you just want to monitor for > errors, you > > >  can put it in mode 1 (ring buffer) and dump all the ring buffers > associated > > >  with the connection ID when we receive an error signal for that > connection > > >  ID. You can set a default mode that will be applied to a > particular ratio > > >  of incoming connections. You can also manually set a mode using > a socket > > >  option. > > > > > >  This commit includes only basic probes. rrs@ has added quite an > abundance > > >  of probes in his TCP development work. He plans to commit those > soon. > > > > > >  There are user-space programs which we plan to commit as ports. > These read > > >  the data from the log device and output pcapng files, and then > let you > > >  analyze the data (and metadata) in the pcapng files. > > > > > >  Reviewed by:   gnn (previous version) > > >  Obtained from:  Netflix, Inc. > > >  Relnotes: yes > > >  Differential Revision:  > [3]https://reviews.freebsd.org/D11085 > > > > > > Added: > > >  head/sys/dev/tcp_log/ > > >  head/sys/dev/tcp_log/tcp_log_dev.c  (contents, props changed) > > >  head/sys/dev/tcp_log/tcp_log_dev.h  (contents, props changed) > > >  head/sys/netinet/tcp_log_buf.c  (contents, props changed) > > >  head/sys/netinet/tcp_log_buf.h  (contents, props changed) > > > Modified: > > >  head/etc/mtree/BSD.include.dist > > >  head/include/Makefile > > >  head/sys/conf/files > > >  head/sys/kern/subr_witness.c > > >  head/sys/netinet/tcp.h > > >  head/sys/netinet/tcp_input.c > > >  head/sys/netinet/tcp_output.c > > >  head/sys/netinet/tcp_subr.c > > >  head/sys/netinet/tcp_timer.c > > >  head/sys/netinet/tcp_usrreq.c > > >  head/sys/netinet/tcp_var.h > > >  head/usr.bin/netstat/inet.c > > >  head/usr.bin/netstat/main.c > > >  head/usr.bin/netstat/netstat.1 >
Re: svn commit: r331347 - in head: etc/mtree include sys/conf sys/dev/tcp_log sys/kern sys/netinet usr.bin/netstat
On Thu, Mar 22, 2018 at 03:39:23PM +, Jonathan Looney wrote: >Yes, this can be made optional, if there is a need for that. It may be good to have kernel option for that I think. As we target embedded market it is good to have things pluggable. Example: I able to fit freebsd kernel and minimalistic world to 2MB flash device (compressed). But I think if some code added I unable to fit anymore. But I agree that ROM memory is almost free, however some ASICs has this memory only and you may have no space for external chips on PCB. Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r330894 - in head/sys/contrib/zstd: . contrib/meson doc doc/images lib lib/common lib/compress lib/decompress lib/deprecated lib/dictBuilder lib/legacy programs tests zlibWrapper zlibW
On Sat, Mar 17, 2018 at 03:49:15PM -0600, Alan Somers wrote: >On Tue, Mar 13, 2018 at 9:00 PM, Conrad Meyer <[1]c...@freebsd.org> wrote: > > Author: cem > Date: Wed Mar 14 03:00:17 2018 > New Revision: 330894 > URL: [2]https://svnweb.freebsd.org/changeset/base/330894 > > Log: >  Update to Zstandard 1.3.3 > >  Includes patch to conditionalize use of __builtin_clz(ll) on > __has_builtin(). >  The issue is tracked upstream at > [3]https://github.com/facebook/zstd/pull/884 . >  Otherwise, these are vanilla Zstandard 1.3.3 files. > >  Note that the 1.3.4 release should be due out soon. > >  Sponsored by: Dell EMC Isilon > >I think this broke the build on RISC-V. Could you please take a look? > >[4]https://ci.freebsd.org/job/FreeBSD-head-riscv64-build/7028/console > I can confirm it breaks RISC-V Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r330894 - in head/sys/contrib/zstd: . contrib/meson doc doc/images lib lib/common lib/compress lib/decompress lib/deprecated lib/dictBuilder lib/legacy programs tests zlibWrapper zlibW
On Fri, Mar 23, 2018 at 08:46:36AM +, Ruslan Bukin wrote: > On Sat, Mar 17, 2018 at 03:49:15PM -0600, Alan Somers wrote: > >On Tue, Mar 13, 2018 at 9:00 PM, Conrad Meyer <[1]c...@freebsd.org> > > wrote: > > > > Author: cem > > Date: Wed Mar 14 03:00:17 2018 > > New Revision: 330894 > > URL: [2]https://svnweb.freebsd.org/changeset/base/330894 > > > > Log: > >  Update to Zstandard 1.3.3 > > > >I think this broke the build on RISC-V. Could you please take a look? > > I can confirm it breaks RISC-V > I found the problem: after this commit kernel become slightly bigger: it was 0x5fd080 bytes, become 0x61b080 bytes. Spike gives us 0x60 free space only between start of physram to place where it puts DTB. So DTB appears under our BSS section and we clear it during boot, so DTB is no longer valid and kernel get stuck in fdt header checking routine. I'm currently looking for a solution and rearrangements, it will take some time. Thanks Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r330894 - in head/sys/contrib/zstd: . contrib/meson doc doc/images lib lib/common lib/compress lib/decompress lib/deprecated lib/dictBuilder lib/legacy programs tests zlibWrapper zlibW
On Fri, Mar 23, 2018 at 11:52:27AM +, Ruslan Bukin wrote: > On Fri, Mar 23, 2018 at 08:46:36AM +0000, Ruslan Bukin wrote: > > On Sat, Mar 17, 2018 at 03:49:15PM -0600, Alan Somers wrote: > > >On Tue, Mar 13, 2018 at 9:00 PM, Conrad Meyer <[1]c...@freebsd.org> > > > wrote: > > > > > > Author: cem > > > Date: Wed Mar 14 03:00:17 2018 > > > New Revision: 330894 > > > URL: [2]https://svnweb.freebsd.org/changeset/base/330894 > > > > > > Log: > > >  Update to Zstandard 1.3.3 > > > > > >I think this broke the build on RISC-V. Could you please take a look? > > > > I can confirm it breaks RISC-V > > > > I found the problem: after this commit kernel become slightly bigger: it was > 0x5fd080 bytes, become 0x61b080 bytes. > > Spike gives us 0x60 free space only between start of physram to place > where it puts DTB. > So DTB appears under our BSS section and we clear it during boot, so DTB is > no longer valid and kernel get stuck in fdt header checking routine. > > I'm currently looking for a solution and rearrangements, it will take some > time. > I found that Berkeley Boot Loader (BBL) miscalculates the size of payload (freebsd kernel) -- they does not include BSS section to calculatons. I made a fix to our local riscv-pk (https://github.com/freebsd-riscv/riscv-pk) and created a pull request: https://github.com/riscv/riscv-pk/pull/91 Thanks Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r332018 - in head/contrib/opencsd: . decoder decoder/include decoder/source
Author: br Date: Wed Apr 4 12:55:31 2018 New Revision: 332018 URL: https://svnweb.freebsd.org/changeset/base/332018 Log: Import OpenCSD -- an ARM CoreSight(tm) Trace Decode Library. Sponsored by: DARPA, AFRL Added: head/contrib/opencsd/ head/contrib/opencsd/decoder/ head/contrib/opencsd/decoder/include/ - copied from r332013, vendor/opencsd/dist/decoder/include/ head/contrib/opencsd/decoder/source/ - copied from r332013, vendor/opencsd/dist/decoder/source/ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r332033 - in head: etc/mtree lib lib/libopencsd share/mk
Author: br
Date: Wed Apr 4 14:31:56 2018
New Revision: 332033
URL: https://svnweb.freebsd.org/changeset/base/332033
Log:
Add new shared library -- libopencsd.
OpenCSD is an ARM CoreSight(tm) trace packets decoder.
- Connect libopencsd to the arm64 build.
- Install opencsd headers to /usr/include/opencsd/
Sponsored by: DARPA, AFRL
Added:
head/lib/libopencsd/
head/lib/libopencsd/Makefile (contents, props changed)
Modified:
head/etc/mtree/BSD.include.dist
head/lib/Makefile
head/share/mk/bsd.libnames.mk
head/share/mk/src.libnames.mk
Modified: head/etc/mtree/BSD.include.dist
==
--- head/etc/mtree/BSD.include.dist Wed Apr 4 14:12:07 2018
(r332032)
+++ head/etc/mtree/BSD.include.dist Wed Apr 4 14:31:56 2018
(r332033)
@@ -317,6 +317,18 @@
..
nfsserver
..
+opencsd
+c_api
+..
+etmv3
+..
+etmv4
+..
+ptm
+..
+stm
+..
+..
openssl
..
pcap
Modified: head/lib/Makefile
==
--- head/lib/Makefile Wed Apr 4 14:12:07 2018(r332032)
+++ head/lib/Makefile Wed Apr 4 14:31:56 2018(r332033)
@@ -175,6 +175,10 @@ SUBDIR.${MK_NIS}+= libypclnt
_libvgl= libvgl
.endif
+.if ${MACHINE_CPUARCH} == "aarch64"
+SUBDIR.${MK_PMC}+= libopencsd
+.endif
+
.if ${MACHINE_CPUARCH} == "amd64"
SUBDIR.${MK_PMC}+= libipt
SUBDIR.${MK_BHYVE}+= libvmmapi
Added: head/lib/libopencsd/Makefile
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/lib/libopencsd/MakefileWed Apr 4 14:31:56 2018
(r332033)
@@ -0,0 +1,175 @@
+# $FreeBSD$
+
+PACKAGE=lib${LIB}
+SHLIBDIR?= /lib
+
+.include
+
+OPENCSDSRC=${SRCTOP}/contrib/opencsd
+
+.PATH: ${OPENCSDSRC}/decoder/source/etmv4/ \
+ ${OPENCSDSRC}/decoder/source/etmv3/ \
+ ${OPENCSDSRC}/decoder/source/pkt_printers/ \
+ ${OPENCSDSRC}/decoder/source/mem_acc/ \
+ ${OPENCSDSRC}/decoder/source/i_dec/ \
+ ${OPENCSDSRC}/decoder/source/c_api/ \
+ ${OPENCSDSRC}/decoder/source/ptm/ \
+ ${OPENCSDSRC}/decoder/source/stm/ \
+ ${OPENCSDSRC}/decoder/source/ \
+ ${OPENCSDSRC}/decoder/include/opencsd/etmv4/\
+ ${OPENCSDSRC}/decoder/include/opencsd/etmv3/\
+ ${OPENCSDSRC}/decoder/include/opencsd/stm/ \
+ ${OPENCSDSRC}/decoder/include/opencsd/ptm/ \
+ ${OPENCSDSRC}/decoder/include/opencsd/c_api/\
+ ${OPENCSDSRC}/decoder/include/opencsd/ \
+ ${OPENCSDSRC}/decoder/include
+
+LIB= opencsd
+SHLIB_MAJOR=0
+
+# ETMv3
+SRCS= \
+ trc_cmp_cfg_etmv3.cpp \
+ trc_pkt_decode_etmv3.cpp\
+ trc_pkt_elem_etmv3.cpp \
+ trc_pkt_proc_etmv3.cpp \
+ trc_pkt_proc_etmv3_impl.cpp
+
+# ETMv4
+SRCS+= \
+ trc_cmp_cfg_etmv4.cpp \
+ trc_etmv4_stack_elem.cpp\
+ trc_pkt_decode_etmv4i.cpp \
+ trc_pkt_elem_etmv4d.cpp \
+ trc_pkt_elem_etmv4i.cpp \
+ trc_pkt_proc_etmv4.cpp \
+ trc_pkt_proc_etmv4i_impl.cpp
+
+# PKT_PRINTERS
+SRCS+= \
+ raw_frame_printer.cpp \
+ trc_print_fact.cpp
+
+# PTM
+SRCS+= \
+ trc_cmp_cfg_ptm.cpp \
+ trc_pkt_decode_ptm.cpp \
+ trc_pkt_elem_ptm.cpp\
+ trc_pkt_proc_ptm.cpp
+
+# STM
+SRCS+= \
+ trc_pkt_decode_stm.cpp \
+ trc_pkt_elem_stm.cpp\
+ trc_pkt_proc_stm.cpp
+
+# C_API
+SRCS+= \
+ ocsd_c_api_custom_obj.cpp \
+ ocsd_c_api.cpp
+
+# SRC
+SRCS+= \
+ ocsd_code_follower.cpp \
+ ocsd_dcd_tree.cpp \
+ ocsd_error.cpp \
+ ocsd_error_logger.cpp \
+ ocsd_gen_elem_list.cpp \
+ ocsd_lib_dcd_register.cpp \
+ ocsd_msg_logger.cpp \
+ ocsd_version.cpp\
+ trc_component.cpp \
+ trc_core_arch_map.cpp \
+ trc_frame_deformatter.cpp \
+ trc_gen_elem.cpp\
+ trc_printable_elem.cpp \
+ trc_ret_stack.cpp
+
+# MEM_ACC
+SRCS+= \
+ trc_mem_acc_base.cpp\
+ trc_mem_acc_cb.cpp \
+ trc_mem_acc_mapper.cpp \
+ trc_mem_acc_bufptr.cpp \
+ trc_m
svn commit: r332077 - in head/sys: arm64/coresight conf
Author: br
Date: Thu Apr 5 15:45:54 2018
New Revision: 332077
URL: https://svnweb.freebsd.org/changeset/base/332077
Log:
Add support for the Coresight technology from ARM Ltd.
ARM Coresight is a solution for debug and trace of complex SoC designs.
This includes a collection of drivers for ARM Coresight interconnect
devices within a small Coresight framework.
Supported devices are:
o Embedded Trace Macrocell v4 (ETMv4)
o Funnel
o Dynamic Replicator
o Trace Memory Controller (TMC)
o CPU debug module
Devices are connected to each other internally in SoC and the
configuration of each device endpoints is described in FDT.
Typical trace flow (as found on Qualcomm Snapdragon 410e):
CPU0 -> ETM0 -> funnel1 -> funnel0 -> ETF -> replicator -> ETR -> DRAM
CPU1 -> ETM1 -^
CPU2 -> ETM2 -^
CPU3 -> ETM3 -^
Note that both Embedded Trace FIFO (ETF) and Embedded Trace Router (ETR)
are hardware configurations of TMC.
This is required for upcoming HWPMC tracing support.
This is tested on single-core system only.
Reviewed by: andrew (partially)
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D14618
Added:
head/sys/arm64/coresight/
head/sys/arm64/coresight/coresight-cmd.c (contents, props changed)
head/sys/arm64/coresight/coresight-cpu-debug.c (contents, props changed)
head/sys/arm64/coresight/coresight-dynamic-replicator.c (contents, props
changed)
head/sys/arm64/coresight/coresight-etm4x.c (contents, props changed)
head/sys/arm64/coresight/coresight-etm4x.h (contents, props changed)
head/sys/arm64/coresight/coresight-funnel.c (contents, props changed)
head/sys/arm64/coresight/coresight-funnel.h (contents, props changed)
head/sys/arm64/coresight/coresight-tmc.c (contents, props changed)
head/sys/arm64/coresight/coresight-tmc.h (contents, props changed)
head/sys/arm64/coresight/coresight.c (contents, props changed)
head/sys/arm64/coresight/coresight.h (contents, props changed)
head/sys/arm64/coresight/coresight_if.m (contents, props changed)
Modified:
head/sys/conf/files.arm64
Added: head/sys/arm64/coresight/coresight-cmd.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm64/coresight/coresight-cmd.cThu Apr 5 15:45:54 2018
(r332077)
@@ -0,0 +1,156 @@
+/*-
+ * Copyright (c) 2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include "coresight_if.h"
+
+extern struct coresight_device_list cs_devs;
+
+static struct coresight_device *
+coresight_next_device(struct coresight_device *cs_dev,
+struct coresight_event *event)
+{
+ struct coresight_device *out;
+ struct endpoint *out_endp;
+ struct endpoint *endp;
+
+ TAILQ_FOREACH(endp, &cs_dev->pdata->endpoints, link) {
+ if (endp->slave != 0)
+ continue;
+
+ out = coresight_get_output_device(endp, &out_endp);
+ if (out != NULL) {
+ if (LIST_EMPTY(&event->endplist)) {
+ /* Add source device */
+
svn commit: r332359 - in head/sys: arm64/conf arm64/qualcomm conf
Author: br
Date: Tue Apr 10 12:53:48 2018
New Revision: 332359
URL: https://svnweb.freebsd.org/changeset/base/332359
Log:
Enable Qualcomm Debug Subsystem (QDSS) block on MSM8916 SoC.
This is required for ARM Coresight operation on Dragonboard 410c.
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D14987
Added:
head/sys/arm64/qualcomm/
head/sys/arm64/qualcomm/qcom_gcc.c (contents, props changed)
Modified:
head/sys/arm64/conf/GENERIC
head/sys/conf/files.arm64
Modified: head/sys/arm64/conf/GENERIC
==
--- head/sys/arm64/conf/GENERIC Tue Apr 10 12:45:34 2018(r332358)
+++ head/sys/arm64/conf/GENERIC Tue Apr 10 12:53:48 2018(r332359)
@@ -106,6 +106,9 @@ device al_iofic# I/O Fabric
Interrupt Controller
device al_serdes # Serializer/Deserializer
device al_udma # Universal DMA
+# Qualcomm Snapdragon drivers
+device qcom_gcc# Global Clock Controller
+
# VirtIO support
device virtio
device virtio_pci
Added: head/sys/arm64/qualcomm/qcom_gcc.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm64/qualcomm/qcom_gcc.c Tue Apr 10 12:53:48 2018
(r332359)
@@ -0,0 +1,148 @@
+/*-
+ * Copyright (c) 2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by BAE Systems, the University of Cambridge
+ * Computer Laboratory, and Memorial University under DARPA/AFRL contract
+ * FA8650-15-C-7558 ("CADETS"), as part of the DARPA Transparent Computing
+ * (TC) research program.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#defineGCC_QDSS_BCR0x29000
+#define GCC_QDSS_BCR_BLK_ARES (1 << 0) /* Async software
reset. */
+#defineGCC_QDSS_CFG_AHB_CBCR 0x29008
+#define AHB_CBCR_CLK_ENABLE(1 << 0) /* AHB clk branch ctrl
*/
+#defineGCC_QDSS_ETR_USB_CBCR 0x29028
+#define ETR_USB_CBCR_CLK_ENABLE(1 << 0) /* ETR USB clk branch
ctrl */
+#defineGCC_QDSS_DAP_CBCR 0x29084
+#define DAP_CBCR_CLK_ENABLE(1 << 0) /* DAP clk branch ctrl
*/
+
+static struct ofw_compat_data compat_data[] = {
+ { "qcom,gcc-msm8916", 1 },
+ { NULL, 0 }
+};
+
+struct qcom_gcc_softc {
+ struct resource *res;
+};
+
+static struct resource_spec qcom_gcc_spec[] = {
+ { SYS_RES_MEMORY, 0, RF_ACTIVE },
+ { -1, 0 }
+};
+
+/*
+ * Qualcomm Debug Subsystem (QDSS)
+ * block enabling routine.
+ */
+static void
+qcom_qdss_enable(struct qcom_gcc_softc *sc)
+{
+
+ /* Put QDSS block to reset */
+ bus_write_4(sc->res, GCC_QDSS_BCR, GCC_QDSS_BCR_BLK_ARES);
+
+ /* Enable AHB clock branch */
+ bus_write_4(sc->res, GCC_QDSS_CFG_AHB_CBCR, AHB_CBCR_CLK_ENABLE);
+
+ /* Enable DAP clock branch */
+ bus_write_4(sc->res, GCC_QDSS_DAP_CBCR, DAP_CBCR_CLK_ENABLE);
+
+ /* Enable ETR USB clock branch */
+ bus_write_4(sc->res, GCC_QDSS_ETR_USB_CBCR, ETR_USB_CBCR_CLK_ENABLE);
+
+ /* Out of reset */
+ bus_write_4(sc->res, GCC_QDSS_BCR, 0);
+}
+
+static int
+qcom_gcc_probe(device_t dev)
+{
+
svn commit: r332434 - head/sys/conf
Author: br Date: Thu Apr 12 15:12:40 2018 New Revision: 332434 URL: https://svnweb.freebsd.org/changeset/base/332434 Log: Add ld emulation types for hard-float mipses. Sponsored by: DARPA, AFRL Modified: head/sys/conf/kern.mk Modified: head/sys/conf/kern.mk == --- head/sys/conf/kern.mk Thu Apr 12 14:57:48 2018(r332433) +++ head/sys/conf/kern.mk Thu Apr 12 15:12:40 2018(r332434) @@ -276,9 +276,13 @@ LD_EMULATION_armv6=armelf_fbsd LD_EMULATION_armv7=armelf_fbsd LD_EMULATION_i386=elf_i386_fbsd LD_EMULATION_mips= elf32btsmip_fbsd +LD_EMULATION_mipshf= elf32btsmip_fbsd LD_EMULATION_mips64= elf64btsmip_fbsd +LD_EMULATION_mips64hf= elf64btsmip_fbsd LD_EMULATION_mipsel= elf32ltsmip_fbsd +LD_EMULATION_mipselhf= elf32ltsmip_fbsd LD_EMULATION_mips64el= elf64ltsmip_fbsd +LD_EMULATION_mips64elhf= elf64ltsmip_fbsd LD_EMULATION_mipsn32= elf32btsmipn32_fbsd LD_EMULATION_mipsn32el= elf32btsmipn32_fbsd # I don't think this is a thing that works LD_EMULATION_powerpc= elf32ppc_fbsd ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r332435 - in head/sys: conf dev/xdma mips/ingenic
Author: br
Date: Thu Apr 12 15:36:24 2018
New Revision: 332435
URL: https://svnweb.freebsd.org/changeset/base/332435
Log:
Tune xDMA interface slightly:
o Move descriptors allocation to DMA engine driver
o Add generic xdma_request() routine
o Add less-generic scatter-gather application based on xdma interface
Typical operation flow in peripheral device driver is:
1. Get xDMA controller
sc->xdma_tx = xdma_ofw_get(sc->dev, "tx");
2. Allocate virtual channel
sc->xchan_tx = xdma_channel_alloc(sc->xdma_tx, caps);
3. Setup transfer status callback
xdma_setup_intr(sc->xchan_tx, my_tx_intr, sc, &sc->ih_tx);
4. Request a transfer(s)
ret = xdma_request(sc->xchan_tx, &req);
5. Free the channel
xdma_channel_free(sc->xdma_tx);
6. Free the controller
xdma_put(sc->xdma_tx);
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D14971
Added:
head/sys/dev/xdma/xdma_bank.c (contents, props changed)
head/sys/dev/xdma/xdma_bio.c (contents, props changed)
head/sys/dev/xdma/xdma_mbuf.c (contents, props changed)
head/sys/dev/xdma/xdma_queue.c (contents, props changed)
head/sys/dev/xdma/xdma_sg.c (contents, props changed)
head/sys/dev/xdma/xdma_sglist.c (contents, props changed)
Modified:
head/sys/conf/files
head/sys/dev/xdma/xdma.c
head/sys/dev/xdma/xdma.h
head/sys/dev/xdma/xdma_fdt_test.c
head/sys/dev/xdma/xdma_if.m
head/sys/mips/ingenic/jz4780_aic.c
head/sys/mips/ingenic/jz4780_pdma.c
head/sys/mips/ingenic/jz4780_pdma.h
Modified: head/sys/conf/files
==
--- head/sys/conf/files Thu Apr 12 15:12:40 2018(r332434)
+++ head/sys/conf/files Thu Apr 12 15:36:24 2018(r332435)
@@ -3511,8 +3511,14 @@ wpi.fw optional wpifw
\
no-obj no-implicit-rule \
clean "wpi.fw"
dev/xdma/xdma.coptional xdma
-dev/xdma/xdma_if.m optional xdma
+dev/xdma/xdma_bank.c optional xdma
+dev/xdma/xdma_bio.coptional xdma
dev/xdma/xdma_fdt_test.c optional xdma xdma_test fdt
+dev/xdma/xdma_if.m optional xdma
+dev/xdma/xdma_mbuf.c optional xdma
+dev/xdma/xdma_queue.c optional xdma
+dev/xdma/xdma_sg.c optional xdma
+dev/xdma/xdma_sglist.c optional xdma
dev/xe/if_xe.c optional xe
dev/xe/if_xe_pccard.c optional xe pccard
dev/xen/balloon/balloon.c optional xenhvm
Modified: head/sys/dev/xdma/xdma.c
==
--- head/sys/dev/xdma/xdma.cThu Apr 12 15:12:40 2018(r332434)
+++ head/sys/dev/xdma/xdma.cThu Apr 12 15:36:24 2018 (r332435)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2016 Ruslan Bukin
+ * Copyright (c) 2016-2018 Ruslan Bukin
* All rights reserved.
*
* This software was developed by SRI International and the University of
@@ -39,7 +39,6 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
#include
#include
#include
@@ -58,40 +57,28 @@ __FBSDID("$FreeBSD$");
#include
-MALLOC_DEFINE(M_XDMA, "xdma", "xDMA framework");
-
/*
* Multiple xDMA controllers may work with single DMA device,
* so we have global lock for physical channel management.
*/
-static struct mtx xdma_mtx;
-#defineXDMA_LOCK() mtx_lock(&xdma_mtx)
-#defineXDMA_UNLOCK() mtx_unlock(&xdma_mtx)
-#defineXDMA_ASSERT_LOCKED()mtx_assert(&xdma_mtx, MA_OWNED)
+static struct sx xdma_sx;
-/*
- * Per channel locks.
- */
-#defineXCHAN_LOCK(xchan) mtx_lock(&(xchan)->mtx_lock)
-#defineXCHAN_UNLOCK(xchan) mtx_unlock(&(xchan)->mtx_lock)
-#defineXCHAN_ASSERT_LOCKED(xchan) mtx_assert(&(xchan)->mtx_lock,
MA_OWNED)
+#defineXDMA_LOCK() sx_xlock(&xdma_sx)
+#defineXDMA_UNLOCK() sx_xunlock(&xdma_sx)
+#defineXDMA_ASSERT_LOCKED()sx_xassert(&xdma_sx, MA_OWNED)
/*
* Allocate virtual xDMA channel.
*/
xdma_channel_t *
-xdma_channel_alloc(xdma_controller_t *xdma)
+xdma_channel_alloc(xdma_controller_t *xdma, uint32_t caps)
{
xdma_channel_t *xchan;
int ret;
xchan = malloc(sizeof(xdma_channel_t), M_XDMA, M_WAITOK | M_ZERO);
- if (xchan == NULL) {
- device_printf(xdma->dev,
- "%s: Can't allocate memory for channel.\n", __func__);
- return (NULL);
- }
xchan->xdma = xdma;
+ xchan->caps = caps;
XDMA_LOCK();
@@ -107,8 +94,18 @@ xdma_channel_alloc(xdma_controller_t
svn commit: r332441 - in head/sys: conf mips/beri mips/include mips/mips
Author: br
Date: Thu Apr 12 17:43:19 2018
New Revision: 332441
URL: https://svnweb.freebsd.org/changeset/base/332441
Log:
Add SMP support for BERI CPU.
Obtained from:CheriBSD
Sponsored by: DARPA, AFRL
Added:
head/sys/mips/beri/beri_mp.c (contents, props changed)
head/sys/mips/beri/beri_mp.h (contents, props changed)
Modified:
head/sys/conf/options.mips
head/sys/mips/beri/files.beri
head/sys/mips/beri/std.beri
head/sys/mips/include/cpufunc.h
head/sys/mips/include/hwfunc.h
head/sys/mips/mips/mp_machdep.c
Modified: head/sys/conf/options.mips
==
--- head/sys/conf/options.mips Thu Apr 12 17:16:13 2018(r332440)
+++ head/sys/conf/options.mips Thu Apr 12 17:43:19 2018(r332441)
@@ -99,6 +99,7 @@ OCTEON_BOARD_CAPK_0100ND opt_cvmx.h
# Options specific to the BERI platform.
#
BERI_LARGE_TLB opt_global.h
+PLATFORM_INIT_SECONDARYopt_global.h
#
# Options that control the NetFPGA-10G Embedded CPU Ethernet Core.
Added: head/sys/mips/beri/beri_mp.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/mips/beri/beri_mp.cThu Apr 12 17:43:19 2018
(r332441)
@@ -0,0 +1,309 @@
+/*-
+ * Copyright (c) 2017 Ruslan Bukin
+ * Copyright (c) 2012-2015 Robert N. M. Watson
+ * Copyright (c) 2013 SRI International
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+
+#include
+
+struct spin_entry {
+ uint64_t entry_addr;
+ uint64_t a0;
+ uint32_t rsvd1;
+ uint32_t pir;
+ uint64_t rsvd2;
+};
+
+static phandle_t cpu_of_nodes[MAXCPU];
+static device_t picmap[MAXCPU];
+
+int
+platform_processor_id(void)
+{
+ int cpu;
+
+ cpu = beri_get_cpu();
+
+ return (cpu);
+}
+
+void
+platform_cpu_mask(cpuset_t *mask)
+{
+ int ncores, ncpus, nthreads;
+ phandle_t cpus, cpu;
+ pcell_t reg;
+ char prop[16];
+ struct spin_entry *se;
+
+ ncores = beri_get_ncores();
+ nthreads = beri_get_nthreads();
+ KASSERT(ncores <= 0x1, ("%s: too many cores %d", __func__, ncores));
+ KASSERT(nthreads <= 0x1, ("%s: too many threads %d", __func__,
+ nthreads));
+ KASSERT(ncores < 0x || nthreads < 0x,
+ ("%s: cores x thread (%d x %d) would overflow", __func__, ncores,
+ nthreads));
+ ncpus = ncores * nthreads;
+ if (MAXCPU > 1 && ncpus > MAXCPU)
+ printf("%s: Hardware supports more CPUs (%d) than kernel
(%d)\n",
+ __func__, ncpus, MAXCPU);
+ printf("%s: hardware has %d cores with %d threads each\n", __func__,
+ ncores, nthreads);
+
+ if ((cpus = OF_finddevice("/cpus")) <= 0) {
+ printf("%s: no \"/cpus\" device found in FDT\n", __func__);
+ goto error;
+ }
+ if ((cpu = OF_child(cpus)) <= 0) {
+ printf("%s: no children of \"/cpus\" found in FDT\n", __func__);
+ goto error;
+ }
+ CPU_ZERO(mask);
+ do {
+
Re: svn commit: r332434 - head/sys/conf
On Thu, Apr 12, 2018 at 09:48:10AM -0700, John Baldwin wrote: > On Thursday, April 12, 2018 03:12:40 PM Ruslan Bukin wrote: > > Author: br > > Date: Thu Apr 12 15:12:40 2018 > > New Revision: 332434 > > URL: https://svnweb.freebsd.org/changeset/base/332434 > > > > Log: > > Add ld emulation types for hard-float mipses. > > > > Sponsored by: DARPA, AFRL > > We actually shouldn't need hf kernels anymore. HAVE_FPU has been removed > and any mips kernel works fine with either hard or soft float userlands. > Ok I will work on removing hf targets. This should be kept I think until we remove them. Thanks Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r332434 - head/sys/conf
On Thu, Apr 12, 2018 at 06:41:37PM +0100, Ruslan Bukin wrote: > On Thu, Apr 12, 2018 at 09:48:10AM -0700, John Baldwin wrote: > > On Thursday, April 12, 2018 03:12:40 PM Ruslan Bukin wrote: > > > Author: br > > > Date: Thu Apr 12 15:12:40 2018 > > > New Revision: 332434 > > > URL: https://svnweb.freebsd.org/changeset/base/332434 > > > > > > Log: > > > Add ld emulation types for hard-float mipses. > > > > > > Sponsored by: DARPA, AFRL > > > > We actually shouldn't need hf kernels anymore. HAVE_FPU has been removed > > and any mips kernel works fine with either hard or soft float userlands. > > > > Ok I will work on removing hf targets. This should be kept I think until we > remove them. > Oh sorry this is for kernels only. Ok I will revert this then. Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r332468 - head/sys/dev/xdma
Author: br
Date: Fri Apr 13 12:41:51 2018
New Revision: 332468
URL: https://svnweb.freebsd.org/changeset/base/332468
Log:
Don't include sys/bus_dma.h directly, use machine/bus.h instead.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/xdma/xdma_queue.c
head/sys/dev/xdma/xdma_sg.c
head/sys/dev/xdma/xdma_sglist.c
Modified: head/sys/dev/xdma/xdma_queue.c
==
--- head/sys/dev/xdma/xdma_queue.c Fri Apr 13 10:03:30 2018
(r332467)
+++ head/sys/dev/xdma/xdma_queue.c Fri Apr 13 12:41:51 2018
(r332468)
@@ -37,8 +37,9 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
#include
+
+#include
#include
Modified: head/sys/dev/xdma/xdma_sg.c
==
--- head/sys/dev/xdma/xdma_sg.c Fri Apr 13 10:03:30 2018(r332467)
+++ head/sys/dev/xdma/xdma_sg.c Fri Apr 13 12:41:51 2018(r332468)
@@ -38,7 +38,6 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
#include
#include
Modified: head/sys/dev/xdma/xdma_sglist.c
==
--- head/sys/dev/xdma/xdma_sglist.c Fri Apr 13 10:03:30 2018
(r332467)
+++ head/sys/dev/xdma/xdma_sglist.c Fri Apr 13 12:41:51 2018
(r332468)
@@ -37,7 +37,8 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
+
+#include
#include
___
svn-src-head@freebsd.org mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r332469 - in head/sys: conf dev/xdma/controller
Author: br
Date: Fri Apr 13 12:43:54 2018
New Revision: 332469
URL: https://svnweb.freebsd.org/changeset/base/332469
Log:
Add driver for ARM PrimeCell PL330 DMA engine.
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D10201
Added:
head/sys/dev/xdma/controller/
head/sys/dev/xdma/controller/pl330.c (contents, props changed)
head/sys/dev/xdma/controller/pl330.h (contents, props changed)
Modified:
head/sys/conf/files
Modified: head/sys/conf/files
==
--- head/sys/conf/files Fri Apr 13 12:41:51 2018(r332468)
+++ head/sys/conf/files Fri Apr 13 12:43:54 2018(r332469)
@@ -3510,6 +3510,7 @@ wpi.fwoptional wpifw
\
compile-with"${NORMAL_FW}" \
no-obj no-implicit-rule \
clean "wpi.fw"
+dev/xdma/controller/pl330.coptional xdma pl330
dev/xdma/xdma.coptional xdma
dev/xdma/xdma_bank.c optional xdma
dev/xdma/xdma_bio.coptional xdma
Added: head/sys/dev/xdma/controller/pl330.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/xdma/controller/pl330.cFri Apr 13 12:43:54 2018
(r332469)
@@ -0,0 +1,663 @@
+/*-
+ * Copyright (c) 2017-2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* ARM PrimeCell DMA Controller (PL330) driver. */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include "opt_platform.h"
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include
+
+#ifdef FDT
+#include
+#include
+#include
+#endif
+
+#include
+#include
+
+#include "xdma_if.h"
+
+#define PL330_DEBUG
+#undef PL330_DEBUG
+
+#ifdef PL330_DEBUG
+#define dprintf(fmt, ...) printf(fmt, ##__VA_ARGS__)
+#else
+#define dprintf(fmt, ...)
+#endif
+
+#defineREAD4(_sc, _reg)\
+ bus_read_4(_sc->res[0], _reg)
+#defineWRITE4(_sc, _reg, _val) \
+ bus_write_4(_sc->res[0], _reg, _val)
+
+#definePL330_NCHANNELS 32
+#definePL330_MAXLOAD 2048
+
+struct pl330_channel {
+ struct pl330_softc *sc;
+ xdma_channel_t *xchan;
+ int used;
+ int index;
+ uint8_t *ibuf;
+ bus_addr_t ibuf_phys;
+ uint32_tenqueued;
+ uint32_tcapacity;
+};
+
+struct pl330_fdt_data {
+ uint32_t periph_id;
+};
+
+struct pl330_softc {
+ device_tdev;
+ struct resource *res[PL330_NCHANNELS + 1];
+ void*ih[PL330_NCHANNELS];
+ struct pl330_channelchannels[PL330_NCHANNELS];
+};
+
+static struct resource_spec pl330_spec[] = {
+ { SYS_RES_MEMORY, 0, RF_ACTIVE },
+ { SYS_RES_IRQ, 0, RF_ACTIVE },
+ { SYS_RES_IRQ, 1, RF_ACTIVE | RF_OPTIONAL },
+ { SYS_RES_IRQ, 2, RF_ACTIVE | RF_OPTIONAL },
+ { SYS_RES_IRQ, 3, RF_ACTIVE | RF
svn commit: r332470 - in head/sys: conf dev/altera/msgdma
Author: br
Date: Fri Apr 13 13:23:31 2018
New Revision: 332470
URL: https://svnweb.freebsd.org/changeset/base/332470
Log:
Add driver for Altera modular Scatter-Gather DMA engine (mSGDMA).
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D9619
Added:
head/sys/dev/altera/msgdma/
head/sys/dev/altera/msgdma/msgdma.c (contents, props changed)
head/sys/dev/altera/msgdma/msgdma.h (contents, props changed)
Modified:
head/sys/conf/files
Modified: head/sys/conf/files
==
--- head/sys/conf/files Fri Apr 13 12:43:54 2018(r332469)
+++ head/sys/conf/files Fri Apr 13 13:23:31 2018(r332470)
@@ -831,6 +831,7 @@ dev/alpm/alpm.c optional alpm pci
dev/altera/avgen/altera_avgen.coptional altera_avgen
dev/altera/avgen/altera_avgen_fdt.coptional altera_avgen fdt
dev/altera/avgen/altera_avgen_nexus.c optional altera_avgen
+dev/altera/msgdma/msgdma.c optional altera_msgdma xdma
dev/altera/sdcard/altera_sdcard.c optional altera_sdcard
dev/altera/sdcard/altera_sdcard_disk.c optional altera_sdcard
dev/altera/sdcard/altera_sdcard_io.c optional altera_sdcard
Added: head/sys/dev/altera/msgdma/msgdma.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/altera/msgdma/msgdma.c Fri Apr 13 13:23:31 2018
(r332470)
@@ -0,0 +1,641 @@
+/*-
+ * Copyright (c) 2016-2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* Altera mSGDMA driver. */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include "opt_platform.h"
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#ifdef FDT
+#include
+#include
+#include
+#endif
+
+#include
+#include "xdma_if.h"
+
+#include
+
+#define MSGDMA_DEBUG
+#undef MSGDMA_DEBUG
+
+#ifdef MSGDMA_DEBUG
+#define dprintf(fmt, ...) printf(fmt, ##__VA_ARGS__)
+#else
+#define dprintf(fmt, ...)
+#endif
+
+#defineMSGDMA_NCHANNELS1
+
+struct msgdma_channel {
+ struct msgdma_softc *sc;
+ struct mtx mtx;
+ xdma_channel_t *xchan;
+ struct proc *p;
+ int used;
+ int index;
+ int idx_head;
+ int idx_tail;
+
+ struct msgdma_desc **descs;
+ bus_dma_segment_t *descs_phys;
+ uint32_tdescs_num;
+ bus_dma_tag_t dma_tag;
+ bus_dmamap_t*dma_map;
+ uint32_tmap_descr;
+ uint8_t map_err;
+ uint32_tdescs_used_count;
+};
+
+struct msgdma_softc {
+ device_tdev;
+ struct resource *res[3];
+ bus_space_tag_t bst;
+ bus_space_handle_t bsh;
+ bus_space_tag_t bst_d;
+ bus_space_handle_t bsh_d;
+ void*ih;
+ struct msgdma_desc desc;
+ struct msgdma_channel channels[MSGDMA_NCHANNELS];
+};
+
+static struct resource_spec msgdma_spec[] = {
+ { SYS_RES_MEMORY, 0, RF_ACTIVE },
svn commit: r332472 - in head/sys: conf dev/altera/atse dev/altera/softdma
-3. FIFO Status Register Memory Map. */
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_REG_FILL_LEVEL0x00
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_REG_I_STATUS 0x04
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_REG_EVENT 0x08
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_REG_INT_ENABLE0x0c
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_REG_ALMOSTFULL0x10
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_REG_ALMOSTEMPTY 0x14
+
+/* Table 16-5. Status Bit Field Descriptions. */
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_FULL (1<<0)
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_EMPTY (1<<1)
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_ALMOSTFULL(1<<2)
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_ALMOSTEMPTY (1<<3)
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_OVERFLOW (1<<4)
+#defineA_ONCHIP_FIFO_MEM_CORE_STATUS_UNDERFLOW (1<<5)
+
+/* Table 16-6. Event Bit Field Descriptions. */
+/* XXX Datasheet has incorrect bit fields. Validate. */
+#defineA_ONCHIP_FIFO_MEM_CORE_EVENT_FULL (1<<0)
+#defineA_ONCHIP_FIFO_MEM_CORE_EVENT_EMPTY (1<<1)
+#defineA_ONCHIP_FIFO_MEM_CORE_EVENT_ALMOSTFULL (1<<2)
+#defineA_ONCHIP_FIFO_MEM_CORE_EVENT_ALMOSTEMPTY(1<<3)
+#defineA_ONCHIP_FIFO_MEM_CORE_EVENT_OVERFLOW (1<<4)
+#defineA_ONCHIP_FIFO_MEM_CORE_EVENT_UNDERFLOW (1<<5)
+
+/* Table 16-7. InterruptEnable Bit Field Descriptions. */
+/* XXX Datasheet has incorrect bit fields. Validate. */
+#defineA_ONCHIP_FIFO_MEM_CORE_INTR_FULL(1<<0)
+#defineA_ONCHIP_FIFO_MEM_CORE_INTR_EMPTY (1<<1)
+#defineA_ONCHIP_FIFO_MEM_CORE_INTR_ALMOSTFULL (1<<2)
+#defineA_ONCHIP_FIFO_MEM_CORE_INTR_ALMOSTEMPTY (1<<3)
+#defineA_ONCHIP_FIFO_MEM_CORE_INTR_OVERFLOW(1<<4)
+#defineA_ONCHIP_FIFO_MEM_CORE_INTR_UNDERFLOW (1<<5)
+#defineA_ONCHIP_FIFO_MEM_CORE_INTR_ALL \
+ (A_ONCHIP_FIFO_MEM_CORE_INTR_EMPTY| \
+ A_ONCHIP_FIFO_MEM_CORE_INTR_FULL| \
+ A_ONCHIP_FIFO_MEM_CORE_INTR_ALMOSTEMPTY|\
+ A_ONCHIP_FIFO_MEM_CORE_INTR_ALMOSTFULL| \
+ A_ONCHIP_FIFO_MEM_CORE_INTR_OVERFLOW| \
+ A_ONCHIP_FIFO_MEM_CORE_INTR_UNDERFLOW)
+
+#endif /* _A_API_H */
+
+/* end */
Added: head/sys/dev/altera/softdma/softdma.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/altera/softdma/softdma.c Fri Apr 13 14:18:04 2018
(r332472)
@@ -0,0 +1,864 @@
+/*-
+ * Copyright (c) 2017-2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* This is driver for SoftDMA device built using Altera FIFO component. */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include "opt_platform.h"
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#ifdef FDT
+#include
+#include
+#include
+#endif
+
+#include
+
+#include
+#include "xdma_if.h"
+
+#define SOFTDMA_DEBUG
+#undef SOFTDMA_DEBUG
+
+#ifdef SOFTDMA_DEBUG
+#define dprintf(fmt, ...) printf(fmt, ##__VA_ARGS__)
+#else
+#defi
svn commit: r332473 - head/sys/dts/mips
Author: br
Date: Fri Apr 13 15:18:06 2018
New Revision: 332473
URL: https://svnweb.freebsd.org/changeset/base/332473
Log:
Add beripic1, msgdma and softdma instances.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dts/mips/beripad-de4.dts
Modified: head/sys/dts/mips/beripad-de4.dts
==
--- head/sys/dts/mips/beripad-de4.dts Fri Apr 13 14:18:04 2018
(r332472)
+++ head/sys/dts/mips/beripad-de4.dts Fri Apr 13 15:18:06 2018
(r332473)
@@ -107,6 +107,23 @@
interrupt-parent = <&cpuintc>;
};
+/*
+ beripic1: beripic@7f808000 {
+ compatible = "sri-cambridge,beri-pic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x7f808000 0x400
+ 0x7f80a000 0x10
+ 0x7f80a080 0x10
+ 0x7f80a100 0x10>;
+ interrupts = < 2 3 4 5 6 >;
+ hard-interrupt-sources = <64>;
+ soft-interrupt-sources = <64>;
+ interrupt-parent = <&cpuintc>;
+ };
+*/
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -190,6 +207,62 @@
reg = <0x3fe 0x2>;
label = "boot";
};
+ };
+
+ msgdma0: msgdma@80004080 {
+ compatible = "altr,msgdma-16.0", "altr,msgdma-1.0";
+ reg = <0x80004080 0x0020>,
+ <0x800040a0 0x0020>;
+ reg-names = "csr", "descriptor_slave";
+ interrupts = <14>;
+ interrupt-parent = <&beripic0>;
+ #dma-cells = <3>;
+ };
+
+ msgdma1: msgdma@80004000 {
+ compatible = "altr,msgdma-16.0", "altr,msgdma-1.0";
+ reg = <0x80004000 0x0020>,
+ <0x80004020 0x0020>;
+ reg-names = "csr", "descriptor_slave";
+ interrupts = <13>;
+ interrupt-parent = <&beripic0>;
+ #dma-cells = <3>;
+ };
+
+ softdma0: softdma@7f007400 {
+ compatible = "altr,softdma";
+ reg = < 0x7f007400 0x8 /* tx */
+ 0x7f007420 0x20 >; /* txc */
+ interrupts = <2>;
+ interrupt-parent = <&beripic0>;
+ #dma-cells = <3>;
+ };
+
+ softdma1: softdma@7f007500 {
+ compatible = "altr,softdma";
+ reg = < 0x7f007500 0x8 /* rx */
+ 0x7f007520 0x20 >; /* rxc */
+ interrupts = <1>;
+ interrupt-parent = <&beripic0>;
+ #dma-cells = <3>;
+ };
+
+ softdma2: softdma@7f005400 {
+ compatible = "altr,softdma";
+ reg = < 0x7f005400 0x8 /* tx */
+ 0x7f005420 0x20 >; /* txc */
+ interrupts = <12>;
+ interrupt-parent = <&beripic0>;
+ #dma-cells = <3>;
+ };
+
+ softdma3: softdma@7f005500 {
+ compatible = "altr,softdma";
+ reg = < 0x7f005500 0x8 /* rx */
+ 0x7f005520 0x20 >; /* rxc */
+ interrupts = <11>;
+ interrupt-parent = <&beripic0>;
+ #dma-cells = <3>;
};
ethernet@7f007000 {
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svn commit: r332474 - in head/sys: dev/altera/atse dts/mips mips/conf
Author: br
Date: Fri Apr 13 15:59:24 2018
New Revision: 332474
URL: https://svnweb.freebsd.org/changeset/base/332474
Log:
Convert atse(4) driver for Altera Triple-Speed Ethernet MegaCore to use
xdma(4) interface.
This allows us to switch between Altera mSGDMA or SoftDMA engines used by
atse(4) device.
This also makes atse(4) driver become 25% smaller.
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D9618
Modified:
head/sys/dev/altera/atse/if_atse.c
head/sys/dev/altera/atse/if_atse_fdt.c
head/sys/dev/altera/atse/if_atse_nexus.c
head/sys/dev/altera/atse/if_atsereg.h
head/sys/dts/mips/beripad-de4.dts
head/sys/mips/conf/BERI_DE4_BASE
Modified: head/sys/dev/altera/atse/if_atse.c
==
--- head/sys/dev/altera/atse/if_atse.c Fri Apr 13 15:18:06 2018
(r332473)
+++ head/sys/dev/altera/atse/if_atse.c Fri Apr 13 15:59:24 2018
(r332474)
@@ -3,6 +3,7 @@
*
* Copyright (c) 2012, 2013 Bjoern A. Zeeb
* Copyright (c) 2014 Robert N. M. Watson
+ * Copyright (c) 2016-2017 Ruslan Bukin
* All rights reserved.
*
* This software was developed by SRI International and the University of
@@ -88,29 +89,21 @@ __FBSDID("$FreeBSD$");
#include
#include
-#include
+#include
-MODULE_DEPEND(atse, ether, 1, 1, 1);
-MODULE_DEPEND(atse, miibus, 1, 1, 1);
+#defineRX_QUEUE_SIZE 4096
+#defineTX_QUEUE_SIZE 4096
+#defineNUM_RX_MBUF 512
+#defineBUFRING_SIZE8192
+#include
-#defineATSE_WATCHDOG_TIME 5
-
-#ifdef DEVICE_POLLING
-static poll_handler_t atse_poll;
-#endif
-
/* XXX once we'd do parallel attach, we need a global lock for this. */
#defineATSE_ETHERNET_OPTION_BITS_UNDEF 0
#defineATSE_ETHERNET_OPTION_BITS_READ 1
static int atse_ethernet_option_bits_flag = ATSE_ETHERNET_OPTION_BITS_UNDEF;
static uint8_t atse_ethernet_option_bits[ALTERA_ETHERNET_OPTION_BITS_LEN];
-static int atse_intr_debug_enable = 0;
-SYSCTL_INT(_debug, OID_AUTO, atse_intr_debug_enable, CTLFLAG_RW,
-&atse_intr_debug_enable, 0,
- "Extra debugging output for atse interrupts");
-
/*
* Softc and critical resource locking.
*/
@@ -118,155 +111,15 @@ SYSCTL_INT(_debug, OID_AUTO, atse_intr_debug_enable, C
#defineATSE_UNLOCK(_sc)mtx_unlock(&(_sc)->atse_mtx)
#defineATSE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->atse_mtx, MA_OWNED)
-#defineATSE_TX_PENDING(sc) (sc->atse_tx_m != NULL ||
\
- !IFQ_DRV_IS_EMPTY(&ifp->if_snd))
+#define ATSE_DEBUG
+#undef ATSE_DEBUG
-#ifdef DEBUG
+#ifdef ATSE_DEBUG
#defineDPRINTF(format, ...)printf(format, __VA_ARGS__)
#else
#defineDPRINTF(format, ...)
#endif
-/* a_api.c functions; factor out? */
-static inline void
-a_onchip_fifo_mem_core_write(struct resource *res, uint32_t off,
-uint32_t val4, const char *desc, const char *f, const int l)
-{
-
- val4 = htole32(val4);
- DPRINTF("[%s:%d] FIFOW %s 0x%08x = 0x%08x\n", f, l, desc, off, val4);
- bus_write_4(res, off, val4);
-}
-
-static inline uint32_t
-a_onchip_fifo_mem_core_read(struct resource *res, uint32_t off,
-const char *desc, const char *f, const int l)
-{
- uint32_t val4;
-
- val4 = le32toh(bus_read_4(res, off));
- DPRINTF("[%s:%d] FIFOR %s 0x%08x = 0x%08x\n", f, l, desc, off, val4);
-
- return (val4);
-}
-
-/* The FIFO does an endian conversion, so we must not do it as well. */
-/* XXX-BZ in fact we should do a htobe32 so le would be fine as well? */
-#defineATSE_TX_DATA_WRITE(sc, val4)
\
- bus_write_4((sc)->atse_tx_mem_res, A_ONCHIP_FIFO_MEM_CORE_DATA, val4)
-
-#defineATSE_TX_META_WRITE(sc, val4)
\
- a_onchip_fifo_mem_core_write((sc)->atse_tx_mem_res, \
- A_ONCHIP_FIFO_MEM_CORE_METADATA,\
- (val4), "TXM", __func__, __LINE__)
-#defineATSE_TX_META_READ(sc)
\
- a_onchip_fifo_mem_core_read((sc)->atse_tx_mem_res, \
- A_ONCHIP_FIFO_MEM_CORE_METADATA,\
- "TXM", __func__, __LINE__)
-
-#defineATSE_TX_READ_FILL_LEVEL(sc)
\
- a_onchip_fifo_mem_core_read((sc)->atse_txc_mem_res, \
- A_ONCHIP_FIFO_MEM_CORE_STATUS_REG_FILL_LEVEL, \
- "TX_FILL", __func__, __LINE__)
-#defineATSE_RX_READ_FILL_LEVEL(sc)
\
- a_onchip_fifo_mem_core_read((sc)->atse_rxc_mem_res, \
- A_ONCHIP_FIFO_MEM_CORE_STATUS_R
svn commit: r332672 - head/share/mk
Author: br Date: Wed Apr 18 13:58:42 2018 New Revision: 332672 URL: https://svnweb.freebsd.org/changeset/base/332672 Log: Set correct float abi (float abi double) for hard-float build, so __riscv_float_abi_double macro will be defined by compiler. The options are: o lp64 __riscv_float_abi_soft o lp64f __riscv_float_abi_single o lp64d __riscv_float_abi_double Sponsored by: DARPA, AFRL Modified: head/share/mk/bsd.cpu.mk Modified: head/share/mk/bsd.cpu.mk == --- head/share/mk/bsd.cpu.mkWed Apr 18 13:17:14 2018(r332671) +++ head/share/mk/bsd.cpu.mkWed Apr 18 13:58:42 2018(r332672) @@ -370,8 +370,8 @@ CFLAGS += -mcpu=8540 -Wa,-me500 -mspe=yes -mabi=spe -m CFLAGS += -march=rv64imac -mabi=lp64 ACFLAGS += -march=rv64imac -mabi=lp64 .else -CFLAGS += -march=rv64imafdc -mabi=lp64 -ACFLAGS += -march=rv64imafdc -mabi=lp64 +CFLAGS += -march=rv64imafdc -mabi=lp64d +ACFLAGS += -march=rv64imafdc -mabi=lp64d .endif .endif ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r332885 - in head/sys: conf dev/flash
Author: br
Date: Mon Apr 23 10:35:00 2018
New Revision: 332885
URL: https://svnweb.freebsd.org/changeset/base/332885
Log:
Add driver for Cadence Quad SPI Flash Controller found on
Intel® Arria® 10 SoC.
Cadence Quad SPI Flash is not generic SPI controller, but SPI flash
controller, so don't use spibus here, instead provide quad spi flash
interface.
Since it is not on spibus, then mx25l flash device driver is not usable
here, so provide new n25q flash device driver with quad spi flash
interface.
Sponsored by: DARPA, AFRL
Differential Revision:https://reviews.freebsd.org/D10245
Added:
head/sys/dev/flash/cqspi.c (contents, props changed)
head/sys/dev/flash/cqspi.h (contents, props changed)
head/sys/dev/flash/n25q.c (contents, props changed)
head/sys/dev/flash/qspi_if.m (contents, props changed)
Modified:
head/sys/conf/files
head/sys/dev/flash/mx25lreg.h
Modified: head/sys/conf/files
==
--- head/sys/conf/files Mon Apr 23 09:01:25 2018(r332884)
+++ head/sys/conf/files Mon Apr 23 10:35:00 2018(r332885)
@@ -1762,7 +1762,7 @@ dev/fdt/fdt_clock_if.moptional fdt fdt_clock
dev/fdt/fdt_common.c optional fdt
dev/fdt/fdt_pinctrl.c optional fdt fdt_pinctrl
dev/fdt/fdt_pinctrl_if.m optional fdt fdt_pinctrl
-dev/fdt/fdt_slicer.c optional fdt cfi | fdt nand | fdt mx25l
+dev/fdt/fdt_slicer.c optional fdt cfi | fdt nand | fdt mx25l | fdt
n25q
dev/fdt/fdt_static_dtb.S optional fdt fdt_dtb_static \
dependency "fdt_dtb_file"
dev/fdt/simplebus.coptional fdt
@@ -1781,7 +1781,10 @@ dev/firewire/if_fwip.c optional fwip
dev/firewire/sbp.c optional sbp
dev/firewire/sbp_targ.coptional sbp_targ
dev/flash/at45d.c optional at45d
+dev/flash/cqspi.c optional cqspi
dev/flash/mx25l.c optional mx25l
+dev/flash/n25q.c optional n25q
+dev/flash/qspi_if.moptional cqspi | n25q
dev/fxp/if_fxp.c optional fxp
dev/fxp/inphy.coptional fxp
dev/gem/if_gem.c optional gem
@@ -3672,7 +3675,7 @@ geom/geom_disk.c standard
geom/geom_dump.c standard
geom/geom_event.c standard
geom/geom_fox.coptional geom_fox
-geom/geom_flashmap.c optional fdt cfi | fdt nand | fdt mx25l | mmcsd
+geom/geom_flashmap.c optional fdt cfi | fdt nand | fdt mx25l | mmcsd
| fdt n25q
geom/geom_io.c standard
geom/geom_kern.c standard
geom/geom_map.coptional geom_map
Added: head/sys/dev/flash/cqspi.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/flash/cqspi.c Mon Apr 23 10:35:00 2018(r332885)
@@ -0,0 +1,768 @@
+/*-
+ * Copyright (c) 2017-2018 Ruslan Bukin
+ * All rights reserved.
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
+ * ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Cadence Quad SPI Flash Controller driver.
+ * 4B-addressing mode supported only.
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include "opt_platform.h"
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#
svn commit: r332887 - in head/sys: arm/conf dts/arm
Author: br
Date: Mon Apr 23 12:23:05 2018
New Revision: 332887
URL: https://svnweb.freebsd.org/changeset/base/332887
Log:
Enable ARM PL330 DMA engine and Cadence Quad SPI flash controller on
Intel Arria 10 SoC boards.
Tested on Intel Arria 10 SoC Development Kit.
Sponsored by: DARPA, AFRL
Modified:
head/sys/arm/conf/SOCFPGA
head/sys/dts/arm/socfpga_arria10_socdk_sdmmc.dts
Modified: head/sys/arm/conf/SOCFPGA
==
--- head/sys/arm/conf/SOCFPGA Mon Apr 23 12:20:07 2018(r332886)
+++ head/sys/arm/conf/SOCFPGA Mon Apr 23 12:23:05 2018(r332887)
@@ -47,6 +47,10 @@ options INTRNG
# ARM MPCore timer
device mpcore_timer
+# DMA support
+device xdma
+device pl330
+
# MMC/SD/SDIO Card slot support
device mmc # mmc/sd bus
device mmcsd # mmc/sd flash cards
@@ -80,6 +84,8 @@ deviceiicbus
# SPI
device spibus
+device cqspi
+device n25q
# Ethernet
device ether
Modified: head/sys/dts/arm/socfpga_arria10_socdk_sdmmc.dts
==
--- head/sys/dts/arm/socfpga_arria10_socdk_sdmmc.dtsMon Apr 23 12:20:07
2018(r332886)
+++ head/sys/dts/arm/socfpga_arria10_socdk_sdmmc.dtsMon Apr 23 12:23:05
2018(r332887)
@@ -84,3 +84,37 @@
&usb0 {
dr_mode = "host";
};
+
+&qspi {
+ status = "okay";
+
+ dmas = <&pdma 24>, <&pdma 25>;
+ dma-names = "tx", "rx";
+
+ flash0: n25q00@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q00aa";
+ reg = <0>;
+ spi-max-frequency = <1>;
+
+ m25p,fast-read;
+ cdns,page-size = <256>;
+ cdns,block-size = <16>;
+ cdns,read-delay = <4>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+
+ partition@qspi-boot {
+ label = "boot";
+ reg = <0x0 0x272>;
+ };
+
+ partition@qspi-rootfs {
+ label = "rootfs";
+ reg = <0x272 0x58E>;
+ };
+ };
+};
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svn commit: r320050 - head/sys/riscv/include
Author: br
Date: Sat Jun 17 07:36:46 2017
New Revision: 320050
URL: https://svnweb.freebsd.org/changeset/base/320050
Log:
Undefine temporary macro.
This fixes world build.
Sponsored by: DARPA, AFRL
Modified:
head/sys/riscv/include/atomic.h
Modified: head/sys/riscv/include/atomic.h
==
--- head/sys/riscv/include/atomic.h Sat Jun 17 03:05:25 2017
(r320049)
+++ head/sys/riscv/include/atomic.h Sat Jun 17 07:36:46 2017
(r320050)
@@ -512,6 +512,8 @@ atomic_store_rel_64(volatile uint64_t *p, uint64_t val
#defineatomic_set_acq_ptr atomic_set_acq_64
#defineatomic_subtract_acq_ptr atomic_subtract_acq_64
+#undef ATOMIC_ACQ_REL
+
static __inline void
atomic_thread_fence_acq(void)
{
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svn commit: r307519 - head/bin/pkill/tests
Author: br
Date: Mon Oct 17 10:21:53 2016
New Revision: 307519
URL: https://svnweb.freebsd.org/changeset/base/307519
Log:
Increase timeout so low-end platforms have a chance to complete test
procedures.
This fixes operation in QEMU/MIPS64.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Modified:
head/bin/pkill/tests/pgrep-j_test.sh
Modified: head/bin/pkill/tests/pgrep-j_test.sh
==
--- head/bin/pkill/tests/pgrep-j_test.shMon Oct 17 10:20:38 2016
(r307518)
+++ head/bin/pkill/tests/pgrep-j_test.shMon Oct 17 10:21:53 2016
(r307519)
@@ -20,12 +20,13 @@ sleep=$(pwd)/sleep.txt
ln -sf /bin/sleep $sleep
name="pgrep -j "
-sleep_amount=5
+sleep_amount=15
jail -c path=/ name=${base}_1_1 ip4.addr=127.0.0.1 \
command=daemon -p ${PWD}/${base}_1_1.pid $sleep $sleep_amount &
jail -c path=/ name=${base}_1_2 ip4.addr=127.0.0.1 \
command=daemon -p ${PWD}/${base}_1_2.pid $sleep $sleep_amount &
+sleep 0.5
for i in `seq 1 10`; do
jid1=$(jail_name_to_jid ${base}_1_1)
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svn commit: r307553 - head/contrib/netbsd-tests/lib/libpthread
Author: br
Date: Tue Oct 18 10:13:54 2016
New Revision: 307553
URL: https://svnweb.freebsd.org/changeset/base/307553
Log:
Skip test on MIPS as it modifies TLS pointer in set_mcontext().
Discussed with: kib
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Modified:
head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.c
Modified: head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.c
==
--- head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.cTue Oct 18
10:12:55 2016(r307552)
+++ head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.cTue Oct 18
10:13:54 2016(r307553)
@@ -97,6 +97,15 @@ ATF_TC_BODY(swapcontext1, tc)
{
pthread_t thread;
+#ifdef __mips__
+ /*
+* MIPS modifies TLS pointer in set_mcontext(), so
+* swapping contexts obtained from different threads
+* gives us different pthread_self() return value.
+*/
+ atf_tc_skip("Platform is not supported.");
+#endif
+
oself = (void *)&val1;
nself = (void *)&val2;
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svn commit: r307554 - head/tests/sys/kern
Author: br
Date: Tue Oct 18 10:20:58 2016
New Revision: 307554
URL: https://svnweb.freebsd.org/changeset/base/307554
Log:
Fix comment. We have different VM layout on MIPS, so test is skipped.
Requested by: kib
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Modified:
head/tests/sys/kern/kern_copyin.c
Modified: head/tests/sys/kern/kern_copyin.c
==
--- head/tests/sys/kern/kern_copyin.c Tue Oct 18 10:13:54 2016
(r307553)
+++ head/tests/sys/kern/kern_copyin.c Tue Oct 18 10:20:58 2016
(r307554)
@@ -60,7 +60,12 @@ ATF_TC_BODY(kern_copyin, tc)
char template[] = "copyin.XX";
#ifdef __mips__
- /* MIPS has no shared page implemented yet. */
+ /*
+* MIPS has different VM layout: the UVA map on mips ends the
+* highest mapped entry at the VM_MAXUSER_ADDRESS - PAGE_SIZE,
+* while all other arches map either stack or shared page up
+* to the VM_MAXUSER_ADDRESS.
+*/
atf_tc_skip("Platform is not supported.");
#endif
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svn commit: r307559 - head/usr.sbin/fstyp
Author: br
Date: Tue Oct 18 12:58:17 2016
New Revision: 307559
URL: https://svnweb.freebsd.org/changeset/base/307559
Log:
fstyp tests comes with pre-created EL filesystems,
but fstyp cannot detect EL filesystem on EB machine,
so exclude test files from distribution and skip the
test.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Modified:
head/usr.sbin/fstyp/Makefile
Modified: head/usr.sbin/fstyp/Makefile
==
--- head/usr.sbin/fstyp/MakefileTue Oct 18 12:27:46 2016
(r307558)
+++ head/usr.sbin/fstyp/MakefileTue Oct 18 12:58:17 2016
(r307559)
@@ -14,8 +14,9 @@ MAN= fstyp.8
WARNS?=2
.include
+.include
-.if ${MK_TESTS} != "no"
+.if ${MK_TESTS} != "no" && ${TARGET_ENDIANNESS} == 1234
SUBDIR+= tests
.endif
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Re: svn commit: r306864 - head
On Tue, Oct 18, 2016 at 08:17:55AM +0200, Baptiste Daroussin wrote: > On Mon, Oct 17, 2016 at 06:28:08PM -0700, Ngie Cooper wrote: > > On Sat, Oct 8, 2016 at 11:57 AM, Baptiste Daroussin > > wrote: > > > Author: bapt > > > Date: Sat Oct 8 18:57:11 2016 > > > New Revision: 306864 > > > URL: https://svnweb.freebsd.org/changeset/base/306864 > > > > > > Log: > > > groff is not needed in the bootstrap tools if the system is built > > > WITHOUT_SHAREDOCS > > > > > > MFC after:2 weeks > > > > > > Modified: > > > head/Makefile.inc1 > > > >This breaks buildworld when WITHOUT_GROFF is set and > > WITHOUT_SHAREDOCS isn't set. > > Really do you have logs of that? > Hi this breaks RISC-V world (we use external GNU toolchain) Here is log: https://people.freebsd.org/~br/riscv_wlog.txt Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r307583 - head/contrib/netbsd-tests/lib/libpthread
Author: br
Date: Tue Oct 18 22:53:58 2016
New Revision: 307583
URL: https://svnweb.freebsd.org/changeset/base/307583
Log:
Skip test on FreeBSD only. So test can be upstreamed to NetBSD.
Requested by: ngie
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Modified:
head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.c
Modified: head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.c
==
--- head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.cTue Oct 18
22:40:14 2016(r307582)
+++ head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.cTue Oct 18
22:53:58 2016(r307583)
@@ -97,7 +97,7 @@ ATF_TC_BODY(swapcontext1, tc)
{
pthread_t thread;
-#ifdef __mips__
+#if defined(__FreeBSD__) && defined(__mips__)
/*
* MIPS modifies TLS pointer in set_mcontext(), so
* swapping contexts obtained from different threads
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Re: svn commit: r307553 - head/contrib/netbsd-tests/lib/libpthread
On Tue, Oct 18, 2016 at 03:11:55PM -0700, Ngie Cooper wrote:
> (Picking a "random commit")
>
> On Tue, Oct 18, 2016 at 3:13 AM, Ruslan Bukin wrote:
> > Author: br
> > Date: Tue Oct 18 10:13:54 2016
> > New Revision: 307553
> > URL: https://svnweb.freebsd.org/changeset/base/307553
> >
> > Log:
> > Skip test on MIPS as it modifies TLS pointer in set_mcontext().
> >
> > Discussed with: kib
> > Sponsored by: DARPA, AFRL
> > Sponsored by: HEIF5
> >
> > Modified:
> > head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.c
> >
> > Modified: head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.c
> > ==
> > --- head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.cTue Oct 18
> > 10:12:55 2016(r307552)
> > +++ head/contrib/netbsd-tests/lib/libpthread/t_swapcontext.cTue Oct 18
> > 10:13:54 2016(r307553)
> > @@ -97,6 +97,15 @@ ATF_TC_BODY(swapcontext1, tc)
> > {
> > pthread_t thread;
> >
> > +#ifdef __mips__
> > + /*
> > +* MIPS modifies TLS pointer in set_mcontext(), so
> > +* swapping contexts obtained from different threads
> > +* gives us different pthread_self() return value.
> > +*/
> > + atf_tc_skip("Platform is not supported.");
> > +#endif
> > +
> > oself = (void *)&val1;
> > nself = (void *)&val2;
>
> Please add appropriate conditionals to the code, i.e.
> - "#ifdef __FreeBSD__" / "#endif" around all blocks that are
> FreeBSD-specific, or need to be upstreamed to NetBSD.
> - "#ifdef __NetBSD__" / "#endif" around all blocks that are
> NetBSD-specific (i.e. test specific NetBSD requirements), do not need
> to be upstreamed.
> This helps mere mortals (like me) keep track of what's our's,
> what's their's, and what should be their's, so I can push back
> everything that should be in NetBSD to NetBSD.
> If it's not resolved by tonight, I'll work through the queue of
> items that need to be cleaned up.
Thanks. Is this rule for ./contrib/netbsd-tests only, or ./tests/ as well ?
Ruslan
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svn commit: r307625 - head/tests/sys/geom/class/uzip
Author: br Date: Wed Oct 19 10:01:04 2016 New Revision: 307625 URL: https://svnweb.freebsd.org/changeset/base/307625 Log: Add big-endian uzip file system and choose right file system to proceed tests with. Reviewed by: jmmv, ngie Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision:https://reviews.freebsd.org/D8073 Added: head/tests/sys/geom/class/uzip/1_endian_big.img.uzip.uue (contents, props changed) head/tests/sys/geom/class/uzip/1_endian_little.img.uzip.uue (contents, props changed) Deleted: head/tests/sys/geom/class/uzip/test-1.img.uzip.uue Modified: head/tests/sys/geom/class/uzip/1_test.sh head/tests/sys/geom/class/uzip/Makefile Added: head/tests/sys/geom/class/uzip/1_endian_big.img.uzip.uue == --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/tests/sys/geom/class/uzip/1_endian_big.img.uzip.uueWed Oct 19 10:01:04 2016(r307625) @@ -0,0 +1,87 @@ +# +# $FreeBSD$ +# + +begin 644 1_endian_big.img.uzip +M(R$O8FEN+W-H"B-6,BXP($9OFEP?'QK +M;&1L;V%D(&=E;VU?=7II<"D^)BTF)FUO=6YT7V-D.38V,"`O9&5V+V!M9&-O +M;F9I9R`M868@)#!@+G5Z:7`@)#$*97AI="`D/PH``$`` +M0`*0`I`"D`*0`I`` +M```#;P-O!#$$,02H!*@` +M```&T@B4",4(Q0NZ +M"[H,@0R!#($,@0R! +M#($,@0R!#($,@0R! +M#($,@0R!#($,@0`` +M``R!#($,@0R!#($,@0`` +M``R!#($,@0R!#($, +M@0R!#($,@0R!#($` +M```,@0R!#($,@0R!#($` +M```,@0R!#($,@0R! +M#($,@0R!#*UXVNW4/0Z",!3`\3:B,FA@A,W1 +MN,C@`3R$":?0R<'!Q.H)3+R0DZOQ(L3%N1:H:``3'=#E_TM>WX.TI7P4(0J! +MB8&)H8E(U)-"*)/\M'9M9+16)JYIZ9GHF7!LOU8>_LLT6:WJ+A`GVU/G,IH\ +M^_EOEI*.EW4K5./Y8BF`!AW3YK!W\JP>Q]5/M+Q]F.SI^L&A3,9LE,` +M``#PC3L712#(>-KMU#T*PD`0AN$)_FTA)*7I+,4J +MA0?P$()7L=+UKTEQMTT]]JD'K,_[P_`T7]SF%4^.$M=GJ1-Z +M`?Z"[[9/P_WD.-UV*:UNK8Y>V2;VZ,.&1ZO59U]@V5Z^3/]ELK$OY]T@A.;V +MSFH>4HO*55;2`P```'C'%6?Y%ZQXVNW.L0W" +M,!"&40A?'7CLTVGM*Z+?5J6>=WXN>K3-3W2+=W3+IUKC?:&UN;G]/T:9DSNFLX` +M``#@;WP`XC\HZGC:Y=MY*`11'`?PL>[<-AN28\D5Y:I= +M(6W:+<+F_H-"RLZ?8TV;&?F%;IF_Q*5\TJ;\4<,[[E=_91Y!XUZWRJ*L +M<$K35O_P<,OY"]L)!?G+E`S?C/_B1Y%*ICI1/<]L'Z-X7X$MCOE"'NZ_Y%?\ +MZ0[OY[GW0C^\?6)YG(_K:2/%-DO\V4S2"R +MO\/\7!_9?U1<3V6VEVG2#[!;OQ5&1_(N9#^;EXS,)Z+NI'7(_HMID039K[RW,(_L]Y+< +M'R+[&Q.VKI#]Z3-NT.L?NI1>"SW_N7[5R'[.,C\$V<\=K[%#]AM'%A@@^V-3 +M3M.1_;D<6SKT^F\V"WK_V\+1-1S9+^S7O$7VVY.COLC^B#D&]/^/`=D;P\C^ +MX++F*F1_4\8Z]/-KEVETK@V$8 +M!_!E88@LG]"&FQ"]K.>-")D_X+/58OL%Z<.C2#[OYY)`MF_&]+F(ON9L3W0]]^H +M?HE']MN,!CJRGU]^487L3UP[IB'[3Z/9M\A^1_*;'=E?[XUV(OMK.`-"9'^: +M2O&*[%^G;EY"Y_^5&GK^HW]86Y#]#7WN'62_/Y!Q@NR_OF'HD/WV$I*![-_8 +M]YC^_][H\2#[+"[O_DMP5Z_U7ML[F1_33=L`#9S\YI +M2T+V?W8'>,C^>\%D,[*_B`P_(/MMH?PPLM\M<\XC^\<.%,A\"FM+/([L=R0P +MOS7!#@6 +M9+_><`C]_F-4RJ'K'Z&_@_[_W-M^#KW_JSO3SB+[4\3T?F1_ZVK,"K(_(E$Z +MH><_JBL$7?]DI5/(_J/':>C^/Q/A%B/[V:I1_G\Z[R\+%8'F>-KMPS$-`"`0 +M`+%#`#MB$<^K8&J35JLZ\\X=\-T#NY8`HWC:[91+ +M;]0P$,=WRR(J"PFNE3C,TDJ`M%T!%Q`E%2"$Q/,P/VGC9.P9C_\SWL%@L#0X/QI.!XFEP:71TK3[ +M.#.X.#H[]14_Z.9&PX_+3`2N;34-AV%`$,0/>?O5]_#X9?F?I#/\QK+2CZ_[ +M\=S/A-G]].[]5P$_]./U/WN`^U\>?YD1_@[[RKU=/GMTU)G?]..%H^\YK[.YM/7S"V+1KE89,[ +M9[5F5PMG# +MB3ML0VLPRO@6&HR=)C+K;!F])VRCCVFL$>!XD!YL'4J'KE/&+L]$PWNG)SS+ +MA&OL8G\"I@5OJS'#=&&/-QX7X$$R%3#WN':AOQ@7/"SDF)T.5&=[=8:K7=Z= +MRWT\+A7#KR1 +MZEC+Y(]ZX"RF[*.Q+@KEY?%NE%TD?O*>$NI% +MRS3/<6-1!?"56NP+MXXB+_;'46$MBA"WR`7O"Y-25\'CZ7@>ER3/DNO:',B8 +M>(:^L4V2+I+[)`?V)^\[\$2'>VPS%B38V#O<&9^:*!/<1!4SVX[9#M:?9WNQ +M_CEOQWB1M+96=B]HN!(S6$CK0I0C5AZ[8<^VT]]R4>[^RD6A?T:"(`B"(`B" +M(`B"(`B"(`B"(`B"(`B"(`B"(`B"(`B"^/_X#/X6=T5XVNW7+0H"01B`X=EQ +M004Q>@3!,B`8A$V#;#$+1@4/(=C4H,VD[@FT>`9ABPB;-GD$,6@0L_B#)L$@ +MIOW>)\Q/?&>FC%(JI7*N8]23=BZN-J\-DL\>[_?_0;\7FZOE5G+_ +M-:^'DOO]TF@FN7]=LT7)_8U@UY'-KMT#$!```,`B"C&]T*>_9!!!(```!X405W +M`]:``($` +M +M +M +M +M +M += +` +end Added: head/tests/sys/geom/class/uzip/1_endian_little.img.uzip.uue == --- /dev/null 00:00:00 1970 (empty, because fil
svn commit: r307629 - head/bin/pkill/tests
Author: br
Date: Wed Oct 19 12:23:02 2016
New Revision: 307629
URL: https://svnweb.freebsd.org/changeset/base/307629
Log:
Increase timeouts so tests have more chances to succeed
on MIPS64EB in QEMU.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Modified:
head/bin/pkill/tests/pgrep-j_test.sh
head/bin/pkill/tests/pkill-j_test.sh
Modified: head/bin/pkill/tests/pgrep-j_test.sh
==
--- head/bin/pkill/tests/pgrep-j_test.shWed Oct 19 11:51:17 2016
(r307628)
+++ head/bin/pkill/tests/pgrep-j_test.shWed Oct 19 12:23:02 2016
(r307629)
@@ -54,7 +54,7 @@ fi
wait
name="pgrep -j any"
-sleep_amount=6
+sleep_amount=16
jail -c path=/ name=${base}_2_1 ip4.addr=127.0.0.1 \
command=daemon -p ${PWD}/${base}_2_1.pid $sleep $sleep_amount &
@@ -75,7 +75,7 @@ fi
wait
name="pgrep -j none"
-sleep_amount=7
+sleep_amount=17
daemon -p ${PWD}/${base}_3_1.pid $sleep $sleep_amount &
jail -c path=/ name=${base}_3_2 ip4.addr=127.0.0.1 \
command=daemon -p ${PWD}/${base}_3_2.pid $sleep $sleep_amount &
@@ -92,7 +92,7 @@ wait
# test 4 is like test 1 except with jname instead of jid.
name="pgrep -j "
-sleep_amount=8
+sleep_amount=18
jail -c path=/ name=${base}_4_1 ip4.addr=127.0.0.1 \
command=daemon -p ${PWD}/${base}_4_1.pid $sleep $sleep_amount &
Modified: head/bin/pkill/tests/pkill-j_test.sh
==
--- head/bin/pkill/tests/pkill-j_test.shWed Oct 19 11:51:17 2016
(r307628)
+++ head/bin/pkill/tests/pkill-j_test.shWed Oct 19 12:23:02 2016
(r307629)
@@ -20,7 +20,7 @@ sleep=$(pwd)/sleep.txt
ln -sf /bin/sleep $sleep
name="pkill -j "
-sleep_amount=5
+sleep_amount=15
jail -c path=/ name=${base}_1_1 ip4.addr=127.0.0.1 \
command=daemon -p ${PWD}/${base}_1_1.pid $sleep $sleep_amount &
@@ -54,7 +54,7 @@ fi 2>/dev/null
wait
name="pkill -j any"
-sleep_amount=6
+sleep_amount=16
jail -c path=/ name=${base}_2_1 ip4.addr=127.0.0.1 \
command=daemon -p ${PWD}/${base}_2_1.pid $sleep $sleep_amount &
@@ -76,7 +76,7 @@ fi 2>/dev/null
wait
name="pkill -j none"
-sleep_amount=7
+sleep_amount=17
daemon -p ${PWD}/${base}_3_1.pid $sleep $sleep_amount
jail -c path=/ name=${base}_3_2 ip4.addr=127.0.0.1 \
command=daemon -p ${PWD}/${base}_3_2.pid $sleep $sleep_amount &
@@ -94,7 +94,7 @@ wait
# test 4 is like test 1 except with jname instead of jid.
name="pkill -j "
-sleep_amount=8
+sleep_amount=18
jail -c path=/ name=${base}_4_1 ip4.addr=127.0.0.1 \
command=daemon -p ${PWD}/${base}_4_1.pid $sleep $sleep_amount &
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svn commit: r307677 - head/sys/modules/geom
Author: br
Date: Thu Oct 20 17:10:26 2016
New Revision: 307677
URL: https://svnweb.freebsd.org/changeset/base/307677
Log:
Disable geom_eli module build on MIPS64 as it has alignment
issues and causes kernel panic.
ELI metadata is also not aligned properly for MIPS64 case.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Modified:
head/sys/modules/geom/Makefile
Modified: head/sys/modules/geom/Makefile
==
--- head/sys/modules/geom/Makefile Thu Oct 20 15:14:21 2016
(r307676)
+++ head/sys/modules/geom/Makefile Thu Oct 20 17:10:26 2016
(r307677)
@@ -6,7 +6,6 @@ SYSDIR?=${.CURDIR}/../..
SUBDIR=geom_bde \
geom_cache \
geom_concat \
- geom_eli \
geom_gate \
geom_journal \
geom_label \
@@ -30,4 +29,9 @@ SUBDIR= geom_bde \
SUBDIR+= geom_ccd
.endif
+# Alignment issues in g_eli_auth_run() on MIPS64 causes kernel panic
+.if ${MACHINE_ARCH} != "mips64" && ${MACHINE_ARCH} != "mips64el"
+SUBDIR+= geom_eli
+.endif
+
.include
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svn commit: r307947 - head/tests/sys/geom/class/uzip
Author: br
Date: Tue Oct 25 18:43:36 2016
New Revision: 307947
URL: https://svnweb.freebsd.org/changeset/base/307947
Log:
Change fs image name so it will not be regenerated (we
have both big and little-endian images in tree).
Also we don't known the endianness of the platform the
image was generated on.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Modified:
head/tests/sys/geom/class/uzip/Makefile
Modified: head/tests/sys/geom/class/uzip/Makefile
==
--- head/tests/sys/geom/class/uzip/Makefile Tue Oct 25 18:36:15 2016
(r307946)
+++ head/tests/sys/geom/class/uzip/Makefile Tue Oct 25 18:43:36 2016
(r307947)
@@ -8,7 +8,7 @@ PACKAGE=tests
TESTSDIR= ${TESTSBASE}/sys/geom/class/${.CURDIR:T}
-IMAGE= 1_endian_little.img
+IMAGE= 1_endian_unknown_autogenerated.img
ZIMAGE=${IMAGE}.uzip
UZIMAGE= ${ZIMAGE}.uue
@@ -26,7 +26,7 @@ ${UZIMAGE}: ${IMAGE} ${ZIMAGE}
uuencode ${ZIMAGE} ${ZIMAGE} >>${.TARGET}
${PACKAGE}FILES+= conf.sh 1_endian_big.img.uzip.uue \
- ${UZIMAGE}
+ 1_endian_little.img.uzip.uue
FILESGROUPS+= etalon
etalon+= etalon/etalon.txt
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svn commit: r307964 - head/lib/libproc
Author: br
Date: Wed Oct 26 14:26:45 2016
New Revision: 307964
URL: https://svnweb.freebsd.org/changeset/base/307964
Log:
Use uint32_t instead of u_long as a storage for breakpoint instruction
to copy. All the platforms breakpoints fits this fine.
This fixes operation on big-endian MIPS64 where we were coping
zeroes instead of real instruction.
Reviewed by: rpaulo
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Differential Revision:https://reviews.freebsd.org/D8250
Modified:
head/lib/libproc/proc_bkpt.c
Modified: head/lib/libproc/proc_bkpt.c
==
--- head/lib/libproc/proc_bkpt.cWed Oct 26 14:09:30 2016
(r307963)
+++ head/lib/libproc/proc_bkpt.cWed Oct 26 14:26:45 2016
(r307964)
@@ -68,6 +68,14 @@ __FBSDID("$FreeBSD$");
#error "Add support for your architecture"
#endif
+/*
+ * Use 4-bytes holder for breakpoint instruction on all the platforms.
+ * Works for x86 as well until it is endian-little platform.
+ * (We are coping one byte only on x86 from this 4-bytes piece of
+ * memory).
+ */
+typedef uint32_t instr_t;
+
static int
proc_stop(struct proc_handle *phdl)
{
@@ -92,8 +100,9 @@ proc_bkptset(struct proc_handle *phdl, u
unsigned long *saved)
{
struct ptrace_io_desc piod;
- unsigned long paddr, caddr;
+ unsigned long caddr;
int ret = 0, stopped;
+ instr_t instr;
*saved = 0;
if (phdl->status == PS_DEAD || phdl->status == PS_UNDEAD ||
@@ -115,10 +124,10 @@ proc_bkptset(struct proc_handle *phdl, u
* Read the original instruction.
*/
caddr = address;
- paddr = 0;
+ instr = 0;
piod.piod_op = PIOD_READ_I;
piod.piod_offs = (void *)caddr;
- piod.piod_addr = &paddr;
+ piod.piod_addr = &instr;
piod.piod_len = BREAKPOINT_INSTR_SZ;
if (ptrace(PT_IO, proc_getpid(phdl), (caddr_t)&piod, 0) < 0) {
DPRINTF("ERROR: couldn't read instruction at address 0x%"
@@ -126,15 +135,15 @@ proc_bkptset(struct proc_handle *phdl, u
ret = -1;
goto done;
}
- *saved = paddr;
+ *saved = instr;
/*
* Write a breakpoint instruction to that address.
*/
caddr = address;
- paddr = BREAKPOINT_INSTR;
+ instr = BREAKPOINT_INSTR;
piod.piod_op = PIOD_WRITE_I;
piod.piod_offs = (void *)caddr;
- piod.piod_addr = &paddr;
+ piod.piod_addr = &instr;
piod.piod_len = BREAKPOINT_INSTR_SZ;
if (ptrace(PT_IO, proc_getpid(phdl), (caddr_t)&piod, 0) < 0) {
DPRINTF("ERROR: couldn't write instruction at address 0x%"
@@ -156,8 +165,9 @@ proc_bkptdel(struct proc_handle *phdl, u
unsigned long saved)
{
struct ptrace_io_desc piod;
- unsigned long paddr, caddr;
+ unsigned long caddr;
int ret = 0, stopped;
+ instr_t instr;
if (phdl->status == PS_DEAD || phdl->status == PS_UNDEAD ||
phdl->status == PS_IDLE) {
@@ -178,10 +188,10 @@ proc_bkptdel(struct proc_handle *phdl, u
* Overwrite the breakpoint instruction that we setup previously.
*/
caddr = address;
- paddr = saved;
+ instr = saved;
piod.piod_op = PIOD_WRITE_I;
piod.piod_offs = (void *)caddr;
- piod.piod_addr = &paddr;
+ piod.piod_addr = &instr;
piod.piod_len = BREAKPOINT_INSTR_SZ;
if (ptrace(PT_IO, proc_getpid(phdl), (caddr_t)&piod, 0) < 0) {
DPRINTF("ERROR: couldn't write instruction at address 0x%"
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svn commit: r308130 - in head: . gnu/lib/libgcc gnu/usr.bin/binutils gnu/usr.bin/binutils/ld gnu/usr.bin/binutils/libbfd gnu/usr.bin/cc gnu/usr.bin/gdb gnu/usr.bin/gdb/libgdb lib/libc lib/libc/mips...
Author: br
Date: Mon Oct 31 15:33:58 2016
New Revision: 308130
URL: https://svnweb.freebsd.org/changeset/base/308130
Log:
Add full softfloat and hardfloat support for MIPS.
This adds new target architectures for hardfloat:
mipselhf mipshf mips64elhf mips64hf.
Tested in QEMU only.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Differential Revision:https://reviews.freebsd.org/D8376
Modified:
head/Makefile
head/Makefile.inc1
head/gnu/lib/libgcc/Makefile
head/gnu/usr.bin/binutils/Makefile.inc0
head/gnu/usr.bin/binutils/ld/Makefile.mips
head/gnu/usr.bin/binutils/libbfd/Makefile.mips
head/gnu/usr.bin/cc/Makefile.inc
head/gnu/usr.bin/cc/Makefile.tgt
head/gnu/usr.bin/gdb/Makefile.inc
head/gnu/usr.bin/gdb/libgdb/Makefile
head/lib/libc/Makefile
head/lib/libc/mips/Makefile.inc
head/lib/libc/mips/Symbol.map
head/lib/libc/mips/gen/Makefile.inc
head/lib/libc/mips/gen/flt_rounds.c
head/lib/msun/mips/Makefile.inc
head/lib/msun/mips/Symbol.map
head/lib/msun/mips/fenv.c
head/lib/msun/mips/fenv.h
head/share/man/man7/arch.7
head/share/mk/bsd.cpu.mk
head/share/mk/bsd.endian.mk
head/share/mk/sys.mk
head/sys/boot/Makefile.ficl
head/sys/boot/common/Makefile.inc
head/sys/boot/mips/uboot/Makefile
head/sys/conf/kern.mk
head/sys/mips/include/float.h
head/sys/mips/mips/exception.S
head/sys/mips/mips/locore.S
head/sys/mips/mips/swtch.S
head/sys/mips/mips/trap.c
Modified: head/Makefile
==
--- head/Makefile Mon Oct 31 15:11:55 2016(r308129)
+++ head/Makefile Mon Oct 31 15:33:58 2016(r308130)
@@ -239,7 +239,7 @@ _MAKE+= MK_META_MODE=no
_TARGET_ARCH= ${TARGET:S/pc98/i386/:S/arm64/aarch64/}
.elif !defined(TARGET) && defined(TARGET_ARCH) && \
${TARGET_ARCH} != ${MACHINE_ARCH}
-_TARGET=
${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/aarch64/arm64/:C/powerpc64/powerpc/:C/powerpcspe/powerpc/:C/riscv64/riscv/}
+_TARGET=
${TARGET_ARCH:C/mips(n32|64)?(el)?(hf)?/mips/:C/arm(v6)?(eb)?/arm/:C/aarch64/arm64/:C/powerpc64/powerpc/:C/powerpcspe/powerpc/:C/riscv64/riscv/}
.endif
.if defined(TARGET) && !defined(_TARGET)
_TARGET=${TARGET}
@@ -421,7 +421,7 @@ TARGETS?=amd64 arm arm64 i386 mips pc98
_UNIVERSE_TARGETS= ${TARGETS}
TARGET_ARCHES_arm?=arm armeb armv6
TARGET_ARCHES_arm64?= aarch64
-TARGET_ARCHES_mips?= mipsel mips mips64el mips64 mipsn32
+TARGET_ARCHES_mips?= mipsel mips mips64el mips64 mipsn32 mipselhf mipshf
mips64elhf mips64hf
TARGET_ARCHES_powerpc?=powerpc powerpc64 powerpcspe
TARGET_ARCHES_pc98?= i386
.for target in ${TARGETS}
Modified: head/Makefile.inc1
==
--- head/Makefile.inc1 Mon Oct 31 15:11:55 2016(r308129)
+++ head/Makefile.inc1 Mon Oct 31 15:33:58 2016(r308130)
@@ -356,6 +356,10 @@ KNOWN_ARCHES?= aarch64/arm64 \
mipsn32el/mips \
mips64/mips \
mipsn32/mips \
+ mipshf/mips \
+ mipselhf/mips \
+ mips64elhf/mips \
+ mips64hf/mips \
powerpc \
powerpc64/powerpc \
powerpcspe/powerpc \
Modified: head/gnu/lib/libgcc/Makefile
==
--- head/gnu/lib/libgcc/MakefileMon Oct 31 15:11:55 2016
(r308129)
+++ head/gnu/lib/libgcc/MakefileMon Oct 31 15:33:58 2016
(r308130)
@@ -165,7 +165,7 @@ LIBADD+=compiler_rt
.if ${TARGET_CPUARCH} == mips
LIB2FUNCS_EXTRA = floatunsidf.c floatunsisf.c
# ABIs other than o32 need this
-.if ${TARGET_ARCH} != "mips" && ${TARGET_ARCH} != "mipsel"
+.if ${TARGET_ARCH:Mmips64*} != "" || ${TARGET_ARCH:Mmipsn32*} != ""
LIB2FUNCS_EXTRA+= floatdidf.c fixunsdfsi.c
LIB2FUNCS_EXTRA+= floatdisf.c floatundidf.c
LIB2FUNCS_EXTRA+= fixsfdi.c floatundisf.c
Modified: head/gnu/usr.bin/binutils/Makefile.inc0
==
--- head/gnu/usr.bin/binutils/Makefile.inc0 Mon Oct 31 15:11:55 2016
(r308129)
+++ head/gnu/usr.bin/binutils/Makefile.inc0 Mon Oct 31 15:33:58 2016
(r308130)
@@ -7,7 +7,7 @@
VERSION= "2.17.50 [FreeBSD] 2007-07-03"
.if defined(TARGET_ARCH)
-TARGET_CPUARCH=${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/powerpc(64|spe)/powerpc/}
+TARGET_CPUARCH=${TARGET_ARCH:C/mips(n32|64)?(el)?(hf)?/mips/:C/arm(v6)?(eb)?/arm/:C/powerpc(64|spe)/powerpc/}
.else
TARGET_CPUARCH=${MACHINE_CPUARCH}
.endif
@@ -17,7 +17,7 @@ TARGET_OS?= freebsd
BINUTILS_ARCH=${TARGET_ARCH:C/amd64/x86_64/}
TARGET_TUPLE?= ${BINUTILS_ARCH}-${TARGET_VENDOR}-${TARGET_OS}
.if ${TARGET_ARCH} == "armeb" || ${TARGET_ARCH} == "armv6eb" || \
- (${TARGET_CPUARCH} == "mips" && ${TARGET_ARCH:Mmips*el} =
svn commit: r308132 - head/sys/mips/mips
Author: br
Date: Mon Oct 31 15:49:41 2016
New Revision: 308132
URL: https://svnweb.freebsd.org/changeset/base/308132
Log:
Use correct signal number for floating point exceptions.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Modified:
head/sys/mips/mips/trap.c
Modified: head/sys/mips/mips/trap.c
==
--- head/sys/mips/mips/trap.c Mon Oct 31 15:46:06 2016(r308131)
+++ head/sys/mips/mips/trap.c Mon Oct 31 15:49:41 2016(r308132)
@@ -1033,7 +1033,7 @@ dofault:
case T_FPE + T_USER:
if (!emulate_fp) {
- i = SIGILL;
+ i = SIGFPE;
addr = trapframe->pc;
break;
}
___
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svn commit: r308137 - in head: sbin/geom/class/eli sys/geom/eli sys/modules/geom
Author: br
Date: Mon Oct 31 16:55:14 2016
New Revision: 308137
URL: https://svnweb.freebsd.org/changeset/base/308137
Log:
Fix alignment issues on MIPS: align the pointers properly.
All the 5520 GEOM_ELI tests passed successfully on MIPS64EB.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Differential Revision:https://reviews.freebsd.org/D7905
Modified:
head/sbin/geom/class/eli/geom_eli.c
head/sys/geom/eli/g_eli.h
head/sys/geom/eli/g_eli_integrity.c
head/sys/modules/geom/Makefile
Modified: head/sbin/geom/class/eli/geom_eli.c
==
--- head/sbin/geom/class/eli/geom_eli.c Mon Oct 31 16:48:16 2016
(r308136)
+++ head/sbin/geom/class/eli/geom_eli.c Mon Oct 31 16:55:14 2016
(r308137)
@@ -666,7 +666,7 @@ static void
eli_init(struct gctl_req *req)
{
struct g_eli_metadata md;
- unsigned char sector[sizeof(struct g_eli_metadata)];
+ unsigned char sector[sizeof(struct g_eli_metadata)] __aligned(4);
unsigned char key[G_ELI_USERKEYLEN];
char backfile[MAXPATHLEN];
const char *str, *prov;
Modified: head/sys/geom/eli/g_eli.h
==
--- head/sys/geom/eli/g_eli.h Mon Oct 31 16:48:16 2016(r308136)
+++ head/sys/geom/eli/g_eli.h Mon Oct 31 16:55:14 2016(r308137)
@@ -289,6 +289,7 @@ eli_metadata_encode_v1v2v3v4v5v6v7(struc
static __inline void
eli_metadata_encode(struct g_eli_metadata *md, u_char *data)
{
+ uint32_t hash[4];
MD5_CTX ctx;
u_char *p;
@@ -320,12 +321,14 @@ eli_metadata_encode(struct g_eli_metadat
}
MD5Init(&ctx);
MD5Update(&ctx, data, p - data);
- MD5Final(md->md_hash, &ctx);
+ MD5Final((void *)hash, &ctx);
+ bcopy(hash, md->md_hash, sizeof(md->md_hash));
bcopy(md->md_hash, p, sizeof(md->md_hash));
}
static __inline int
eli_metadata_decode_v0(const u_char *data, struct g_eli_metadata *md)
{
+ uint32_t hash[4];
MD5_CTX ctx;
const u_char *p;
@@ -341,7 +344,8 @@ eli_metadata_decode_v0(const u_char *dat
bcopy(p, md->md_mkeys, sizeof(md->md_mkeys)); p += sizeof(md->md_mkeys);
MD5Init(&ctx);
MD5Update(&ctx, data, p - data);
- MD5Final(md->md_hash, &ctx);
+ MD5Final((void *)hash, &ctx);
+ bcopy(hash, md->md_hash, sizeof(md->md_hash));
if (bcmp(md->md_hash, p, 16) != 0)
return (EINVAL);
return (0);
@@ -350,6 +354,7 @@ eli_metadata_decode_v0(const u_char *dat
static __inline int
eli_metadata_decode_v1v2v3v4v5v6v7(const u_char *data, struct g_eli_metadata
*md)
{
+ uint32_t hash[4];
MD5_CTX ctx;
const u_char *p;
@@ -366,7 +371,8 @@ eli_metadata_decode_v1v2v3v4v5v6v7(const
bcopy(p, md->md_mkeys, sizeof(md->md_mkeys)); p += sizeof(md->md_mkeys);
MD5Init(&ctx);
MD5Update(&ctx, data, p - data);
- MD5Final(md->md_hash, &ctx);
+ MD5Final((void *)hash, &ctx);
+ bcopy(hash, md->md_hash, sizeof(md->md_hash));
if (bcmp(md->md_hash, p, 16) != 0)
return (EINVAL);
return (0);
Modified: head/sys/geom/eli/g_eli_integrity.c
==
--- head/sys/geom/eli/g_eli_integrity.c Mon Oct 31 16:48:16 2016
(r308136)
+++ head/sys/geom/eli/g_eli_integrity.c Mon Oct 31 16:55:14 2016
(r308137)
@@ -444,6 +444,7 @@ g_eli_auth_run(struct g_eli_worker *wr,
size += sizeof(*crde) * nsec;
size += sizeof(*crda) * nsec;
size += G_ELI_AUTH_SECKEYLEN * nsec;
+ size += sizeof(uintptr_t); /* Space for alignment. */
data = malloc(size, M_ELI, M_WAITOK);
bp->bio_driver2 = data;
p = data + encr_secsize * nsec;
@@ -451,6 +452,10 @@ g_eli_auth_run(struct g_eli_worker *wr,
bp->bio_inbed = 0;
bp->bio_children = nsec;
+#if defined(__mips_n64) || defined(__mips_o64)
+ p = (char *)roundup((uintptr_t)p, sizeof(uintptr_t));
+#endif
+
for (i = 1; i <= nsec; i++, dstoff += encr_secsize) {
crp = (struct cryptop *)p; p += sizeof(*crp);
crde = (struct cryptodesc *)p; p += sizeof(*crde);
Modified: head/sys/modules/geom/Makefile
==
--- head/sys/modules/geom/Makefile Mon Oct 31 16:48:16 2016
(r308136)
+++ head/sys/modules/geom/Makefile Mon Oct 31 16:55:14 2016
(r308137)
@@ -6,6 +6,7 @@ SYSDIR?=${.CURDIR}/../..
SUBDIR=geom_bde \
geom_cache \
geom_concat \
+ geom_eli \
geom_gate \
geom_journal \
geom_label \
@@ -29,9 +30,4 @@ SUBDIR= geom_bde \
SUBDIR+= geom_ccd
.endif
-# Alignment issues in g_eli_auth_run() on MIPS64
svn commit: r308145 - in head: contrib/netbsd-tests/lib/libc/stdio include lib/libc/stdio
Author: br
Date: Mon Oct 31 18:38:58 2016
New Revision: 308145
URL: https://svnweb.freebsd.org/changeset/base/308145
Log:
Detect integer overflow and limit the number of positional
arguments in the string format.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Differential Revision:https://reviews.freebsd.org/D8286
Modified:
head/contrib/netbsd-tests/lib/libc/stdio/t_printf.c
head/include/limits.h
head/lib/libc/stdio/printf-pos.c
Modified: head/contrib/netbsd-tests/lib/libc/stdio/t_printf.c
==
--- head/contrib/netbsd-tests/lib/libc/stdio/t_printf.c Mon Oct 31 18:38:50
2016(r308144)
+++ head/contrib/netbsd-tests/lib/libc/stdio/t_printf.c Mon Oct 31 18:38:58
2016(r308145)
@@ -120,12 +120,6 @@ ATF_TC_BODY(snprintf_posarg_error, tc)
{
char s[16], fmt[32];
-#ifndef __NetBSD__
- atf_tc_expect_signal(SIGSEGV,
- "some non-NetBSD platforms including FreeBSD don't validate "
- "negative size; testcase blows up with SIGSEGV");
-#endif
-
snprintf(fmt, sizeof(fmt), "%%%zu$d", SIZE_MAX / sizeof(size_t));
ATF_CHECK(snprintf(s, sizeof(s), fmt, -23) == -1);
Modified: head/include/limits.h
==
--- head/include/limits.h Mon Oct 31 18:38:50 2016(r308144)
+++ head/include/limits.h Mon Oct 31 18:38:58 2016(r308145)
@@ -120,7 +120,7 @@
#endif
#if __XSI_VISIBLE || __POSIX_VISIBLE >= 200809
-#defineNL_ARGMAX 99 /* max # of position args for
printf */
+#defineNL_ARGMAX 65536 /* max # of position args for
printf */
#defineNL_MSGMAX 32767
#defineNL_SETMAX 255
#defineNL_TEXTMAX 2048
Modified: head/lib/libc/stdio/printf-pos.c
==
--- head/lib/libc/stdio/printf-pos.cMon Oct 31 18:38:50 2016
(r308144)
+++ head/lib/libc/stdio/printf-pos.cMon Oct 31 18:38:58 2016
(r308145)
@@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
#include "namespace.h"
#include
+#include
#include
#include
#include
@@ -55,6 +56,12 @@ __FBSDID("$FreeBSD$");
#include "un-namespace.h"
#include "printflocal.h"
+#ifdef NL_ARGMAX
+#defineMAX_POSARG NL_ARGMAX
+#else
+#defineMAX_POSARG 65536
+#endif
+
/*
* Type ids for argument type table.
*/
@@ -70,9 +77,9 @@ enum typeid {
struct typetable {
enum typeid *table; /* table of types */
enum typeid stattable[STATIC_ARG_TBL_SIZE];
- int tablesize; /* current size of type table */
- int tablemax; /* largest used index in table */
- int nextarg;/* 1-based argument index */
+ u_int tablesize;/* current size of type table */
+ u_int tablemax; /* largest used index in table */
+ u_int nextarg; /* 1-based argument index */
};
static int __grow_type_table(struct typetable *);
@@ -84,7 +91,7 @@ static void build_arg_table (struct type
static inline void
inittypes(struct typetable *types)
{
- int n;
+ u_int n;
types->table = types->stattable;
types->tablesize = STATIC_ARG_TBL_SIZE;
@@ -185,7 +192,7 @@ static inline int
addaster(struct typetable *types, char **fmtp)
{
char *cp;
- int n2;
+ u_int n2;
n2 = 0;
cp = *fmtp;
@@ -194,7 +201,7 @@ addaster(struct typetable *types, char *
cp++;
}
if (*cp == '$') {
- int hold = types->nextarg;
+ u_int hold = types->nextarg;
types->nextarg = n2;
if (addtype(types, T_INT))
return (-1);
@@ -211,7 +218,7 @@ static inline int
addwaster(struct typetable *types, wchar_t **fmtp)
{
wchar_t *cp;
- int n2;
+ u_int n2;
n2 = 0;
cp = *fmtp;
@@ -220,7 +227,7 @@ addwaster(struct typetable *types, wchar
cp++;
}
if (*cp == '$') {
- int hold = types->nextarg;
+ u_int hold = types->nextarg;
types->nextarg = n2;
if (addtype(types, T_INT))
return (-1);
@@ -245,7 +252,7 @@ __find_arguments (const char *fmt0, va_l
{
char *fmt; /* format string */
int ch; /* character from fmt */
- int n; /* handy integer (short term usage) */
+ u_int n;/* handy integer (short term usage) */
int error;
int flags; /* flags as above */
struct typetable types; /* table of types */
@@ -296,6 +303,11 @@ reswitch: switch (ch) {
n = 0;
do {
n = 10 * n +
svn commit: r308170 - head/lib/libc/locale
ollate_large_t *p;
collate_large_t *tab = table->large_pri_table;
@@ -272,7 +274,7 @@ largesearch(struct xlocale_collate *tabl
while (low <= high) {
next = (low + high) / 2;
p = tab + next;
- compar = key - p->val;
+ compar = key - BSWAP(p->val);
if (compar == 0)
return (p);
if (compar > 0)
@@ -337,15 +339,15 @@ _collate_lookup(struct xlocale_collate *
* Character is a small (8-bit) character.
* We just look these up directly for speed.
*/
- *pri = table->char_pri_table[*t].pri[which];
+ *pri = BSWAP(table->char_pri_table[*t].pri[which]);
- } else if ((table->info->large_count > 0) &&
+ } else if ((BSWAP(table->info->large_count) > 0) &&
((match = largesearch(table, *t)) != NULL)) {
/*
* Character was found in the extended table.
*/
- *pri = match->pri.pri[which];
+ *pri = BSWAP(match->pri.pri[which]);
} else {
/*
@@ -355,7 +357,7 @@ _collate_lookup(struct xlocale_collate *
/* Mask off sign bit to prevent ordering confusion. */
*pri = (*t & COLLATE_MAX_PRIORITY);
} else {
- *pri = table->info->undef_pri[which];
+ *pri = BSWAP(table->info->undef_pri[which]);
}
/* No substitutions for undefined characters! */
return;
@@ -374,9 +376,9 @@ _collate_lookup(struct xlocale_collate *
* code ensures this for us.
*/
if ((sptr = substsearch(table, *pri, which)) != NULL) {
- if ((*pri = *sptr) > 0) {
+ if ((*pri = BSWAP(*sptr)) > 0) {
sptr++;
- *state = *sptr ? sptr : NULL;
+ *state = BSWAP(*sptr) ? sptr : NULL;
}
}
@@ -518,7 +520,7 @@ static int
xfrm(struct xlocale_collate *table, unsigned char *p, int pri, int pass)
{
/* we use unsigned to ensure zero fill on right shift */
- uint32_t val = (uint32_t)table->info->pri_count[pass];
+ uint32_t val = BSWAP((uint32_t)table->info->pri_count[pass]);
int nc = 0;
while (val) {
@@ -678,7 +680,7 @@ __collate_equiv_value(locale_t locale, c
e = -1;
if (*str <= UCHAR_MAX)
e = table->char_pri_table[*str].pri[0];
- else if (table->info->large_count > 0) {
+ else if (BSWAP(table->info->large_count) > 0) {
collate_large_t *match_large;
match_large = largesearch(table, *str);
if (match_large)
@@ -688,7 +690,7 @@ __collate_equiv_value(locale_t locale, c
return (1);
return (e > 0 ? e : 0);
}
- if (table->info->chain_count > 0) {
+ if (BSWAP(table->info->chain_count) > 0) {
wchar_t name[COLLATE_STR_LEN];
collate_chain_t *match_chain;
int clen;
Added: head/lib/libc/locale/endian.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/lib/libc/locale/endian.h Tue Nov 1 13:54:44 2016
(r308170)
@@ -0,0 +1,52 @@
+/*-
+ * Copyright (c) 2016 Ruslan Bukin
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AU
svn commit: r308251 - in head: lib/libcompiler_rt lib/msun/riscv share/man/man7 share/mk sys/modules/dtrace/dtrace sys/riscv/include
Author: br
Date: Thu Nov 3 13:06:17 2016
New Revision: 308251
URL: https://svnweb.freebsd.org/changeset/base/308251
Log:
o Add support for long double.
o Add support for latest RISC-V GNU toolchain.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Modified:
head/lib/libcompiler_rt/Makefile.inc
head/lib/msun/riscv/Makefile.inc
head/share/man/man7/arch.7
head/share/mk/bsd.cpu.mk
head/share/mk/bsd.stand.mk
head/sys/modules/dtrace/dtrace/Makefile
head/sys/riscv/include/asm.h
head/sys/riscv/include/float.h
Modified: head/lib/libcompiler_rt/Makefile.inc
==
--- head/lib/libcompiler_rt/Makefile.incThu Nov 3 10:11:59 2016
(r308250)
+++ head/lib/libcompiler_rt/Makefile.incThu Nov 3 13:06:17 2016
(r308251)
@@ -123,8 +123,11 @@ SRCF+= udivti3
SRCF+= umoddi3
SRCF+= umodti3
-# 128-bit quad precision long double support, only used on arm64
-.if ${MACHINE_CPUARCH} == "aarch64"
+#
+# 128-bit quad precision long double support,
+# only used on arm64 and riscv.
+#
+.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv"
SRCF+= addtf3
SRCF+= comparetf2
SRCF+= divtf3
Modified: head/lib/msun/riscv/Makefile.inc
==
--- head/lib/msun/riscv/Makefile.incThu Nov 3 10:11:59 2016
(r308250)
+++ head/lib/msun/riscv/Makefile.incThu Nov 3 13:06:17 2016
(r308251)
@@ -1,6 +1,3 @@
# $FreeBSD$
-# RISCVTODO: should be 113
-# compilation problems: gcc generates bltuz instruction, which is not exists
-
-LDBL_PREC = 53
+LDBL_PREC = 113
Modified: head/share/man/man7/arch.7
==
--- head/share/man/man7/arch.7 Thu Nov 3 10:11:59 2016(r308250)
+++ head/share/man/man7/arch.7 Thu Nov 3 13:06:17 2016(r308251)
@@ -66,7 +66,7 @@ On all supported architectures,
.It mips64hfTa 8 Ta 8
.It powerpc Ta 4 Ta 8
.It powerpc64 Ta 8 Ta 8
-.It riscv Ta 8 Ta
+.It riscv Ta 8 Ta 16
.It sparc64 Ta 8 Ta 16
.El
.Ss Endianness and Char Signedness
Modified: head/share/mk/bsd.cpu.mk
==
--- head/share/mk/bsd.cpu.mkThu Nov 3 10:11:59 2016(r308250)
+++ head/share/mk/bsd.cpu.mkThu Nov 3 13:06:17 2016(r308251)
@@ -156,7 +156,7 @@ _CPUCFLAGS = -march=${CPUTYPE}
_CPUCFLAGS = -march=${CPUTYPE:S/^mips//}
. endif
. elif ${MACHINE_CPUARCH} == "riscv"
-_CPUCFLAGS = -msoft-float # -march="RV64I" # RISCVTODO
+_CPUCFLAGS = -mno-float -march="IMAFD"
. elif ${MACHINE_ARCH} == "sparc64"
. if ${CPUTYPE} == "v9"
_CPUCFLAGS = -mcpu=v9
@@ -337,8 +337,8 @@ CFLAGS += -mcpu=8540 -Wa,-me500 -mspe=ye
.endif
.if ${MACHINE_CPUARCH} == "riscv"
-CFLAGS += -msoft-float
-ACFLAGS += -msoft-float
+CFLAGS += -mno-float
+ACFLAGS += -mno-float
.endif
# NB: COPTFLAGS is handled in /usr/src/sys/conf/kern.pre.mk
Modified: head/share/mk/bsd.stand.mk
==
--- head/share/mk/bsd.stand.mk Thu Nov 3 10:11:59 2016(r308250)
+++ head/share/mk/bsd.stand.mk Thu Nov 3 13:06:17 2016(r308251)
@@ -5,7 +5,12 @@
#
CFLAGS+= -ffreestanding -Wformat
-CFLAGS+= ${CFLAGS_NO_SIMD} -msoft-float -D_STANDALONE
+CFLAGS+= ${CFLAGS_NO_SIMD} -D_STANDALONE
+.if ${MACHINE_CPUARCH} == "riscv"
+CFLAGS+= -mno-float
+.else
+CFLAGS+= -msoft-float
+.endif
.if ${MACHINE_CPUARCH} == "i386"
CFLAGS.gcc+= -mpreferred-stack-boundary=2
Modified: head/sys/modules/dtrace/dtrace/Makefile
==
--- head/sys/modules/dtrace/dtrace/Makefile Thu Nov 3 10:11:59 2016
(r308250)
+++ head/sys/modules/dtrace/dtrace/Makefile Thu Nov 3 13:06:17 2016
(r308251)
@@ -60,7 +60,7 @@ assym.o: assym.s
.if ${MACHINE_CPUARCH} == "riscv"
assym.o: assym.s
- ${AS} -msoft-float -o assym.o assym.s
+ ${AS} -mfloat-abi=soft -o assym.o assym.s
.endif
.include
Modified: head/sys/riscv/include/asm.h
==
--- head/sys/riscv/include/asm.hThu Nov 3 10:11:59 2016
(r308250)
+++ head/sys/riscv/include/asm.hThu Nov 3 13:06:17 2016
(r308251)
@@ -47,7 +47,7 @@
#define_C_LABEL(x) x
#defineENTRY(sym) \
- .text; .globl sym; .type sym,@function; .align 2; sym:
+ .text; .globl sym; .type sym,@function; .align 4; sym:
#defineEND(sym) .size sym, . - sym
#defineEENTRY(sym) \
Modified: head/sys/riscv/include/float.h
===
Re: svn commit: r308130 - in head: . gnu/lib/libgcc gnu/usr.bin/binutils gnu/usr.bin/binutils/ld gnu/usr.bin/binutils/libbfd gnu/usr.bin/cc gnu/usr.bin/gdb gnu/usr.bin/gdb/libgdb lib/libc lib/libc/mip
On Thu, Nov 03, 2016 at 12:39:48PM -0700, Bryan Drewery wrote:
> On 10/31/16 8:33 AM, Ruslan Bukin wrote:
> > Modified: head/share/mk/bsd.cpu.mk
> > ==
> > --- head/share/mk/bsd.cpu.mkMon Oct 31 15:11:55 2016
> > (r308129)
> > +++ head/share/mk/bsd.cpu.mkMon Oct 31 15:33:58 2016
> > (r308130)
> > @@ -303,6 +303,9 @@ MACHINE_CPU = v9 ultrasparc ultrasparc3
> >
> > .if ${MACHINE_CPUARCH} == "mips"
> > CFLAGS += -G0
> > +.if ${TARGET_ARCH:Mmips*hf}
>
> TARGET_ARCH is not valid here. This broke building ports. Fixed in
> r308262.
>
Thank you!
Ruslan
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svn commit: r308289 - head/sys/riscv/riscv
Author: br Date: Fri Nov 4 13:07:54 2016 New Revision: 308289 URL: https://svnweb.freebsd.org/changeset/base/308289 Log: System Binary Interface (SBI) page was moved in latest version of Berkeley Boot Loader (BBL) due to code size increase. We will need to dehardcode this somehow. Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Modified: head/sys/riscv/riscv/locore.S Modified: head/sys/riscv/riscv/locore.S == --- head/sys/riscv/riscv/locore.S Fri Nov 4 12:58:50 2016 (r308288) +++ head/sys/riscv/riscv/locore.S Fri Nov 4 13:07:54 2016 (r308289) @@ -137,7 +137,7 @@ _start: /* Create an L3 page for SBI */ la s1, pagetable_l3_sbi - li s2, 0x80009000 + li s2, 0x8000b000 srlis2, s2, PAGE_SHIFT li a5, 511 li t4, PTE_V | PTE_RX | PTE_W ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r308483 - head/contrib/llvm/projects/libunwind/src
Author: br Date: Thu Nov 10 12:54:33 2016 New Revision: 308483 URL: https://svnweb.freebsd.org/changeset/base/308483 Log: Implement riscv jumpto() so world can be compiled. Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Modified: head/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S Modified: head/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S == --- head/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S Thu Nov 10 11:14:51 2016(r308482) +++ head/contrib/llvm/projects/libunwind/src/UnwindRegistersRestore.S Thu Nov 10 12:54:33 2016(r308483) @@ -480,6 +480,50 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9li #elif defined(__riscv__) -/* RISCVTODO */ +// +// void libunwind::Registers_riscv::jumpto() +// +// On entry: +// thread_state pointer is in a0 +// + .p2align 2 +DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind15Registers_riscv6jumptoEv) + // x0 is zero + ldx1, (8 * 1)(a0) + ldx2, (8 * 2)(a0) + ldx3, (8 * 3)(a0) + ldx4, (8 * 4)(a0) + ldx5, (8 * 5)(a0) + ldx6, (8 * 6)(a0) + ldx7, (8 * 7)(a0) + ldx8, (8 * 8)(a0) + ldx9, (8 * 9)(a0) + // skip a0 for now + ldx11, (8 * 11)(a0) + ldx12, (8 * 12)(a0) + ldx13, (8 * 13)(a0) + ldx14, (8 * 14)(a0) + ldx15, (8 * 15)(a0) + ldx16, (8 * 16)(a0) + ldx17, (8 * 17)(a0) + ldx18, (8 * 18)(a0) + ldx19, (8 * 19)(a0) + ldx20, (8 * 20)(a0) + ldx21, (8 * 21)(a0) + ldx22, (8 * 22)(a0) + ldx23, (8 * 23)(a0) + ldx24, (8 * 24)(a0) + ldx25, (8 * 25)(a0) + ldx26, (8 * 26)(a0) + ldx27, (8 * 27)(a0) + ldx28, (8 * 28)(a0) + ldx29, (8 * 29)(a0) + ldx30, (8 * 30)(a0) + ldx31, (8 * 31)(a0) + ldx10, (8 * 10)(a0) // restore a0 + + /* RISCVTODO: restore FPU registers */ + + ret // jump to ra #endif ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r308130 - in head: . gnu/lib/libgcc gnu/usr.bin/binutils gnu/usr.bin/binutils/ld gnu/usr.bin/binutils/libbfd gnu/usr.bin/cc gnu/usr.bin/gdb gnu/usr.bin/gdb/libgdb lib/libc lib/libc/mip
Hi, Adrian,
thanks, but I have lack of ideas yet.
I just tested this on Ingenic X1000 (mips.mipsel) and it works fine,
as well as mips.mipselhf (this hardware has FPU).
I have no hardware without FPU.
What exactly COP_1 bits you have commented to get rid of COP1_UNUSABLE?
Ruslan
On Thu, Nov 10, 2016 at 01:09:20PM -0800, Adrian Chadd wrote:
> ok, so there are two problems with mips now.
>
> * COP1_UNUSABLE - which is now being logged, and we were likely
> triggering it before. The problem: we always turned it on. If I
> comment out flipping on the COP1 bits in the .S files, those
> exceptions go away.
>
> * Page faults, but that may be me with an older userland:
>
> BAD_PAGE_FAULT: pid 1 tid 11 (init), uid 0: pc 0x404237c0 got a
> read fault (type 0x2) at 0x8
> Trapframe Register Dump:
> zero: 0at: 0xffe0v0: 0x404471b8v1:
> 0x
> a0: 0x404471b8a1: 0x7ffeea50a2: 0x16ca3: 0
> t0: 0t1: 0t2: 0t3: 0x7011
> t4: 0x11t5: 0x7013t6: 0x3t7: 0
> t8: 0t9: 0x4041c940s0: 0s1: 0x40417000
> s2: 0x7fffeee0s3: 0xs4: 0xcs5: 0x40427000
> s6: 0x7fffeeccs7: 0x7ffeea50k0: 0k1: 0
> gp: 0x4044e630sp: 0x7ffee838s8: 0x2ra: 0x404224d4
> sr: 0xfc13mullo: 0mulhi: 0badvaddr: 0x8
> cause: 0x8pc: 0x404237c0
> Page table info for pc address 0x404237c0: pde = 0x809aa000, pte = 0xa001ba9a
> Dumping 4 words starting at pc address 0x404237c0:
> 8e18 1600fff1 8f828070 10a3
>
>
>
> -adrian
>
>
> On 10 November 2016 at 12:49, Adrian Chadd wrote:
> > hi,
> >
> > This fails to boot on actual mips24k hardware, no hardfloat:
> >
> > COP1_UNUSABLE: pid 1 tid 11 (init), uid 0: pc 0x404237c0 ra 0x404224d4
> > Trapframe Register Dump:
> > zero: 0at: 0xffe0v0: 0x404471b8v1:
> > 0x
> >
> > .. lots of that the moment we boot userland.
> >
> >
> >
> > -adrian
> >
> >
> > On 3 November 2016 at 13:10, Ruslan Bukin wrote:
> >> On Thu, Nov 03, 2016 at 12:39:48PM -0700, Bryan Drewery wrote:
> >>> On 10/31/16 8:33 AM, Ruslan Bukin wrote:
> >>> > Modified: head/share/mk/bsd.cpu.mk
> >>> > ==
> >>> > --- head/share/mk/bsd.cpu.mkMon Oct 31 15:11:55 2016
> >>> > (r308129)
> >>> > +++ head/share/mk/bsd.cpu.mkMon Oct 31 15:33:58 2016
> >>> > (r308130)
> >>> > @@ -303,6 +303,9 @@ MACHINE_CPU = v9 ultrasparc ultrasparc3
> >>> >
> >>> > .if ${MACHINE_CPUARCH} == "mips"
> >>> > CFLAGS += -G0
> >>> > +.if ${TARGET_ARCH:Mmips*hf}
> >>>
> >>> TARGET_ARCH is not valid here. This broke building ports. Fixed in
> >>> r308262.
> >>>
> >>
> >> Thank you!
> >>
> >> Ruslan
> >>
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svn commit: r308644 - head/sys/riscv/riscv
Author: br Date: Mon Nov 14 18:30:03 2016 New Revision: 308644 URL: https://svnweb.freebsd.org/changeset/base/308644 Log: Check if L2 entry exists for the given VA before loading L3 entry. This is a fix for a panic that was easy to reproduce executing "(/bin/ls &)" in the shell. Sponsored by: DARPA, AFRL Modified: head/sys/riscv/riscv/pmap.c Modified: head/sys/riscv/riscv/pmap.c == --- head/sys/riscv/riscv/pmap.c Mon Nov 14 17:19:03 2016(r308643) +++ head/sys/riscv/riscv/pmap.c Mon Nov 14 18:30:03 2016(r308644) @@ -1992,6 +1992,8 @@ pmap_protect(pmap_t pmap, vm_offset_t sv l2 = pmap_l1_to_l2(l1, sva); if (l2 == NULL) continue; + if (pmap_load(l2) == 0) + continue; if ((pmap_load(l2) & PTE_RX) != 0) continue; ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r308691 - in head/sys: cddl/compat/opensolaris/sys cddl/contrib/opensolaris/uts/common/fs/zfs fs/tmpfs kern vm
I have a panic with this on RISC-V. Any ideas ? r vv rr rr rr vv r vv rrvv rr rr vv rr vv rr vv rr vv rr vv rr vv rr vv rr rr rr rr INSTRUCTION SETS WANT TO BE FREE KDB: debugger backends: ddb KDB: current backend: ddb Found 2 CPUs in the device tree Copyright (c) 1992-2016 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 12.0-CURRENT #4 0a3288b(br-riscv-isa-update)-dirty: Wed Nov 16 13:28:11 UTC 2016 rb...@vica.cl.cam.ac.uk:/home/rb743/obj/riscv.riscv64/home/rb743/dev/freebsd-riscv/sys/SPIKE riscv gcc version 6.1.0 (GCC) Preloaded elf64 kernel "kernel" at 0xffc0026be360. CPU(0): Unknown Implementer Unknown Processor Starting CPU 1 (0) FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs ULE: setup cpu 0 ULE: setup cpu 1 random: entropy device external interface crypto: mem: openfirm: null: nfslock: pseudo-device random: harvesting attach, 8 bytes (4 bits) from nexus0 ofwbus0: simplebus0: on ofwbus0 random: harvesting attach, 8 bytes (4 bits) from simplebus0 random: harvesting attach, 8 bytes (4 bits) from ofwbus0 timer0: mem 0x4000-0x4007,0x4008-0x40001007 irq 5 on simplebus0 Timecounter "RISC-V Timecounter" frequency 100 Hz quality 1000 Event timer "RISC-V Eventtimer" frequency 100 Hz quality 1000 random: harvesting attach, 8 bytes (4 bits) from timer0 cpulist0: on ofwbus0 cpu0: on cpulist0 cpu0: missing 'clock-frequency' property riscv64_cpu0: register <0> random: harvesting attach, 8 bytes (4 bits) from riscv64_cpu0 random: harvesting attach, 8 bytes (4 bits) from cpu0 cpu1: on cpulist0 cpu1: missing 'clock-frequency' property riscv64_cpu1: register <0> random: harvesting attach, 8 bytes (4 bits) from riscv64_cpu1 random: harvesting attach, 8 bytes (4 bits) from cpu1 random: harvesting attach, 8 bytes (4 bits) from cpulist0 simplebus0: compat riscv,pic (no driver attached) rcons0: irq 1 on simplebus0 random: harvesting attach, 8 bytes (4 bits) from rcons0 cryptosoft0: crypto: assign cryptosoft0 driver id 0, flags 100663296 crypto: cryptosoft0 registers alg 1 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 2 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 3 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 4 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 5 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 16 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 6 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 7 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 18 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 19 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 20 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 8 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 15 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 9 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 10 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 13 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 14 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 11 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 22 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 23 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 25 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 24 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 26 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 27 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 28 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 21 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 17 flags 0 maxoplen 0 random: harvesting attach, 8 bytes (4 bits) from cryptosoft0 Device configuration finished. procfs registered Timecounters tick every 1.000 msec lo0: bpf attached vlan: initialized, using hash tables with chaining tcp_init: net.inet.tcp.tcbhashsize auto tuned to 8192 IPsec: Initialized Security Association Processing. t[0] == 0xffc00265bf50 t[1] == 0xffc00016494c t[2] == 0x00
Re: svn commit: r308691 - in head/sys: cddl/compat/opensolaris/sys cddl/contrib/opensolaris/uts/common/fs/zfs fs/tmpfs kern vm
Forgot to mention that we are using 32mb mdroot. Removing mdroot from kernel config makes it more happy: crypto: cryptosoft0 registers alg 26 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 27 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 28 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 21 flags 0 maxoplen 0 crypto: cryptosoft0 registers alg 17 flags 0 maxoplen 0 random: harvesting attach, 8 bytes (4 bits) from cryptosoft0 Device configuration finished. procfs registered Timecounters tick every 1.000 msec lo0: bpf attached vlan: initialized, using hash tables with chaining tcp_init: net.inet.tcp.tcbhashsize auto tuned to 8192 IPsec: Initialized Security Association Processing. Release APs CPU(1): Unknown Implementer Unknown Processor Trying to mount root from ufs:/dev/md0 []... mountroot: waiting for device /dev/md0... Mounting from ufs:/dev/md0 failed with error 19. Loader variables: Manual root filesystem specification: : [options] Mount using filesystem and with the specified (optional) option list. eg. ufs:/dev/da0s1a zfs:tank cd9660:/dev/cd0 ro (which is equivalent to: mount -t cd9660 -o ro /dev/cd0 /) ? List valid disk boot devices . Yield 1 second (for background tasks) Abort manual input mountroot> Ruslan On Wed, Nov 16, 2016 at 01:37:18PM +0000, Ruslan Bukin wrote: > I have a panic with this on RISC-V. Any ideas ? > > > > r vv > > rr > rr > rr > vv > r vv > rrvv > rr rr > vv > rr vv rr > vv > rr vv rr > vv > rr vv rr > vv > rr rr > > rr rr > >INSTRUCTION SETS WANT TO BE FREE > KDB: debugger backends: ddb > KDB: current backend: ddb > Found 2 CPUs in the device tree > Copyright (c) 1992-2016 The FreeBSD Project. > Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 > The Regents of the University of California. All rights reserved. > FreeBSD is a registered trademark of The FreeBSD Foundation. > FreeBSD 12.0-CURRENT #4 0a3288b(br-riscv-isa-update)-dirty: Wed Nov 16 > 13:28:11 UTC 2016 > > rb...@vica.cl.cam.ac.uk:/home/rb743/obj/riscv.riscv64/home/rb743/dev/freebsd-riscv/sys/SPIKE > riscv > gcc version 6.1.0 (GCC) > Preloaded elf64 kernel "kernel" at 0xffc0026be360. > CPU(0): Unknown Implementer Unknown Processor > Starting CPU 1 (0) > FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs > ULE: setup cpu 0 > ULE: setup cpu 1 > random: entropy device external interface > crypto: > mem: > openfirm: > null: > nfslock: pseudo-device > random: harvesting attach, 8 bytes (4 bits) from nexus0 > ofwbus0: > simplebus0: on ofwbus0 > random: harvesting attach, 8 bytes (4 bits) from simplebus0 > random: harvesting attach, 8 bytes (4 bits) from ofwbus0 > timer0: mem 0x4000-0x4007,0x4008-0x40001007 irq 5 > on simplebus0 > Timecounter "RISC-V Timecounter" frequency 100 Hz quality 1000 > Event timer "RISC-V Eventtimer" frequency 100 Hz quality 1000 > random: harvesting attach, 8 bytes (4 bits) from timer0 > cpulist0: on ofwbus0 > cpu0: on cpulist0 > cpu0: missing 'clock-frequency' property > riscv64_cpu0: register <0> > random: harvesting attach, 8 bytes (4 bits) from riscv64_cpu0 > random: harvesting attach, 8 bytes (4 bits) from cpu0 > cpu1: on cpulist0 > cpu1: missing 'clock-frequency' property > riscv64_cpu1: register <0> > random: harvesting attach, 8 bytes (4 bits) from riscv64_cpu1 > random: harvesting attach, 8 bytes (4 bits) from cpu1 > random: harvesting attach, 8 bytes (4 bits) from cpulist0 > simplebus0: compat riscv,pic (no driver attached) > rcons0: irq 1 on simplebus0 > random: harvesting attach, 8 bytes (4 bits) from rcons0 > cryptosoft0: > crypto: assign cryptosoft0 driver id 0, flags 100663296 > crypto: cryptosoft0 registers
Re: svn commit: r308691 - in head/sys: cddl/compat/opensolaris/sys cddl/contrib/opensolaris/uts/common/fs/zfs fs/tmpfs kern vm
irectory Enter full pathname of shell or RETURN for /bin/sh: Cannot read termcap database; using dumb terminal settings. # uname -a FreeBSD 12.0-CURRENT FreeBSD 12.0-CURRENT #8 8e49d4e(br-riscv-isa-update)-dirty: Wed Nov 16 14:08:14 UTC 2016 rb...@vica.cl.cam.ac.uk:/home/rb743/obj/riscv.riscv64/home/rb743/dev/freebsd-riscv/sys/SPIKE riscv # Ruslan On Wed, Nov 16, 2016 at 02:02:27PM +, Ruslan Bukin wrote: > Forgot to mention that we are using 32mb mdroot. > Removing mdroot from kernel config makes it more happy: > > crypto: cryptosoft0 registers alg 26 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 27 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 28 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 21 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 17 flags 0 maxoplen 0 > random: harvesting attach, 8 bytes (4 bits) from cryptosoft0 > Device configuration finished. > procfs registered > Timecounters tick every 1.000 msec > lo0: bpf attached > vlan: initialized, using hash tables with chaining > tcp_init: net.inet.tcp.tcbhashsize auto tuned to 8192 > IPsec: Initialized Security Association Processing. > Release APs > CPU(1): Unknown Implementer Unknown Processor > Trying to mount root from ufs:/dev/md0 []... > mountroot: waiting for device /dev/md0... > Mounting from ufs:/dev/md0 failed with error 19. > > Loader variables: > > Manual root filesystem specification: > : [options] > Mount using filesystem > and with the specified (optional) option list. > > eg. ufs:/dev/da0s1a > zfs:tank > cd9660:/dev/cd0 ro > (which is equivalent to: mount -t cd9660 -o ro /dev/cd0 /) > > ? List valid disk boot devices > . Yield 1 second (for background tasks) > Abort manual input > > mountroot> > > Ruslan > > On Wed, Nov 16, 2016 at 01:37:18PM +, Ruslan Bukin wrote: > > I have a panic with this on RISC-V. Any ideas ? > > > > > > > > r vv > > > > rr > > rr > > rr > > vv > > r vv > > rrvv > > rr rr > > vv > > rr vv rr > > vv > > rr vv rr > > vv > > rr vv rr > > vv > > rr rr > > > > rr rr > > > >INSTRUCTION SETS WANT TO BE FREE > > KDB: debugger backends: ddb > > KDB: current backend: ddb > > Found 2 CPUs in the device tree > > Copyright (c) 1992-2016 The FreeBSD Project. > > Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 > > The Regents of the University of California. All rights reserved. > > FreeBSD is a registered trademark of The FreeBSD Foundation. > > FreeBSD 12.0-CURRENT #4 0a3288b(br-riscv-isa-update)-dirty: Wed Nov 16 > > 13:28:11 UTC 2016 > > > > rb...@vica.cl.cam.ac.uk:/home/rb743/obj/riscv.riscv64/home/rb743/dev/freebsd-riscv/sys/SPIKE > > riscv > > gcc version 6.1.0 (GCC) > > Preloaded elf64 kernel "kernel" at 0xffc0026be360. > > CPU(0): Unknown Implementer Unknown Processor > > Starting CPU 1 (0) > > FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs > > ULE: setup cpu 0 > > ULE: setup cpu 1 > > random: entropy device external interface > > crypto: > > mem: > > openfirm: > > null: > > nfslock: pseudo-device > > random: harvesting attach, 8 bytes (4 bits) from nexus0 > > ofwbus0: > > simplebus0: on ofwbus0 > > random: harvesting attach, 8 bytes (4 bits) from simplebus0 > > random: harvesting attach, 8 bytes (4 bits) from ofwbus0 > > timer0: mem 0x4000-0x4007,0x4008-0x40001007 irq > > 5 on simplebus0 > > Timecounter "RISC-V Timecounter" frequency 100 Hz quality 1000 > > Event timer "RISC-V Eventtimer" freq
svn commit: r308731 - in head: . gnu/usr.bin/cc lib/libc lib/libc/riscv lib/libc/riscv/gen lib/libc/riscv/softfloat lib/libc/softfloat lib/libcompiler_rt lib/msun/riscv share/mk sys/conf sys/module...
6 +3,10 @@
# Machine dependent definitions for the RISC-V architecture.
#
+.if ${MACHINE_ARCH:Mriscv*sf} != ""
+CFLAGS+=-DSOFTFLOAT
+.endif
+
# Long double is quad precision
GDTOASRCS+=strtorQ.c
MDSRCS+=machdep_ldisQ.c
Modified: head/lib/libc/riscv/Symbol.map
==
--- head/lib/libc/riscv/Symbol.map Wed Nov 16 14:39:03 2016
(r308730)
+++ head/lib/libc/riscv/Symbol.map Wed Nov 16 15:21:32 2016
(r308731)
@@ -35,4 +35,22 @@ FBSDprivate_1.0 {
_set_tp;
_end;
__makecontext;
+
+ /* softfloat */
+ __addsf3;
+ __adddf3;
+ __subsf3;
+ __subdf3;
+ __mulsf3;
+ __muldf3;
+ __divsf3;
+ __divdf3;
+ __floatsisf;
+ __floatsidf;
+ __fixsfsi;
+ __fixdfsi;
+ __fixunssfsi;
+ __fixunsdfsi;
+ __extendsfdf2;
+ __truncdfsf2;
};
Modified: head/lib/libc/riscv/gen/_setjmp.S
==
--- head/lib/libc/riscv/gen/_setjmp.S Wed Nov 16 14:39:03 2016
(r308730)
+++ head/lib/libc/riscv/gen/_setjmp.S Wed Nov 16 15:21:32 2016
(r308731)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2015 Ruslan Bukin
+ * Copyright (c) 2015-2016 Ruslan Bukin
* All rights reserved.
*
* Portions of this software were developed by SRI International and the
@@ -61,25 +61,22 @@ ENTRY(_setjmp)
sd ra, (12 * 8)(a0)
addia0, a0, (13 * 8)
-#ifndef _STANDALONE
-#if 0
- /* RISCVTODO */
- /* Store the vfp registers */
- fsq fs0, (0 * 16)(a0)
- fsq fs1, (1 * 16)(a0)
- fsq fs2, (2 * 16)(a0)
- fsq fs3, (3 * 16)(a0)
- fsq fs4, (4 * 16)(a0)
- fsq fs5, (5 * 16)(a0)
- fsq fs6, (6 * 16)(a0)
- fsq fs7, (7 * 16)(a0)
- fsq fs8, (8 * 16)(a0)
- fsq fs9, (9 * 16)(a0)
- fsq fs10, (10 * 16)(a0)
- fsq fs11, (11 * 16)(a0)
+#if !defined(_STANDALONE) && !defined(SOFTFLOAT)
+ /* Store the fpe registers */
+ fsd fs0, (0 * 16)(a0)
+ fsd fs1, (1 * 16)(a0)
+ fsd fs2, (2 * 16)(a0)
+ fsd fs3, (3 * 16)(a0)
+ fsd fs4, (4 * 16)(a0)
+ fsd fs5, (5 * 16)(a0)
+ fsd fs6, (6 * 16)(a0)
+ fsd fs7, (7 * 16)(a0)
+ fsd fs8, (8 * 16)(a0)
+ fsd fs9, (9 * 16)(a0)
+ fsd fs10, (10 * 16)(a0)
+ fsd fs11, (11 * 16)(a0)
addia0, a0, (12 * 16)
#endif
-#endif
/* Return value */
li a0, 0
@@ -117,25 +114,22 @@ ENTRY(_longjmp)
ld ra, (12 * 8)(a0)
addia0, a0, (13 * 8)
-#ifndef _STANDALONE
-#if 0
- /* RISCVTODO */
- /* Restore the vfp registers */
- flq fs0, (0 * 16)(a0)
- flq fs1, (1 * 16)(a0)
- flq fs2, (2 * 16)(a0)
- flq fs3, (3 * 16)(a0)
- flq fs4, (4 * 16)(a0)
- flq fs5, (5 * 16)(a0)
- flq fs6, (6 * 16)(a0)
- flq fs7, (7 * 16)(a0)
- flq fs8, (8 * 16)(a0)
- flq fs9, (9 * 16)(a0)
- flq fs10, (10 * 16)(a0)
- flq fs11, (11 * 16)(a0)
+#if !defined(_STANDALONE) && !defined(SOFTFLOAT)
+ /* Restore the fpe registers */
+ fld fs0, (0 * 16)(a0)
+ fld fs1, (1 * 16)(a0)
+ fld fs2, (2 * 16)(a0)
+ fld fs3, (3 * 16)(a0)
+ fld fs4, (4 * 16)(a0)
+ fld fs5, (5 * 16)(a0)
+ fld fs6, (6 * 16)(a0)
+ fld fs7, (7 * 16)(a0)
+ fld fs8, (8 * 16)(a0)
+ fld fs9, (9 * 16)(a0)
+ fld fs10, (10 * 16)(a0)
+ fld fs11, (11 * 16)(a0)
addia0, a0, (12 * 16)
#endif
-#endif
/* Load the return value */
mv a0, a1
Modified: head/lib/libc/riscv/gen/flt_rounds.c
==
--- head/lib/libc/riscv/gen/flt_rounds.cWed Nov 16 14:39:03 2016
(r308730)
+++ head/lib/libc/riscv/gen/flt_rounds.cWed Nov 16 15:21:32 2016
(r308731)
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 2015 Ruslan Bukin
+ * Copyright (c) 2015-2016 Ruslan Bukin
* All rights reserved.
*
* Portions of this software were developed by SRI International and the
@@ -40,23 +40,24 @@ __FBSDID("$FreeBSD$");
#include
#include
+#ifdef SOFTFLOAT
+#include "softfloat-for-gcc.h"
+#include "milieu.h"
+#include "softfloat.h"
+#endif
+
int
__flt_rounds(void)
{
-#if 0
- uint64_t fcsr;
-#endif
- int mode;
+ uint64_t mode;
-#if 0
- __asm __volatile("csrr%0, fcsr" : "=r" (fcsr));
- mode = (fcsr & _ROUND_MASK);
+#ifdef SOFTFLOAT
+ mode = __softfloat_float_rounding_mode;
+#else
+ __asm __volatile("csrr %0, fcsr" : "=r&
Re: svn commit: r308691 - in head/sys: cddl/compat/opensolaris/sys cddl/contrib/opensolaris/uts/common/fs/zfs fs/tmpfs kern vm
On Wed, Nov 16, 2016 at 06:53:43PM +0200, Konstantin Belousov wrote: > On Wed, Nov 16, 2016 at 01:37:18PM +0000, Ruslan Bukin wrote: > > I have a panic with this on RISC-V. Any ideas ? > How did you checked that the revision you replied to, makes the problem ? > Note that the backtrace below is not reasonable. I reverted this commit like that and rebuilt kernel: git show 2fa36073055134deb2df39c7ca46264cfc313d77 | patch -p1 -R So the problem is reproducible on dual-core with 32mb mdroot. Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r308691 - in head/sys: cddl/compat/opensolaris/sys cddl/contrib/opensolaris/uts/common/fs/zfs fs/tmpfs kern vm
On Wed, Nov 16, 2016 at 04:59:39PM +, Ruslan Bukin wrote: > On Wed, Nov 16, 2016 at 06:53:43PM +0200, Konstantin Belousov wrote: > > On Wed, Nov 16, 2016 at 01:37:18PM +0000, Ruslan Bukin wrote: > > > I have a panic with this on RISC-V. Any ideas ? > > How did you checked that the revision you replied to, makes the problem ? > > Note that the backtrace below is not reasonable. > > I reverted this commit like that and rebuilt kernel: > git show 2fa36073055134deb2df39c7ca46264cfc313d77 | patch -p1 -R > > So the problem is reproducible on dual-core with 32mb mdroot. > I just found another interesting behavior: depending on amount of physical memory : 700m - panic 800m - works fine 1024m - panic Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
Re: svn commit: r308691 - in head/sys: cddl/compat/opensolaris/sys cddl/contrib/opensolaris/uts/common/fs/zfs fs/tmpfs kern vm
On Wed, Nov 16, 2016 at 11:53:55AM -0600, Alan Cox wrote: > On 11/16/2016 10:59, Ruslan Bukin wrote: > > On Wed, Nov 16, 2016 at 06:53:43PM +0200, Konstantin Belousov wrote: > >> On Wed, Nov 16, 2016 at 01:37:18PM +, Ruslan Bukin wrote: > >>> I have a panic with this on RISC-V. Any ideas ? > >> How did you checked that the revision you replied to, makes the problem ? > >> Note that the backtrace below is not reasonable. > > I reverted this commit like that and rebuilt kernel: > > git show 2fa36073055134deb2df39c7ca46264cfc313d77 | patch -p1 -R > > > > So the problem is reproducible on dual-core with 32mb mdroot. > > This change amounted to dead code removal, so I'm not sure how it could > have an effect. There were only a couple places where the changes were > other than mechanical in nature. Also, that the number of cores matters > is no less puzzling. > > Can you send Kostik and me the output of "sysctl vm.stats.vm" from > shortly after boot on the kernel with the patch reverted? > Here is result with patch reverted: # sysctl vm.stats.vm vm.stats.vm.v_vm_faults: 1578 vm.stats.vm.v_io_faults: 213 vm.stats.vm.v_cow_faults: 135 vm.stats.vm.v_cow_optim: 0 vm.stats.vm.v_zfod: 360 vm.stats.vm.v_ozfod: 0 vm.stats.vm.v_swapin: 0 vm.stats.vm.v_swapout: 0 vm.stats.vm.v_swappgsin: 0 vm.stats.vm.v_swappgsout: 0 vm.stats.vm.v_vnodein: 0 vm.stats.vm.v_vnodeout: 0 vm.stats.vm.v_vnodepgsin: 0 vm.stats.vm.v_vnodepgsout: 0 vm.stats.vm.v_intrans: 0 vm.stats.vm.v_reactivated: 0 vm.stats.vm.v_pdwakeups: 0 vm.stats.vm.v_pdpages: 2 vm.stats.vm.v_pdshortfalls: 0 vm.stats.vm.v_tcached: 0 vm.stats.vm.v_dfree: 0 vm.stats.vm.v_pfree: 142 vm.stats.vm.v_tfree: 340 vm.stats.vm.v_page_size: 4096 vm.stats.vm.v_page_count: 235637 vm.stats.vm.v_free_reserved: 356 vm.stats.vm.v_free_target: 5064 vm.stats.vm.v_free_min: 1533 vm.stats.vm.v_free_count: 231577 vm.stats.vm.v_wire_count: 3779 vm.stats.vm.v_active_count: 251 vm.stats.vm.v_inactive_target: 7596 vm.stats.vm.v_inactive_count: 29 vm.stats.vm.v_laundry_count: 0 vm.stats.vm.v_cache_count: 0 vm.stats.vm.v_pageout_free_min: 34 vm.stats.vm.v_interrupt_free_min: 2 vm.stats.vm.v_forks: 4 vm.stats.vm.v_vforks: 0 vm.stats.vm.v_rforks: 0 vm.stats.vm.v_kthreads: 20 vm.stats.vm.v_forkpages: 132 vm.stats.vm.v_vforkpages: 0 vm.stats.vm.v_rforkpages: 0 vm.stats.vm.v_kthreadpages: 0 # And here is patch not reverted, but 800m of physical memory: # sysctl sysctl vm.stats.vm vm.stats.vm.v_vm_faults: 1580 vm.stats.vm.v_io_faults: 213 vm.stats.vm.v_cow_faults: 135 vm.stats.vm.v_cow_optim: 0 vm.stats.vm.v_zfod: 362 vm.stats.vm.v_ozfod: 0 vm.stats.vm.v_swapin: 0 vm.stats.vm.v_swapout: 0 vm.stats.vm.v_swappgsin: 0 vm.stats.vm.v_swappgsout: 0 vm.stats.vm.v_vnodein: 0 vm.stats.vm.v_vnodeout: 0 vm.stats.vm.v_vnodepgsin: 0 vm.stats.vm.v_vnodepgsout: 0 vm.stats.vm.v_intrans: 0 vm.stats.vm.v_reactivated: 0 vm.stats.vm.v_pdwakeups: 0 vm.stats.vm.v_pdpages: 4 vm.stats.vm.v_pdshortfalls: 0 vm.stats.vm.v_tcached: 0 vm.stats.vm.v_dfree: 0 vm.stats.vm.v_pfree: 142 vm.stats.vm.v_tfree: 340 vm.stats.vm.v_page_size: 4096 vm.stats.vm.v_page_count: 179753 vm.stats.vm.v_free_reserved: 284 vm.stats.vm.v_free_target: 3872 vm.stats.vm.v_free_min: 1181 vm.stats.vm.v_free_count: 176074 vm.stats.vm.v_wire_count: 3396 vm.stats.vm.v_active_count: 253 vm.stats.vm.v_inactive_target: 5808 vm.stats.vm.v_inactive_count: 29 vm.stats.vm.v_laundry_count: 0 vm.stats.vm.v_cache_count: 0 vm.stats.vm.v_pageout_free_min: 34 vm.stats.vm.v_interrupt_free_min: 2 vm.stats.vm.v_forks: 4 vm.stats.vm.v_vforks: 0 vm.stats.vm.v_rforks: 0 vm.stats.vm.v_kthreads: 20 vm.stats.vm.v_forkpages: 132 vm.stats.vm.v_vforkpages: 0 vm.stats.vm.v_rforkpages: 0 vm.stats.vm.v_kthreadpages: 0 # Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r308746 - in head/sys/gnu/dts: include/dt-bindings/dma include/dt-bindings/net mips/ingenic
Author: br
Date: Thu Nov 17 11:31:13 2016
New Revision: 308746
URL: https://svnweb.freebsd.org/changeset/base/308746
Log:
Import Ingenic CI20 (jz4780) DTS files.
Submitted by: kan
Sponsored by: DARPA, AFRL
Added:
head/sys/gnu/dts/include/dt-bindings/dma/jz4780-dma.h (contents, props
changed)
head/sys/gnu/dts/include/dt-bindings/net/rfkill-regulator.h (contents,
props changed)
head/sys/gnu/dts/mips/ingenic/
head/sys/gnu/dts/mips/ingenic/ci20.dts (contents, props changed)
head/sys/gnu/dts/mips/ingenic/jz4780.dtsi (contents, props changed)
Added: head/sys/gnu/dts/include/dt-bindings/dma/jz4780-dma.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/gnu/dts/include/dt-bindings/dma/jz4780-dma.h Thu Nov 17
11:31:13 2016(r308746)
@@ -0,0 +1,49 @@
+#ifndef __DT_BINDINGS_DMA_JZ4780_DMA_H__
+#define __DT_BINDINGS_DMA_JZ4780_DMA_H__
+
+/*
+ * Request type numbers for the JZ4780 DMA controller (written to the DRTn
+ * register for the channel).
+ */
+#define JZ4780_DMA_I2S1_TX 0x4
+#define JZ4780_DMA_I2S1_RX 0x5
+#define JZ4780_DMA_I2S0_TX 0x6
+#define JZ4780_DMA_I2S0_RX 0x7
+#define JZ4780_DMA_AUTO0x8
+#define JZ4780_DMA_SADC_RX 0x9
+#define JZ4780_DMA_UART4_TX0xc
+#define JZ4780_DMA_UART4_RX0xd
+#define JZ4780_DMA_UART3_TX0xe
+#define JZ4780_DMA_UART3_RX0xf
+#define JZ4780_DMA_UART2_TX0x10
+#define JZ4780_DMA_UART2_RX0x11
+#define JZ4780_DMA_UART1_TX0x12
+#define JZ4780_DMA_UART1_RX0x13
+#define JZ4780_DMA_UART0_TX0x14
+#define JZ4780_DMA_UART0_RX0x15
+#define JZ4780_DMA_SSI0_TX 0x16
+#define JZ4780_DMA_SSI0_RX 0x17
+#define JZ4780_DMA_SSI1_TX 0x18
+#define JZ4780_DMA_SSI1_RX 0x19
+#define JZ4780_DMA_MSC0_TX 0x1a
+#define JZ4780_DMA_MSC0_RX 0x1b
+#define JZ4780_DMA_MSC1_TX 0x1c
+#define JZ4780_DMA_MSC1_RX 0x1d
+#define JZ4780_DMA_MSC2_TX 0x1e
+#define JZ4780_DMA_MSC2_RX 0x1f
+#define JZ4780_DMA_PCM0_TX 0x20
+#define JZ4780_DMA_PCM0_RX 0x21
+#define JZ4780_DMA_SMB0_TX 0x24
+#define JZ4780_DMA_SMB0_RX 0x25
+#define JZ4780_DMA_SMB1_TX 0x26
+#define JZ4780_DMA_SMB1_RX 0x27
+#define JZ4780_DMA_SMB2_TX 0x28
+#define JZ4780_DMA_SMB2_RX 0x29
+#define JZ4780_DMA_SMB3_TX 0x2a
+#define JZ4780_DMA_SMB3_RX 0x2b
+#define JZ4780_DMA_SMB4_TX 0x2c
+#define JZ4780_DMA_SMB4_RX 0x2d
+#define JZ4780_DMA_DES_TX 0x2e
+#define JZ4780_DMA_DES_RX 0x2f
+
+#endif /* __DT_BINDINGS_DMA_JZ4780_DMA_H__ */
Added: head/sys/gnu/dts/include/dt-bindings/net/rfkill-regulator.h
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/gnu/dts/include/dt-bindings/net/rfkill-regulator.h Thu Nov 17
11:31:13 2016(r308746)
@@ -0,0 +1,23 @@
+/*
+ * This header provides macros for rfkill-regulator bindings.
+ *
+ * Copyright (C) 2014 Marek Belisko
+ *
+ * GPLv2 only
+ */
+
+#ifndef __DT_BINDINGS_RFKILL_REGULATOR_H__
+#define __DT_BINDINGS_RFKILL_REGULATOR_H__
+
+
+#define RFKILL_TYPE_ALL(0)
+#define RFKILL_TYPE_WLAN (1)
+#define RFKILL_TYPE_BLUETOOTH (2)
+#define RFKILL_TYPE_UWB(3)
+#define RFKILL_TYPE_WIMAX (4)
+#define RFKILL_TYPE_WWAN (5)
+#define RFKILL_TYPE_GPS(6)
+#define RFKILL_TYPE_FM (7)
+#define RFKILL_TYPE_NFC(8)
+
+#endif /* __DT_BINDINGS_RFKILL_REGULATOR_H__ */
Added: head/sys/gnu/dts/mips/ingenic/ci20.dts
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/gnu/dts/mips/ingenic/ci20.dts Thu Nov 17 11:31:13 2016
(r308746)
@@ -0,0 +1,395 @@
+/dts-v1/;
+#include
+#include
+#include "jz4780.dtsi"
+
+/ {
+ compatible = "imgtec,ci20", "ingenic,jz4780";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ };
+
+ chosen {
+ stdout-path = &uart4;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x1000
+ 0x3000 0x3000>;
+ };
+
+ audio: audio-ci20 {
+ compatible = "ingenic,ci20-audio";
+ ingenic,i2s-controller = <&i2s>;
+ ingenic,codec = <&codec>;
+ };
+
+ eth0_power: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "eth0_power";
+ gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
+
+ hdmi_power: fixedregulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "hdmi_power";
+ gpio = <
svn commit: r308747 - in head/sys: conf dev/dme
Author: br
Date: Thu Nov 17 11:48:07 2016
New Revision: 308747
URL: https://svnweb.freebsd.org/changeset/base/308747
Log:
Add driver for DM9000 Ethernet MAC Controller.
This device found in the Ingenic jz4780 SoC.
Submitted by: kan
Sponsored by: DARPA, AFRL
Added:
head/sys/dev/dme/
head/sys/dev/dme/if_dme.c (contents, props changed)
head/sys/dev/dme/if_dmereg.h (contents, props changed)
head/sys/dev/dme/if_dmevar.h (contents, props changed)
Modified:
head/sys/conf/files
Modified: head/sys/conf/files
==
--- head/sys/conf/files Thu Nov 17 11:31:13 2016(r308746)
+++ head/sys/conf/files Thu Nov 17 11:48:07 2016(r308747)
@@ -1402,6 +1402,7 @@ dev/dcons/dcons.c optional dcons
dev/dcons/dcons_crom.c optional dcons_crom
dev/dcons/dcons_os.c optional dcons
dev/de/if_de.c optional de pci
+dev/dme/if_dme.c optional dme
dev/dpt/dpt_eisa.c optional dpt eisa
dev/dpt/dpt_pci.c optional dpt pci
dev/dpt/dpt_scsi.c optional dpt
Added: head/sys/dev/dme/if_dme.c
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/dev/dme/if_dme.c Thu Nov 17 11:48:07 2016(r308747)
@@ -0,0 +1,1070 @@
+/*
+ * Copyright (C) 2015 Alexander Kabaev
+ * Copyright (C) 2010 Andrew Turner
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * A driver for the DM9000 MAC
+ *
+ * TODO:
+ * Get the interrupt working
+ * Port to non-S3C2440 systems
+ * Test with 8 and 32 bit busses
+ * Test on a big endian machine
+ * Implement the rest of dme_detach
+ */
+
+#include
+__FBSDID("$FreeBSD$");
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+
+#include
+#include
+
+#include "miibus_if.h"
+
+struct dme_softc {
+ struct ifnet*dme_ifp;
+ device_tdme_dev;
+ device_tdme_miibus;
+ bus_space_handle_t dme_handle;
+ bus_space_tag_t dme_tag;
+ int dme_rev;
+ int dme_bits;
+ struct resource *dme_res;
+ struct resource *dme_irq;
+ void*dme_intrhand;
+ struct mtx dme_mtx;
+ struct callout dme_tick_ch;
+ struct gpiobus_pin *gpio_rset;
+ uint32_tdme_ticks;
+ uint8_t dme_macaddr[ETHER_ADDR_LEN];
+ regulator_t dme_vcc_regulator;
+ uint8_t dme_txbusy: 1;
+ uint8_t dme_txready: 1;
+ uint16_tdme_txlen;
+};
+
+#define DME_CHIP_DM90000x00
+#define DME_CHIP_DM9000A 0x19
+#define DME_CHIP_DM9000B 0x1a
+
+#define DME_INT_PHY1
+
+static int dme_probe(device_t);
+static int dme_attach(device_t);
+static int dme_detach(device_t);
+
+static void dme_intr(void *arg);
+static void dme_init_locked(struct dme_softc *);
+
+static void dme_prepare(struct dme_softc *);
+static void dme_transmit(struct dme_softc *);
+
+static int dme_miibus_writereg(device_t dev, int phy, int reg, int data);
+static int dme_miibus_readreg(device_t dev, int phy, int reg);
+
+/* The bit on the address bus attached to the CMD pin */
+#define BASE_AD
svn commit: r308750 - in head/sys/dev: ic uart
Author: br
Date: Thu Nov 17 14:41:22 2016
New Revision: 308750
URL: https://svnweb.freebsd.org/changeset/base/308750
Log:
Add support for UART found in the Ingenic XBurst system on chips.
These CPUs has non-standard UART enable bit hidden in the UART FIFO
Control Register.
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/ic/ns16550.h
head/sys/dev/uart/uart_dev_ns8250.c
Modified: head/sys/dev/ic/ns16550.h
==
--- head/sys/dev/ic/ns16550.h Thu Nov 17 14:32:23 2016(r308749)
+++ head/sys/dev/ic/ns16550.h Thu Nov 17 14:41:22 2016(r308750)
@@ -156,6 +156,9 @@
#defineFIFO_XMT_RSTFCR_XMT_RST
#defineFCR_DMA 0x08
#defineFIFO_DMA_MODE FCR_DMA
+#ifdef CPU_XBURST
+#defineFCR_UART_ON 0x10
+#endif
#defineFCR_RX_LOW 0x00
#defineFIFO_RX_LOW FCR_RX_LOW
#defineFCR_RX_MEDL 0x40
Modified: head/sys/dev/uart/uart_dev_ns8250.c
==
--- head/sys/dev/uart/uart_dev_ns8250.c Thu Nov 17 14:32:23 2016
(r308749)
+++ head/sys/dev/uart/uart_dev_ns8250.c Thu Nov 17 14:41:22 2016
(r308750)
@@ -198,6 +198,9 @@ ns8250_flush(struct uart_bas *bas, int w
uint8_t fcr;
fcr = FCR_ENABLE;
+#ifdef CPU_XBURST
+ fcr |= FCR_UART_ON;
+#endif
if (what & UART_FLUSH_TRANSMITTER)
fcr |= FCR_XMT_RST;
if (what & UART_FLUSH_RECEIVER)
@@ -268,6 +271,10 @@ ns8250_probe(struct uart_bas *bas)
{
u_char val;
+#ifdef CPU_XBURST
+ uart_setreg(bas, REG_FCR, FCR_UART_ON);
+#endif
+
/* Check known 0 bits that don't depend on DLAB. */
val = uart_getreg(bas, REG_IIR);
if (val & 0x30)
@@ -289,7 +296,7 @@ static void
ns8250_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
int parity)
{
- u_char ier;
+ u_char ier, val;
if (bas->rclk == 0)
bas->rclk = DEFAULT_RCLK;
@@ -306,7 +313,11 @@ ns8250_init(struct uart_bas *bas, int ba
uart_barrier(bas);
/* Disable the FIFO (if present). */
- uart_setreg(bas, REG_FCR, 0);
+ val = 0;
+#ifdef CPU_XBURST
+ val = FCR_UART_ON;
+#endif
+ uart_setreg(bas, REG_FCR, val);
uart_barrier(bas);
/* Set RTS & DTR. */
@@ -461,6 +472,9 @@ ns8250_bus_attach(struct uart_softc *sc)
ns8250->mcr = uart_getreg(bas, REG_MCR);
ns8250->fcr = FCR_ENABLE;
+#ifdef CPU_XBURST
+ ns8250->fcr |= FCR_UART_ON;
+#endif
if (!resource_int_value("uart", device_get_unit(sc->sc_dev), "flags",
&ivar)) {
if (UART_FLAGS_FCR_RX_LOW(ivar))
@@ -753,6 +767,7 @@ ns8250_bus_probe(struct uart_softc *sc)
struct uart_bas *bas;
int count, delay, error, limit;
uint8_t lsr, mcr, ier;
+ uint8_t val;
ns8250 = (struct ns8250_softc *)sc;
bas = &sc->sc_bas;
@@ -786,7 +801,11 @@ ns8250_bus_probe(struct uart_softc *sc)
* done. Since this is the first time we enable the FIFOs, we reset
* them.
*/
- uart_setreg(bas, REG_FCR, FCR_ENABLE);
+ val = FCR_ENABLE;
+#ifdef CPU_XBURST
+ val |= FCR_UART_ON;
+#endif
+ uart_setreg(bas, REG_FCR, val);
uart_barrier(bas);
if (!(uart_getreg(bas, REG_IIR) & IIR_FIFO_MASK)) {
/*
@@ -800,7 +819,11 @@ ns8250_bus_probe(struct uart_softc *sc)
return (0);
}
- uart_setreg(bas, REG_FCR, FCR_ENABLE | FCR_XMT_RST | FCR_RCV_RST);
+ val = FCR_ENABLE | FCR_XMT_RST | FCR_RCV_RST;
+#ifdef CPU_XBURST
+ val |= FCR_UART_ON;
+#endif
+ uart_setreg(bas, REG_FCR, val);
uart_barrier(bas);
count = 0;
@@ -810,7 +833,11 @@ ns8250_bus_probe(struct uart_softc *sc)
error = ns8250_drain(bas, UART_DRAIN_RECEIVER|UART_DRAIN_TRANSMITTER);
if (error) {
uart_setreg(bas, REG_MCR, mcr);
- uart_setreg(bas, REG_FCR, 0);
+ val = 0;
+#ifdef CPU_XBURST
+ val |= FCR_UART_ON;
+#endif
+ uart_setreg(bas, REG_FCR, val);
uart_barrier(bas);
goto describe;
}
@@ -840,7 +867,11 @@ ns8250_bus_probe(struct uart_softc *sc)
ier = uart_getreg(bas, REG_IER) & ns8250->ier_mask;
uart_setreg(bas, REG_IER, ier);
uart_setreg(bas, REG_MCR, mcr);
- uart_setreg(bas, REG_FCR, 0);
+ val = 0;
+#ifdef CPU_XBURST
+ val |= FCR_UART_ON;
+#endif
+ uart_setreg(bas, REG_FCR, val);
uart_barrier(bas);
count = 0;
goto describe;
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svn commit: r308751 - head/sys/dev/dme
Author: br
Date: Thu Nov 17 14:43:13 2016
New Revision: 308751
URL: https://svnweb.freebsd.org/changeset/base/308751
Log:
Remove outdated comment.
Pointed out by: andrew (original author)
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/dme/if_dme.c
Modified: head/sys/dev/dme/if_dme.c
==
--- head/sys/dev/dme/if_dme.c Thu Nov 17 14:41:22 2016(r308750)
+++ head/sys/dev/dme/if_dme.c Thu Nov 17 14:43:13 2016(r308751)
@@ -25,16 +25,7 @@
* SUCH DAMAGE.
*/
-/*
- * A driver for the DM9000 MAC
- *
- * TODO:
- * Get the interrupt working
- * Port to non-S3C2440 systems
- * Test with 8 and 32 bit busses
- * Test on a big endian machine
- * Implement the rest of dme_detach
- */
+/* A driver for the Davicom DM9000 MAC. */
#include
__FBSDID("$FreeBSD$");
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svn commit: r308752 - head/sys/dev/usb/controller
Author: br
Date: Thu Nov 17 15:08:30 2016
New Revision: 308752
URL: https://svnweb.freebsd.org/changeset/base/308752
Log:
Allow operation with UTMI+ phy.
Submitted by: kan
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/usb/controller/dwc_otg.c
head/sys/dev/usb/controller/dwc_otg.h
Modified: head/sys/dev/usb/controller/dwc_otg.c
==
--- head/sys/dev/usb/controller/dwc_otg.c Thu Nov 17 14:43:13 2016
(r308751)
+++ head/sys/dev/usb/controller/dwc_otg.c Thu Nov 17 15:08:30 2016
(r308752)
@@ -98,10 +98,6 @@
GINTSTS_WKUPINT | GINTSTS_USBSUSP | GINTMSK_OTGINTMSK | \
GINTSTS_SESSREQINT)
-#defineDWC_OTG_PHY_ULPI 0
-#defineDWC_OTG_PHY_HSIC 1
-#defineDWC_OTG_PHY_INTERNAL 2
-
#ifndef DWC_OTG_PHY_DEFAULT
#defineDWC_OTG_PHY_DEFAULT DWC_OTG_PHY_ULPI
#endif
@@ -110,10 +106,10 @@ static int dwc_otg_phy_type = DWC_OTG_PH
static SYSCTL_NODE(_hw_usb, OID_AUTO, dwc_otg, CTLFLAG_RW, 0, "USB DWC OTG");
SYSCTL_INT(_hw_usb_dwc_otg, OID_AUTO, phy_type, CTLFLAG_RDTUN,
-&dwc_otg_phy_type, 0, "DWC OTG PHY TYPE - 0/1/2 - ULPI/HSIC/INTERNAL");
+&dwc_otg_phy_type, 0, "DWC OTG PHY TYPE - 0/1/2/3 -
ULPI/HSIC/INTERNAL/UTMI+");
#ifdef USB_DEBUG
-static int dwc_otg_debug;
+static int dwc_otg_debug = 0;
SYSCTL_INT(_hw_usb_dwc_otg, OID_AUTO, debug, CTLFLAG_RWTUN,
&dwc_otg_debug, 0, "DWC OTG debug level");
@@ -3889,8 +3885,13 @@ dwc_otg_init(struct dwc_otg_softc *sc)
break;
}
- /* select HSIC, ULPI or internal PHY mode */
- switch (dwc_otg_phy_type) {
+ if (sc->sc_phy_type == 0)
+ sc->sc_phy_type = dwc_otg_phy_type + 1;
+ if (sc->sc_phy_bits == 0)
+ sc->sc_phy_bits = 16;
+
+ /* select HSIC, ULPI, UTMI+ or internal PHY mode */
+ switch (sc->sc_phy_type) {
case DWC_OTG_PHY_HSIC:
DWC_OTG_WRITE_4(sc, DOTG_GUSBCFG,
GUSBCFG_PHYIF |
@@ -3914,6 +3915,16 @@ dwc_otg_init(struct dwc_otg_softc *sc)
DWC_OTG_WRITE_4(sc, DOTG_GLPMCFG,
temp & ~GLPMCFG_HSIC_CONN);
break;
+ case DWC_OTG_PHY_UTMI:
+ DWC_OTG_WRITE_4(sc, DOTG_GUSBCFG,
+ (sc->sc_phy_bits == 16 ? GUSBCFG_PHYIF : 0) |
+ GUSBCFG_TRD_TIM_SET(5) | temp);
+ DWC_OTG_WRITE_4(sc, DOTG_GOTGCTL, 0);
+
+ temp = DWC_OTG_READ_4(sc, DOTG_GLPMCFG);
+ DWC_OTG_WRITE_4(sc, DOTG_GLPMCFG,
+ temp & ~GLPMCFG_HSIC_CONN);
+ break;
case DWC_OTG_PHY_INTERNAL:
DWC_OTG_WRITE_4(sc, DOTG_GUSBCFG,
GUSBCFG_PHYSEL |
Modified: head/sys/dev/usb/controller/dwc_otg.h
==
--- head/sys/dev/usb/controller/dwc_otg.h Thu Nov 17 14:43:13 2016
(r308751)
+++ head/sys/dev/usb/controller/dwc_otg.h Thu Nov 17 15:08:30 2016
(r308752)
@@ -191,6 +191,13 @@ struct dwc_otg_softc {
uint16_t sc_active_rx_ep;
uint16_t sc_last_frame_num;
+ uint8_t sc_phy_type;
+ uint8_t sc_phy_bits;
+#defineDWC_OTG_PHY_ULPI 1
+#defineDWC_OTG_PHY_HSIC 2
+#defineDWC_OTG_PHY_INTERNAL 3
+#defineDWC_OTG_PHY_UTMI 4
+
uint8_t sc_timer_active;
uint8_t sc_dev_ep_max;
uint8_t sc_dev_in_ep_max;
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svn commit: r308755 - head/sys/dev/usb/controller
Author: br
Date: Thu Nov 17 15:12:03 2016
New Revision: 308755
URL: https://svnweb.freebsd.org/changeset/base/308755
Log:
Declare dwc_otg_detach as non-static (same as dwc_otg_attach),
so it can be called from fdt-glue drivers.
Submitted by: kan
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/usb/controller/dwc_otg_fdt.c
head/sys/dev/usb/controller/dwc_otg_fdt.h
Modified: head/sys/dev/usb/controller/dwc_otg_fdt.c
==
--- head/sys/dev/usb/controller/dwc_otg_fdt.c Thu Nov 17 15:10:52 2016
(r308754)
+++ head/sys/dev/usb/controller/dwc_otg_fdt.c Thu Nov 17 15:12:03 2016
(r308755)
@@ -56,7 +56,6 @@ __FBSDID("$FreeBSD$");
#include
static device_probe_t dwc_otg_probe;
-static device_detach_t dwc_otg_detach;
static int
dwc_otg_probe(device_t dev)
@@ -159,7 +158,7 @@ error:
return (ENXIO);
}
-static int
+int
dwc_otg_detach(device_t dev)
{
struct dwc_otg_fdt_softc *sc = device_get_softc(dev);
Modified: head/sys/dev/usb/controller/dwc_otg_fdt.h
==
--- head/sys/dev/usb/controller/dwc_otg_fdt.h Thu Nov 17 15:10:52 2016
(r308754)
+++ head/sys/dev/usb/controller/dwc_otg_fdt.h Thu Nov 17 15:12:03 2016
(r308755)
@@ -35,5 +35,6 @@ struct dwc_otg_fdt_softc {
extern driver_t dwc_otg_driver;
device_attach_t dwc_otg_attach;
+device_attach_t dwc_otg_detach;
#endif
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svn commit: r308767 - head/sys/dev/gpio
Author: br
Date: Thu Nov 17 15:37:44 2016
New Revision: 308767
URL: https://svnweb.freebsd.org/changeset/base/308767
Log:
Make gpiobus early driver at BUS_PAS_BUS.
The gpiobus driver is attached explicitly and generally should be
at the same pass as its parent. Making it use BUS_PAS_BUS ensures
that it attaches immediately after parent adds it (assuming the
parent itself attached at BUS_PAS_BUS and above).
Submitted by: kan
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/gpio/gpiobus.c
Modified: head/sys/dev/gpio/gpiobus.c
==
--- head/sys/dev/gpio/gpiobus.c Thu Nov 17 15:25:26 2016(r308766)
+++ head/sys/dev/gpio/gpiobus.c Thu Nov 17 15:37:44 2016(r308767)
@@ -855,5 +855,6 @@ driver_t gpiobus_driver = {
devclass_t gpiobus_devclass;
-DRIVER_MODULE(gpiobus, gpio, gpiobus_driver, gpiobus_devclass, 0, 0);
+EARLY_DRIVER_MODULE(gpiobus, gpio, gpiobus_driver, gpiobus_devclass, 0, 0,
+BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
MODULE_VERSION(gpiobus, 1);
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svn commit: r308768 - head/sys/dev/uart
Author: br
Date: Thu Nov 17 16:06:53 2016
New Revision: 308768
URL: https://svnweb.freebsd.org/changeset/base/308768
Log:
Do not reallocate driver softc for uart unnecessarily.
Do not assume that all uart drivers use uart_softc structure as is.
Some do a sensible thing and do declare their uart class and driver
properly and arrive into uart_bus_attach with suitably sized softc.
Submitted by: kan
Sponsored by: DARPA, AFRL
Modified:
head/sys/dev/uart/uart_core.c
Modified: head/sys/dev/uart/uart_core.c
==
--- head/sys/dev/uart/uart_core.c Thu Nov 17 15:37:44 2016
(r308767)
+++ head/sys/dev/uart/uart_core.c Thu Nov 17 16:06:53 2016
(r308768)
@@ -573,7 +573,7 @@ uart_bus_attach(device_t dev)
* the device.
*/
sc0 = device_get_softc(dev);
- if (sc0->sc_class->size > sizeof(*sc)) {
+ if (sc0->sc_class->size > device_get_driver(dev)->size) {
sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
bcopy(sc0, sc, sizeof(*sc));
device_set_softc(dev, sc);
@@ -781,11 +781,10 @@ uart_bus_detach(device_t dev)
mtx_destroy(&sc->sc_hwmtx_s);
- if (sc->sc_class->size > sizeof(*sc)) {
+ if (sc->sc_class->size > device_get_driver(dev)->size) {
device_set_softc(dev, NULL);
free(sc, M_UART);
- } else
- device_set_softc(dev, NULL);
+ }
return (0);
}
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svn commit: r308769 - head/sys/kern
Author: br
Date: Thu Nov 17 16:13:30 2016
New Revision: 308769
URL: https://svnweb.freebsd.org/changeset/base/308769
Log:
Fix build when no INET and INET6 in kernel config.
Submitted by: kan
Sponsored by: DARPA, AFRL
Modified:
head/sys/kern/vfs_export.c
Modified: head/sys/kern/vfs_export.c
==
--- head/sys/kern/vfs_export.c Thu Nov 17 16:06:53 2016(r308768)
+++ head/sys/kern/vfs_export.c Thu Nov 17 16:13:30 2016(r308769)
@@ -61,8 +61,10 @@ __FBSDID("$FreeBSD$");
static MALLOC_DEFINE(M_NETADDR, "export_host", "Export host address
structure");
+#if defined(INET) || defined(INET6)
static struct radix_node_head *vfs_create_addrlist_af(
struct radix_node_head **prnh, int off);
+#endif
static voidvfs_free_addrlist(struct netexport *nep);
static int vfs_free_netcred(struct radix_node *rn, void *w);
static voidvfs_free_addrlist_af(struct radix_node_head **prnh);
@@ -239,6 +241,7 @@ vfs_free_netcred(struct radix_node *rn,
return (0);
}
+#if defined(INET) || defined(INET6)
static struct radix_node_head *
vfs_create_addrlist_af(struct radix_node_head **prnh, int off)
{
@@ -248,6 +251,7 @@ vfs_create_addrlist_af(struct radix_node
RADIX_NODE_HEAD_LOCK_INIT(*prnh);
return (*prnh);
}
+#endif
static void
vfs_free_addrlist_af(struct radix_node_head **prnh)
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Re: svn commit: r308691 - in head/sys: cddl/compat/opensolaris/sys cddl/contrib/opensolaris/uts/common/fs/zfs fs/tmpfs kern vm
On Thu, Nov 17, 2016 at 10:51:40AM -0600, Alan Cox wrote:
> On 11/16/2016 11:52, Ruslan Bukin wrote:
> > On Wed, Nov 16, 2016 at 04:59:39PM +0000, Ruslan Bukin wrote:
> >> On Wed, Nov 16, 2016 at 06:53:43PM +0200, Konstantin Belousov wrote:
> >>> On Wed, Nov 16, 2016 at 01:37:18PM +, Ruslan Bukin wrote:
> >>>> I have a panic with this on RISC-V. Any ideas ?
> >>> How did you checked that the revision you replied to, makes the problem ?
> >>> Note that the backtrace below is not reasonable.
> >> I reverted this commit like that and rebuilt kernel:
> >> git show 2fa36073055134deb2df39c7ca46264cfc313d77 | patch -p1 -R
> >>
> >> So the problem is reproducible on dual-core with 32mb mdroot.
> >>
> > I just found another interesting behavior:
> > depending on amount of physical memory :
> > 700m - panic
> > 800m - works fine
> > 1024m - panic
>
> I think that this behavior is not inconsistent with your report of the
> system crashing if you enabled two cores but not one. Specifically,
> changing the number of active cores will slightly affect the amount of
> memory that is allocated during initialization.
>
> There is nothing unusual in the sysctl output that you sent out.
>
> I have two suggestions. Try these in order.
>
> 1. r308691 reduced the size of struct vm_object. Try undoing the one
> snippet that reduced the vm object size and see if that makes a difference.
>
>
> @@ -118,7 +118,6 @@
> vm_ooffset_t backing_object_offset;/* Offset in backing object */
> TAILQ_ENTRY(vm_object) pager_object_list; /* list of all objects of
> this pager type */
> LIST_HEAD(, vm_reserv) rvq; /* list of reservations */
> - struct vm_radix cache; /* (o + f) root of the cache page radix
> trie */
> void *handle;
> union {
> /*
>
>
> 2. I'd like to know if vm_page_scan_contig() is being called.
>
> Finally, to simply the situation a little, I would suggest that you
> disable superpage reservations in vmparam.h. You have no need for them.
>
>
I made another one merge from svn-head and problem disappeared for 700m,1024m
of physical memory, but now I able to reproduce it with 900m of physical memory.
Restoring 'struct vm_radix cache' in struct vm_object gives no behavior changes.
Adding a panic() call to vm_page_scan_contig gives an original panic (so
vm_page_scan_contig is not called),
it looks like size of function is changed and it unhides the original problem.
Disable superpage reservations changes behavior and gives same panic on 1024m
boot.
Finally, if I comment ruxagg call in kern_resource then I can't reproduce the
problem any more with any amount of memory in any setup:
--- a/sys/kern/kern_resource.c
+++ b/sys/kern/kern_resource.c
@@ -1063,7 +1063,7 @@ rufetch(struct proc *p, struct rusage *ru)
*ru = p->p_ru;
if (p->p_numthreads > 0) {
FOREACH_THREAD_IN_PROC(p, td) {
- ruxagg(p, td);
+ //ruxagg(p, td);
rucollect(ru, &td->td_ru);
}
}
I found this patch in my early RISC-V development directory, so it looks the
problem persist whole the freebsd/riscv life, but was hidden until now.
Ruslan
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Re: svn commit: r308691 - in head/sys: cddl/compat/opensolaris/sys cddl/contrib/opensolaris/uts/common/fs/zfs fs/tmpfs kern vm
On Fri, Nov 18, 2016 at 12:37:28PM +0200, Konstantin Belousov wrote:
> On Fri, Nov 18, 2016 at 10:22:35AM +0000, Ruslan Bukin wrote:
> > On Thu, Nov 17, 2016 at 10:51:40AM -0600, Alan Cox wrote:
> > > On 11/16/2016 11:52, Ruslan Bukin wrote:
> > > > On Wed, Nov 16, 2016 at 04:59:39PM +, Ruslan Bukin wrote:
> > > >> On Wed, Nov 16, 2016 at 06:53:43PM +0200, Konstantin Belousov wrote:
> > > >>> On Wed, Nov 16, 2016 at 01:37:18PM +, Ruslan Bukin wrote:
> > > >>>> I have a panic with this on RISC-V. Any ideas ?
> > > >>> How did you checked that the revision you replied to, makes the
> > > >>> problem ?
> > > >>> Note that the backtrace below is not reasonable.
> > > >> I reverted this commit like that and rebuilt kernel:
> > > >> git show 2fa36073055134deb2df39c7ca46264cfc313d77 | patch -p1 -R
> > > >>
> > > >> So the problem is reproducible on dual-core with 32mb mdroot.
> > > >>
> > > > I just found another interesting behavior:
> > > > depending on amount of physical memory :
> > > > 700m - panic
> > > > 800m - works fine
> > > > 1024m - panic
> > >
> > > I think that this behavior is not inconsistent with your report of the
> > > system crashing if you enabled two cores but not one. Specifically,
> > > changing the number of active cores will slightly affect the amount of
> > > memory that is allocated during initialization.
> > >
> > > There is nothing unusual in the sysctl output that you sent out.
> > >
> > > I have two suggestions. Try these in order.
> > >
> > > 1. r308691 reduced the size of struct vm_object. Try undoing the one
> > > snippet that reduced the vm object size and see if that makes a
> > > difference.
> > >
> > >
> > > @@ -118,7 +118,6 @@
> > > vm_ooffset_t backing_object_offset;/* Offset in backing object */
> > > TAILQ_ENTRY(vm_object) pager_object_list; /* list of all objects of
> > > this pager type */
> > > LIST_HEAD(, vm_reserv) rvq; /* list of reservations */
> > > - struct vm_radix cache; /* (o + f) root of the cache page radix
> > > trie */
> > > void *handle;
> > > union {
> > > /*
> > >
> > >
> > > 2. I'd like to know if vm_page_scan_contig() is being called.
> > >
> > > Finally, to simply the situation a little, I would suggest that you
> > > disable superpage reservations in vmparam.h. You have no need for them.
> > >
> > >
> >
> > I made another one merge from svn-head and problem disappeared for
> > 700m,1024m of physical memory, but now I able to reproduce it with 900m of
> > physical memory.
> >
> > Restoring 'struct vm_radix cache' in struct vm_object gives no behavior
> > changes.
> >
> > Adding a panic() call to vm_page_scan_contig gives an original panic (so
> > vm_page_scan_contig is not called),
> > it looks like size of function is changed and it unhides the original
> > problem.
> >
> > Disable superpage reservations changes behavior and gives same panic on
> > 1024m boot.
> >
> > Finally, if I comment ruxagg call in kern_resource then I can't reproduce
> > the problem any more with any amount of memory in any setup:
> >
> > --- a/sys/kern/kern_resource.c
> > +++ b/sys/kern/kern_resource.c
> > @@ -1063,7 +1063,7 @@ rufetch(struct proc *p, struct rusage *ru)
> > *ru = p->p_ru;
> > if (p->p_numthreads > 0) {
> > FOREACH_THREAD_IN_PROC(p, td) {
> > - ruxagg(p, td);
> > + //ruxagg(p, td);
> > rucollect(ru, &td->td_ru);
> > }
> > }
> >
> > I found this patch in my early RISC-V development directory, so it looks
> > the problem persist whole the freebsd/riscv life, but was hidden until now.
> >
>
> If you comment out the rufetch() call in proc0_post(), does the problem go
> away as well ?
Yes it goes away as well (sys/kern/kern_resource.c reverted).
--- a/sys/kern/init_main.c
+++ b/sys/kern/init_main.c
@@ -591,7 +591,7 @@ proc0_post(void *dummy __unused)
{
struct timespec ts;
struct proc *p;
- struct rusage ru;
+ //struct rusage ru;
struct thread *td;
/*
@@ -602,7 +602,7 @@ proc0_p
svn commit: r308834 - head/sys/gnu/dts/mips/ingenic
Author: br
Date: Sat Nov 19 15:03:49 2016
New Revision: 308834
URL: https://svnweb.freebsd.org/changeset/base/308834
Log:
Add Ingenic X1000 DTS files (unofficial).
This is based on JZ4780 due to missing original X1000 parts.
Sponsored by: DARPA, AFRL
Added:
head/sys/gnu/dts/mips/ingenic/canna.dts (contents, props changed)
head/sys/gnu/dts/mips/ingenic/x1000.dtsi (contents, props changed)
Added: head/sys/gnu/dts/mips/ingenic/canna.dts
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/gnu/dts/mips/ingenic/canna.dts Sat Nov 19 15:03:49 2016
(r308834)
@@ -0,0 +1,42 @@
+/dts-v1/;
+#include
+#include
+#include "x1000.dtsi"
+
+/ {
+ compatible = "ingenic,x1000";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ };
+
+ chosen {
+ stdout-path = &uart2;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x200>; /* 32 MiB at 0x0 */
+ };
+};
+
+&ext {
+ clock-frequency = <4800>;
+};
+
+&msc0 {
+ bus-width = <4>;
+ max-frequency = <600>;
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_msc0_pa>;
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_uart2_dataplusflow>;
+};
Added: head/sys/gnu/dts/mips/ingenic/x1000.dtsi
==
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/gnu/dts/mips/ingenic/x1000.dtsiSat Nov 19 15:03:49 2016
(r308834)
@@ -0,0 +1,420 @@
+#include
+#include
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ingenic,x1000";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "ingenic,xburst";
+ reg = <0>;
+ };
+ };
+
+ cpuintc: cpuintc@0 {
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ compatible = "mti,cpu-interrupt-controller";
+ };
+
+ intc: intc@10001000 {
+ compatible = "ingenic,jz4780-intc";
+ reg = <0x10001000 0x50>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+ };
+
+ ext: ext {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+
+ rtc: rtc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+
+ cgu: jz4780-cgu@1000 {
+ compatible = "ingenic,jz4780-cgu";
+ reg = <0x1000 0x100>;
+
+ clocks = <&ext>, <&rtc>;
+ clock-names = "ext", "rtc";
+
+ #clock-cells = <1>;
+ };
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <>;
+
+ tcu@0x10002000 {
+ compatible = "ingenic,jz4780-tcu";
+ reg = <0x10002000 0x140>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <27 26 25>;
+ };
+
+ watchdog: jz47xx-watchdog@0x10002000 {
+ compatible = "ingenic,jz4780-watchdog";
+ reg = <0x10002000 0x100>;
+
+ clocks = <&rtc>;
+ clock-names = "rtc";
+ };
+
+ rtcdev: rtcdev@10003000 {
+ compatible = "ingenic,jz4780-rtc";
+ reg = <0x10003000 0x4c>;
+ interrupt-parent = <&intc>;
+ interrupts = <32>;
+ };
+
+ i2s: i2s@1002 {
+ compatible = "ingenic,jz4780-i2s";
+ reg = <0x1002 0x94>;
+
+ clocks = <&cgu JZ4780_CLK_AIC>, <&cgu
JZ4780_CLK_I2SPLL>;
+ clock-names = "aic", "i2s";
+
+ dmas = <&dma 0 JZ4780_DMA_I2S0_RX 0x>, <&dma
JZ4780_DMA_I2S0_TX 0 0x>;
+ dma-names = "rx" , "tx";
+
+ };
+
+ codec: codec@100200a4 {
+ compatible = "ingenic,jz4780-codec";
+ reg = <0x100200a4 0x8>;
+
+ clocks = <&cgu JZ4780_CLK_I2SPLL>;
+ clock-names = "i2s";
+
+ };
+
+ pinctrl@0x1001 {
+
svn commit: r308835 - in head/sys/mips: include mips
Author: br
Date: Sat Nov 19 15:10:10 2016
New Revision: 308835
URL: https://svnweb.freebsd.org/changeset/base/308835
Log:
Identify Ingenic CPUs.
Submitted by: kan
Sponsored by: DARPA, AFRL
Modified:
head/sys/mips/include/locore.h
head/sys/mips/mips/cpu.c
Modified: head/sys/mips/include/locore.h
==
--- head/sys/mips/include/locore.h Sat Nov 19 15:03:49 2016
(r308834)
+++ head/sys/mips/include/locore.h Sat Nov 19 15:10:10 2016
(r308835)
@@ -59,6 +59,9 @@
#defineMIPS_PRID_CID_LEXRA 0x0b/* Lexra */
#defineMIPS_PRID_CID_RMI 0x0c/* RMI */
#defineMIPS_PRID_CID_CAVIUM0x0d/* Cavium */
+#defineMIPS_PRID_CID_INGENIC 0xe1/* Ingenic */
+#defineMIPS_PRID_CID_INGENIC2 0xd1/* Ingenic */
+
#defineMIPS_PRID_COPTS(x) (((x) >> 24) & 0x00ff) /* Company
Options */
#endif /* _MIPS_LOCORE_H */
Modified: head/sys/mips/mips/cpu.c
==
--- head/sys/mips/mips/cpu.cSat Nov 19 15:03:49 2016(r308834)
+++ head/sys/mips/mips/cpu.cSat Nov 19 15:10:10 2016(r308835)
@@ -373,6 +373,10 @@ cpu_identify(void)
case MIPS_PRID_CID_CAVIUM:
printf("Cavium");
break;
+ case MIPS_PRID_CID_INGENIC:
+ case MIPS_PRID_CID_INGENIC2:
+ printf("Ingenic XBurst");
+ break;
case MIPS_PRID_CID_PREHISTORIC:
default:
printf("Unknown cid %#x", cpuinfo.cpu_vendor);
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svn commit: r308839 - head/sys/mips/include
Author: br Date: Sat Nov 19 15:38:13 2016 New Revision: 308839 URL: https://svnweb.freebsd.org/changeset/base/308839 Log: Add Ingenic XBurst coprocessor 0 extra bits. Submitted by: kan Sponsored by: DARPA, AFRL Modified: head/sys/mips/include/cpufunc.h head/sys/mips/include/cpuregs.h Modified: head/sys/mips/include/cpufunc.h == --- head/sys/mips/include/cpufunc.h Sat Nov 19 15:37:12 2016 (r308838) +++ head/sys/mips/include/cpufunc.h Sat Nov 19 15:38:13 2016 (r308839) @@ -279,6 +279,13 @@ MIPS_RW32_COP0(entrylo1, MIPS_COP_0_TLB_ MIPS_RW32_COP0(prid, MIPS_COP_0_PRID); /* XXX 64-bit? */ MIPS_RW32_COP0_SEL(ebase, MIPS_COP_0_PRID, 1); +#ifdef CPU_XBURST +MIPS_RW32_COP0_SEL(xburst_mbox0, MIPS_COP_0_XBURST_MBOX, 0); +MIPS_RW32_COP0_SEL(xburst_mbox1, MIPS_COP_0_XBURST_MBOX, 1); +MIPS_RW32_COP0_SEL(xburst_core_ctl, MIPS_COP_0_XBURST_C12, 2); +MIPS_RW32_COP0_SEL(xburst_core_sts, MIPS_COP_0_XBURST_C12, 3); +MIPS_RW32_COP0_SEL(xburst_reim, MIPS_COP_0_XBURST_C12, 4); +#endif MIPS_RW32_COP0(watchlo, MIPS_COP_0_WATCH_LO); MIPS_RW32_COP0_SEL(watchlo1, MIPS_COP_0_WATCH_LO, 1); MIPS_RW32_COP0_SEL(watchlo2, MIPS_COP_0_WATCH_LO, 2); Modified: head/sys/mips/include/cpuregs.h == --- head/sys/mips/include/cpuregs.h Sat Nov 19 15:37:12 2016 (r308838) +++ head/sys/mips/include/cpuregs.h Sat Nov 19 15:38:13 2016 (r308839) @@ -522,12 +522,18 @@ #defineMIPS_COP_0_COUNT_(9) #defineMIPS_COP_0_COMPARE _(11) - +#ifdef CPU_XBURST +#defineMIPS_COP_0_XBURST_C12 _(12) +#endif #defineMIPS_COP_0_CONFIG _(16) #defineMIPS_COP_0_LLADDR _(17) #defineMIPS_COP_0_WATCH_LO _(18) #defineMIPS_COP_0_WATCH_HI _(19) #defineMIPS_COP_0_TLB_XCONTEXT _(20) +#ifdef CPU_XBURST +#defineMIPS_COP_0_XBURST_MBOX _(20) +#endif + #defineMIPS_COP_0_ECC _(26) #defineMIPS_COP_0_CACHE_ERR_(27) #defineMIPS_COP_0_TAG_LO _(28) ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r308841 - head/sys/dev/ic
Author: br Date: Sat Nov 19 16:00:05 2016 New Revision: 308841 URL: https://svnweb.freebsd.org/changeset/base/308841 Log: Add receiver timeout interrupt enable bit implemented in some system on chips. Submitted by: kan Sponsored by: DARPA, AFRL Modified: head/sys/dev/ic/ns16550.h Modified: head/sys/dev/ic/ns16550.h == --- head/sys/dev/ic/ns16550.h Sat Nov 19 15:43:22 2016(r308840) +++ head/sys/dev/ic/ns16550.h Sat Nov 19 16:00:05 2016(r308841) @@ -45,8 +45,13 @@ #defineIER_ETXRDY 0x2 #defineIER_ERLS0x4 #defineIER_EMSC0x8 +/* + * Receive timeout interrupt enable. + * Implemented in Intel XScale, Ingenic XBurst. + */ +#defineIER_RXTMOUT 0x10 -#defineIER_BITS"\20\1ERXRDY\2ETXRDY\3ERLS\4EMSC" +#defineIER_BITS"\20\1ERXRDY\2ETXRDY\3ERLS\4EMSC\5RXTMOUT" #definecom_iir 2 /* interrupt identification register (R) */ #defineREG_IIR com_iir ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r308845 - in head/sys/mips: include mips
Author: br
Date: Sat Nov 19 16:36:38 2016
New Revision: 308845
URL: https://svnweb.freebsd.org/changeset/base/308845
Log:
Account for bigger secondary data cache line size.
Secondary data cache line size can be bigger than
primary data cache line size, so use biggest value
as a minimum alignment.
Submitted by: kan
Sponsored by: DARPA, AFRL
Modified:
head/sys/mips/include/cache.h
head/sys/mips/mips/busdma_machdep.c
head/sys/mips/mips/cache_mipsNN.c
Modified: head/sys/mips/include/cache.h
==
--- head/sys/mips/include/cache.h Sat Nov 19 16:23:54 2016
(r308844)
+++ head/sys/mips/include/cache.h Sat Nov 19 16:36:38 2016
(r308845)
@@ -161,6 +161,8 @@ extern struct mips_cache_ops mips_cache_
/* PRIMARY CACHE VARIABLES */
extern int mips_picache_linesize;
extern int mips_pdcache_linesize;
+extern int mips_sdcache_linesize;
+extern int mips_dcache_max_linesize;
#define__mco_noargs(prefix, x)
\
do { \
Modified: head/sys/mips/mips/busdma_machdep.c
==
--- head/sys/mips/mips/busdma_machdep.c Sat Nov 19 16:23:54 2016
(r308844)
+++ head/sys/mips/mips/busdma_machdep.c Sat Nov 19 16:36:38 2016
(r308845)
@@ -226,7 +226,7 @@ busdma_init(void *dummy)
/* Create a cache of buffers in standard (cacheable) memory. */
standard_allocator = busdma_bufalloc_create("buffer",
- mips_pdcache_linesize, /* minimum_alignment */
+ mips_dcache_max_linesize, /* minimum_alignment */
NULL, /* uma_alloc func */
NULL, /* uma_free func */
0); /* uma_zcreate_flags */
@@ -236,7 +236,7 @@ busdma_init(void *dummy)
* BUS_DMA_COHERENT flag.
*/
coherent_allocator = busdma_bufalloc_create("coherent",
- mips_pdcache_linesize, /* minimum_alignment */
+ mips_dcache_max_linesize, /* minimum_alignment */
busdma_bufalloc_alloc_uncacheable,
busdma_bufalloc_free_uncacheable,
0); /* uma_zcreate_flags */
@@ -1061,10 +1061,10 @@ _bus_dmamap_unload(bus_dma_tag_t dmat, b
static void
bus_dmamap_sync_buf(vm_offset_t buf, int len, bus_dmasync_op_t op, int aligned)
{
- char tmp_cl[mips_pdcache_linesize], tmp_clend[mips_pdcache_linesize];
+ char tmp_cl[mips_dcache_max_linesize],
tmp_clend[mips_dcache_max_linesize];
vm_offset_t buf_cl, buf_clend;
vm_size_t size_cl, size_clend;
- int cache_linesize_mask = mips_pdcache_linesize - 1;
+ int cache_linesize_mask = mips_dcache_max_linesize - 1;
/*
* dcache invalidation operates on cache line aligned addresses
@@ -1091,7 +1091,7 @@ bus_dmamap_sync_buf(vm_offset_t buf, int
buf_cl = buf & ~cache_linesize_mask;
size_cl = buf & cache_linesize_mask;
buf_clend = buf + len;
- size_clend = (mips_pdcache_linesize -
+ size_clend = (mips_dcache_max_linesize -
(buf_clend & cache_linesize_mask)) & cache_linesize_mask;
}
@@ -1123,7 +1123,7 @@ bus_dmamap_sync_buf(vm_offset_t buf, int
if (size_cl)
mips_dcache_wbinv_range(buf_cl, size_cl);
if (size_clend && (size_cl == 0 ||
-buf_clend - buf_cl > mips_pdcache_linesize))
+buf_clend - buf_cl > mips_dcache_max_linesize))
mips_dcache_wbinv_range(buf_clend, size_clend);
break;
@@ -1156,7 +1156,7 @@ bus_dmamap_sync_buf(vm_offset_t buf, int
if (size_cl)
mips_dcache_wbinv_range(buf_cl, size_cl);
if (size_clend && (size_cl == 0 ||
-buf_clend - buf_cl > mips_pdcache_linesize))
+buf_clend - buf_cl > mips_dcache_max_linesize))
mips_dcache_wbinv_range(buf_clend, size_clend);
break;
Modified: head/sys/mips/mips/cache_mipsNN.c
==
--- head/sys/mips/mips/cache_mipsNN.c Sat Nov 19 16:23:54 2016
(r308844)
+++ head/sys/mips/mips/cache_mipsNN.c Sat Nov 19 16:36:38 2016
(r308845)
@@ -97,6 +97,8 @@ xlp_sync(void)
*/
int mips_picache_linesize;
int mips_pdcache_linesize;
+int mips_sdcache_linesize;
+int mips_dcache_max_linesize;
static int picache_size;
static int picache_stride;
@@ -157,6 +159,10 @@ mipsNN_cache_init(struct mips_cpuinfo *
sdcache_size = cpuinfo->l2.dc_size;
sdcache_way_mask = cpuinfo->l2.dc_nways - 1;
+ mips_sdcache_linesize = cpuinfo->l2.dc_lin
svn commit: r308846 - in head/sys: conf mips/atheros/ar531x mips/broadcom mips/mediatek
Author: br
Date: Sat Nov 19 17:01:06 2016
New Revision: 308846
URL: https://svnweb.freebsd.org/changeset/base/308846
Log:
Move intrng includes to the main MIPS includes file.
Sponsored by: DARPA, AFRL
Modified:
head/sys/conf/files.mips
head/sys/mips/atheros/ar531x/files.ar5315
head/sys/mips/broadcom/files.broadcom
head/sys/mips/mediatek/files.mediatek
Modified: head/sys/conf/files.mips
==
--- head/sys/conf/files.mipsSat Nov 19 16:36:38 2016(r308845)
+++ head/sys/conf/files.mipsSat Nov 19 17:01:06 2016(r308846)
@@ -97,6 +97,13 @@ dev/hwpmc/hwpmc_mips74k.coptionalhwpm
# ofw support
dev/ofw/ofwpci.c optionalfdt pci
+# INTRNG support code
+kern/msi_if.m optionalintrng
+kern/pic_if.m optionalintrng
+kern/subr_intr.c optionalintrng
+# INTRNG compatible MIPS32 interrupt controller
+mips/mips/mips_pic.c optionalintrng
+
# DTrace
cddl/compat/opensolaris/kern/opensolaris_atomic.c optional zfs | dtrace
compile-with "${CDDL_C}"
cddl/dev/dtrace/mips/dtrace_asm.S optional dtrace
compile-with "${DTRACE_S}"
Modified: head/sys/mips/atheros/ar531x/files.ar5315
==
--- head/sys/mips/atheros/ar531x/files.ar5315 Sat Nov 19 16:36:38 2016
(r308845)
+++ head/sys/mips/atheros/ar531x/files.ar5315 Sat Nov 19 17:01:06 2016
(r308846)
@@ -18,14 +18,5 @@ mips/mips/tick.c standard
dev/etherswitch/e6000sw/e6060sw.c optional etherswitch
-# Hack to reuse ARM intrng code
-kern/subr_intr.c optional intrng
-kern/msi_if.m optional intrng
-kern/pic_if.m optional intrng
-
-# Intrng compatible MIPS32 interrupt controller
-mips/mips/mips_pic.c optional intrng
-
# Non Intrng
mips/mips/intr_machdep.c optional !intrng
-
Modified: head/sys/mips/broadcom/files.broadcom
==
--- head/sys/mips/broadcom/files.broadcom Sat Nov 19 16:36:38 2016
(r308845)
+++ head/sys/mips/broadcom/files.broadcom Sat Nov 19 17:01:06 2016
(r308846)
@@ -9,11 +9,6 @@ mips/broadcom/bcm_bmips.c optional siba
mips/broadcom/bcm_mips74k.coptional bcma_nexus bcma
mips/broadcom/bcm_pmu.cstandard
mips/mips/tick.c standard
-mips/mips/mips_pic.c standard
-kern/subr_intr.c standard
-kern/pic_if.m standard
-
-kern/msi_if.m optional intrng
mips/broadcom/uart_cpu_chipc.c optional uart
mips/broadcom/uart_bus_chipc.c optional uart
Modified: head/sys/mips/mediatek/files.mediatek
==
--- head/sys/mips/mediatek/files.mediatek Sat Nov 19 16:36:38 2016
(r308845)
+++ head/sys/mips/mediatek/files.mediatek Sat Nov 19 17:01:06 2016
(r308846)
@@ -26,14 +26,6 @@ mips/mediatek/mtk_gpio_v2.c optional g
# Ralink/Mediatek Ethernet driver
dev/rt/if_rt.c optional rt
-# Hack to reuse ARM intrng code
-kern/subr_intr.c standard
-kern/msi_if.m standard
-kern/pic_if.m standard
-
-# Intrng compatible MIPS32 interrupt controller
-mips/mips/mips_pic.c standard
-
# Standard MIPS ticker
mips/mips/tick.c standard
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svn commit: r308847 - head/sys/conf
Author: br Date: Sat Nov 19 17:12:24 2016 New Revision: 308847 URL: https://svnweb.freebsd.org/changeset/base/308847 Log: Add XBurst CPU option. Submitted by: kan Sponsored by: DARPA, AFRL Modified: head/sys/conf/options.mips Modified: head/sys/conf/options.mips == --- head/sys/conf/options.mips Sat Nov 19 17:01:06 2016(r308846) +++ head/sys/conf/options.mips Sat Nov 19 17:12:24 2016(r308847) @@ -45,6 +45,7 @@ CPU_CNMIPSopt_global.h CPU_RMIopt_global.h CPU_NLMopt_global.h CPU_BERI opt_global.h +CPU_XBURST opt_global.h CPU_MALTA opt_global.h # which MACHINE_ARCH architecture ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r308857 - in head: bin/dd sys/mips/conf sys/mips/ingenic
Author: br
Date: Sat Nov 19 17:46:18 2016
New Revision: 308857
URL: https://svnweb.freebsd.org/changeset/base/308857
Log:
Bring in support for Ingenic XBurst JZ4780 and
X1000 systems on chips.
Imgtec CI20 and Ingenic CANNA boards supported.
Submitted by: Alexander Kabaev
Reviewed by: Ruslan Bukin
Sponsored by: DARPA, AFRL
Added:
head/sys/mips/conf/CANNA (contents, props changed)
head/sys/mips/conf/CI20 (contents, props changed)
head/sys/mips/conf/JZ4780 (contents, props changed)
head/sys/mips/conf/JZ4780.hints (contents, props changed)
head/sys/mips/conf/X1000 (contents, props changed)
head/sys/mips/conf/X1000.hints (contents, props changed)
head/sys/mips/ingenic/
head/sys/mips/ingenic/files.jz4780 (contents, props changed)
head/sys/mips/ingenic/files.x1000 (contents, props changed)
head/sys/mips/ingenic/jz4780_clk.h (contents, props changed)
head/sys/mips/ingenic/jz4780_clk_gen.c (contents, props changed)
head/sys/mips/ingenic/jz4780_clk_otg.c (contents, props changed)
head/sys/mips/ingenic/jz4780_clk_pll.c (contents, props changed)
head/sys/mips/ingenic/jz4780_clock.c (contents, props changed)
head/sys/mips/ingenic/jz4780_clock.h (contents, props changed)
head/sys/mips/ingenic/jz4780_cpuregs.h (contents, props changed)
head/sys/mips/ingenic/jz4780_dme.c (contents, props changed)
head/sys/mips/ingenic/jz4780_dwc_fdt.c (contents, props changed)
head/sys/mips/ingenic/jz4780_efuse.c (contents, props changed)
head/sys/mips/ingenic/jz4780_ehci.c (contents, props changed)
head/sys/mips/ingenic/jz4780_gpio.c (contents, props changed)
head/sys/mips/ingenic/jz4780_gpio_if.m (contents, props changed)
head/sys/mips/ingenic/jz4780_intr.c (contents, props changed)
head/sys/mips/ingenic/jz4780_machdep.c (contents, props changed)
head/sys/mips/ingenic/jz4780_mmc.c (contents, props changed)
head/sys/mips/ingenic/jz4780_mp.c (contents, props changed)
head/sys/mips/ingenic/jz4780_mpboot.S (contents, props changed)
head/sys/mips/ingenic/jz4780_nand.c (contents, props changed)
head/sys/mips/ingenic/jz4780_nemc.c (contents, props changed)
head/sys/mips/ingenic/jz4780_ohci.c (contents, props changed)
head/sys/mips/ingenic/jz4780_pinctrl.c (contents, props changed)
head/sys/mips/ingenic/jz4780_pinctrl.h (contents, props changed)
head/sys/mips/ingenic/jz4780_regs.h (contents, props changed)
head/sys/mips/ingenic/jz4780_timer.c (contents, props changed)
head/sys/mips/ingenic/jz4780_uart.c (contents, props changed)
Modified:
head/bin/dd/dd.c
Modified: head/bin/dd/dd.c
==
--- head/bin/dd/dd.cSat Nov 19 17:13:12 2016(r308856)
+++ head/bin/dd/dd.cSat Nov 19 17:46:18 2016(r308857)
@@ -48,13 +48,10 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
-#include
#include
#include
-#include
#include
-#include
#include
#include
#include
@@ -95,10 +92,6 @@ main(int argc __unused, char *argv[])
jcl(argv);
setup();
- caph_cache_catpages();
- if (cap_enter() == -1 && errno != ENOSYS)
- err(1, "unable to enter capability mode");
-
(void)signal(SIGINFO, siginfo_handler);
(void)signal(SIGINT, terminate);
@@ -132,8 +125,6 @@ static void
setup(void)
{
u_int cnt;
- cap_rights_t rights;
- unsigned long cmds[] = { FIODTYPE, MTIOCTOP };
if (in.name == NULL) {
in.name = "stdin";
@@ -142,20 +133,13 @@ setup(void)
in.fd = open(in.name, O_RDONLY, 0);
if (in.fd == -1)
err(1, "%s", in.name);
- if (caph_limit_stdin() == -1)
- err(1, "unable to limit capability rights");
}
getfdtype(&in);
- cap_rights_init(&rights, CAP_READ, CAP_SEEK);
- if (cap_rights_limit(in.fd, &rights) == -1 && errno != ENOSYS)
- err(1, "unable to limit capability rights");
-
if (files_cnt > 1 && !(in.flags & ISTAPE))
errx(1, "files is not supported for non-tape devices");
- cap_rights_set(&rights, CAP_WRITE, CAP_FTRUNCATE, CAP_IOCTL);
if (out.name == NULL) {
/* No way to check for read access here. */
out.fd = STDOUT_FILENO;
@@ -172,27 +156,13 @@ setup(void)
if (out.fd == -1) {
out.fd = open(out.name, O_WRONLY | OFLAGS, DEFFILEMODE);
out.flags |= NOREAD;
- cap_rights_clear(&rights, CAP_READ);
}
if (out.fd == -1)
err(1, "%s", out.name);
- if (caph_limit_stdout() == -1)
- err(1, "
svn commit: r308858 - head/bin/dd
Author: br
Date: Sat Nov 19 17:51:02 2016
New Revision: 308858
URL: https://svnweb.freebsd.org/changeset/base/308858
Log:
Restore dd changes included accidentally in r308857.
Modified:
head/bin/dd/dd.c
Modified: head/bin/dd/dd.c
==
--- head/bin/dd/dd.cSat Nov 19 17:46:18 2016(r308857)
+++ head/bin/dd/dd.cSat Nov 19 17:51:02 2016(r308858)
@@ -48,10 +48,13 @@ __FBSDID("$FreeBSD$");
#include
#include
#include
+#include
#include
#include
+#include
#include
+#include
#include
#include
#include
@@ -92,6 +95,10 @@ main(int argc __unused, char *argv[])
jcl(argv);
setup();
+ caph_cache_catpages();
+ if (cap_enter() == -1 && errno != ENOSYS)
+ err(1, "unable to enter capability mode");
+
(void)signal(SIGINFO, siginfo_handler);
(void)signal(SIGINT, terminate);
@@ -125,6 +132,8 @@ static void
setup(void)
{
u_int cnt;
+ cap_rights_t rights;
+ unsigned long cmds[] = { FIODTYPE, MTIOCTOP };
if (in.name == NULL) {
in.name = "stdin";
@@ -133,13 +142,20 @@ setup(void)
in.fd = open(in.name, O_RDONLY, 0);
if (in.fd == -1)
err(1, "%s", in.name);
+ if (caph_limit_stdin() == -1)
+ err(1, "unable to limit capability rights");
}
getfdtype(&in);
+ cap_rights_init(&rights, CAP_READ, CAP_SEEK);
+ if (cap_rights_limit(in.fd, &rights) == -1 && errno != ENOSYS)
+ err(1, "unable to limit capability rights");
+
if (files_cnt > 1 && !(in.flags & ISTAPE))
errx(1, "files is not supported for non-tape devices");
+ cap_rights_set(&rights, CAP_WRITE, CAP_FTRUNCATE, CAP_IOCTL);
if (out.name == NULL) {
/* No way to check for read access here. */
out.fd = STDOUT_FILENO;
@@ -156,13 +172,27 @@ setup(void)
if (out.fd == -1) {
out.fd = open(out.name, O_WRONLY | OFLAGS, DEFFILEMODE);
out.flags |= NOREAD;
+ cap_rights_clear(&rights, CAP_READ);
}
if (out.fd == -1)
err(1, "%s", out.name);
+ if (caph_limit_stdout() == -1)
+ err(1, "unable to limit capability rights");
}
getfdtype(&out);
+ if (cap_rights_limit(out.fd, &rights) == -1 && errno != ENOSYS)
+ err(1, "unable to limit capability rights");
+ if (cap_ioctls_limit(out.fd, cmds, nitems(cmds)) == -1 &&
+ errno != ENOSYS)
+ err(1, "unable to limit capability rights");
+
+ if (in.fd != STDERR_FILENO && out.fd != STDERR_FILENO) {
+ if (caph_limit_stderr() == -1)
+ err(1, "unable to limit capability rights");
+ }
+
/*
* Allocate space for the input and output buffers. If not doing
* record oriented I/O, only need a single buffer.
___
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Re: svn commit: r308857 - in head: bin/dd sys/mips/conf sys/mips/ingenic
On Sat, Nov 19, 2016 at 05:46:19PM +, Ruslan Bukin wrote: > Author: br > Date: Sat Nov 19 17:46:18 2016 > New Revision: 308857 > URL: https://svnweb.freebsd.org/changeset/base/308857 > > Log: > Bring in support for Ingenic XBurst JZ4780 and > X1000 systems on chips. > > Imgtec CI20 and Ingenic CANNA boards supported. > > Submitted by: Alexander Kabaev > Reviewed by:Ruslan Bukin > Sponsored by: DARPA, AFRL > > Modified: > head/bin/dd/dd.c Ooops. Sorry. Ruslan ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r308859 - in head/sys/mips: conf mips
Author: br Date: Sat Nov 19 18:03:46 2016 New Revision: 308859 URL: https://svnweb.freebsd.org/changeset/base/308859 Log: Enable SMP on Ingenic JZ4780. It is required to proceed full cache flush before we can use wait instruction on multicore, so use nop instead for now. Submitted by: kan Sponsored by: DARPA, AFRL Modified: head/sys/mips/conf/JZ4780 head/sys/mips/mips/exception.S Modified: head/sys/mips/conf/JZ4780 == --- head/sys/mips/conf/JZ4780 Sat Nov 19 17:51:02 2016(r308858) +++ head/sys/mips/conf/JZ4780 Sat Nov 19 18:03:46 2016(r308859) @@ -53,7 +53,7 @@ options INVARIANT_SUPPORT #Extra sanity #options WITNESS_SKIPSPIN#Don't run witness on spinlocks for speed # Make an SMP-capable kernel by default -# options SMP # Symmetric MultiProcessor Kernel +optionsSMP # Symmetric MultiProcessor Kernel device loop device ether Modified: head/sys/mips/mips/exception.S == --- head/sys/mips/mips/exception.S Sat Nov 19 17:51:02 2016 (r308858) +++ head/sys/mips/mips/exception.S Sat Nov 19 18:03:46 2016 (r308859) @@ -590,7 +590,11 @@ GLOBAL(MipsWaitStart) # this is 16 byt mtc0t1, MIPS_COP_0_STATUS bnezv0, MipsWaitEnd nop +#if defined(CPU_XBURST) && defined(SMP) + nop +#else wait +#endif GLOBAL(MipsWaitEnd)# MipsWaitStart + 16 jr ra PTR_ADDUsp, sp, CALLFRAME_SIZ ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
svn commit: r308923 - head/sys/riscv/include
Author: br Date: Mon Nov 21 12:00:31 2016 New Revision: 308923 URL: https://svnweb.freebsd.org/changeset/base/308923 Log: Disable superpages reservations as we don't have implemented them yet. Requested by: Alan Cox Sponsored by: DARPA, AFRL Modified: head/sys/riscv/include/vmparam.h Modified: head/sys/riscv/include/vmparam.h == --- head/sys/riscv/include/vmparam.hMon Nov 21 11:27:14 2016 (r308922) +++ head/sys/riscv/include/vmparam.hMon Nov 21 12:00:31 2016 (r308923) @@ -105,10 +105,10 @@ #defineVM_NFREEORDER 12 /* - * Enable superpage reservations: 1 level. + * Disable superpage reservations. */ #ifndefVM_NRESERVLEVEL -#defineVM_NRESERVLEVEL 1 +#defineVM_NRESERVLEVEL 0 #endif /* ___ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
