Author: br
Date: Sat Nov 19 15:10:10 2016
New Revision: 308835
URL: https://svnweb.freebsd.org/changeset/base/308835
Log:
Identify Ingenic CPUs.
Submitted by: kan
Sponsored by: DARPA, AFRL
Modified:
head/sys/mips/include/locore.h
head/sys/mips/mips/cpu.c
Modified: head/sys/mips/include/locore.h
==============================================================================
--- head/sys/mips/include/locore.h Sat Nov 19 15:03:49 2016
(r308834)
+++ head/sys/mips/include/locore.h Sat Nov 19 15:10:10 2016
(r308835)
@@ -59,6 +59,9 @@
#define MIPS_PRID_CID_LEXRA 0x0b /* Lexra */
#define MIPS_PRID_CID_RMI 0x0c /* RMI */
#define MIPS_PRID_CID_CAVIUM 0x0d /* Cavium */
+#define MIPS_PRID_CID_INGENIC 0xe1 /* Ingenic */
+#define MIPS_PRID_CID_INGENIC2 0xd1 /* Ingenic */
+
#define MIPS_PRID_COPTS(x) (((x) >> 24) & 0x00ff) /* Company
Options */
#endif /* _MIPS_LOCORE_H */
Modified: head/sys/mips/mips/cpu.c
==============================================================================
--- head/sys/mips/mips/cpu.c Sat Nov 19 15:03:49 2016 (r308834)
+++ head/sys/mips/mips/cpu.c Sat Nov 19 15:10:10 2016 (r308835)
@@ -373,6 +373,10 @@ cpu_identify(void)
case MIPS_PRID_CID_CAVIUM:
printf("Cavium");
break;
+ case MIPS_PRID_CID_INGENIC:
+ case MIPS_PRID_CID_INGENIC2:
+ printf("Ingenic XBurst");
+ break;
case MIPS_PRID_CID_PREHISTORIC:
default:
printf("Unknown cid %#x", cpuinfo.cpu_vendor);
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