Scott Wood <scottw...@freescale.com> wrote on 2010/12/08 20:59:28: > > On Wed, 8 Dec 2010 20:57:03 +0100 > Joakim Tjernlund <joakim.tjernl...@transmode.se> wrote: > > > Mark Mason <ma...@postdiluvian.org> wrote on 2010/12/08 20:26:16: > > > > > > Joakim Tjernlund <joakim.tjernl...@transmode.se> wrote: > > > > > > > Scott Wood <scottw...@freescale.com> wrote on 2010/12/08 18:18:39: > > > > > > > > > > On Wed, 8 Dec 2010 08:59:49 +0100 > > > > > Joakim Tjernlund <joakim.tjernl...@transmode.se> wrote: > > > > > > > > > > > > If you attach NAND to the LBC, you should not attach anything > > > > > > > else to > > > > > > > it which is latency-sensitive. > > > > > > > > > > > > This "feature" makes the LBC useless to us. Is there some > > > > > > workaround or plan > > > > > > to address this limitation? > > > > > > > > > > Complain to your support or sales contact. > > > > > > > > > > I've complained about it in the past, and got a "but pins are a > > > > > limited > > > > > resource!" response. They need to hear that it's a problem from > > > > > customers. > > > > > > > > Done, lets see what I get in return. I think this problem will be > > > > a major obstacle for our next generation boards which will be NAND > > > > based. > > > > > > It was a big problem, and a big surprise, for me too. The next > > > generation of a couple of the chips on the bus have pcie, but those > > > are noticably more expensive. > > > > Can you think of any workaround such as not connecting the BUSY pin at all? > > Maybe connect the busy pin to a gpio?
Is BUSY required for sane operation or it an optimization? Is there any risk that the NAND device will drive the LB and corrupt the bus for other devices? I can't tell, haven't studied NAND in detail yet. Jocke _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
