On Tue, Mar 10, 2009 at 10:50:13PM +0300, Valentine Barshak wrote: >I was just going to submit a patch for that too. >Indeed, the denali_fixup_memsize() miscalculated a couple of address >field widths. We were lucky to eventually get the right result, >because the effect of the first error was killed by the other one. >According to the AMCC 440EPX/GRX user manual, >the Chip Select width is always fixed at 1 bit no matter >what is actually read from register DDR_10. >The workaround is to use a predefined chipselect value for 440EPx/GRx. >Also, setting the REDUC bit (REDUC = 1) enables 32-bit data path. >If REDUC = 0, full data path of 64 bits is used. > >Signed-off-by: Valentine Barshak <vbars...@ru.mvista.com> >Signed-off-by: Mikhail Zolotaryov <le...@lebon.org.ua>
I've been looking over this one a bit more. At the moment, I'm inclined to queue this up in my -next branch. I would like to see if Mikhail could test it though, and have Valentine answer the question in the hard wired part. josh _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
