Valentine wrote:
The problem is that the controller is hardwired to use only one chipselect, even if both are enabled in the DDR0_10 on PPC440EPx/GRx processors.It's new information for me. Is this problem described by some ERRATA or manual, could you please point me to the document (and page) ?
_______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev