Well, it was beyond the PC's and Sparc stations we had access to at the
time.
On 4/22/2024 3:28 PM, Christian Kennedy via cctalk wrote:
On 4/22/24 13:12, Fred Cisin via cctalk wrote:
On Mon, 22 Apr 2024, Mike Katz via cctalk wrote:
[Big snip -- hopefully I managed to get attribution right, apologies
in advance if I borked it]
When I was working for a 6800 C compiler company we could simulate
all 68000 CPUs before the 68020. The 68020 with it's pipelining and
branch prediction made it impossible to do cycle accurate timing.
Again, not impossible, but very likely not feasable.
Having done cycle accurate simulation of a pipelined superscalar
processor, I can assure you it's possible, particularly with hardware
assist a la Quickturn .
It's also a lot like watching paint dry.
