Dear USRP users:
We have been trying to understand the low-level details of the USRP
architecture (namely, for the B200mini); there seems very little explicit
insight provided on the Ettus web site into how decimation is performed in the
FPGA (and commanded from the driver side). I also cannot locate the
open-source and freely available FPGA code. Could someone assist me in gaining
this insight?
Thank you very much!
Joe Stern
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