Leave dram_init_banksize to set up the bank info data. ram_size was previously uninitialized. Also put data on SDRAM configuration in header file.
Signed-off-by: Yann Vernier <yann.vern...@orsoc.se> --- Changes for v2: - Update to use CONFIG_SYS_SDRAM_ constants - Update cm41xx also - Map SDRAM to match configuration Changes for v3: - Moved SDRAM configuration to header file, in preparation for lowlevel constant cleanup. --- board/cm4008/cm4008.c | 5 +++-- board/cm41xx/cm41xx.c | 5 +++-- include/configs/cm4008.h | 11 ++++++++--- include/configs/cm41xx.h | 9 ++++++--- 4 files changed, 20 insertions(+), 10 deletions(-) diff --git a/board/cm4008/cm4008.c b/board/cm4008/cm4008.c index ed493a8..6c0da9a 100644 --- a/board/cm4008/cm4008.c +++ b/board/cm4008/cm4008.c @@ -97,8 +97,9 @@ int board_init (void) int dram_init (void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return (0); } diff --git a/board/cm41xx/cm41xx.c b/board/cm41xx/cm41xx.c index d9dff4e..6aef617 100644 --- a/board/cm41xx/cm41xx.c +++ b/board/cm41xx/cm41xx.c @@ -97,8 +97,9 @@ int board_init (void) int dram_init (void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + /* dram_init must store complete ramsize in gd->ram_size */ + gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return (0); } diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h index fe62f73..18f7900 100644 --- a/include/configs/cm4008.h +++ b/include/configs/cm4008.h @@ -106,13 +106,18 @@ #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ #endif + /*----------------------------------------------------------------------- * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* SDRAM Bank #1 */ +#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MB */ +#define CONFIG_SYS_SDCS0_PARAMS (KS8695_SDCON_CA_8BIT | \ + KS8695_SDCON_4BANK | KS8695_SDCON_D_32) +#define CONFIG_SYS_SDRAM_RAS_CAS_DELAY 3 +#define CONFIG_SYS_SDRAM_MODE 0x033 + #define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */ diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h index 485792c..ed345b0 100644 --- a/include/configs/cm41xx.h +++ b/include/configs/cm41xx.h @@ -110,9 +110,12 @@ * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* SDRAM Bank #1 */ +#define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32 MB */ +#define CONFIG_SYS_SDCS0_PARAMS (KS8695_SDCON_CA_8BIT | \ + KS8695_SDCON_4BANK | KS8695_SDCON_D_32) +#define CONFIG_SYS_SDRAM_RAS_CAS_DELAY 3 +#define CONFIG_SYS_SDRAM_MODE 0x033 #define CONFIG_SYS_INIT_SP_ADDR 0x00020000 /* lowest 128k of RAM */ -- 1.7.10.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot