Hi Simon,
On Sun, Aug 14, 2011 at 4:39 PM, Simon Guinot <si...@sequanux.org> wrote:
> Hi Aneesh,
>
> On Thu, Aug 11, 2011 at 08:05:42PM +0530, Aneesh V wrote:
>> c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
>> to board_init_r(). This enables d-cache for all ARM boards.
>> As a result some of the arm boards that are not cache-ready
>> are broken. Revert this change and allow platform code to
>> take the decision on d-cache enabling.
>>
>> Also add some documentation for cache usage in ARM.
>>
>> Signed-off-by: Aneesh V <ane...@ti.com>
>> ---
>> V2:
>> Updated with additional guidelines in the README.
>> ---
>> arch/arm/lib/board.c | 8 ++----
>> arch/arm/lib/cache.c | 12 +++++++++++
>> doc/README.arm-caches | 51
>> +++++++++++++++++++++++++++++++++++++++++++++++++
>> include/common.h | 1 +
>> 4 files changed, 67 insertions(+), 5 deletions(-)
>> create mode 100644 doc/README.arm-caches
>>
>> diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
>> index 14a56f6..38a31d8 100644
>> --- a/arch/arm/lib/board.c
>> +++ b/arch/arm/lib/board.c
>> @@ -451,11 +451,9 @@ void board_init_r(gd_t *id, ulong dest_addr)
>> gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
>>
>> monitor_flash_len = _end_ofs;
>> - /*
>> - * Enable D$:
>> - * I$, if needed, must be already enabled in start.S
>> - */
>> - dcache_enable();
>> +
>> + /* Enable caches */
>> + enable_caches();
>>
>> debug("monitor flash len: %08lX\n", monitor_flash_len);
>> board_init(); /* Setup chipselects */
>> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
>> index 92b61a2..b545fb7 100644
>> --- a/arch/arm/lib/cache.c
>> +++ b/arch/arm/lib/cache.c
>> @@ -53,3 +53,15 @@ void __flush_dcache_all(void)
>> }
>> void flush_dcache_all(void)
>> __attribute__((weak, alias("__flush_dcache_all")));
>> +
>> +
>> +/*
>> + * Default implementation of enable_caches()
>> + * Real implementation should be in platform code
>> + */
>> +void __enable_caches(void)
>> +{
>> + puts("WARNING: Caches not enabled\n");
>> +}
>> +void enable_caches(void)
>> + __attribute__((weak, alias("__enable_caches")));
>> diff --git a/doc/README.arm-caches b/doc/README.arm-caches
>> new file mode 100644
>> index 0000000..a833eee
>> --- /dev/null
>> +++ b/doc/README.arm-caches
>> @@ -0,0 +1,51 @@
>> +Disabling I-cache:
>> +- Set CONFIG_SYS_ICACHE_OFF
>> +
>> +Disabling D-cache:
>> +- Set CONFIG_SYS_DCACHE_OFF
>> +
>> +Enabling I-cache:
>> +- Make sure CONFIG_SYS_ICACHE_OFF is not set and call icache_enable().
>> +
>> +Enabling D-cache:
>> +- Make sure CONFIG_SYS_ICACHE_OFF is not set and call dcache_enable().
> ^
> Maybe you will prefer to check for CONFIG_SYS_DCACHE_OFF ?
Yes. That's a typo. Will fix it. Thank you for pointing it out.
best regards,
Aneesh
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