Prior to starting a new transfer, conditionally wait for bus to not
be busy.
Reinitialise controller as otherwise operation is not stable.
For reference, see linux kernel commit: 9656eeebf3f1 ("i2c: Revert
"i2c: xiic: Do not reset controller before every transfer"")
Signed-off-by: Tomas Melin <tomas.me...@vaisala.com>
---
Changes in v2:
- Change variable declaration order
- Change timeout to 3ms
drivers/i2c/xilinx_xiic.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/i2c/xilinx_xiic.c b/drivers/i2c/xilinx_xiic.c
index e4ca0ab936..83386677d5 100644
--- a/drivers/i2c/xilinx_xiic.c
+++ b/drivers/i2c/xilinx_xiic.c
@@ -266,8 +266,17 @@ static void xiic_reinit(struct xilinx_xiic_priv *priv)
static int xilinx_xiic_xfer(struct udevice *dev, struct i2c_msg *msg, int
nmsgs)
{
+ struct xilinx_xiic_priv *priv = dev_get_priv(dev);
int ret = 0;
+ ret = wait_for_bit_8(priv->base + XIIC_SR_REG_OFFSET,
+ XIIC_SR_BUS_BUSY_MASK, false, 3, true);
+
+ if (ret)
+ return ret;
+
+ xiic_reinit(priv);
+
for (; nmsgs > 0; nmsgs--, msg++) {
if (msg->flags & I2C_M_RD)
ret = xilinx_xiic_read_common(dev, msg, nmsgs);
--
2.17.2
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