Changelog v3
- Patch 1/4: No change.
- Patch 2/4: No change.
- Patch 3/4: New.
- Patch 4/4: No change.
Patch 3/4
1. Use dev_get_platdata to get dev private platdata.
Rick Chen (4):
ae3xx: timer: Rename AE3XX to ATCPIT100
cosmetic: atcpit100_timer: Rename function name
Integrate function and struct name as atcpit100 will be
more reasonable.
Signed-off-by: rick
Signed-off-by: Rick Chen
---
drivers/timer/atcpit100_timer.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/timer/atcpit100_timer.c b
Add a document to describe Andestech atcpit100 timer and
binding information.
Signed-off-by: rick
Signed-off-by: Rick Chen
Reviewed-by: Simon Glass
---
doc/device-tree-bindings/timer/atcpit100_timer.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 doc
ATCPIT100 is Andestech timer IP which is embeded
in AE3XX and AE250 boards. So rename AE3XX to
ATCPIT100 will be more make sence.
Signed-off-by: rick
Signed-off-by: Rick Chen
Reviewed-by: Simon Glass
---
configs/adp-ae3xx_defconfig | 2 +-
drivers/timer/Kconfig | 7
Use dev_get_platdata to get private platdata.
Signed-off-by: rick
Signed-off-by: Rick Chen
---
drivers/timer/atcpit100_timer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/timer/atcpit100_timer.c b/drivers/timer/atcpit100_timer.c
index d5146dd..963f978 100644
Changelog v3
- Patch 1/4: No change.
- Patch 2/4: No change.
- Patch 3/4: New.
- Patch 4/4: No change.
Patch 3/4
1. Use dev_get_platdata to get dev private platdata.
Rick Chen (4):
ae3xx: timer: Rename AE3XX to ATCPIT100
cosmetic: atcpit100_timer: Rename function name
Use dev_get_platdata to get private platdata.
Signed-off-by: rick
Signed-off-by: Rick Chen
---
drivers/timer/atcpit100_timer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/timer/atcpit100_timer.c b/drivers/timer/atcpit100_timer.c
index d5146dd..963f978 100644
Integrate function and struct name as atcpit100 will be
more reasonable.
Signed-off-by: rick
Signed-off-by: Rick Chen
---
drivers/timer/atcpit100_timer.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/timer/atcpit100_timer.c b
Add a document to describe Andestech atcpit100 timer and
binding information.
Signed-off-by: rick
Signed-off-by: Rick Chen
Reviewed-by: Simon Glass
---
doc/device-tree-bindings/timer/atcpit100_timer.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 doc
> >
> > Then I think if I don't want enter this auto flow, what can I do ?
> >
> > 1 Remove CONFIG_DISTRO_DEFAULTS=y from nx25-ae250_defconfig But it
> > still enter auto flow.
> >
> > 2 Add #ifdef CONFIG_DISTRO_DEFAULTS to encapsulate the
> > CONFIG_EXTRA_ENV_SETTINGS in nx25-ae250.h And Remove
2018-05-10 14:03 GMT+08:00 Alexander Graf :
>
>
> Am 10.05.2018 um 05:27 schrieb Rick Chen :
>
>>>>
>>>> Then I think if I don't want enter this auto flow, what can I do ?
>>>>
>>>> 1 Remove CONFIG_DISTRO_DEFAULTS=y from nx25-ae
2018-05-10 15:00 GMT+08:00 Rick Chen :
> 2018-05-10 14:03 GMT+08:00 Alexander Graf :
>>
>>
>> Am 10.05.2018 um 05:27 schrieb Rick Chen :
>>
>>>>>
>>>>> Then I think if I don't want enter this auto flow, what can I do ?
>>>>&
>> > > > > Related, is there a QEMU target for nds32 that we could leverage
>> > > > > so that once the toolchain issue is resolved we can update
>> > > > > .travis.yml to run
>> > > tests on it?
>> > > > > Thanks!
>> > > >
>> > > > I am applying the QEMU offering permit.
>> > > > If it is ok. I wi
2018-05-14 19:16 GMT+08:00 Tom Rini :
> On Mon, May 14, 2018 at 04:31:27PM +0800, Rick Chen wrote:
>> >> > > > > Related, is there a QEMU target for nds32 that we could leverage
>> >> > > > > so that once the toolchain issue is reso
Hi Stefan and other seniors
I encounter some problems about cfi flash driver.
And hope you can give some comments to resolve it.
Followings are the flash verification status and descriptions :
When I verify cfi flash which it's address base is in cacheable region
(0x8800) and cache is enabled
Hi Stefan
Stefan Roese 於 2019年6月3日 週一 下午9:05寫道：
>
> Hi Rick,
>
> On 03.06.19 11:27, Rick Chen wrote:
> > Hi Stefan and other seniors
> >
> > I encounter some problems about cfi flash driver.
> > And hope you can give some comments to resolve it.
> > Fo
Troy,
> > >
> > > On Mon, Jun 3, 2019 at 9:19 PM Troy Benjegerdes
> > > wrote:
> > >>
> > >>
> > >>
> > >>> On Jun 2, 2019, at 9:22 PM, Rick Chen wrote:
> > >>>
> > >>> Hi Troy
> > &
Hi BIn
> Hi Rick,
>
> On Mon, May 27, 2019 at 4:40 PM Auer, Lukas
> wrote:
> >
> > On Wed, 2019-05-15 at 08:42 -0700, Bin Meng wrote:
> > > QEMU 4.0.0 'virt' target integrates a generic ECAM PCI host.
> > > Enable the driver for it.
> > >
> > > Signed-off-by: Bin Meng
> > > ---
> > >
> > > boar
>
> Hi BIn
>
> > Hi Rick,
> >
> > On Mon, May 27, 2019 at 4:40 PM Auer, Lukas
> > wrote:
> > >
> > > On Wed, 2019-05-15 at 08:42 -0700, Bin Meng wrote:
> > > > QEMU 4.0.0 'virt' target integrates a generic ECAM PCI host.
> > > > Enable the driver for it.
> > > >
> > > > Signed-off-by: Bin Meng
>
> From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de]
> Sent: Saturday, June 01, 2019 12:13 AM
> To: padmarao.beg...@microchip.com; u-boot@lists.denx.de
> Cc: Rick Jian-Zhi Chen(陳建志); cyril.j...@microchip.com;
> bmeng...@gmail.com; anup.pa...@wdc.com; lewis.ha...@microchip.com
> Subject: Re:
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Bin Meng
> Sent: Wednesday, May 08, 2019 9:39 PM
> To: Karsten Merker
> Cc: U-Boot Mailing List
> Subject: Re: [U-Boot] [RFC PATCH 1/1] riscv: increase the environment size for
> the qemu-riscv platform to 128kB
>
> On Mon, May 6, 20
Hi Bin
Bin Meng 於 2019年6月4日 週二 下午2:27寫道：
>
> Hi Rick,
>
> On Tue, Jun 4, 2019 at 1:35 PM Rick Chen wrote:
> >
> > >
> > > Hi BIn
> > >
> > > > Hi Rick,
> > > >
> > > > On Mon, May 27, 2019 at 4:40 PM Auer, Luka
Hi Bin
Bin Meng 於 2019年6月4日 週二 上午10:48寫道：
>
> Hi Rick,
>
> On Tue, May 28, 2019 at 5:44 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Add a v5l2 cache controller driver that is usually found on
> > Andes RISC-V ae350 platform. It will parse the c
Bin Meng 於 2019年6月4日 週二 上午10:48寫道：
>
> Hi Rick,
>
> On Tue, May 28, 2019 at 5:44 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Find the UCLASS_CACHE driver to configure the cache controller's
> > settings.
> >
> > Signed-off-by: Ri
Hi Bin
Bin Meng 於 2019年6月4日 週二 上午10:48寫道：
>
> Hi Rick,
>
> On Tue, May 28, 2019 at 5:44 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Find the UCLASS_CACHE driver to configure the cache controller's
> > settings.
> >
> > Signed-
Hi Bin
>
> Hi Rick,
>
> On Tue, May 28, 2019 at 5:44 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Flush and disable cache in cleanup_before_linux()
> > which will be called before jump to linux.
> >
> > The sequence will be preferred
Hi Bin
>
> Hi Rick,
>
> On Tue, May 28, 2019 at 5:44 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Select the v5l2 UCLASS_CACHE driver for AE350.
> >
> > Signed-off-by: Rick Chen
> > Cc: Greentime Hu
> > ---
> > board/A
Hi Bin
Bin Meng 於 2019年6月4日 週二 上午10:48寫道：
>
> Hi Rick,
>
> On Tue, May 28, 2019 at 5:44 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > When L2 node exists inside cpus node, uclass_get_device
> > can not parse L2 node successfully. So move it outsid
Hi Bin
>
> Hi Rick,
>
> On Tue, May 28, 2019 at 5:45 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Use CCTL command to do d-cache write back and invalidate
> > instead of fence.
> >
> > Signed-off-by: Rick Chen
> > Cc:
Hi Bin
Bin Meng 於 2019年6月5日 週三 下午5:29寫道：
>
> Hi Rick,
>
> On Wed, Jun 5, 2019 at 1:55 PM Rick Chen wrote:
> >
> > Hi Bin
> >
> > Bin Meng 於 2019年6月4日 週二 下午2:27寫道：
> > >
> > > Hi Rick,
> > >
> > > On Tue, Jun
ext restore before returning from trap handler
> riscv: Return to previous privilege level after trap handling
> riscv: Adjust the _exit_trap() position to come before handle_trap()
> riscv: Save boot hart id to the global data
> riscv: bootm: Change to use bo
Hi Lukas
>
> Hi Rick,
>
> On Wed, 2019-06-05 at 16:58 +0800, Rick Chen wrote:
> > Hi Bin
> >
> > Bin Meng 於 2019年6月4日 週二 上午10:48寫道：
> > > Hi Rick,
> > >
> > > On Tue, May 28, 2019 at 5:44 PM Andes wrote:
> > > > From: Rick Che
Hi Bin
>
> Hi Rick,
>
> On Mon, Jun 10, 2019 at 10:26 AM Rick Chen wrote:
> >
> > Hi Lukas
> >
> > >
> > > Hi Rick,
> > >
> > > On Wed, 2019-06-05 at 16:58 +0800, Rick Chen wrote:
> > > > Hi Bin
> > > >
Hi Wolfgang
> Hello everybody,
>
> I wrote:
>
> > as discussed before, we want to switch from the old git server to more
> > powerful soft- and hardware. We will move the U-Boot master
> > repository and all custodian repositories to gitlab.
> ...
> > The switch will take place as follows:
> >
>
Hi Lukas
Auer, Lukas 於 2019年4月24日 週三 上午3:58寫道：
>
> Hi Rick,
>
> On Tue, 2019-04-23 at 13:42 +0800, Andes wrote:
> > From: Rick Chen
> >
> > In current RISC-V SMP flow, AE350 will encounter the the write
> > failure problem since hart_lottery and available_h
Hi Bin
Bin Meng 於 2019年4月23日 週二 下午8:14寫道：
>
> Hi Rick,
>
> On Tue, Apr 23, 2019 at 1:47 PM Andes wrote:
> >
> > From: Rick Chen
>
> nits in the commit title: boot->booting
OK
>
> >
> > Add two defconfig to support AE350 SMP boot fro
Hi Bin
Bin Meng 於 2019年4月23日 週二 下午8:14寫道：
>
> Hi Rick,
>
> On Tue, Apr 23, 2019 at 1:47 PM Andes wrote:
> >
> > From: Rick Chen
> >
>
> commit title should read: prior_stage_fdt_address should only be used
> when OF_PRIOR_STAGE is enabled
OK
>
>
Hi Bin
Bin Meng 於 2019年4月23日 週二 下午8:14寫道：
>
> Hi Rick,
>
> On Tue, Apr 23, 2019 at 1:47 PM Andes wrote:
> >
> > From: Rick Chen
> >
>
> nits in the commit title: boot->booting
OK
>
> > When AE350 was booting from ram, use OF_PRIOR_STAGE i
Hi Bin
Bin Meng 於 2019年4月23日 週二 下午8:19寫道：
>
> On Tue, Apr 23, 2019 at 8:14 PM Bin Meng wrote:
> >
> > Hi Rick,
> >
> > On Tue, Apr 23, 2019 at 1:47 PM Andes wrote:
> > >
> > > From: Rick Chen
> > >
> >
> > typo in the comm
Hi Lukas
Auer, Lukas 於 2019年4月25日 週四 上午5:18寫道：
>
> Hi Rick,
>
> On Wed, 2019-04-24 at 09:35 +0800, Rick Chen wrote:
> > Hi Lukas
> >
> > Auer, Lukas 於 2019年4月24日 週三 上午3:58寫道：
> > > Hi Rick,
> > >
> > > On Tue, 2019-04-23 at 13:42 +0800,
Bin Meng 於 2019年4月24日 週三 下午3:02寫道：
>
> Hi Rick,
>
> On Wed, Apr 24, 2019 at 2:37 PM Andes wrote:
> >
> > From: Rick Chen
> >
>
> I would write the commit title and message as:
>
> riscv: Introduce CONFIG_XIP to support booting from flash
>
> When
Bin Meng 於 2019年4月24日 週三 下午3:02寫道：
>
> On Wed, Apr 24, 2019 at 2:38 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > This patch will fix prior_stage_fdt_address write failure problem, when
> > AE350 was booting from flash.
>
> was -> is
OK
HI Bin
Bin Meng 於 2019年4月24日 週三 下午3:02寫道：
>
> On Wed, Apr 24, 2019 at 2:38 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > When AE350 was booting from ram, use CONFIG_OF_PRIOR_STAGE instead
>
> was -> is
OK
>
> > of CONFIG_OF_BOARD.
> &
Hi Karsten
> From: Karsten Merker [mailto:mer...@debian.org]
> Sent: Friday, April 26, 2019 5:35 PM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: Anup Patel; Bin Meng; Lukas Auer; Tom Rini; U-Boot Mailing List; Palmer
> Dabbelt
> Subject: Re: [U-Boot] [PATCH] riscv: qemu: Use correct SYS_TEXT_BASE for
> S-m
Hi Lukas
Auer, Lukas 於 2019年4月26日 週五 上午4:55寫道：
>
> Hi Rick,
>
> Bin already included excellent feedback, I have just one more small nit
> below.
>
> On Wed, 2019-04-24 at 14:33 +0800, Andes wrote:
> > From: Rick Chen
> >
> > In smp flow these two f
Hi Lukas
Auer, Lukas 於 2019年4月26日 週五 上午4:56寫道：
>
> Hi Rick,
>
> On Wed, 2019-04-24 at 14:33 +0800, Andes wrote:
> > From: Rick Chen
> >
> > Add two defconfigs to support AE350 SMP booting from flash.
> >
> > Signed-off-by: Rick Chen
Auer, Lukas 於 2019年4月26日 週五 上午4:58寫道：
>
> On Thu, 2019-04-25 at 09:00 +0800, Rick Chen wrote:
> > Bin Meng 於 2019年4月24日 週三 下午3:02寫道：
> > > On Wed, Apr 24, 2019 at 2:38 PM Andes wrote:
> > > > From: Rick Chen
> > > >
> > > > This pat
Hi lukas
Auer, Lukas 於 2019年4月29日 週一 下午7:55寫道：
>
> Hi Rick,
>
> On Mon, 2019-04-29 at 15:44 +0800, Andes wrote:
> > From: Rick Chen
> >
> > This patch will fix prior_stage_fdt_address write failure problem, when
> > AE350 boots from flash.
v tp, a0
> > mv s1, a1
> >
> > la t0, trap_entry
> > @@ -64,7 +64,7 @@ call_board_init_f_0:
> > jal board_init_f_init_reserve
> >
> > /* save the boot hart id to global_data */
> > - SREGs0, GD_BOOT_HART(gp)
> > + SREGtp, GD_BOOT_HART(gp)
> >
> > /* Enable cache */
> > jal icache_enable
Reviewed-by: Rick Chen
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi Bin
Bin Meng 於 2019年3月20日 週三 下午3:22寫道：
>
> Hi Rick,
>
> On Tue, Mar 19, 2019 at 5:11 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > To enumerate devices on the /soc/ node, create a "simple-bus"
> > driver to match "andestech
Hi Bin
Bin Meng 於 2019年3月20日 週三 下午3:22寫道：
>
> Hi Rick,
>
> On Tue, Mar 19, 2019 at 5:12 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > The Platform-Level Interrupt Controller(PLIC)
> > block holds memory-mapped claim and pending registers
> > a
Hi Bin
Bin Meng 於 2019年3月21日 週四 下午3:01寫道：
>
> Hi Rick,
>
> On Thu, Mar 21, 2019 at 2:49 PM Rick Chen wrote:
> >
> > Hi Bin
> >
> > Bin Meng 於 2019年3月20日 週三 下午3:22寫道：
> > >
> > > Hi Rick,
> > >
> > > On Tu
Bin Meng 於 2019年3月21日 週四 下午3:32寫道：
>
> Hi Rick,
>
> On Thu, Mar 21, 2019 at 3:04 PM Rick Chen wrote:
> >
> > Hi Bin
> >
> > Bin Meng 於 2019年3月20日 週三 下午3:22寫道：
> > >
> > > Hi Rick,
> > >
> > > On Tue, Mar 19, 2019 at 5:
Hi Bin
Bin Meng 於 2019年3月20日 週三 下午3:22寫道：
>
> Hi Rick,
>
> On Tue, Mar 19, 2019 at 5:12 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > The platform-Level Machine Timer(PLMT) block
> > holds memory-mapped mtime register associated
> > wit
Hi Bin
Bin Meng 於 2019年3月20日 週三 下午3:22寫道：
>
> Hi Rick,
>
> On Tue, Mar 19, 2019 at 5:12 PM Andes wrote:
> >
> > From: Rick Chen
> >
>
> nits: remove the ending period in the commit title
OK
I will remove it.
Thanks for review.
Rick
>
> > Limit
Hi Bin
Bin Meng 於 2019年3月20日 週三 下午3:22寫道：
>
> Hi Rick,
>
> On Tue, Mar 19, 2019 at 5:13 PM Andes wrote:
> >
> > From: Rick Chen
> >
>
> nits: remove the ending period in the commit title.
OK.
I will remove it.
>
> > Signed-off-by: Rick Chen
>
Bin Meng 於 2019年3月21日 週四 下午4:49寫道：
>
> Hi Rick,
>
> On Thu, Mar 21, 2019 at 4:27 PM Rick Chen wrote:
> >
> > Hi Bin
> >
> > Bin Meng 於 2019年3月21日 週四 下午3:01寫道：
> > >
> > > Hi Rick,
> > >
> > > On Thu, Mar 21, 2019 at 2:49
Bin Meng 於 2019年3月21日 週四 下午5:15寫道：
>
> Hi Rick,
>
> On Thu, Mar 21, 2019 at 4:51 PM Rick Chen wrote:
> >
> > Hi Bin
> >
> > Bin Meng 於 2019年3月20日 週三 下午3:22寫道：
> > >
> > > Hi Rick,
> > >
> > > On Tue, Mar 19, 2019 at 5:13 PM
Bin Meng 於 2019年3月21日 週四 下午6:12寫道：
>
> Hi Rick,
>
> On Thu, Mar 21, 2019 at 5:37 PM Rick Chen wrote:
> >
> > Bin Meng 於 2019年3月21日 週四 下午5:15寫道：
> > >
> > > Hi Rick,
> > >
> > > On Thu, Mar 21, 2019 at 4:51 PM Rick Chen wrote:
> >
Hi Bin
Bin Meng 於 2019年3月29日 週五 下午5:34寫道：
>
> Two more comments regarding ae350_64.dts
>
> On Mon, Mar 25, 2019 at 3:40 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Signed-off-by: Rick Chen
> > Cc: Greentime Hu
>
Hi Bin
Bin Meng 於 2019年3月29日 週五 下午5:22寫道：
>
> On Mon, Mar 25, 2019 at 3:39 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > The platform-Level Machine Timer(PLMT) block
>
> nits: should have a space before (PLMT)
OK
>
> > holds memory-mapped
Hi Bin
Bin Meng 於 2019年3月29日 週五 下午5:20寫道：
>
> Hi Rick,
>
> On Mon, Mar 25, 2019 at 3:39 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > The Platform-Level Interrupt Controller(PLIC)
>
> nits: it should have a space before (PLIC)
OK
>
> > bl
Hi Bin
Bin Meng 於 2019年4月1日 週一 下午5:01寫道：
>
> Hi Rick,
>
> On Mon, Apr 1, 2019 at 4:29 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Changes in v3:
> > Patch 1
> > - Rename plic_init() as enable_ipi()
> > - Remove PLIC_BASE_GET() from e
Hi Lukas
Auer, Lukas 於 2019年4月1日 週一 下午5:09寫道：
>
> Hi Rick,
>
> On Mon, 2019-04-01 at 16:24 +0800, Andes wrote:
> > From: Rick Chen
> >
> > The platform-Level Machine Timer (PLMT) block
> > holds memory-mapped mtime register associated
> > with time
Hi Lukas
>Auer, Lukas 於 2019年4月1日 週一 下午5:08寫道：
>
> Hi Rick,
>
> On Mon, 2019-04-01 at 16:24 +0800, Andes wrote:
> > From: Rick Chen
> >
> > The Platform-Level Interrupt Controller (PLIC)
> > block holds memory-mapped claim and pending registers
> &
Hi Lukas
Auer, Lukas 於 2019年4月1日 週一 下午5:13寫道：
>
> Hi Rick,
>
> On Mon, 2019-04-01 at 16:24 +0800, Andes wrote:
> > From: Rick Chen
> >
> > Disable ATCPIT100 SoC timer and replace by PLMT.
> >
> > Signed-off-by: Rick Chen
> > Cc: Greentime Hu
Hi Bin and Lukas
Rick Chen 於 2019年4月2日 週二 上午9:22寫道：
>
> Hi Bin
>
> Bin Meng 於 2019年4月1日 週一 下午5:01寫道：
> >
> > Hi Rick,
> >
> > On Mon, Apr 1, 2019 at 4:29 PM Andes wrote:
> > >
> > > From: Rick Chen
> > >
> > &g
Hi Bin
Bin Meng 於 2019年4月4日 週四 下午9:49寫道：
>
> Hi Rick,
>
> On Wed, Apr 3, 2019 at 9:37 AM Rick Chen wrote:
> >
> > Hi Bin and Lukas
> >
> > Rick Chen 於 2019年4月2日 週二 上午9:22寫道：
> > >
> > > Hi Bin
> > >
> > > Bin Meng 於 2019年
Hi Bin and Lukas
Bin Meng 於 2019年3月21日 週四 下午5:17寫道：
>
> Hi Rick,
>
> On Thu, Mar 21, 2019 at 5:00 PM Rick Chen wrote:
> >
> > Bin Meng 於 2019年3月21日 週四 下午4:49寫道：
> > >
> > > Hi Rick,
> > >
> > > On Thu, Mar 21, 2019 at 4:27 PM Rick Che
Hi Lukas
Auer, Lukas 於 2019年4月10日 週三 下午5:21寫道：
>
> Hi Rick,
>
> On Wed, 2019-04-10 at 17:05 +0800, Rick Chen wrote:
> > Hi Bin and Lukas
> >
> > Bin Meng 於 2019年3月21日 週四 下午5:17寫道：
> > > Hi Rick,
> > >
> > > On Thu, Mar 21, 2019 at 5:00 P
Hi Bin
Bin Meng 於 2019年5月9日 週四 上午9:32寫道：
>
> Hi Rick,
>
> On Thu, May 9, 2019 at 9:30 AM Andes wrote:
> >
> > From: Rick Chen
> >
> > This patch will fix Travis failure item as below:
> > https://travis-ci.org/rickchen36/u-boot-riscv/jobs/529605196
>
Hi Bin
Bin Meng 於 2019年5月9日 週四 上午10:21寫道：
>
> Hi Rick,
>
> On Thu, May 9, 2019 at 10:01 AM Rick Chen wrote:
> >
> > Hi Bin
> >
> > Bin Meng 於 2019年5月9日 週四 上午9:32寫道：
> > >
> > > Hi Rick,
> > >
> > > On T
> From: Marek Vasut [mailto:marek.va...@gmail.com]
> Sent: Tuesday, May 07, 2019 9:11 AM
> To: Atish Patra; u-boot@lists.denx.de
> Cc: Tom Rini; Karsten Merker; Alexander Graf; Alex Kiernan; Anup Patel; Bin
> Meng; Heinrich Schuchardt; Joe Hershberger; Lukas Auer; Michal Simek; Rick
> Jian-Zhi Chen
> Subject: Re: [PATCH 2/2] riscv: qemu-riscv.h: define CONFIG_PREBOOT (enables
> extlinux)
>
> On Fri, Apr 12, 2019 at 12:38 AM Auer, Lukas
> wrote:
> >
> > On Thu, 2019-04-11 at 14:51 +0200, David Abdurachmanov wrote:
> > > On Thu, Apr 11, 2019 at 2:41 PM Auer, Lukas
> > > wrote:
> > > > + Bin
>
> Subject: Re: [U-Boot] [PATCH 1/2] riscv: set CONFIG_SYS_BOOTM_LEN to
> SZ_64M
>
> On Tue, Apr 9, 2019 at 8:30 PM David Abdurachmanov
> wrote:
> >
> > After updating Fedora/RISCV kernel to 5.1-rc3+ the size increased
> > above the current threshold. Looking into HiKey, Dragonboards, etc.
> > seem
Hi Lukas
> > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Thursday, July 18, 2019 4:53 PM
> > To: Rick Jian-Zhi Chen(陳建志); u-boot@lists.denx.de; bmeng...@gmail.com;
> > anup.pa...@wdc.com
> > Subject: Re: [PATCH 2/2] riscv: Access CSRs using CSR numbers
> >
> > Hi Bin,
> >
>
Hi Paul
> Hi Rick and other U-Boot folks,
>
> On Fri, 7 Jun 2019, Bin Meng wrote:
>
> > Hi Paul,
> >
> > On Fri, Jun 7, 2019 at 1:45 PM Paul Walmsley
> > wrote:
> > >
> > > Hello Bin,
> > >
> > > On Fri, 31 May 2019, Paul Walmsley wrote:
> > >
> > > > On Thu, 30 May 2019, Bin Meng wrote:
> > > >
Hi Sagar
> From: Sagar Kadam [mailto:sagar.ka...@sifive.com]
> Sent: Friday, July 19, 2019 7:37 PM
> To: Rick Jian-Zhi Chen(陳建志)
> Subject: Re: [U-Boot] [PATCH] riscv : serial: use rx watermark to indicate rx
> data is present
>
> Hello Rick,
>
> I missed to CC you while submitting the patch[1] C
Hi Anup
> Hi Rick,
>
> On Fri, Jul 26, 2019 at 12:32 PM Rick Chen wrote:
> >
> > Hi Sagar
> >
> > > From: Sagar Kadam [mailto:sagar.ka...@sifive.com]
> > > Sent: Friday, July 19, 2019 7:37 PM
> > > To: Rick Jian-Zhi Chen(陳建志)
> > >
Rick Chen 於 2019年7月18日 週四 上午11:25寫道：
>
> > > From: Bin Meng [mailto:bmeng...@gmail.com]
> > > Sent: Thursday, July 11, 2019 2:43 PM
> > > To: Rick Jian-Zhi Chen(陳建志); Anup Patel; Lukas Auer; U-Boot Mailing List
> > > Subject: [PATCH 2/2] riscv: Access CSRs
> > From: Bin Meng [mailto:bmeng...@gmail.com]
> > Sent: Thursday, July 11, 2019 2:43 PM
> > To: Rick Jian-Zhi Chen(陳建志); Anup Patel; Lukas Auer; U-Boot Mailing List
> > Subject: [PATCH 1/2] riscv: Sync csr.h with Linux kernel v5.2
> >
> > This syncs csr.h with Linux kernel 5.2, and imports asm.h t
> > From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Anup Patel
> > Sent: Friday, July 26, 2019 6:43 PM
> > To: Rick Chen
> > Cc: Alan Quey-Liang Kao(高魁良); Alexander Graf; U-Boot Mailing List; K.C.
> > Kuen-Chern Lin(林坤成)
> > Subject: Re: [U-
Hi Lukas
> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Sunday, July 28, 2019 11:57 PM
> > To: u-boot@lists.denx.de
> > Cc: Atish Patra; Rick Jian-Zhi Chen(陳建志); Bin Meng; Sagar Kadam; Alistair
> > Francis; Anup Patel; Troy Benjegerdes; Lukas Auer; Abel Vesa; Alex Kiernan;
Hi Lukas
>
> Hi Rick,
>
> On Thu, 2019-08-01 at 11:32 +0800, Rick Chen wrote:
> > Hi Lukas
> >
> > > > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > > > Sent: Sunday, July 28, 2019 11:57 PM
> > > > To: u-boot@lists.denx.d
t; > hosts
> >
> > All ELF fields whose values are inspected by the code are converted to CPU
> > byteorder first. Values which are copied verbatim (relocation
> > fixups) are not swapped to CPU byteorder and back as it is not needed.
> >
> &
prelink-riscv
> >
> > Signed-off-by: Marcus Comstedt
> > Cc: Rick Chen
> > ---
> > Changes for v2:
> >- Added
> >
> > tools/prelink-riscv.c | 34 ++
> > tools/prelink-riscv.inc | 62 ++--
Hi Marcus
> > From: Marcus Comstedt [mailto:mar...@mc.pp.se]
> > Sent: Thursday, August 08, 2019 4:36 AM
> > To: Rick Chen
> > Cc: U-Boot Mailing List; Rick Jian-Zhi Chen(陳建志); K.C. Kuen-Chern Lin(林坤
> > 成)
> > Subject: Re: [PATCH v2 2/2] riscv: tools: Add big
/qemu-riscv/Kconfig
> > +++ b/board/emulation/qemu-riscv/Kconfig
> > @@ -22,6 +22,7 @@ config SPL_TEXT_BASE
> > default 0x8000
> >
> > config SPL_OPENSBI_LOAD_ADDR
> > + hex
> > default 0x8100
> >
> > config BOARD_SPE
> device_type = ofnode_read_string(node, "device_type");
> > if (!device_type)
> > continue;
> > --
> > 2.7.4
>
Reviewed-by: Rick Chen
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Hi Lukas and Anup
>
> Hi Rick,
>
> On Fri, 2019-08-02 at 14:18 +0530, Anup Patel wrote:
> > On Fri, Aug 2, 2019 at 2:11 PM Rick Chen wrote:
> > > Hi Lukas
> > >
> > > > Hi Rick,
> > > >
> > > > On Thu, 2019-08-01 at 11:32
Hi Lukas
> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Thursday, August 08, 2019 5:12 AM
> > To: u-boot@lists.denx.de
> > Cc: Atish Patra; Rick Jian-Zhi Chen(陳建志); Bin Meng; Sagar Kadam; Alistair
> > Francis; Anup Patel; Troy Benjegerdes; Lukas Auer; Abel Vesa; Alex Kierna
Hi Lukas
> > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Thursday, August 08, 2019 10:04 PM
> > To: bmeng...@gmail.com
> > Cc: Rick Jian-Zhi Chen(陳建志); u-boot@lists.denx.de
> > Subject: Re: [PATCH] riscv: cpu: Skip unavailable hart in the get_count() op
> >
> > Hi Bin,
> >
Hi Lukas
> > From: Tom Rini [mailto:tr...@konsulko.com]
> > Sent: Wednesday, August 14, 2019 12:50 AM
> > To: Open Source Project uboot
> > Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> > Subject: Re: [U-Boot] Pull request: u-boot-riscv/master
> >
> > On Mon, Aug 12, 2019 at 06:23:02PM +0800
Hi Bin
>
> On Tue, Jul 9, 2019 at 5:34 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Flush and disable cache in cleanup_before_linux()
> > which will be called before jump to linux.
> >
> > The sequence will be preferred as below:
>
Hi Bin
>
> On Tue, Jul 9, 2019 at 5:34 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > Add a v5l2 cache controller driver that is usually found on
> > Andes RISC-V ae350 platform. It will parse the cache settings
> > from the dtb.
> >
> >
Hi Bin
>
> On Tue, Jul 9, 2019 at 5:33 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > The L2 cache will be enabled in init flow of dm cache
> > driver when it detect L2 node in dtb.
> >
> > When U-Boot jump to Linux Kernel, the disable ops wil
Hi Tom
> Sent: Thursday, July 18, 2019 1:00 AM
> To: Simon Glass; Rick Jian-Zhi Chen(陳建志)
> Cc: Anup Patel; Atish Patra; U-Boot Mailing List
> Subject: Re: SiFive clock driver changes for U-Boot 2019.10
>
> On Wed, Jul 17, 2019 at 10:44:23AM -0600, Simon Glass wrote:
> > Hi,
> >
> > On Wed, 17 Jul
Hi Anup
>
> Hi Tom
>
> > Sent: Thursday, July 18, 2019 1:00 AM
> > To: Simon Glass; Rick Jian-Zhi Chen(陳建志)
> > Cc: Anup Patel; Atish Patra; U-Boot Mailing List
> > Subject: Re: SiFive clock driver changes for U-Boot 2019.10
> >
> > On Wed, Jul 17, 2019 at 10:44:23AM -0600, Simon Glass wrote:
> >
++
> > arch/riscv/include/asm/csr.h | 62
> > +---
> > 2 files changed, 114 insertions(+), 16 deletions(-) create mode
> > 100644 arch/riscv/include/asm/asm.h
> >
> >
> > Ping?
LGTM.
Reviewed-by: Rick Che
-#define CSR_HPMCOUNTER14 0xc0e
> > -#define CSR_HPMCOUNTER15 0xc0f
> > -#define CSR_HPMCOUNTER16 0xc10
> > -#define CSR_HPMCOUNTER17 0xc11
> > -#define CSR_HPMCOUNTER18 0xc12
> > -#define CSR_HPMCOUNTER19 0xc13
> > -#define CSR_HPMCOUNTER20 0xc14
> > -#define CSR_HPMCOUNTER21 0xc15
> > -#define CSR_HPMCOUNTER22 0xc16
> > -#define CSR_HPMCOUNTER23 0xc17
> > -#define CSR_HPMCOUNTER24 0xc18
> > -#define CSR_HPMCOUNTER25 0xc19
> > -#define CSR_HPMCOUNTER26 0xc1a
> > -#define CSR_HPMCOUNTER27 0xc1b
> > -#define CSR_HPMCOUNTER28 0xc1c
> > -#define CSR_HPMCOUNTER29 0xc1d
> > -#define CSR_HPMCOUNTER30 0xc1e
> > -#define CSR_HPMCOUNTER31 0xc1f
> > -#define CSR_CYCLEH 0xc80
> > -#define CSR_TIMEH0xc81
> > -#define CSR_INSTRETH 0xc82
> > -#define CSR_HPMCOUNTER3H 0xc83
> > -#define CSR_HPMCOUNTER4H 0xc84
> > -#define CSR_HPMCOUNTER5H 0xc85
> > -#define CSR_HPMCOUNTER6H 0xc86
> > -#define CSR_HPMCOUNTER7H 0xc87
> > -#define CSR_HPMCOUNTER8H 0xc88
> > -#define CSR_HPMCOUNTER9H 0xc89
> > -#define CSR_HPMCOUNTER10H0xc8a
> > -#define CSR_HPMCOUNTER11H0xc8b
> > -#define CSR_HPMCOUNTER12H0xc8c
> > -#define CSR_HPMCOUNTER13H0xc8d
> > -#define CSR_HPMCOUNTER14H0xc8e
> > -#define CSR_HPMCOUNTER15H0xc8f
> > -#define CSR_HPMCOUNTER16H0xc90
> > -#define CSR_HPMCOUNTER17H0xc91
> > -#define CSR_HPMCOUNTER18H0xc92
> > -#define CSR_HPMCOUNTER19H0xc93
> > -#define CSR_HPMCOUNTER20H0xc94
> > -#define CSR_HPMCOUNTER21H0xc95
> > -#define CSR_HPMCOUNTER22H0xc96
> > -#define CSR_HPMCOUNTER23H0xc97
> > -#define CSR_HPMCOUNTER24H0xc98
> > -#define CSR_HPMCOUNTER25H0xc99
> > -#define CSR_HPMCOUNTER26H0xc9a
> > -#define CSR_HPMCOUNTER27H0xc9b
> > -#define CSR_HPMCOUNTER28H0xc9c
> > -#define CSR_HPMCOUNTER29H0xc9d
> > -#define CSR_HPMCOUNTER30H0xc9e
> > -#define CSR_HPMCOUNTER31H0xc9f
> > -
> > -#define CSR_MVENDORID0xf11
> > -#define CSR_MARCHID 0xf12
> > -#define CSR_MIMPID 0xf13
> > -#define CSR_MHARTID 0xf14
> > -
> > #endif /* __riscv */
> >
> > #endif /* RISCV_CSR_ENCODING_H */
Reviewed-by: Rick Chen
> > --
> > 2.7.4
>
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