From: York Sun
Reading DDR register should use ddr_in32() for proper endianess.
This patch fixes incorrect waiting time for ARM platforms.
Signed-off-by: York Sun
---
Change log:
v2: no change.
drivers/ddr/fsl/arm_ddr_gen3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Signed-off-by: Alison Wang
---
Change log:
v2: no change.
drivers/i2c/mxc_i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 48468d7..792fc40 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -423,7
Signed-off-by: Alison Wang
Signed-off-by: Jason Jin
Signed-off-by: York Sun
Signed-off-by: Yuan Yao
Signed-off-by: Prabhakar Kushwaha
---
Change log:
v2: Remove ethaddr/ipaddr setting.
Add board maintainer.
Add serdes and multiple ethernet controllers support.
board/freescale
This patch adds SD boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Alison Wang
Signed-off-by: Jason Jin
/TWR board basic support patches.
Alison Wang (2):
arm: ls102xa: Add SD boot support for LS1021AQDS board
arm: ls102xa: Add SD boot support for LS1021ATWR board
Makefile | 15
This patch adds SD boot support for LS1021ATWR board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Alison Wang
Signed-off-by: Jason Jin
The following commit introduces some build failures for ColdFire
platform.
commit abaef69fbe683197607febeb2cc619490aca2a10
Author: Marek Vasut
Date: Thu Sep 13 16:51:38 2012 +0200
Add the missed header files.
Sign-off-by: Alison Wang
---
drivers/serial/mcfuart.c |2 ++
1 files changed
This series contains the support for MCF5441x CPU and MCF54418TWR ColdFire
development board.
Alison Wang (2):
ColdFire: Add MCF5441x CPU support
ColdFire: Add Freescale MCF54418TWR ColdFire development board support
arch/m68k/cpu/mcf5445x/config.mk | 10 +
arch/m68k/cpu
Add Freescale MCF54418TWR ColdFire development board support.
Signed-off-by: TsiChung Liew
Signed-off-by: Jason Jin
Signed-off-by: Alison Wang
---
board/freescale/m54418twr/Makefile| 43
board/freescale/m54418twr/config.mk | 25 ++
board/freescale/m54418twr/m54418twr.c | 130
Fix the following build warnings in cpu_init.c:
cpu_init.c: In function 'cpu_init_f':
cpu_init.c:47:9: warning: unused variable 'pll'
cpu_init.c:46:10: warning: unused variable 'fbcs'
cpu_init.c:44:10: warning: unused variable 'scm1'
Signed-off-by:
This patch rewrites MMU translation table entries. To start, all table
entries are written as "invalid", then "device-ngnrnr" and "normal" are
written to the entries to enable access to specific addresses.
Signed-off-by: Alison Wang
Signed-off-by: York Sun
---
As the environment variables "serial#" and "ethaddr" need to be
overwriten by the users, CONFIG_ENV_OVERWRITE is defined to disable
the write protection. Anybody can change or delete these parameters.
Signed-off-by: Alison Wang
---
include/configs/ls2085a_common.h | 3 ++
This patch rewrites MMU translation table entries to achieve:
a) Start with all table entries as "invalid".
b) Rewrite the table entries as "device-ngnrne" for cache-inhibit
access.
c) Rewrite the table entries as "normal" for cache-enabled access.
Signed-off-by: Al
.
[1]
https://lists.yoctoproject.org/pipermail/meta-freescale/2015-June/014400.html
Signed-off-by: Chris Kilgour
Signed-off-by: Alison Wang
---
arch/arm/cpu/armv7/ls102xa/cpu.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls
Pointer 'reg' returned from call to function 'fdt_getprop' may be
NULL, will be passed to function and may be dereferenced there by
passing argument 1 to function 'of_read_number'. So check pointer
'reg' first.
Signed-off-by: Alison Wang
---
arch/arm/
the value read from SCTLR, it causes CR_M bit is not set.
Then MMU is not enabled, the access to VA for PCIE fails.
This patch will add the missing volatile for reading SCTLR register.
Signed-off-by: Alison Wang
---
arch/arm/include/asm/system.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion
used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is
used to support QSPI in SD boot.
Signed-off-by: Alison Wang
---
Makefile | 4
board/freescale/ls1021atwr/MAINTAINERS | 3 ++-
board/freescale/ls1021atwr/ls1021a
As the function 'sprintf' does not check buffer boundaries but outputs
to the buffer 'enet' of fixed size (16), this patch removes the function
'sprintf', and uses 'strcpy' instead. It will assign the character
arrays 'enet' and 'phy'
As SCFG_ENDIANCR register is added to choose little-endian or big-endian
for audio IPs on Rev2.0 silion, little-endian mode is selected.
Signed-off-by: Alison Wang
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 ++-
board/freescale/ls1021aqds/ls1021aqds.c | 3 +++
board
From: Zhichun Hua
For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit
position [13:12] of TCR_ELx register.
Signed-off-by: Zhichun Hua
Signed-off-by: York Sun
---
arch/arm/include/asm/armv8/mmu.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/i
From: Zhichun Hua
When final MMU table is setup in DDR, TCR attributes must match
those of the memroy for cacheability and shareability.
Signed-off-by: Zhichun Hua
Signed-off-by: York Sun
---
arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 23 ---
1 file changed, 8 insertions(+), 15
On LS1021A Rev2.0, OCRAM's security level needs to be changed to
non-secure access for SD boot. This patch will allow OCRAM
access permission as R/W in SPL.
Signed-off-by: Alison Wang
---
board/freescale/ls1021aqds/ls1021aqds.c | 178 +---
board/freescale/ls102
To improve eTSEC performance on LS1021A Rev2.0,
snooping of all transmit frames from memory and
all transmit BD memory accesses in enabled.
Signed-off-by: Alison Wang
---
include/tsec.h | 4
1 file changed, 4 deletions(-)
diff --git a/include/tsec.h b/include/tsec.h
index 58cdc19..1119d2c
This patch rewrites MMU translation table entries to achieve:
a) Start with all table entries as "invalid".
b) Rewrite the table entries as "device-ngnrne" for cache-inhibit
access.
c) Rewrite the table entries as "normal" for cache-enabled access.
Signed-off-by: Al
s the issue.
[1]
https://lists.yoctoproject.org/pipermail/meta-freescale/2015-June/014400.html
Signed-off-by: Chris Kilgour
Signed-off-by: Alison Wang
---
arch/arm/cpu/armv7/ls102xa/timer.c| 3 ++-
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +-
2 files changed, 3 inser
Acked-by: Alison Wang
--
View this message in context:
http://u-boot.10912.n7.nabble.com/PATCH-ls1021atwr-added-deep-sleep-support-in-uboot-tp214734p219806.html
Sent from the U-Boot mailing list archive at Nabble.com.
___
U-Boot mailing list
U-Boot
Acked-by: Alison Wang
Zhao Chenhui-3 wrote
> Program the external regulator to switch off voltage in deep sleep.
>
> Signed-off-by: Chenhui Zhao <
> chenhui.zhao@
> >
> ---
> board/freescale/ls1021atwr/ls1021atwr.c | 34
> +
&g
On QDS board with DDR4 DIMM, LPUART is used as console
output to verify DCU driver. This patch adds
ls1021aqds_ddr4_nor_lpuart_defconfig for this support.
Signed-off-by: Alison Wang
---
board/freescale/ls1021aqds/MAINTAINERS | 1 +
configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 3 +++
2
This patch will enable regulation of outstanding read
transactions for slave interface S2 for silicon VER1.0.
Signed-off-by: Alison Wang
---
Changes in v2:
- Modify the subject and commit to describe accurately
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 ++
board/freescale
For LS102xA, some workarounds are only used in VER1.0, so silicon
version detection are added for QDS and TWR boards.
Signed-off-by: Alison Wang
---
Changes in v2:
- Modify the subject to describe accurately
- Change SOC_VER_1_0 and SOC_VER_2_0 to SOC_MAJOR_VER_1_0 and SOC_MAJOR_VER_2_0
- Define
used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is
used to support QSPI in SD boot.
Signed-off-by: Alison Wang
---
Changes in v2:
- Fix checkpatch warnings about line over 80 characters.
Makefile | 4
board/freescale/ls102
to the value of 0x. The
device tree blob will not get relocated and is still in low memory to
make it accessible to the kernel.
For the same reason, initrd_high is set to the value of 0x too.
Signed-off-by: Alison Wang
---
include/configs/ls1021atwr.h | 8
1 file changed
As QSPI/DSPI and IFC are pin multiplexed, IFC is disabled
in SD boot for QSPI. This patch will add fdt support for
this rule.
Signed-off-by: Alison Wang
---
arch/arm/cpu/armv7/ls102xa/fdt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b
-by: Alison Wang
---
include/configs/ls1021aqds.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index d19b1e3..562e78f 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -69,7 +69,7
For most device addresses excution shouldn't be allowed. Revise
the MMU table to enforce execute-never bits. OCRAM, DDR and IFC
are allowed for excution.
Signed-off-by: York Sun
Signed-off-by: Alison Wang
Reported-by: Zhichun Hua
---
arch/arm/cpu/armv8/cache_v8.c
: Alison Wang
---
include/configs/ls1021aqds.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 562e78f..489db9c 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -579,14 +579,14
This patch updates the copyright claim for the issues reported by Legal
Review.
Signed-off-by: Alison Wang
---
board/freescale/ls2080ardb/ls2080ardb.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c
b/board/freescale/ls2080ardb
calling hang().
This patch will add timer_init() in board_init_f for SPL and fix a
series of issues it caused.
Signed-off-by: Alison Wang
---
board/freescale/ls1021aqds/ls1021aqds.c |1 +
board/freescale/ls1021atwr/ls1021atwr.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff
Hi, Stefano,
I don't have vf610 boards now. I am afraid I could not verify it too.
Best Regards,
Alison Wang
>-Original Message-
>From: Stefano Babic
>Sent: 2018年10月23日 0:05
>To: Alison Wang
>Cc: U-Boot@lists.denx.de
>Subject: Regression: vf610twr build error
&
and armv8_switch_to_el1_m.
----
Alison Wang (2):
armv8: Support loading 32-bit OS in AArch32 execution state
armv8: fsl-layerscape: SMP support for loading 32-bit OS
arch/arm/Kconfig | 6 ++
arch/arm/cpu/armv8/fsl-lay
Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
Signed-off-by: Alison
To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.
The architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.
Signed-off-by: Ebony Zhu
Signed-off-by: Alison Wang
As CONFIG_ARMV8_SWITCH_TO_EL1 is not used now, this patch is to remove
CONFIG_ARMV8_SWITCH_TO_EL1 and the corresponding functions.
Signed-off-by: Alison Wang
---
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 13
arch/arm/cpu/armv8/start.S | 5 +--
arch/arm/cpu/armv8
As the issue about the stack will get corrupted when switching between
the early and final mmu tables is fixed by commit
70e21b06425ad6e1e90931333a704a600941cfff, the workaround to flush dcache
is unnecessary and will be removed.
Signed-off-by: Alison Wang
---
arch/arm/cpu/armv8/fsl-layerscape
In defconfig, enable CONFIG_OF_LIBFDT to support booting DT linux kernel
and enable COFNIG_FIT to support FIT image.
Signed-off-by: Alison Wang
---
configs/ls1021aqds_ddr4_nor_defconfig| 3 +++
configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 3 +++
configs/ls1021aqds_nand_defconfig
used to support IFC in SD boot and ls1021aqds_sdcard_qspi_defconfig
is used to support QSPI in SD boot.
Signed-off-by: Alison Wang
---
board/freescale/ls1021aqds/MAINTAINERS | 3 ++-
board/freescale/ls1021aqds/ls1021aqds.c| 4 ++--
board/freescale/ls102
The initialization for smmu and stream id is moved into the common soc
code.
Signed-off-by: Alison Wang
---
arch/arm/cpu/armv7/ls102xa/soc.c| 48 +
arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h | 2 ++
board/freescale/ls1021aqds/ls1021aqds.c
to be called in ar8035_config() to enable and restart
auto-negotiation.
Signed-off-by: Alison Wang
---
drivers/net/phy/atheros.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index ba57b1a..e57c412 100644
--- a/drivers/net/phy/athe
In general, a carriage return needs to execute before a line feed.
The patch is to change serial DM driver based on this rule.
Signed-off-by: Alison Wang
---
drivers/serial/serial-uclass.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/serial-uclass.c b
In general, a carriage return needs to execute before a line feed.
The patch is to change some serial drivers based on this rule, such
as serial_mxc.c, serial_pxa.c, serial_s3c24x0.c and usbtty.c.
Signed-off-by: Alison Wang
---
drivers/serial/serial_mxc.c | 8
drivers/serial
As the compatible property values for QSPI and DSPI dts nodes
are changed in kernel, FSL_QSPI_COMPAT and FSL_DSPI_COMPAT
need to be updated too.
Signed-off-by: Alison Wang
---
arch/arm/include/asm/arch-ls102xa/config.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch
n the monitor.
The patch is to disabled CONFIG_DM_STDIO for LCD/HDMI display.
Signed-off-by: Alison Wang
---
include/configs/ls1021aqds.h | 4
include/configs/ls1021atwr.h | 4
2 files changed, 8 insertions(+)
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
In general, a carriage return needs to execute before a line feed. The
patch is to change serial DM driver serial-uclass.c based on this rule.
Signed-off-by: Alison Wang
---
drivers/serial/serial-uclass.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/serial
This serial is to fix the error handling for carriage return and line feed.
Alison Wang (3):
dm: serial-uclass: Move a carriage return before a line feed
serial: Move carriage return before line feed for some serial
In general, a carriage return needs to execute before a line feed.
The patch is to change some serial drivers based on this rule, such
as serial_mxc.c, serial_pxa.c, serial_s3c24x0.c and usbtty.c.
Signed-off-by: Alison Wang
---
drivers/serial/serial_mxc.c | 8
drivers/serial
As the handling for carriage return and line feed is done in the common
DM driver serial-uclass.c, such handling in some serial DM drivers is
duplicated and need to be removed.
Signed-off-by: Alison Wang
---
drivers/serial/serial_arc.c| 3 ---
drivers/serial/serial_lpuart.c | 6 --
2
To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.
The architecture information will be got through checking FIT
image, then U-Boot will load 32-bit OS or 64-bit OS automatically.
Signed-off-by: Ebony Zhu
Signed-off-by: Alison Wang
.
Alison Wang (2):
armv8: Support loading 32-bit OS in AArch32 execution state
armv8: fsl-layerscape: SMP support for loading 32-bit OS
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 21 +++
arch/arm/cpu/armv8/fsl-layerscape
Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
Signed-off-by: Alison
. armv8_switch_to_el2_m is used
to switch to AArch64 EL2 or AArch32 Hyp.
- armv8_switch_to_el1_aarch32() is removed. armv8_switch_to_el1_m is used
to switch to AArch64 EL1 or AArch32 SVC.
Alison Wang (2):
armv8: Support loading 32
To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.
The architecture information will be got through checking FIT
image, then U-Boot will load 32-bit OS or 64-bit OS automatically.
Signed-off-by: Ebony Zhu
Signed-off-by: Alison Wang
Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
Signed-off-by: Alison
To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.
The architecture information will be got through checking FIT
image, then U-Boot will load 32-bit OS or 64-bit OS automatically.
Signed-off-by: Ebony Zhu
Signed-off-by: Alison Wang
to switch to AArch64 EL1 or AArch32 SVC.
- Support to call armv8_switch_to_el2_m and armv8_switch_to_el1_m.
Alison Wang (2):
armv8: Support loading 32-bit OS in AArch32 execution state
armv8: fsl-layerscape: SMP suppor
Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
Signed-off-by: Alison
32 SVC.
- Support to call armv8_switch_to_el2_m and armv8_switch_to_el1_m.
Alison Wang (2):
armv8: Support loading 32-bit OS in AArch32 execution state
armv8: fsl-layerscape: SMP support for loading 32-bit OS
arch/arm/Kconfig | 6
arch/arm/cpu/armv8/fsl-lay
To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.
The architecture information will be got through checking FIT
image, then U-Boot will load 32-bit OS or 64-bit OS automatically.
Signed-off-by: Ebony Zhu
Signed-off-by: Alison Wang
Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
Signed-off-by: Alison
Hi, York,
> On 09/23/2016 01:15 AM, Alison Wang wrote:
> > GENERIC_TIMER_CLK and CONFIG_TIMER_CLK_FREQ are both used to define
> > Generic Timer frequency. It is reduplicate. This patch will remove
> > GENERIC_TIMER_CLK macro.
> >
> > Signed-off-by: Alison Wang
To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.
The architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.
Signed-off-by: Ebony Zhu
Signed-off-by: Alison Wang
> -邮件原件-
> 发件人: york sun [mailto:york@nxp.com]
> 发送时间: Thursday, October 06, 2016 3:00 AM
> 收件人: Alison Wang ; ag...@suse.de; Scott Wood
> ; Stuart Yoder ; Leo Li
> ; feng...@phytium.com.cn; linus.wall...@linaro.org;
> ryan.har...@linaro.org; mon...@monstr.eu;
32 SVC.
- Support to call armv8_switch_to_el2_m and armv8_switch_to_el1_m.
----
Alison Wang (2):
armv8: Support loading 32-bit OS in AArch32 execution state
armv8: fsl-layerscape: SMP support for loading 32-
Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
Signed-off-by: Alison
to fsl_dp_resume() which executes after dram_init().
Signed-off-by: Alison Wang
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 ++
board/freescale/ls1021aqds/ls1021aqds.c | 28 ---
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/arch/arm
From: Chenhui Zhao
When resuming from deep sleep, the I2C channel may not be
in the default channel. So, switch to the default channel
before accessing DDR SPD.
Signed-off-by: Chenhui Zhao
---
board/freescale/ls1021aqds/ls1021aqds.c | 32 +++-
1 file changed, 19 ins
CAAM is connected to CCI-400 S0 slave interface. Disable snooping for
S0 will cause CAAM self test failure. This patch is to enable snooping
for S0 slave interface.
Signed-off-by: Alison Wang
---
board/freescale/ls1021aqds/ls1021aqds.c | 3 +--
board/freescale/ls1021atwr/ls1021atwr.c | 3 +--
2
This patch will fix the bug that the partitions on the SD card could
not be accessed and add the support for the FAT fs.
Signed-off-by: Alison Wang
---
include/configs/ls1021aqds.h | 3 +++
include/configs/ls1021atwr.h | 3 +++
2 files changed, 6 insertions(+)
diff --git a/include/configs
variable: bootmode
Signed-off-by: Alison Wang
---
arch/m68k/cpu/mcf5227x/speed.c | 2 +-
arch/m68k/cpu/mcf532x/speed.c | 3 ++-
arch/m68k/cpu/mcf5445x/speed.c | 2 +-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/m68k/cpu/mcf5227x/speed.c b/arch/m68k/cpu/mcf5227x/speed.c
index
As QSPI/DSPI and IFC are pin multiplexed, QSPI and DSPI are
only enabled in QSPI boot, and disabled in other boot modes.
IFC is enabled in NOR/NAND/SD boot, and disabled in QSPI boot.
This patch will add fdt support for the above rules.
Signed-off-by: Alison Wang
---
arch/arm/cpu/armv7/ls102xa
This patch adds LPUART support for LS1021AQDS board.
For ls1021aqds_nor_lpuart_defconfig, LPUART is used as the console.
Signed-off-by: Alison Wang
---
board/freescale/ls1021aqds/MAINTAINERS | 1 +
configs/ls1021aqds_nor_lpuart_defconfig | 3 +++
include/configs/ls1021aqds.h| 13
This patch adds LPUART support for LS1021ATWR board.
For ls1021atwr_nor_lpuart_defconfig, LPUART is used as the console.
Signed-off-by: Alison Wang
---
board/freescale/ls1021atwr/MAINTAINERS | 1 +
configs/ls1021atwr_nor_lpuart_defconfig | 3 +++
include/configs/ls1021atwr.h| 12
There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id
for using the same SMMU3 on LS1021A.
Signed-off-by: Xiubo Li
Signed-off-by: Alison Wang
---
arch/arm/include/asm/arch-ls102xa/config.h | 1 +
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 37
requests and DVM message requests are enabled.
Signed-off-by: Alison Wang
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 ++
board/freescale/ls1021aqds/ls1021aqds.c | 21 ---
board/freescale/ls1021atwr/ls1021atwr.c | 25 ++-
3 files
There 4 JRs, 4 RTICs and 8 DECOs, and set them the same stream id
for using the same SMMU3 on LS1021A.
Signed-off-by: Xiubo Li
Signed-off-by: Alison Wang
---
Changes in v2:
- Move changing CCSR macros to a separated patch.
arch/arm/include/asm/arch-ls102xa/config.h | 1
This patch is to define default values for some CCSR macros
to make header files cleaner.
Signed-off-by: Alison Wang
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm/include/asm/arch-ls102xa
To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.
The architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.
Signed-off-by: Ebony Zhu
Signed-off-by: Alison Wang
Arch64 EL2 or AArch32 Hyp.
- armv8_switch_to_el1_aarch32() is removed. armv8_switch_to_el1_m is used
to switch to AArch64 EL1 or AArch32 SVC.
- Support to call armv8_switch_to_el2_m and armv8_switch_to_el1_m.
----
Alison Wang (2):
armv8:
This patch is to use the the generic lowlevel_init instead of the
specific one.
Signed-off-by: Alison Wang
---
arch/arm/mach-exynos/soc.c | 8
1 file changed, 8 deletions(-)
diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c
index f9c7468..737a8dd 100644
--- a/arch
Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.
Signed-off-by: Alison
GENERIC_TIMER_CLK and CONFIG_TIMER_CLK_FREQ are both used to define
Generic Timer frequency. It is reduplicate. This patch will remove
GENERIC_TIMER_CLK macro.
Signed-off-by: Alison Wang
---
arch/arm/cpu/armv7/ls102xa/psci.S | 2 +-
arch/arm/cpu/armv7/ls102xa/timer.c | 2 +-
include/configs
CONFIG_SYS_CONSOLE_IS_IN_ENV needs to be enabled, so we could set stdout
environment variable to specify the vga for the console output when
LCD/HDMI is connected to the boards.
Signed-off-by: Alison Wang
---
include/configs/ls1021aqds.h | 1 +
include/configs/ls1021atwr.h | 1 +
2 files
As QSPI driver is supported in ls1021atwr_sdcard_qspi_defconfig,
CONFIG_MTD needs to be enabled for SPI-NOR with MTD uclass.
Signed-off-by: Alison Wang
---
configs/ls1021atwr_sdcard_qspi_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig
b
As QSPI driver is supported in ls1021aqds_sdcard_qspi_defconfig, SPI-NOR
with MTD uclass, CONFIG_MTD_DATAFLASH and new flash vendor config
CONFIG_SPI_NOR_SPANSION need be enabled.
Signed-off-by: Alison Wang
---
configs/ls1021aqds_sdcard_qspi_defconfig | 7 +--
1 file changed, 5 insertions
For LS1021A Secure Boot, SPARE2 register is used and modified by the
IBR. To avoid the conflict, SPARE4 is used instead of SPARE2 to store
the entry point of kernel. This patch is to get the entry point of
kernel from SPARE4 instead of SPARE2.
Signed-off-by: Alison Wang
---
board/freescale
-
> --
> > 1 file changed, 27 insertions(+), 21 deletions(-)
> >
>
> Alison,
>
> This patch looks OK to me. Would you confirm?
>
[Alison Wang] This patch looks OK to me too.
Reviewed-by: Alison Wang
Best Regards,
Alison Wang
___
+-
> scripts/config_whitelist.txt | 1 -
> 19 files changed, 20 insertions(+), 27 deletions(-)
>
[Alison Wang] Reviewed-by: Alison Wang
Best Regards,
Alison Wang
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
> -Original Message-
> From: Peng Fan [mailto:peng@nxp.com]
> Sent: Wednesday, February 22, 2017 4:22 PM
> To: sba...@denx.de
> Cc: u-boot@lists.denx.de; Peng Fan ; Bhuvanchandra DV
> ; york sun ; Shaohui
> Xie ; Alison Wang
> Subject: [PATCH V3 13/19] ser
This patch enables driver model for USB in defconfigs for LS1021A platforms.
Signed-off-by: Alison Wang
---
configs/ls1021aqds_nand_defconfig | 1 +
configs/ls1021aqds_nor_SECURE_BOOT_defconfig| 1 +
configs/ls1021aqds_qspi_defconfig | 1 +
configs
Hi, Bin,
I have sent a patch to enable driver model for USB for LS1021A boards.
Thanks for reminding.
Best Regards,
Alison Wang
> -Original Message-
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Tuesday, July 04, 2017 10:16 PM
> To: Vignesh R ; Alison Wang ;
>
to implement the workaround for this erratum.
Signed-off-by: Alison Wang
---
arch/arm/Kconfig | 3 +++
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 ++
arch/arm/cpu/armv8/start.S| 15 ++-
3 files changed, 19 insertions(+), 1 deletion(-)
diff
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