Re: [PATCH] usb: dwc2: Refactor register operations with clrsetbits macros

On 1/26/25 9:29 AM, Junhui Liu wrote: Refactor DWC2 USB gadget driver to replace manual read-modify-write operations with `clrsetbits_le32`, `setbits_le32`, and `clrbits_le32` macros, which simplify the code and improve readability. Signed-off-by: Junhui Liu Reviewed-by: Marek Vasut Thanks !

[PATCH 01/19] mbedtls: Add SHA symbols for VPL

Add some symbols for supporting SHA1 etc. for VPL. Signed-off-by: Simon Glass --- lib/mbedtls/Kconfig | 40 1 file changed, 40 insertions(+) diff --git a/lib/mbedtls/Kconfig b/lib/mbedtls/Kconfig index 78167ffa252..81274786106 100644 --- a/lib/mbedtls/K

[PATCH 02/19] sandbox: Update sandbox_vpl to select sha1 and sha256

These algorithms are used in VPL, so enable them. Signed-off-by: Simon Glass --- configs/sandbox_vpl_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig index 46329395ba5..f0315f6ab33 100644 --- a/configs/sandbox_vpl_defc

[PATCH 07/19] spl: Support selecting images based on phase in simple FIT

At present the simple FIT-loader always loads images, ignoring whether they are intended for the next phase or not. VBE packages up several images in the same FIT, some destined for VPL and some for SPL. Add logic to check the phase before loading the image. Return -EPERM in that case and handle i

[PATCH 10/19] spl: Provide a way to mark code needed for relocation

Add a linker symbol which can be used to mark relocation code, so it can be collected by the linker and copied into a suitable place and executed when needed. Signed-off-by: Simon Glass --- include/asm-generic/sections.h | 16 1 file changed, 16 insertions(+) diff --git a/incl

[PATCH 08/19] vbe: Support selecting images based on phase in FIT

With SPL we want to specify the phase of the image to be loaded. Add support for this. This is the implementation of a FIT feature added to the spec a few years ago and entails a small code-size increase, about 70 bytes on Thumb2. Signed-off-by: Simon Glass Link: https://docs.u-boot.org/en/lates

[PATCH 09/19] spl: Allow spl_load() to be controlled in any xPL phase

Some phases may wish to use full FIT-loading and others not, so allow this to be controlled. Add some debugging while we are here. Signed-off-by: Simon Glass --- include/spl_load.h | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/include/spl_load.h b/include/spl_loa

[PATCH 03/19] mmc: Allow controlling DM_MMC for VPL builds

VPL may want to use driver model for MMC even if TPL does not. Update the rule in this driver to support that. Signed-off-by: Simon Glass --- drivers/mmc/dw_mmc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index e1110cace8

[PATCH 04/19] lib: Allow crc16 code to be dropped

This code is not necessarily needed in VPL, even if SPL uses it, so adjust the rules to allow it to be dropped. Do the same for the hash API. Signed-off-by: Simon Glass --- common/hash.c | 17 +++-- lib/Kconfig | 10 ++ lib/Makefile | 3 +-- tools/Kconfig | 5 + 4

[PATCH 05/19] spl: Adjust debugging and xPL symbols

The size of some malloc() fields has reduced on 64-bit machines, but the spl_reloc code was not updated. Fix this to avoid a compiler warning. Also update for the new xPL naming. Signed-off-by: Simon Glass --- common/spl/spl_reloc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff -

[PATCH 06/19] spl: Avoid including hash algorithms which are not wanted

Update the build rule so that hash algorithms are only included in an SPL build if they are requested. This helps to reduce code size. Signed-off-by: Simon Glass --- lib/Makefile | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/Makefile b/lib/Makefile index 3f0936

[PATCH 12/19] lib: Mark lz4 as relocation code

Mark the lz4 decompression code as needed by relocation. This is used to decompress the next-phase image. Drop the 'safe' versions from SPL as they are not needed. Change the static array to a local one, to avoid a crash errors when trying to access the data from relocated code. Make this conditio

[PATCH 14/19] lib: Mark gunzip as relocation code

Mark the gunzip code as needed by relocation. This is used to decompress the next-phase image. Signed-off-by: Simon Glass --- lib/gunzip.c | 9 + lib/zlib/inflate.c | 18 ++ 2 files changed, 15 insertions(+), 12 deletions(-) diff --git a/lib/gunzip.c b/lib/gunzip

[PATCH 15/19] vbe: Support providing a linker script

Allow a linker script to be provided for VPL as it is for other U-Boot phases. Signed-off-by: Simon Glass --- common/spl/Kconfig.vpl | 13 + 1 file changed, 13 insertions(+) diff --git a/common/spl/Kconfig.vpl b/common/spl/Kconfig.vpl index 97dfc630152..cf6b36c8e38 100644 --- a/com

[PATCH 11/19] lib: Mark crc8 as relocation code

Mark the crc8 code as needed by relocation. This is used as a simple check against corruption of the code when copying. Signed-off-by: Simon Glass --- lib/crc8.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/crc8.c b/lib/crc8.c index 811e19917b4..bbb229c3892 10064

[PATCH 13/19] lib: Mark memcpy() and memmove() as relocation code

Mark these functions as needed by relocation. These functions are used to copy data while relocating the next-phase image. Drop the 'safe' versions from SPL as they are not needed. Change the static array to a local one, to avoid link errors when trying to access the data. Signed-off-by: Simon Gl

[PATCH 16/19] vbe: Provide VPL binman-symbols for the next phase

Add support for moving from TPL->VPL->SPL so that the VPL build can fit properly into the boot flow. Use #ifdefs to avoid creating unwanted symbols which Binman would then try (and perhaps fail) to provide. Add debugging to indicate the next phase. Signed-off-by: Simon Glass --- common/spl/sp

[PATCH 18/19] vbe: Allow VBE to disable adding loadables to the FDT

When VBE operates within VPL it does not want the FDT to be changed. Provide a way to disable this feature. Move the FIT_IMAGE_TINY condition out of spl_fit_record_loadable() so that both conditions are together. This makes the code easier to understand. Replace the existing fit_loaded member, wh

[PATCH 19/19] vbe: Add an implementation of VBE-ABrec

So far only VBE-simple is implemented in U-Boot. This supports a single image which can be updated in situ. It is often necessary to support two images (A and B) so that the board is not bricked if the update is interrupted or is bad. In some cases, a non-updatable recovery image is desirable, so

[PATCH 17/19] vbe: Tidy up a few comments

Join the comment block for the fit_image_load() call back to where it should be. Also fix a debug statement. Signed-off-by: Simon Glass --- boot/vbe_common.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/boot/vbe_common.c b/boot/vbe_common.c index 0d51fe

Re: [PATCH 1/8] cyclic: Prevent corruption of cyclic list on reassignment

On Sat, Jan 25 2025, Marek Vasut wrote: > On 1/20/25 10:17 AM, Rasmus Villemoes wrote: >> On Sat, Jan 18 2025, Marek Vasut wrote: >> >>> Make cyclic_register() return error code, 0 in case of success, >>> -EALREADY in case the called attempts to re-register already >>> registered struct cyclic_

Re: Git commit failed with mbedtls/framework

Hi Tom, On 2025/1/26 23:59, Tom Rini wrote: On Sun, Jan 26, 2025 at 03:13:46PM +0800, ZHANG Yuntian wrote: Hi Tom, On 2025/1/25 02:23, Tom Rini wrote: On Fri, Jan 24, 2025 at 02:05:28PM +0800, ZHANG Yuntian wrote: Hi Tom, On 2024/11/19 01:18, Tom Rini wrote: On Mon, Nov 18, 2024 at 12:16:1

[PATCH 2/5] rockchip: Improve ARMv7 support for ROCKCHIP_COMMON_STACK_ADDR

A few Rockchip ARMv7 SoCs use 0x6000 as DRAM base address instead of the more common 0x0 DRAM base address used on AArch64 SoCs. Add default options that should work for these ARMv7 SoCs. Same offsets as before are used, just below 64 MiB. Hex values have also been padded to improve alignment.

[PATCH 3/5] rockchip: Move imply ROCKCHIP_COMMON_STACK_ADDR under SoC Kconfig symbol

The ROCKCHIP_COMMON_STACK_ADDR Kconfig option was originally enabled in the SoC specific Kconfig files to ease during the initial migration to use common stack addresses. All boards for the affected SoCs have been migrated to use common stack addresses. Migrate to use an imply under the SoC symbol

[PATCH 1/5] rockchip: Move imply TPL_ROCKCHIP_COMMON_BOARD under SoC Kconfig symbol

The Kconfig symbol ROCKCHIP_COMMON_STACK_ADDR currently imply the TPL_ROCKCHIP_COMMON_BOARD option when TPL=y. This is inconvenient for a SoC with very limited SRAM to use a custom tpl.c together with the common stack addresses. Move any imply TPL_ROCKCHIP_COMMON_BOARD to under the SoC symbol, whe

[PATCH 4/5] rockchip: Move imply ROCKCHIP_EXTERNAL_TPL under SoC Kconfig symbol

New Rockchip SoCs will typically require use or an external TPL when support for the SoC is added to U-Boot. Move imply ROCKCHIP_EXTERNAL_TPL under SoC Kconfig symbol to remove a future likelihood of a long "default y if" line. Signed-off-by: Jonas Karlman --- arch/arm/mach-rockchip/Kconfig | 4

[PATCH 5/5] rockchip: Add RK3576 support for ROCKCHIP_COMMON_STACK_ADDR

The Rockchip RK3576 SoC uses a different DRAM base address, 0x4000, compared to prior SoCs. Add default options that should work when 0x4000 is used as DRAM base address. Use same offsets as before, just below 64 MiB. Signed-off-by: Jonas Karlman --- Cc: Heiko Stuebner --- arch/arm/mac

[PATCH 0/5] rockchip: ROCKCHIP_COMMON_STACK_ADDR improvements

Use of the Kconfig symbol ROCKCHIP_COMMON_STACK_ADDR is currently not working well when a SoC needs to use a custom tpl.c and the default values are only working when DRAM base address is 0x0. This series changes to not imply TPL_ROCKCHIP_COMMON_BOARD and instead let each SoC symbol decide. It als

Re: [PATCH 1/2] drivers: rtc: max313xx: Fix setting years 2100-2199

On Mon, 20 Jan 2025 14:59:40 +1300, Mark Tomlinson wrote: > An invalid calculation made setting years 2100-2199 impossible. > > Applied to u-boot/master, thanks! -- Tom

[PATCH] test/cmd/wget.c: Fix loadaddr rewrite

The $loadaddr variable is a hexadecimal value, not a string, it must be assigned using env_set_hex(). This may break follow up tests, like the dm_test_cmd_hash_md5 in CI. To avoid any interference with other tests, set $wgetaddr variable which is specific to this test and use it in the test. Fixes

Re: [PATCH v2] mmc: Remove alignment hole for cmdidx in struct mmc_cmd

On Sat, 27 Jan 2024 16:29:21 +, Jonas Karlman wrote: > The alignment hole caused by cmdidx in struct mmc_cmd cause strange > issues together with the peephole2 optimization on Amlogic SoCs. > Following was observed while working on SPL support for Amlogic SoCs. > > sd_get_capabilities() norma

Re: [PATCH] Squashed 'dts/upstream/' changes from 9b6ba2666d63..8531b4b4988c

On Tue, Jan 21, 2025 at 02:31:37PM -0600, Tom Rini wrote: > 8531b4b4988c Merge tag 'v6.13-rc7-dts-raw' > [snip] > git-subtree-dir: dts/upstream > git-subtree-split: 8531b4b4988c2c9bddc90ea74f2d3e2dca9d5056 > --- > This will bring us to the v6.13-dts tag of the devicetree-rebasing tree > and so mat

[PATCH 00/19] vbe: Series part G

This includes the VBE ABrec (A/B/recovery) implementation as well as a number of patches needed to make it work: - marking some code as used by SPL_RELOC - selection of images from a FIT based on the boot phase - removal of unwanted hash code which increases code-size too much - a few Kconfig-rela

Re: [PATCH] tools: check result of lseek

On Wed, 22 Jan 2025 19:15:04 +0300, Maks Mishin wrote: > Return value of function 'lseek', called at pblimage.c:211, > is not checked, but it is usually checked for this function. > > This trigger was found using the Svace static analyzer. > > Applied to u-boot/master, thanks! -- Tom

[PATCH v2 3/3] rockchip: sdram: Ensure ram_base is correct in SPL

Most Rockchip SoCs use 0x0 as DRAM base address, however some SoCs use 0x6000 and RK3576 use 0x4000 as DRAM base address. CFG_SYS_SDRAM_BASE is defined with correct address for each SoC and U-Boot proper use this to set correct gd->ram_base in setup_dest_addr(). SPL never assign any value

[PATCH v2 2/3] rockchip: sdram: Limit usable ram_top to max 4G

U-Boot only works correctly when it uses RAM below the 4G address boundary on Rockchip SoCs. Limit usable gd->ram_top to max 4G. Signed-off-by: Jonas Karlman --- v2: New patch --- arch/arm/mach-rockchip/sdram.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach

[PATCH v2 1/3] rockchip: sdram: Allow the first bank to extend beyond 4 GiB

Allow the first bank to extend beyond 4 GiB when the blob of space for peripheral is located before start of DRAM, e.g. when start of DRAM is 0x4000 and continue beyond the 4 GiB mark. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- v2: Collect r-b tag --- arch/arm/mach-rockchip/sd

[PATCH v2 0/3] rockchip: sdram: Fix issues observed on RK3576

Most Rockchip AArch64 SoCs have start of DRAM at 0x0. However, the RK3576 instead has start of DRAM at 0x4000 and can extend continuous beyond the 4 GiB mark. This series fixes issues observed on a Rockchip RK3576 board testing Heiko's RK3576 series [1]. Changes in v2: - Drop duplicate patch

[PATCH v2] test/py: Add a report show test durations

Execution time varies widely with the existing tests. Provides a way to produce a summary of the time taken for each test, along with a histogram. This is enabled with the --timing flag. Enable it for sandbox in CI. Example: Duration : Number of tests : ==

[PATCH] gitlab: Add an rpi5 to the sjg lab

I have one of these 2GB boards with Ubuntu 24.10 loaded. Add an entry for it so that it can be used for testing. Signed-off-by: Simon Glass --- .gitlab-ci.yml | 5 + 1 file changed, 5 insertions(+) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index a25c037b7d3..339ae83d649 100644 --- a/.gi

Re: [PATCH v2] test/py: Add a report show test durations

On Sun, Jan 26, 2025 at 05:39:22PM -0700, Simon Glass wrote: > Execution time varies widely with the existing tests. Provides a way to > produce a summary of the time taken for each test, along with a > histogram. > > This is enabled with the --timing flag. > > Enable it for sandbox in CI. > >

[PATCH] net: fsl_enetc: Enable optional ENETREF clock on i.MX95

The ENETCv4 port DT nodes on i.MX95 may contain optional clock phandle to IMX95_CLK_ENETREF "ref" clock. These "ref" clock must be enabled for the ethernet to work. These "ref" clock are enabled after cold boot, but when the system booted Linux and rebooted, those "ref" clock might have been disabl

[PATCH] usb: dwc2: Refactor register operations with clrsetbits macros

Refactor DWC2 USB gadget driver to replace manual read-modify-write operations with `clrsetbits_le32`, `setbits_le32`, and `clrbits_le32` macros, which simplify the code and improve readability. Signed-off-by: Junhui Liu --- This patch is a supplement of patch series [1]. [1] https://lore.kerne

Re: Git commit failed with mbedtls/framework

Hi Tom, On 2025/1/25 02:23, Tom Rini wrote: On Fri, Jan 24, 2025 at 02:05:28PM +0800, ZHANG Yuntian wrote: Hi Tom, On 2024/11/19 01:18, Tom Rini wrote: On Mon, Nov 18, 2024 at 12:16:18PM -0500, Raymond Mao wrote: Hi Tom, On Mon, 18 Nov 2024 at 11:41, Tom Rini wrote: On Mon, Nov 18, 2024

Re: [PATCH 01/10] pinctrl: imx: Push imx_pinctrl_ops into drivers and staticize

Hi Marek, On Sat, Jan 25, 2025 at 1:36 PM Marek Vasut wrote: > Does it always fail , i.e. did you try to rerun the pipeline ? I had to retry a few times and then it eventually succeeded. I will send a PR soon. Thanks

Re: [PATCH] examples: fix building on arm32

On 1/27/25 05:15, 1425075...@qq.com wrote: From: Liya Huang <1425075...@qq.com> Refer to the commit a3c101a61348 ("examples: fix building on arm64") fix for arm32. crt0.S does not even build with CONFIG_API=y, CONFIG_EXAMPLES=y: examples/api/crt0.S: Assembler messages: examples/api/cr

[PATCH 1/1] examples/api: improve determination of LOAD_ADDR

The current load address for the 'demo' binary does not work for qemu_arm_defconfig. The suitability of an address to load an ELF binary and run it does not only depend on the architecture but also on the memory layout of the board. On most boards we can assume that 8 MiB of memory is available a

Re: [PATCH] test/cmd/wget.c: Fix loadaddr rewrite

On 1/27/25 00:57, Marek Vasut wrote: > The $loadaddr variable is a hexadecimal value, not a string, it must be > assigned using env_set_hex(). This may break follow up tests, like the > dm_test_cmd_hash_md5 in CI. To avoid any interference with other tests, > set $wgetaddr variable which is spec

[PATCH 1/1] examples: eliminate CONFIG_STANDALONE_LOAD_ADDR

CONFIG_STANDALONE_LOAD_ADDR has been used for examples/standalone but not for examples/api. The suitability of an address to load an ELF binary and run it does not only depend on the architecture but also on the memory layout of the board which is not reflected in the default value of CONFIG_STAND

[PATCH] examples: fix building on arm32

From: Liya Huang <1425075...@qq.com> Refer to the commit a3c101a61348 ("examples: fix building on arm64") fix for arm32. crt0.S does not even build with CONFIG_API=y, CONFIG_EXAMPLES=y: examples/api/crt0.S: Assembler messages: examples/api/crt0.S:32: Error: lo register required -- `ldr ip

[PATCH 1/3] arch: arm: dts: phyboard-electra-uboot.dtsi: Add bootph props to i2c

Add bootph-all properties to I2C0 nodes to ensure the bus and EEPROM are accessible across all stages. This enables reading the SoM configuration at any point during the boot process. Signed-off-by: Wadim Egorov --- arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi | 8 1 file chan

[PATCH 2/3] board: phytec: phycore_am64x: Add support for 1 GB RAM variant and ECC

Detect RAM size via EEPROM and adjust DDR size and banks accordingly. Include necessary fixups to handle ECC-enabled configurations. Signed-off-by: Wadim Egorov --- board/phytec/phycore_am64x/Kconfig | 25 + board/phytec/phycore_am64x/phycore-am64x.c | 105 - 2 f

[PATCH 3/3] configs: phycore_am64x_r5_defconfig: Enable PHYTEC_SOM_DETECTION

Enable configs required for detecting and fixing up for different RAM variants. Also resync after savedefconfig. Signed-off-by: Wadim Egorov --- configs/phycore_am64x_r5_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/phycore_am64x_r5_defconfig b/configs

Re: [PATCH 1/3] arch: arm: dts: phyboard-electra-uboot.dtsi: Add bootph props to i2c

Hi Wadim, On Jan 27, 2025 at 05:16:10 +0100, Wadim Egorov wrote: > Add bootph-all properties to I2C0 nodes to ensure the bus and EEPROM > are accessible across all stages. This enables reading the SoM > configuration at any point during the boot process. > > Signed-off-by: Wadim Egorov > --- >

Re: [PATCH v3 0/5] Add pmem node for preserving distro ISO's

On Fri, 24 Jan 2025 at 17:10, Ilias Apalodimas wrote: > > Heinrich, Tobias > > There's a slight problem that I forgot when commenting v2. > > Heinrich's idea of plugging this into blkmap is eventually the right > thing to do. > > However, when I started coding this I only added the pmem memory as

Re: [PATCH 1/3] arch: arm: dts: phyboard-electra-uboot.dtsi: Add bootph props to i2c

Hi Dhruva, Am 27.01.25 um 13:22 schrieb Dhruva Gole: Hi Wadim, On Jan 27, 2025 at 05:16:10 +0100, Wadim Egorov wrote: Add bootph-all properties to I2C0 nodes to ensure the bus and EEPROM are accessible across all stages. This enables reading the SoM configuration at any point during the boot p

[PATCH 0/4] rng: msm: fixes for MSM8916

msm_rng.c| 13 +++-- 2 files changed, 16 insertions(+), 6 deletions(-) --- base-commit: 8a2a71a4eec7afdca6377ee46b1ed7e78ec692c9 change-id: 20250126-msm-rng-fixes-f5a722a9492c Best regards, -- Sam Day

[PATCH 3/4] clk/qcom: apq8016: improve clk_enable logging

Properly warn when an unknown clock is requested to be enabled. Signed-off-by: Sam Day --- drivers/clk/qcom/clock-apq8016.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c index ff5e7ca6f02148427240b80fb

[PATCH 4/4] rng: msm: keep core clock disabled when PRNG not in use

This is how the kernel does it. APQ8016E TRM also states that this clock can be turned off when no random numbers are needed. Signed-off-by: Sam Day --- drivers/rng/msm_rng.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/rng/msm_rng.c b/drivers/rng/msm_r

[PATCH 1/4] clk/qcom: apq8016: add PRNG_AHB_CLK

This clock needs to be enabled for the msm-rng driver to work on MSM8916, otherwise accessing the PRNG register block causes a data abort. Signed-off-by: Sam Day --- drivers/clk/qcom/clock-apq8016.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/clock-a

Re: [PATCH] ram: k3-ddrss: Set SDRAM_IDX using device private data, ddr_ram_size

Hi Santhosh On 23-Jan-25 2:06 PM, Santhosh Kumar K wrote: The SDRAM_IDX in DDRSS_V2A_CTL_REG describes the number of address bits minus 16 that are used to determine the mask used to detect memory rollover and prevent aliasing and false coherency issues. Set SDRAM_IDX using the device private d

Re: [PATCH v2 2/2] efi_loader: efi_net: let efi_net_set_dp properly update the device path

On Sat, Jan 04, 2025 at 12:05:24AM +0100, Heinrich Schuchardt wrote: > On 06.12.24 18:18, Adriano Cordova wrote: > > This commit fixes an use after free introduced in Commit e55a4acb54 > > (" efi_loader: net: set EFI bootdevice device path to HTTP when loaded > > from wget"). The logic in efi_net_s

Re: Git commit failed with mbedtls/framework

On Sun, Jan 26, 2025 at 03:13:46PM +0800, ZHANG Yuntian wrote: > Hi Tom, > > On 2025/1/25 02:23, Tom Rini wrote: > > On Fri, Jan 24, 2025 at 02:05:28PM +0800, ZHANG Yuntian wrote: > > > Hi Tom, > > > > > > On 2024/11/19 01:18, Tom Rini wrote: > > > > On Mon, Nov 18, 2024 at 12:16:18PM -0500, Raym

Pull request efi-2025-04-rc1-2

Dear Tom, The following changes since commit 292278d6828e6c8c6ae11bc8658586d1acc411d4: Merge patch series "gitlab: Fixes to get StarFive VisionFive2 into the sjg lab" (2025-01-25 16:28:27 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-efi.git

Re: Pull request efi-2025-04-rc1-2

On Sun, 26 Jan 2025 12:12:11 +0100, Heinrich Schuchardt wrote: > The following changes since commit 292278d6828e6c8c6ae11bc8658586d1acc411d4: > >Merge patch series "gitlab: Fixes to get StarFive VisionFive2 into > the sjg lab" (2025-01-25 16:28:27 -0600) > > are available in the Git reposito