Re: [U-Boot] [EXT] Re: [PATCH 1/2] dm: i2c: Add a flag that not call i2c_setup_offset

Hi Chuanhua, > > -Original Message- > > From: Lukasz Majewski > > Sent: 2019年6月4日 16:19 > > To: Chuanhua Han > > Cc: h...@denx.de; u-boot@lists.denx.de; Biwen Li > > Subject: Re: [EXT] Re: [U-Boot] [PATCH 1/2] dm: i2c: Add a flag > > that not call i2c_setup_offset > > > > On Tue, 4 Jun

[U-Boot] [PATCH v2 01/99] ram: rk3399: Fix code warnings

Fix checkpatch warninigs on sdram_rk3399.c like - Avoid CamelCase - Unnecessary parentheses - Alignment should match open parenthesis - multiple blank lines - misspelled - spaces preferred around that '>>' Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 48 ++-

[U-Boot] [PATCH v2 00/99] ram: rk3399: Add LPDDR4 support

This is the v2 set for supporting LPDDR4 with associated features, wrt to previous series[1]. Thanks to - YouMin Chen - Akash Gajjar - Kever Yang for supporting all the help on this work. On summary this series support - Code warning and fixes - rank detection, this would required to probe single

[U-Boot] [PATCH v2 03/99] ram: rk3399: Add proper spaces in code

Add proper spaces in the code of - data training functions - rk3399_dmc_init No functionality change. Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 24 1 file changed, 24 insertions(+) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ra

[U-Boot] [PATCH v2 02/99] ram: rk3399: Add space between string with format specifier

Add space between string with format specifier on missing print and debug calls. Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c in

[U-Boot] [PATCH v2 04/99] ram: rk3399: s/sdram_params/params

Rename variable name of struct rk3399_sdram_params from sdram_params with params for more code readability. No functionality change. Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 160 ++-- 1 file changed, 78 insertions(+), 82 deletions(-) diff --gi

[U-Boot] [PATCH v2 20/99] ram: rk3399: Add cs1_rw macro

Add simplified and meaningful macro for cs1_rw. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 ++ drivers/ram/rockchip/sdram_rk3399.c | 3 +-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/i

[U-Boot] [PATCH v2 09/99] ram: rk3399: Use rank mask in ca data training

Add rank_mask based on the rank number, this would keep the ca data training loop based on the desired rank mask value instead of looping for all values. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 8 +++- 1 file changed, 7 insertions(+), 1

[U-Boot] [PATCH v2 06/99] ram: rk3399: Order include files

Order include files in ascending order, which would avoid conflicting function definitions/prototypes if any and also for better code readability. Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/ram

[U-Boot] [PATCH v2 05/99] ram: rk3399: Handle data training return types

data trainings calls like ca, wl, rg, rl, wdql have proper return types with -EIO and the return type missed to handle in data_training function. This patch, add proper return type checks along with useful debug statement on each data training calls. Incidentally this would help to prevent the sd

[U-Boot] [PATCH v2 12/99] ram: rk3399: Add channel number encoder macro

Add simplified and meaningful macro for channel number. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 ++ drivers/ram/rockchip/sdram_rk3399.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch

[U-Boot] [PATCH v2 11/99] ram: rk3399: Add ddrtype enc macro

Add simplified and meaningful macro for ddrtype macro. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 1 + drivers/ram/rockchip/sdram_rk3399.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/a

[U-Boot] [PATCH v2 08/99] ram: rk3399: Clear PI_175 interrupts in data training

Clear the PI_175 interrupts before processing actual data training in all relevant calls. This would help to clear interrupt from previous training. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 15 +++ 1 file changed, 15 insertions(

[U-Boot] [PATCH v2 21/99] ram: rk3399: Add bw enc macro

Add simplified and meaningful macro for bw. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 1 + drivers/ram/rockchip/sdram_rk3399.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/

[U-Boot] [PATCH v2 10/99] ram: rk3399: Use rank mask in wdql data training

Add rank_mask based on the rank number, this would keep the wdql data training loop based on the desired rank mask value instead of looping for all values. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 8 +++- 1 file changed, 7 insertions(+),

[U-Boot] [PATCH v2 07/99] ram: rk3399: Move macro after include files

Move the macro definitions after include files for better code readability and to satisfy coding style. Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 26 +- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk

[U-Boot] [PATCH v2 26/99] ram: rk3399: Add ddr version enc macro

Add dram config macro for handling ddr version number. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 ++ drivers/ram/rockchip/sdram_rk3399.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/include/asm

[U-Boot] [PATCH v2 73/99] ram: sdram: Configure lpddr4 tsel rd, wr based on IO settings

Now we have IO settings available for all supported sdram frequencies, so retrieve these IO settings and make used for LPDDR4 ds odt configuration. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 42 - 1 file changed, 36

[U-Boot] [PATCH v2 47/99] ram: rockchip: debug: Get the cs capacity

Add code to get the channel capacity, this would help to print the capacity of specific channel. Here is sample print on LPDDR4, 50MHz channel 0 BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdra

[U-Boot] [PATCH v2 41/99] arm: include: rockchip: Move dramtypes to common header

dramtype enum numbers as common across all dram controllers in rockchip, so move the eneum values in common header. Signed-off-by: Jagan Teki --- arch/arm/include/asm/arch-rockchip/sdram.h| 6 -- arch/arm/include/asm/arch-rockchip/sdram_common.h | 8 arch/arm/include/asm/arc

[U-Boot] [PATCH v2 24/99] ram: rk3399: Update cs1_row to use sys_reg3

cs1_row can handle the pmu via sys_reg2 and sys_reg3 while configuring the dram instead of just sys_reg2. So, update cs1_row macro to make use of both sys_reg2, sys_reg3. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 10 --

[U-Boot] [PATCH v2 44/99] debug_uart: Add printdec

Add printdec, this would help to print an output a decimalism value. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- include/debug_uart.h | 19 +++ 1 file changed, 19 insertions(+) diff --git a/include/debug_uart.h b/include/debug_uart.h index 34e8b2fc81..cd70ae1a04 10

[U-Boot] [PATCH v2 36/99] ram: rk3399: Move pwrup_srefresh_exit to dram_info

Add pwrup_srefresh_exit to be part of dram_info so-that the it can help to support pwrup_srefresh_exit in individual channels while starting pctl in future. No functionality change. Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 13 +++-- 1 file changed, 7 insertion

[U-Boot] [PATCH v2 56/99] clk: rockchip: rk3399: Set 400MHz ddr clock

Add support for setting 400MHz ddr clock. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/clk/rockchip/clk_rk3399.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 1de21c9f3e..79007b8682 100644

[U-Boot] [PATCH v2 37/99] ram: rk3399: Add pctl start support

Add support for pctl start for both channel 0, 1 control and phy registers. This would also handle pwrup_srefresh_exit init based on the channel number. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 75 + 1 file chang

[U-Boot] [PATCH v2 46/99] ram: rockchip: debug: Add sdram_print_ddr_info

Add sdram ddr info print support, this would help to observe the sdram base parameters. Here is sample print on LPDDR4, 50MHz channel 0 BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- .../include/asm/arch-rockchip/sdram_common.h

[U-Boot] [PATCH v2 79/99] ram: rk3399: Update lpddr4 vref_mode_ac

Update vref_mode_ac for lpddr4 based on VDDQ/3/2=16.8% Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c in

[U-Boot] [PATCH v2 60/99] ram: rk3399: Add lpddr4 rank mask for ca training

Add rank_mask based on the rank number for lpddr4. This would keep the ca data training loop based on the desired rank mask value instead of looping for all values. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 5 - 1 file changed, 4 inserti

[U-Boot] [PATCH v2 42/99] arm: include: rockchip: Add DDR4 enum

Add DDR4 enum number in common header. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_com

[U-Boot] [PATCH v2 30/99] ram: rk3399: s/tsel_wr_select_n/tsel_wr_select_dq_n

Rename tsel_wr_select_n to tsel_wr_select_dq_n based on the bsp code. No functionality change. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/ram/rockchip/sdra

[U-Boot] [PATCH v2 23/99] ram: rk3399: Update cs0_row to use sys_reg3

cs0_row can handle the pmu via sys_reg2 and sys_reg3 while configuring the dram instead of just sys_reg2. So, update cs0_row macro to make use of both sys_reg2, sys_reg3. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 8 ++-- dr

[U-Boot] [PATCH v2 76/99] ram: rk3399: Get lpddr4 tsel_rd_en from io settings

For base.odt 1 the lpddr4 tsel_rd_en value is depending on IO settings of rd_odt_en. Add support for it. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/ram/rockchip

[U-Boot] [PATCH v2 19/99] ram: rk3399: Add cs0_rw macro

Add simplified and meaningful macro for cs0_rw. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 ++ drivers/ram/rockchip/sdram_rk3399.c | 3 +-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/i

[U-Boot] [PATCH v2 86/99] ram: rk3399: Add LPPDDR4-400 timings inc

LPDDR4 initialization start with at board selected frequency and then it switches into 400MHz and 800MHz simultaneously to make the proper sequence work on each channel with associated training. So, add LPDDR4-400 timings inc file in driver area so-that these timings will take during LPDDR4 initia

[U-Boot] [PATCH v2 22/99] ram: rk3399: Rename sys_reg with sys_reg2

Use dram config variable name as sys_reg2 instead of sys_reg since the final variable value is to written into a pmugrf register named as sys_reg2. This reflect the both variable and associated register names are same and also help to add next sys_reg's to add it in future. Signed-off-by: Jagan T

[U-Boot] [PATCH v2 50/99] ram: rk3399: Compute stride for 1 channel a

Add stride computation for the sdram which support single channel a This configuration available in NanoPi NEO4 and the same can work with existing rk3399-sdram-ddr3-1866.dtsi Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 4 1 file changed,

[U-Boot] [PATCH v2 61/99] ram: rk3399: Add lpddr4 rank mask for wdql training

Add rank_mask based on the rank number for lpddr4. This would keep the wdql data training loop based on the desired rank mask value instead of looping for all values. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 5 - 1 file changed, 4 inser

[U-Boot] [PATCH v2 25/99] ram: rk3399: Add cs1_col enc macro

Add dram config macro for handling cs1 column. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 3 +++ drivers/ram/rockchip/sdram_rk3399.c | 1 + 2 files changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-ro

[U-Boot] [PATCH v2 84/99] rockchip: rk3399: syscon: Add pmu support

Add pmu compatible with relevant U_BOOT_DRIVER for rk3399 via syscon rk3399 driver. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b

[U-Boot] [PATCH v2 18/99] ram: rk3399: Add dbw enc macro

Add simplified and meaningful macro for dbw. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 1 + drivers/ram/rockchip/sdram_rk3399.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/include

[U-Boot] [PATCH v2 48/99] ram: rk3399: debug: Add sdram_print_stride

Add code to print the channel stride, this would help to print the stride of associated channel. Here is sample print on LPDDR4, 50MHz. 256B stride Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- .../include/asm/arch-rockchip/sdram_common.h | 5 drivers/ram/rockchip/sdram_debug

[U-Boot] [PATCH v2 35/99] ram: rk3399: Add phy pctrl reset support

Add support for phy pctrl reset support for both channel 0, 1. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 29 + 1 file changed, 29 insertions(+) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockc

[U-Boot] [PATCH v2 32/99] ram: rk3399: s/ca_tsel_wr_select_n/tsel_wr_select_ca_n

Rename ca_tsel_wr_select_n to tsel_wr_select_ca_n based on the bsp code. No functionality change. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/ram/rockchip/sdr

[U-Boot] [PATCH v2 34/99] ram: rk3399: Order tsel variables

Order tsel* variable declarations and assignment in proper and meaningful way. No functionality change. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 37 + 1 file changed, 22 insertions(+), 15 deletions(-) diff --git

[U-Boot] [PATCH v2 81/99] ram: rk3399: Handle data training via ops

data training can be even required for lpddr4 and we need to keep the lpddr4 code to compile only for relevant boards which do support lpddr4. For this requirement, and for code readability handle data training via sdram_rk3399_ops and same will update in future while supporting lpddr4 code. Sign

[U-Boot] [PATCH v2 71/99] ram: rk3399: Don't disable dfi dram clk for lpddr4, rank 1

The hardware for LPDDR4 with - CLK0P/N connect to lower 16-bits - CLK1P/N connect to higher 16-bits and usually dfi dram clk is configured via CLK1P/N, so disabling dfi dram clk will disable the CLK1P/N as well. So, add patch to not to disable dfi dram clk for lpddr4, with rank 1. Signed-off-by:

[U-Boot] [PATCH v2 67/99] ram: rk3399: Configure SLEWP_EN, SLEWN_EN for lpddr4

Configure SLEWP_EN, SLEWN_EN for lpddr4 during phy IO config. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram

[U-Boot] [PATCH v2 17/99] ram: rk3399: Add bk enc macro

Add simplified and meaningful macro for bk. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 ++ drivers/ram/rockchip/sdram_rk3399.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/include

[U-Boot] [PATCH v2 31/99] ram: rk3399: s/tsel_wr_select_p/tsel_wr_select_dq_p

Rename tsel_wr_select_p to tsel_wr_select_dq_p based on the bsp code. No functionality change. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/ram/rockchip/sdra

[U-Boot] [PATCH v2 80/99] ram: rk3399: Simplify data training first argument

data training is using chan_info as first argument with channel number as second argument instead of that use dram_info as first argument so-that we can get the chan_info at data training definition. This was the argument handling is meaningful, readable and it would help to add similar data train

Re: [U-Boot] [PATCH v3 4/5] ARM: imx: pinctrl: Add support for i.MX28 mxs pinctrl driver

Hi Marek, > On 6/16/19 12:34 AM, Lukasz Majewski wrote: > > The code responsible for setting proper values in the MUX registers > > (in the mxs_pinctrl_set_state()) has been ported from Barebox > > project (branch: master, SHA1: > > eb3b0f7414cd8102844dd16b1c789e445e8947f8, file: > > drivers/pinct

[U-Boot] [PATCH v2 74/99] ram: rk3399: Add tsel control clock drive

tsel contrl clock drives are required to configure PHY 929, 939 controls drive settings. Add support for these control clock for all dramtype sdrams. Thse control clock drives are configure via tsel_ckcs_select_p and tsel_ckcs_select_n variables. tsel_ckcs_select_n is PHY_DRV_ODT_34_3 value wher

[U-Boot] [PATCH v2 13/99] ram: rk3399: Add row_3_4 enc macro

Add simplified and meaningful macro for row_3_4. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 1 + drivers/ram/rockchip/sdram_rk3399.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/inc

[U-Boot] [PATCH v2 14/99] ram: rk3399: Add chipinfo macro

Add simplified and meaningful macro for chip info. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 1 + drivers/ram/rockchip/sdram_rk3399.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/i

[U-Boot] [PATCH v2 45/99] ram: rockchip: Add debug sdram driver

Add sdram driver to handle debug across rockchip SoCs. This would help to improve code debugging feature for sdram drivers in rockchip family, whoever wants to debug the driver should call these core debug code on their respective platform sdram drivers. Signed-off-by: Jagan Teki Signed-off-by:

[U-Boot] [PATCH v2 94/99] ram: rk3399: Set lpddr4 MR14

Set MR14 based identified controller in lpddr4 as part of LPDDR set rate initialization phase. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 50 + 1 file changed, 50 insertions(+) diff --git a/drivers/ram/rockchip/sdr

[U-Boot] [PATCH v2 78/99] ram: rk3399: Update lpddr4 mode_sel based on io settings

The mode_sel on lpddr4 value is depending on IO settings of rd_vref. Add support for it. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c

[U-Boot] [PATCH v2 16/99] ram: rk3399: Add column enc macro

Add simplified and meaningful macro for column. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 1 + drivers/ram/rockchip/sdram_rk3399.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/incl

Re: [U-Boot] Jetson TX2 hangs during dhcp boot

On Sun, Jun 16, 2019 at 07:34:57PM +0200, Martin Husemann wrote: > On Sun, Jun 16, 2019 at 09:27:12PM +0200, Mian Yousaf Kaukab wrote: > > > Hmm. Are you building your own copy of ATF (you mentioned 2.1; I can't > > > recall what version we ship)? > > No, I am using the one shipped with R32.1. > >

[U-Boot] [PATCH v2 49/99] ram: rk3399: Compute stride for 2 channels

stride value from sdram timings can be computed dynamically based on the determined capacity for the given channel. Right now these stride values are taken as part of sdram timings via dtsi, but it possible to use same timings dtsi for given frequency even though the configured board sdram do supp

[U-Boot] [PATCH v2 85/99] rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for pmu

Add u-boot,dm-pre-reloc property for pmu in rk3399-u-boot.dtsi so-that SPL can access pmu. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/dts/rk3399-u-boot.dtsi | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boo

[U-Boot] [PATCH v2 29/99] ram: rk3399: Handle pctl_cfg return type

Add proper return type handling of pctl_cfg with meaningful print statement. Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c in

[U-Boot] [PATCH v2 91/99] ram: rk3399: Set lpddr4 ca odt

Set CA ODT based identified controller in lpddr4 as part of LPDDR set rate initialization phase. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 49 + 1 file changed, 49 insertions(+) diff --git a/drivers/ram/rockchip/s

[U-Boot] [PATCH] configs: stm32mp15: Select correct Ethernet driver for trusted mode

Select the correct Ethernet driver from Synopsis. Initially, "Synopsys Designware Ethernet MAC" driver was wrongly selected instead of "Synopsys DWC Ethernet QOS device" driver. Fixes: commit f90b3f5b68ed ("configs: stm32mp15: Enable Ethernet feature") Signed-off-by: Patrice Chotard --- config

[U-Boot] [PATCH v2 99/99] rockchip: dts: rk3399: rock-pi-4: Use LPDDR4-100 dtsi

Use LPDDR4-100 sdram timings dtsi for RockPI-4 board. All these timings are processed during TPL stage of rock-pi-4 board, bootchain. This make TPL would replace rockchip in house rkbin in current bootchain. Bootchain after and before this change: TPL -> SPL -> U-Boot proper rkbin -> SPL ->

[U-Boot] [PATCH v2 87/99] ram: rk3399: Add LPPDDR4-800 timings inc

LPDDR4 initialization start with at board selected frequency and then it switches into 400MHz and 800MHz simultaneously to make the proper sequence work on each channel with associated training. So, add LPDDR4-800 timings inc file in driver area so-that these timings will take during LPDDR4 initia

[U-Boot] [PATCH v2 28/99] ram: rk3399: Add DdrMode

Add DdrMode structure with associated bit fields. These would help to reconfigure sdram capabilities during lpddr4 setup related configs. Signed-off-by: Jagan Teki --- .../include/asm/arch-rockchip/sdram_rk3399.h| 17 - drivers/ram/rockchip/sdram_rk3399.c | 2 +-

[U-Boot] [PATCH v2 55/99] clk: rockchip: rk3399: Set 50MHz ddr clock

Add support for setting 50MHz ddr clock. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/clk/rockchip/clk_rk3399.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 5d1ad94e85..1de21c9f3e 100644

[U-Boot] [PATCH v2 15/99] ram: rk3399: Add rank enc macro

Add simplified and meaningful macro for rank. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-rockchip/sdram_common.h | 2 ++ drivers/ram/rockchip/sdram_rk3399.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/inclu

[U-Boot] [PATCH v2 38/99] ram: rockchip: rk3399: Add cap_info structure

Group common ddr attributes like - rank - col - bk - bw - dbw - row_3_4 - cs0_row - cs1_row - ddrconfig into a common cap_info structure for more code readability and extend if possible based on the new features. Signed-off-by: Jagan Teki --- .../include/asm/arch-rockchip/sdram_rk3399.h | 6 +

[U-Boot] [PATCH v2 95/99] configs: rockpro64: Enable LPDDR4 support

Due to foot-print issues, we have LPDDR4 code can be marked as CONFIG_RAM_RK3399_LPDDR4. So, enable it for Rockpro64 board. Signed-off-by: Jagan Teki --- configs/rockpro64-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro6

[U-Boot] [PATCH v2 62/99] ram: rk3399: Move mode_sel assignment

mode_sel assignment is based on dram type. In phy_io_config, already have vref setting based on the dram type, so move this mode_sel assignment on vref setting area. No functionality change. Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 12 +++- 1 file changed, 3

[U-Boot] [PATCH v2 98/99] rockchip: dts: rk3399: rockpro64: Use LPDDR4-100 dtsi

Use LPDDR4-100 sdram timings dtsi for Rockpro64 board. All these timings are processed during TPL stage of rockpro64 board, bootchain. This make TPL would replace rockchip in house rkbin in current bootchain. Bootchain after and before this change: TPL -> SPL -> U-Boot proper rkbin -> SPL -

[U-Boot] [PATCH v2 93/99] ram: rk3399: Set lpddr4 MR12

Set MR12 based identified controller in lpddr4 as part of LPDDR set rate initialization phase. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 50 + 1 file changed, 50 insertions(+) diff --git a/drivers/ram/rockchip/sdr

[U-Boot] [PATCH v2 66/99] ram: rk3399: Configure BOOSTP_EN, BOOSTN_EN for lpddr4

Configure BOOSTP_EN, BOOSTN_EN for lpddr4 during phy IO config. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 24 1 file changed, 24 insertions(+) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/

[U-Boot] [PATCH v2 43/99] ram: rockchip: Add initial Kconfig

Right now sdram drivers in rockchip SoC are built based on the SoC configs which may not be an adequate solutions while adding common or debug driver. So, add meaningful Kconfig options start with rk3399. Signed-off-by: Jagan Teki --- drivers/ram/Kconfig | 1 + drivers/ram/rockchip/K

[U-Boot] [PATCH v2 70/99] ram: rk3399: Configure tsel write ca for lpddr4

tsel write ca_p and ca_n values need to write on PHY 544, 672 and 800 to configure ds odt. Configure the same PHY register for lpddr4 would require a mask value of (300 << 8). Add support for it. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 15

[U-Boot] [PATCH v2 54/99] clk: rockchip: rk3399: Fix check patch warnings and checks

- CHECK: spaces preferred around that '*' - CHECK: spaces preferred around that '/' - CHECK: space preferred before that '|' - WARNING: macros should not use a trailing semicolon - CHECK: Unnecessary parentheses around 'fbdiv <= min_fbdiv' - CHECK: Unnecessary parentheses around 'parent->id == SCLK

[U-Boot] [PATCH v2 83/99] arm: include: rockchip: Add rk3399 pmu file

Add pmu header file for rk3399 SoC, this will help to configure pmu in sdram driver. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- .../include/asm/arch-rockchip/pmu_rk3399.h| 72 +++ 1 file changed, 72 insertions(+) create mode 100644 arch/arm/include/asm/arch-ro

[U-Boot] [PATCH v2 92/99] ram: rk3399: Set lpddr4 MR3

Set MR3 based identified controller in lpddr4 as part of LPDDR set rate initialization phase. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 48 + 1 file changed, 48 insertions(+) diff --git a/drivers/ram/rockchip/sdra

[U-Boot] [PATCH v2 63/99] ram: rk3399: Don't wait for PLL lock in lpddr4

lpddr4 has PLL bypass mode during phy initialization phase, which does all pll configurations. So no need to wait explicitly during pctl config. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 26 -- 1 file changed, 16 inse

[U-Boot] [PATCH v2 97/99] rockchip: dts: rk3399: Add LPDDR4-100 timings

Add sdram timings for LPDDR4-100 via rk3399-sdram-lpddr4-100.dtsi file. all timings are dumped from rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin Associated LPDDR4 board -u-boot.dtsi can include this to make these timings available during SPL or TPL stages. Signed-off-by: Jagan Teki Signed-off-by:

[U-Boot] [PATCH v2 64/99] ram: rk3399: Avoid two channel ZQ Cal Start at the same time

It is possible in lpddr4 dram, where both the channels would start at same time with ZQ Cal Start. If it uses ZQ Call start then it will use RZQ. For example LPDDR4 366 Dual-Die, Quad-Channel Package, RZQ maybe connect to both channel. If ZQ Cal Start at the same time, it will use the same RZQ. I

[U-Boot] [PATCH v2 27/99] ram: rk3399: Add ddrtimingC0

Add DdrTimingC0 structure with associated bit fields. These would help to reconfigure sdram capabilities during lpddr4 setup related configs. Signed-off-by: Jagan Teki --- arch/arm/include/asm/arch-rockchip/sdram_rk3399.h | 12 +++- drivers/ram/rockchip/sdram_rk3399.c | 2

[U-Boot] [PATCH v2 68/99] ram: rk3399: Configure PHY RX_CM_INPUT for lpddr4

Configure PHY RX_CM_INPUT for lpddr4 during phy IO config. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_r

[U-Boot] [PATCH v2 88/99] ram: rk3399: Add set_rate sdram rk3399 ops

DDR set rate can be even required for lpddr4 and we need to keep the lpddr4 code to compile only for relevant boards which do support lpddr4. For this requirement, and for code readability handle data training via sdram_rk3399_ops with .set_rate and same will update in future while supporting lpdd

[U-Boot] [PATCH v2 39/99] ram: rk3399: s/rk3399_base_params/sdram_base_params

Most of the ddr parameters are common in rk3399_base_params structure and which would reuse it in another controller like px30 in future. So, rename the structure from rk3399_base_params into sdram_base_params. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- arch/arm/include/asm/arch-

Re: [U-Boot] rockchip: missing request op in common pinctrl driver resulting kernel boot failure

Since this request is a no-op, it is best to drop the pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM?) lines in board/rockchip/evb_rk3399/evb-rk3399.c (there're no such code lines in other rk3399 board files), which is tested to work with the Firefly-RK3399 board. Therefore, are the PERIPH_ID_PWM

[U-Boot] [PATCH v2 33/99] ram: rk3399: s/ca_tsel_wr_select_p/tsel_wr_select_ca_p

Rename ca_tsel_wr_select_p to tsel_wr_select_ca_p based on the bsp code. No functionality change. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/ram/rockchip/sdr

[U-Boot] [PATCH v2 82/99] ram: rk3399: Add LPPDR4 mr detection

Like data training in other sdram types, mr detection need to taken care for lpddr4 with looped rank and associated channel to make sure the proper configuration held. Once the mr detection successful for active and configured rank with channel number, the same can later reused during actual LPDDR

[U-Boot] [PATCH v2 40/99] ram: rk3399: Move common sdram structures in common header

Move common sdram structures like sdram_cap_info, sdram_base_params into sdram_common header, this would help to reuse the same from another controllers like px30. Signed-off-by: Jagan Teki --- .../include/asm/arch-rockchip/sdram_common.h | 29 +++ .../include/asm/arch-rockchip/

[U-Boot] [PATCH v2 58/99] ram: rk3399: Configure phy IO in ds odt

Some dramtypes like lpddr4 initialization would required to configure phy IO even after pctl_cfg and after set_ds_odt. For those cases the set_ds_odt would be an initial call to setup the phy. To satisfy all the cases, trigger phy IO from set_ds_odt. Signed-off-by: Jagan Teki --- drivers/ram/r

[U-Boot] Pull request: u-boot-spi/master

Hi Tom, Please pull this PR. Summary: - Drop zipitz2 board (Tom) - Add DEPRECATED option (Tom) - Mark legacy or non-dm drivers as DEPRECATED (Jagan) thanks, Jagan. The following changes since commit 68b90e57bc034e237923b02acb633dc4e91d44cb: configs: tinker-rk3288 disable CONFIG_SPL_I2C_SUPPO

[U-Boot] [PATCH v2 52/99] ram: rk3399: Enable sdram debug functions

This would help to debug the sdram base parameters while debugging existing chip or while supporting new sdram type. It require explicit enablement of CONFIG_RAM_ROCKCHIP_DEBUG for showing the debug prints. Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 5 + 1 file chan

[U-Boot] [PATCH v2 65/99] ram: rk3399: Configure PHY_898, PHY_919 for lpddr4

PHY_898, PHY_919 would require to configure PHY LP4 boot pll control and ca for lpddr4. So, configure the same in pctl_cfg for LPDDR4. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/r

Re: [U-Boot] Regression in U-boot v2019-07-rcX

On Wed, Jun 12, 2019 at 10:07:11PM +0800, Bin Meng wrote: > On Wed, Jun 12, 2019 at 9:49 PM Andy Shevchenko > wrote: > > On Wed, Jun 12, 2019 at 04:23:37PM +0300, Andy Shevchenko wrote: > > > On Wed, Jun 12, 2019 at 04:18:25PM +0300, Andy Shevchenko wrote: > > commit 665cb18ea64aabbeb03d27a4c92dd

[U-Boot] [PATCH v2 57/99] ram: rk3399: Add spaces in pctl_cfg

Trivial patch, add proper spaces in pctl_cfg. Signed-off-by: Jagan Teki --- drivers/ram/rockchip/sdram_rk3399.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index ae9ba625bd..d5ff17ad4f 100644 --- a/drivers/ram/r

[U-Boot] [PATCH v2 77/99] ram: rk3399: Update lpddr4 vref based on io settings

The vref_mode_dq, vref_value_dq on lpddr4 value is depending on IO settings of rd_vref. Add support for it. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 19 ++- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/driv

[U-Boot] [PATCH v2 72/99] ram: rk3399: Add IO settings

Add IO settings for dram ctl and phy. IO settings are useful for configuring ctl, phy odt, vref, mr5, mode select and other needed input output operations for lpddr4 or any other dramtype sdram. Right now, this patch added IO setting for all supported sdram frequencies. Signed-off-by: Jagan Teki

[U-Boot] [PATCH v2 53/99] rockchip: dts: rk3399: nanopi-neo4: Use DDR3-1866 dtsi

Use DDR3-1866 2GB ddr timings dtsi for 1GB NanoPi Neo4 board. Since sdram rk3399 support dynamic stride and rank detection it can able to detect 1GB ddr eventough the timings are meant for dual channel, 2GB size. Bootchain after and before this change are: TPL -> SPL -> U-Boot proper rkbin ->

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