[U-Boot] [PATCH v2 56/99] clk: rockchip: rk3399: Set 400MHz ddr clock

[Jagan Teki]

Add support for setting 400MHz ddr clock.

Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
Signed-off-by: YouMin Chen <c...@rock-chips.com>
---
 drivers/clk/rockchip/clk_rk3399.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/rockchip/clk_rk3399.c 
b/drivers/clk/rockchip/clk_rk3399.c
index 1de21c9f3e..79007b8682 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -839,6 +839,10 @@ static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru,
                dpll_cfg = (struct pll_div)
                {.refdiv = 2, .fbdiv = 100, .postdiv1 = 4, .postdiv2 = 1};
                break;
+       case 400 * MHz:
+               dpll_cfg = (struct pll_div)
+               {.refdiv = 1, .fbdiv = 50, .postdiv1 = 3, .postdiv2 = 1};
+               break;
        case 666 * MHz:
                dpll_cfg = (struct pll_div)
                {.refdiv = 2, .fbdiv = 111, .postdiv1 = 2, .postdiv2 = 1};
-- 
2.18.0.321.gffc6fa0e3

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot