From: Jagan Teki
Select missing BOARD_LATE_INIT from configs/ to
respective targets on arch area for Engicam imx6 boards.
Cc: Tom Rini
Cc: Stefano Babic
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
arch/arm/cpu/armv7/mx6/Kconfig | 2 ++
configs/imx6dl_icore_rqs_mmc_defconfig
Hi Simon
On 03/22/2017 02:06 PM, Simon Glass wrote:
> Hi,
>
> On 17 March 2017 at 10:25, wrote:
>> From: Patrice Chotard
>>
>> This is the generic phy driver for the picoPHY ports
>> used by USB2 and USB3 Host controllers available on
>> STiH407 SoC families.
>>
>> Signed-off-by: Patrice Chotar
From: Vinitha Pillai-B57223
The header address of PPA defined in Kconfig.
Signed-off-by: Vinitha Pillai
Signed-off-by: Sumit Garg
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 11 +++
arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 2 +-
arch/arm/include/asm/fsl_secure_boot.h| 12 +
Purpose of patchset:
1. This consolidated patchset supersedes earlier patchset for LS1046
and LS1012 secure boot target addition patchsets as they have inter-
dependency.
2. Rebased and incorporated review comments.
3. Enabling PPA in secure boot via Kconfig option simila
From: Vinitha Pillai-B57223
Define bootscript and its header addresses for QSPI target. Also
define PPA header address to enable PPA validation.
Signed-off-by: Vinitha Pillai
Signed-off-by: Sumit Garg
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 +
arch/arm/include/asm/arch-fsl-
From: Vinitha Pillai-B57223
Enable PPA in secure boot by defining FSL_LS_PPA macro in its defconfig
file.
Signed-off-by: Vinitha Pillai
Signed-off-by: Sumit Garg
---
configs/ls1043ardb_SECURE_BOOT_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/ls1043ardb_SECURE_BOOT_def
Add NOR secure boot target. Also enable sec init.
Signed-off-by: Vinitha Pillai
Signed-off-by: Sumit Garg
---
board/freescale/ls1046aqds/MAINTAINERS | 4
board/freescale/ls1046aqds/ls1046aqds.c | 19
configs/ls1046aqds_SECURE_BOOT_defconfig | 39 +++
From: Vinitha Pillai-B57223
Add QSPI Secure Boot target. Also enable sec init.
Signed-off-by: Vinitha Pillai
Signed-off-by: Sumit Garg
---
board/freescale/ls1046ardb/Kconfig| 2 +-
board/freescale/ls1046ardb/MAINTAINERS| 4 +++
board/freescale/ls1046ardb/ls1046ardb.c
From: Vinitha Pillai-B57223
Add QSPI Secure Boot target to enable chain of trust
Signed-off-by: Sumit Garg
Signed-off-by: Vinitha Pillai
Reviewed-by: Ruchika Gupta
---
board/freescale/ls1012ardb/MAINTAINERS| 4 +++
board/freescale/ls1012ardb/ls1012ardb.c | 5 +++
configs/ls10
From: Vinitha Pillai-B57223
Define bootscript and its header addresses for QSPI target
Also add PPA header address in Kconfig
Signed-off-by: Vinitha Pillai
Signed-off-by: Sumit Garg
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 +
arch/arm/include/asm/arch-fsl-layerscape/config.h
On 03/23/2017 06:36 AM, Ley Foon Tan wrote:
> On Wed, Mar 22, 2017 at 10:26 PM, Marek Vasut wrote:
>> On 03/22/2017 10:45 AM, Ley Foon Tan wrote:
>>> On Fri, Mar 10, 2017 at 9:53 AM, Marek Vasut wrote:
On 03/09/2017 01:26 AM, Ley Foon Tan wrote:
> Convert Altera ddr driver to use Kconfig
Hi Kever,
I was wondering if we really need to copy in all those ATF definitions.
I think this is really an *interface* between the loader (SPL or BL2)
and the runtime services (BL31), so it's supposed to be stable and we
wouldn't need to pull in all those headers.
So given that, can't we simply
Hi Mario,
On 22.02.2017 16:07, Mario Six wrote:
> Make secure booting available for the controlcenterdc
> board.
>
> Signed-off-by: Reinhard Pfau
> Signed-off-by: Mario Six
> ---
> Changes in v3:
>
> * Added secure boot options to config to enable secure boot by default
>
> Changes in v2:
>
On Thu, Mar 23, 2017 at 10:31 AM, Stefan Roese wrote:
> Hi Mario,
>
> On 22.02.2017 16:07, Mario Six wrote:
>> Make secure booting available for the controlcenterdc
>> board.
>>
>> Signed-off-by: Reinhard Pfau
>> Signed-off-by: Mario Six
>> ---
>> Changes in v3:
>>
>> * Added secure boot options
On Thu, Mar 23, 2017 at 3:39 PM, Marek Vasut wrote:
> On 03/23/2017 06:36 AM, Ley Foon Tan wrote:
>> On Wed, Mar 22, 2017 at 10:26 PM, Marek Vasut wrote:
>>> On 03/22/2017 10:45 AM, Ley Foon Tan wrote:
On Fri, Mar 10, 2017 at 9:53 AM, Marek Vasut wrote:
> On 03/09/2017 01:26 AM, Ley Foo
Hi Simon
On 03/22/2017 02:05 PM, Simon Glass wrote:
> Hi,
>
> On 17 March 2017 at 10:25, wrote:
>> From: Patrice Chotard
>>
>> Add support for on-chip ehci controller available
>> on STMicrolectronics SoCs.
>> ehci support will be then available on both type A
>> USB 2.0 connectors.
>>
>> Signe
On 23.03.2017 10:45, Mario Six wrote:
On Thu, Mar 23, 2017 at 10:31 AM, Stefan Roese wrote:
Hi Mario,
On 22.02.2017 16:07, Mario Six wrote:
Make secure booting available for the controlcenterdc
board.
Signed-off-by: Reinhard Pfau
Signed-off-by: Mario Six
---
Changes in v3:
* Added secure
On Thu, Mar 23, 2017 at 11:04 AM, Stefan Roese wrote:
> On 23.03.2017 10:45, Mario Six wrote:
>>
>> On Thu, Mar 23, 2017 at 10:31 AM, Stefan Roese wrote:
>>>
>>> Hi Mario,
>>>
>>> On 22.02.2017 16:07, Mario Six wrote:
Make secure booting available for the controlcenterdc
board.
>>>
Signed-off-by: Shengzhou Liu
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index a99b1c6..25588c8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b
Wenyou Yang wrote...
> The purpose of patch set is to convert the board to support device
> tree and driver model, and enable the early debug UART as well.
> It is based on the patch set:
> [PATCH v8 0/2] pinctrl: at91: Add pinctrl driver
> https://lists.denx.de/pipermail/u-boot/2017-M
Hello Sylvain,
Am 14.03.2017 um 16:24 schrieb Sylvain Lemieux:
From: Liam Beguin
This is part of the prep work for the migration to the driver model.
It will enable the driver to support DM and non-DM configurations
using the same functions.
Signed-off-by: Liam Beguin
Signed-off-by: Sylvain
Hello Sylvain,
Am 14.03.2017 um 16:24 schrieb Sylvain Lemieux:
From: Liam Beguin
Adding DM specific wrapper functions and definitions.
Signed-off-by: Liam Beguin
Signed-off-by: Sylvain Lemieux
---
drivers/i2c/lpc32xx_i2c.c | 91 +++
1 file chan
Hi.
I am running U-boot 2015.04 and experiencing some issues with "fatls" command.
We use the "fatls" command to detect if there is an USB storage device
plugged in the port during boot (might be better ways of doing this).
So on boot we have:
fatls usb 0:1 &&
Normally "fatls" returns "0" w
From: Ken Ma
*** BLURB HERE ***
1. Move base, max_lun and max_id such scsi generic data from platdata to uclass
plat data;
2. Make scsi compatible for legacy SCSI devices and new SAS controller
- Introduce scsi bus DT node, scsi work as bus and scsi disks, scsi scanner
and sata are
its
From: Ken Ma
- The members in scsi_platdata(base, max_lun and max_id) are generic,
so now they are taken from fdt by the uclass_platdata instead of
platdata code upon call to post bind callback.
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Cc: Michal Simek
Reviewed-on: http://v
From: Ken Ma
- For the purpose of accessing peripheral devices through SCSI, the
peripheral devices need to be probed to finish low level
initialization, for example, ahci controller needs to do the ahci
initialization;
- scsi_low_level_init() calling is removed since the detailed scsi low
From: Ken Ma
- Add generic scsi device tree bindings doc, the doc includes:
- Brief introduction for scsi;
- Scsi's properties' introduction;
- Add marvell mvebu scsi binding doc with the example of armada3700
SCSI controller.
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Cc: M
From: Ken Ma
- Add scsi node which acts as a bus for scsi devices, armada3700 has
only 1 scsi interface, so max-id is 1, and the logic unit number is
also 1 for armada3700;
- Since a3700's scsi is sas(serial attached scsi) which is compatible
for sata and sata hard disk is a sas device, so
From: Ken Ma
- Add mvebu scsi driver which is based on scsi uclass so that
scsi command can work when driver model is enabled for scsi;
- Mvebu scsi is serial attached scsi and act as an add-on host
bus adapter.
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Cc: Michal Simek
Revi
From: Ken Ma
- When scsi controller acts as a bus, we need to bind its children
scsi devices(scsi hdd, cd, dvd, scanner) to their drivers as spi
controller binds spi flashes, so scsi-uclass's post bind function
calls dm_scan_fdt_dev() to bind scsi subnode devices;
- When scsi controller is
From: Ken Ma
- Enable SCSI support in Armada-3700 DB default configuration.
Reviewed-on: http://vgitil04.il.marvell.com:8080/35302
Reviewed-by: Omri Itach
Tested-by: iSoC Platform CI
Reviewed-by: Kostya Porotchkin
Signed-off-by: Ken Ma
Cc: Simon Glass
Cc: Stefan Roese
Cc: Michal Simek
---
Hi Ken,
On 23.03.2017 10:29, m...@marvell.com wrote:
From: Ken Ma
- Add scsi node which acts as a bus for scsi devices, armada3700 has
only 1 scsi interface, so max-id is 1, and the logic unit number is
also 1 for armada3700;
- Since a3700's scsi is sas(serial attached scsi) which is compa
Hi
> +int fixedphy_probe(struct phy_device *phydev)
> +{
> + struct fixed_link *priv;
> + int ofnode = phydev->addr;
> + u32 val;
> +
> + /* check for mandatory properties within fixed-link node */
> + val = fdt_getprop_u32_default_node(gd->fdt_blob,
> +
On 23.03.2017 15:03, Christian Gmeiner wrote:
Hi
Hi Christian,
+int fixedphy_probe(struct phy_device *phydev)
+{
+ struct fixed_link *priv;
+ int ofnode = phydev->addr;
+ u32 val;
+
+ /* check for mandatory properties within fixed-link node */
+ val = fdt_getpr
From: Hannes Schmelzer
This patch adds support for having a "fixed-link" to some other MAC
(like some embedded switch-device).
For this purpose we introduce a new phy-driver, called "Fixed PHY".
Fixed PHY works only with CONFIG_DM_ETH enabled, since the fixed-link is
described with a subnode be
Dear Mirza,
In message
you wrote:
>
> I am running U-boot 2015.04 and experiencing some issues with "fatls" command.
...
> Normally "fatls" returns "0" when it does a successful list. But we
> have found a case where it does not even though everything seems to
> work fine. Below is a log with d
Hi Tom,
Here are the patches that survived testing so far. More to come next week.
The following changes since commit 5877d8f398de26617be6f1f57bc30c49e9f90ebb:
Merge branch 'master' of git://git.denx.de/u-boot-mmc (2017-03-21
14:10:15 -0400)
are available in the git repository at:
git://g
This patchset does the following things:
- It brings the latest Linux changes from the mvpp2 ethernet driver done
by Thomas Petazzoni to the U-Boot version of this driver. This enables
the usage of this driver on the new Marvell Armada 7k / 8k ARMv8 SoCs.
- This driver is enabled for the cur
check_cache_range() warns that the top boundaries are not properly
aligned when flushing or invalidating the buffers and make these
operations fail.
This gets rid of the warnings:
CACHE: Misaligned operation at range ...
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
From: Thomas Petazzoni
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
drivers/net/mvpp2.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/
From: Thomas Petazzoni
This commit adds the definition of the PPv2.2 HW descriptors, adjusts
the mvpp2_tx_desc and mvpp2_rx_desc structures accordingly, and adapts
the accessors to work on both PPv2.1 and PPv2.2.
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked-by: Joe Hershbe
Some more U-Boot specific 64bit support changes, mostly changing u32
to unsigned long.
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
drivers/net/mvpp2.c | 25 +++--
1 file changed, 15 insertions(+), 10 deletions(-)
dif
From: Thomas Petazzoni
As indicated by Russell King, the mvpp2 driver currently uses a lot
"phys" or "phys_addr" to store what really is a DMA address. This commit
clarifies this by using "dma" or "dma_addr" where appropriate.
This is especially important as we are going to introduce more change
Read the "phy-speed" DT property to differentiate between 1 and 2.5GB
SGMII operations. Please note that its unclear right now, if this
DT property will be accepted in mainline Linux. If not, we need to
revisit this code and change it to use the accepted property.
Signed-off-by: Stefan Roese
Cc:
From: Thomas Petazzoni
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
- Rebased on latest patchset version from Thomas available in net-next,
mostly smaller changes, making checkpatch happy.
drivers/net/m
Currently, the naming of the ethernet ports is not handled correctly in
the multi-CP (Communication Processor) case. On Armada 8k, the slave-CP
also instantiates an ethernet controller with the same device ID's.
This patch now takes this into account and adds the required base-id
so that the slave-
This patch adds the PPv2.2 specific FIFO configuration to the mvpp2
driver. The RX FIFO packet data size is changed to the recommended
FIFO sizes. The TX FIFO configuration is newly added.
Signed-off-by: Stefan Roese
Cc: Stefan Chulski
Cc: Kostya Porotchkin
Cc: Nadav Haklai
---
Changes in v2:
From: Thomas Petazzoni
The PPv2.2 IP has a different TX and RX descriptor layout compared to
PPv2.1. In order to prepare for the introduction of PPv2.2 support in
mvpp2, this commit adds accessors for the different fields of the TX
and RX descriptors, and changes the code to use them.
For now, t
From: Thomas Petazzoni
Some of the MVPP2_PRS_RI_* definitions use the ~(value) syntax, which
doesn't compile nicely on 64-bit. Moreover, those definitions are in
fact unneeded, since they are always used in combination with a bit
mask that ensures only the appropriate bits are modified.
Therefor
From: Thomas Petazzoni
This commit adjusts how the MVPP2_ISR_RXQ_GROUP_REG register is
configured, since it changed between PPv2.1 and PPv2.2.
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
- Rebased on late
From: Thomas Petazzoni
Since the format of the HW descriptors is different between PPv2.1 and
PPv2.2, this commit introduces an intermediate union, with for now
only the PPv2.1 descriptors. The bulk of the driver code only
manipulates opaque mvpp2_tx_desc and mvpp2_rx_desc pointers, and the
descr
Testing shows, that PHY polling needs to be enabled on Armada 7k/8k.
Otherwise ethernet transfers will not work correctly. PHY polling
is enabled per default after reset, so we do not need to specifically
enable it, but this makes it clearer.
Signed-off-by: Stefan Roese
Cc: Stefan Chulski
Cc: Ko
From: Thomas Petazzoni
In PPv2.2, the MVPP2_RXQ_DESC_ADDR_REG and MVPP2_TXQ_DESC_ADDR_REG
registers have a slightly different layout, because they need to contain
a 64-bit address for the RX and TX descriptor arrays. This commit
adjusts those functions accordingly.
Signed-off-by: Thomas Petazzon
Since we've now integrated the A7k/8k support in the mvpp2 ethernet
driver, lets enable the support for both Marvell developments boards.
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
configs/mvebu_db-88f7040_defconfig | 2 +-
configs/mveb
Since Armada 7K/8K is also equipped with a newer version of the MVPP2
ethernet controller, lets enable compilation of this driver for these
platforms.
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
drivers/net/Kconfig | 6 +++---
1 file cha
From: Thomas Petazzoni
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
drivers/net/mvpp2.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 365180d456..4
This patch moves the base_probe function mvpp2_base_probe() from the
MISC driver to the ETH driver. When integrated in the MISC driver,
probe is called too early before the U-Boot ethernet infrastructure
(especially the MDIO / PHY interface) has been initialized. Resulting
in errors in mdio_registe
From: Thomas Petazzoni
The mvpp2 is going to be extended to support the Marvell Armada 7K/8K
platform, which is ARM64. As a preparation to this work, this commit
enables building the mvpp2 driver on ARM64, by:
- Adjusting the Kconfig dependency
- Fixing the types used in the driver so that th
From: Thomas Petazzoni
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
drivers/net/mvpp2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index
Hi Heiko,
On 21 February 2017 at 13:35, Simon Glass wrote:
> On 18 February 2017 at 11:46, Heiko Stuebner wrote:
>> The Rock is a RK3188 based single board computer by Radxa.
>> Currently it still relies on the proprietary DDR init and
>> cannot use the generic SPL, but at least is able to boot
The macro GENMASK_ULL needs the BITS_PER_LONG_LONG macro which is
defined in the bitsperlong.h header. Lets include this header as
the upcoming A7k/8k support in the Marvell mvpp2 ethernet driver
uses this macro.
Signed-off-by: Stefan Roese
Reviewed-by: Tom Rini
Reviewed-by: Joe Hershberger
--
From: Thomas Petazzoni
This commit adjusts the mvpp2 driver register mapping and access logic
to support PPv2.2, to handle a number of differences.
Due to how the registers are laid out in memory, the Device Tree binding
for the "reg" property is different:
- On PPv2.1, we had a first area for
This patch adds the new PHY interface modes XAUI, RXAUI and SFI that will
be used by the PPv2.2 support in the Marvell mvpp2 ethernet driver.
Signed-off-by: Stefan Roese
Cc: Stefan Chulski
Cc: Kostya Porotchkin
Cc: Nadav Haklai
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by f
From: Thomas Petazzoni
In preparation to the introduction for the support of PPv2.2 in the
mvpp2 driver, this commit adds a hw_version field to the struct
mvpp2, and uses the .data field of the DT match table to fill it in.
Having the MVPP21 and MVPP22 definitions available will allow to start
a
From: Thomas Petazzoni
The PPv2.2 unit is connected to an AXI bus on Armada 7K/8K, so this
commit adds the necessary initialization of the AXI bridge.
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
drivers
From: Thomas Petazzoni
The mvpp2_bm_bufs_add() currently creates a fake cookie by calling
mvpp2_bm_cookie_pool_set(), just to be able to call
mvpp2_pool_refill(). But all what mvpp2_pool_refill() does is extract
the pool ID from the cookie, and call mvpp2_bm_pool_put() with this ID.
Instead of d
From: Thomas Petazzoni
The MVPP2_RXQ_CONFIG_REG register has a slightly different layout
between PPv2.1 and PPv2.2, so this commit adapts the functions modifying
this register to accommodate for both the PPv2.1 and PPv2.2 cases.
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked
From: Thomas Petazzoni
This commit handles a few miscellaneous differences between PPv2.1 and
PPv2.2 in different areas, where code done for PPv2.1 doesn't apply for
PPv2.2 or needs to be adjusted (getting the MAC address, disabling PHY
polling, etc.).
Changed by Stefan for U-Boot:
Since mvpp2_p
From: Thomas Petazzoni
This commit adjusts the allocation and freeing of BM pools to support
PPv2.2. This involves:
- Checking that the number of buffer pointers is a multiple of 16, as
required by the hardware.
- Adjusting the size of the DMA coherent area allocated for buffer
pointers. In
This patch adds the GoP (Group of Ports) and NetC (Net Complex) setup to
the Marvell mvpp2 ethernet driver. This code is mostly copied from the
Marvell U-Boot version and was written by Stefan Chulski. Please
note that only RGMII and SGMII support have been added, as these are
the only interfaces t
From: Thomas Petazzoni
This commit modifies the mvpp2_defaults_set() function to not do the
loopback and FIFO threshold initialization, which are not needed for
PPv2.2.
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by
This patch adds the GoP (Group of Ports) and NetC (Net Complex) setup to
the Marvell mvpp2 ethernet driver for the missing port 0. This code is
mostly copied from the Marvell U-Boot version and was written by Stefan
Chulski. Please note that only SFI support have been added, as this
is the only int
From: Thomas Petazzoni
In PPv2.1, we have a maximum of 8 RXQs per port, with a default of 4
RXQs per port, and we were assigning RXQs 0->3 to the first port, 4->7
to the second port, 8->11 to the third port, etc.
In PPv2.2, we have a maximum of 32 RXQs per port, and we must allocate
RXQs from th
In U-Boot the MDIO / SMI support is integrated in the mvpp2 driver,
currently only supporting the 32bit platforms (Armada 37x). This patch
now adds the A7k/8k PPv2.2 MDIO support to that the phy / mii IF
can be used as well on these platforms.
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
The default configuration for the COMPHY-0 port should be 1G, as its
used as 1G SGMII connection. This change is necessary to get the
MAC2 port (SGMII) working on this DB.
Signed-off-by: Stefan Roese
Cc: Stefan Chulski
Cc: Kostya Porotchkin
Cc: Nadav Haklai
Acked-by: Joe Hershberger
---
Cha
This fixes problems noticed with the PPv2.2 A7k/8k port, when not all
elements of the descriptors had been cleared before use.
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
drivers/net/mvpp2.c | 3 +++
1 file changed, 3 insertions(+)
diff
The Marvell PHY support is needed espescially for the A7040-DB with the
SGMII port (port 2). As without the marvell PHY driver configuration
for SGMII, ethernet won't work.
Signed-off-by: Stefan Roese
Cc: Stefan Chulski
Cc: Kostya Porotchkin
Cc: Nadav Haklai
Acked-by: Joe Hershberger
---
Ch
As pointed out by Stefan Chulski, this variable is unused and should be
removed.
Signed-off-by: Stefan Roese
Cc: Stefan Chulski
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
- Fixed small typo in commit text
drivers/net/mvpp2.c | 4
1 file changed, 4 deletions(
This patch adds a remove function to the mvpp2 ethernet driver which is
called before the OS is started, doing:
- Allocate the used buffers back from the buffer manager
- Stop the BM activity
Signed-off-by: Stefan Roese
Cc: Stefan Chulski
Cc: Kostya Porotchkin
Cc: Nadav Haklai
Acked-by: Joe H
From: Thomas Petazzoni
Now that the mvpp2 driver has been modified to accommodate the support
for PPv2.2, we can finally advertise this support by adding the
appropriate compatible string.
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Changes in v
On PPv2.2 we enable PHY polling, so we also need to configure the PHY
address in the specific PHY address rgisters.
Signed-off-by: Stefan Roese
Cc: Stefan Chulski
Cc: Kostya Porotchkin
Cc: Nadav Haklai
Acked-by: Joe Hershberger
---
Changes in v2:
- Added Acked-by from Joe
drivers/net/mvpp
This patch does a bit of restructuring of the probe / init functions,
mainly to allow earlier register access as it is needed for the upcoming
GoP (Group of Ports) and NetC (Net Complex) code.
Signed-off-by: Stefan Roese
Cc: Joe Hershberger
---
Changes in v2:
- New patch
drivers/net/mvpp2.c
From: Thomas Petazzoni
This commit adds the description of the PPv2.2 hardware block for the
Marvell Armada 7K and Armada 8K processors, and their corresponding Armada
7040 and 8040 Development boards.
Signed-off-by: Thomas Petazzoni
Signed-off-by: Stefan Roese
Acked-by: Joe Hershberger
---
Hi Simon,
Am Donnerstag, 23. März 2017, 10:18:31 CET schrieb Simon Glass:
> On 21 February 2017 at 13:35, Simon Glass wrote:
> > On 18 February 2017 at 11:46, Heiko Stuebner wrote:
> >> The Rock is a RK3188 based single board computer by Radxa.
> >> Currently it still relies on the proprietary D
Add a missing occurrance of PHY_INTERFACE_MODE_RGMII_ID, which should
be handled identical to PHY_INTERFACE_MODE_RGMII.
Signed-off-by: Stefan Roese
Cc: Stefan Chulski
Cc: Kostya Porotchkin
Cc: Nadav Haklai
Cc: Joe Hershberger
---
Changes in v2:
- New patch
drivers/net/mvpp2.c | 1 +
1 fil
ft_cpu_setup() already calls fdt_fixup_ethernet(), calling it
in image_setup_libfdt() is both redundant and breaks any modifications
done by ft_board_setup(). Restore the old behavior by removing
the call in image_setup_libfdt()
Signed-off-by: Joakim Tjernlund
---
common/image-fdt.c | 1 -
1 fil
2017-03-23 3:19 GMT+01:00 Simon Glass :
> Hi,
>
> On 22 March 2017 at 10:35, Sébastien Basset wrote:
> > 1/ No, As i am stuck on the mmc (pci controller internal soc),
> > 2/ Now i try to boot on usb key, but i don't see controller usb
> > Sorry, these are two different problems.
>
> It is better
Hi,
On 23 March 2017 at 12:36, Sébastien Basset wrote:
>
>
>
> 2017-03-23 3:19 GMT+01:00 Simon Glass :
>>
>> Hi,
>>
>> On 22 March 2017 at 10:35, Sébastien Basset wrote:
>> > 1/ No, As i am stuck on the mmc (pci controller internal soc),
>> > 2/ Now i try to boot on usb key, but i don't see cont
On Thu, Mar 23, 2017 at 12:32 PM, Suji Velupillai
wrote:
> Thank you Joe for your time and feedback,
> Please see the answers inline.
> Suji
>
>
> On Tue, Mar 21, 2017 at 11:53 AM, Joe Hershberger
> wrote:
>>
>> On Fri, Mar 3, 2017 at 7:06 PM, Steve Rae wrote:
>> > From: Suji Velupillai
>> >
>>
The RK3399-Q7 ("Puma") SoM exposes UART0 as the Qseven UART (i.e. the
serial line available via standardised pins on the edge connector and
available on a RS232 connector).
To support boards (such as the RK3399-Q7) that require UART0 as a
debug console, we match CONFIG_DEBUG_UART_BASE and add the
The default configuration for debug output from the RK3399 SPL is
UART2 at 1.5MBaud. While this works reasonably well for the EVB,
custom boards may want to change these settings.
To simplify the enablement (i.e. to use the RS232 connector on our
baseboard and to improve the compatibility with co
With everything set up to define CONFIG_BAUDRATE via defconfig and
with to have the SPL debug UART either on UART0 or UART2, the configs
for the RK3399 EVB and for the RK3399-Q7 can be updated.
Signed-off-by: Philipp Tomsich
---
Changes in v2: None
configs/evb-rk3399_defconfig| 2 ++
conf
Up till this commit passing NULL as input parameter was allowed, but not
handled properly.
When one passed NULL to one of this function parameters, the code was
executed causing data abort.
However, what is more interesting, the abort was not caught because of code
execution in HYP mode with mask
The BootROM of the RK3399 SoC does not initialise the cntfrq_el0 (which
holds the value 0 (zero) on entry into the SPL. This causes the timebase
for U-Boot not to advance (and will cause a hang where a timeout would
be expected... e.g. if something goes wrong during MMC/SD card startup).
This chan
Applies on top of current rockchip master branch and needs
Kever's early_init patch for rk3188 and rk3399.
After this one series, there is of course still
rockchip: rk3188: fixups and armclk speedup
series and
rockchip: rk3188: enable remap function
patch open.
changes compared to the or
Commit c67c8c604b6c ("board_init.c: Always use memset()") dropped the naive
memset alternative from board_init_f_init_reserve.
So activate CONFIG_TPL_LIBGENERIC for that common memset implementation.
We cannot use the ARCH-specific memset, as that would incur 200bytes of
additional TPL size, space
The Rock is a RK3188 based single board computer by Radxa.
Currently it still relies on the proprietary DDR init and
cannot use the generic SPL, but at least is able to boot
a linux kernel and system up to a regular login prompt.
Signed-off-by: Heiko Stuebner
Reviewed-by: Simon Glass
Tested-by:
Building sd images for rk3188 requires more steps due to the needed split
into TPL and SPL as loaders. Describe how to build an image for it in a
separate paragraph in the READER.rockchip file.
Signed-off-by: Heiko Stuebner
---
doc/README.rockchip | 26 ++
1 file changed,
MiQi is rk3288 based development board with 1 or 2 GB SDRAM, 16 GB eMMC,
micro SD card interface, 4 USB 2.0 ports, HDMI, gigabit Ethernet and
expansion ports.
Signed-off-by: Jernej Skrabec
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3288-miqi.dts| 46
a
On Wed, Mar 22, 2017 at 6:06 AM, Simon Glass wrote:
> Hi Maxim,
>
> On 21 March 2017 at 17:44, Maxim Sloyko wrote:
> > Hi Joe,
> >
> > Please see responses inline, simply ACK'ed comments will be addressed
> > in the next version.
> >
> > On Tue, Mar 21, 2017 at 12:32 PM, Joe Hershberger
> > wro
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