Hi,
we are working with self-developed i.MX6 board. Now we have enabled U-Boot
splash screen support. It is working well, but we have problems with LVDS
interface.
If we configure LVDS we always get 56MHz LVDS clock although we configured
30MHz for LVDS clock via displays structure in the boar
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> At present this function does not specify its return value. Fix it.
>
> Signed-off-by: Simon Glass
> ---
>
Reviewed-by: Bin Meng
But please see comments below.
> include/dm/device.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> Rather than using 0xff in the code, add a constant.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/pci/pci.c | 3 ++-
> include/pci.h | 2 ++
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/pci.c b/drivers
Hi Simon,
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> At present there are no PCI functions which allow access to PCI
> configuration using a struct udevice. This is a sad situation for driver
> model as it makes use of PCI harder. Add these functions.
>
> Signed-off-by: Simon Glass
>
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> At present the PCI output displays 'Mem' when it allocates memory for a PCI
> device, whether it is prefetchable or not. There is a distinction since the
> memory comes from separate pools. Use 'Prf' instead of 'Mem' when allocating
> prefetcha
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> Drop these from the header file and use Kconfig instead.
>
> Signed-off-by: Simon Glass
> ---
>
> configs/chromebook_link_defconfig | 3 +++
> configs/chromebox_panther_defconfig | 3 +++
> include/configs/x86-chromebook.h| 3 ---
> 3 f
Hi Simon,
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> Move this config option to Kconfig and tidy up.
>
> Signed-off-by: Simon Glass
> ---
Reviewed-by: Bin Meng
But please see nits below.
>
> configs/efi-x86_defconfig| 1 +
This has dependencies to the efi series. I think
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> Fix a small typo in this binding file.
>
> Signed-off-by: Simon Glass
> ---
>
> doc/device-tree-bindings/misc/intel,irq-router.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/doc/device-tree-bindings/misc/inte
Hi Simon,
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> These functions allow iteration through all PCI devices including bridges.
> The children of each PCI bus are returned in turn. This can be useful for
> configuring, checking or enumerating all the devices.
>
> Signed-off-by: Simon G
Hi Simon,
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> Use savedefconfig to get this file into the correct order.
>
> Signed-off-by: Simon Glass
> ---
>
Since efi series is not applied, can you move this to your efi v2 series?
> configs/efi-x86_defconfig | 9 -
> 1 file chang
Hi Simon,
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> This code could use a little tightening up. There is some repetition and
> an odd use of fdtdec_get_int_array().
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/irq.c | 40 +---
> 1 file ch
Hi Simon,
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> This code may be useful for boards that use driver model for PCI.
>
> Note: It would be better to have driver model automatically call this
> function somehow. However for now it is probably safer to have it under
> board control.
>
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> These are now in the device tree so we don't need to use the CONFIG options.
> Drop them.
>
> Signed-off-by: Simon Glass
> ---
>
> include/configs/minnowmax.h | 12
> 1 file changed, 12 deletions(-)
>
> diff --git a/include/confi
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> This is provided in Kconfig so we don't need it here.
>
> Signed-off-by: Simon Glass
> ---
>
> include/configs/x86-chromebook.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/include/configs/x86-chromebook.h
> b/include/configs/x86-
Hi Simon,
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> The steps required to boot a Linux distribution from U-Boot on x86 are not
> very complicated, but it is a good idea to have these written down in an
> accessible place.
>
> Document how to examine the boot media from U-Boot, how to
Hi Simon,
On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> At present minnowmax does not correct set up PCI interrupts. This should be
> done in U-Boot so that devices work correctly in Linux.
>
> Note: This code needs to make use of the recent pirq_routing work. It does
> not seem to suppor
Hi Joe,
On Wed, Jun 10, 2015 at 11:03:59AM -0500, Joe Hershberger wrote:
> >> I beat you to it:
> >> http://lists.denx.de/pipermail/u-boot/2015-May/214261.html
> >
> > Well, ... ok. You won ;-) Your patchset is by far more comprehensive than
> > mine.
> > If I see this right in the archives, you
Add proper register definition for JTAG ID and
cleanup cpu_is_* functions.
Reviewed-by: Tom Rini
Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-keystone/include/mach/hardware.h | 42 --
1 file changed, 26 insertions(+), 16 deletions(-)
diff
Add print_cpuinfo() function and enable
CONFIG_DISPLAY_CPUINFO for keystone platforms,
so that cpu info can be displayed during boot.
Reviewed-by: Tom Rini
Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-keystone/init.c| 32
Use common devspeed and armspeed definitions.
Also fix reading efuse bootrom register.
Reviewed-by: Tom Rini
Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-keystone/clock-k2e.c | 16 --
arch/arm/mach-keystone/clock-k2hk.c | 32 ---
This seires does a several bunch of cleanups for clock and PLL
related definitions. This helps a lot in adding data for
new Keystone2 SoCs. And also adds support for CPU detection.
This is based on Nishanth's config cleanup series:
https://www.mail-archive.com/u-boot%40lists.denx.de/msg177822.html
Register Base addresses are same for PLLs in all
keystone platforms. If a PLL is not available, the corresponding
register addresses are marked as reserved.
Hence use a common definition.
Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-keystone/clock-k2e.c |
This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.
Reviewed-by: Tom Rini
Reviewed-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-keystone/clock.c | 12 ++---
arch/arm/mach-keystone/include/mach/clock.h | 3 ++-
board
Since all the clocks are defined common, and has the same logic to get
the frequencies, use a common definition for for clk_get_rate().
Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-keystone/Makefile | 3 -
arch/arm/mach-keystone/clock-k2e.c
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.
Reviewed-by: Tom Rini
Signed-off-by: Lokesh
Remove unused external clocks and make a common definition
for all keystone platforms.
Reviewed-by: Tom Rini
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-keystone/clock-k2e.c | 2 +-
arch/arm/mach-keystone/clock-k2l.c | 2 +-
arch/arm/mach-keystone/include/mach/cl
On Wed, Jul 22, 2015 at 04:56:10PM -0600, Stephen Warren wrote:
> From: Thierry Reding
>
> Some SoCs come with a custom timer interface, so allow them to use that
> instead.
>
> swarren notes: I did consider reworking this patch so the Makefile only
> compiles generic_timer.c ifndef CONFIG_SYS_T
From: Thierry Reding
ARMv8 requires an architected timer to be present, so it can be used
instead of the Tegra US timer. This allows for better code reuse.
Signed-off-by: Thierry Reding
---
include/configs/tegra-common.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/configs/te
From: Thierry Reding
A subsequent patch will enable the use of the architected timer on
ARMv8. Doing so implies that udelay() will be backed by this timer
implementation, and hence the architected timer must be ready when
udelay() is first called. The first time udelay() is used is while
resettin
Hi All,
I want suggestion on, How to boot multicore CPU from u-boot?
Modern SoC contain dual or qaud core same CPU core.Heterogeneous SoC
contain ARM cortexAx+M3/4 or CortexAx+Renesas SH4 and many other
combination.
As of now,I have two code to boot muticore CPU.
1)OMAP5 based SOC(DRA7 Dual co
Le 28/07/2015 02:23, Ash Charles a écrit :
On Mon, Jul 27, 2015 at 9:39 AM, Guillaume Gardet
wrote:
Which bump SPL size from 54*1024 to 64*1024 and moves SPL text base from
0x40200800 to 0x4020.
Any reason for that? What happens if you use original values?
What is the size of your MLO?
Le 24/07/2015 17:22, Ash Charles a écrit :
On Fri, Jul 24, 2015 at 7:04 AM, Tom Rini wrote:
Can you give us more details on the exact nature of the failure? Thanks!
Oh sorry--that wasn't clear! The boards appear to get stuck in SPL
before anything can be printed to the console. Basically,
Hi Bin,
On 28 July 2015 at 01:50, Bin Meng wrote:
>
> Hi Simon,
>
> On Tue, Jul 28, 2015 at 5:47 AM, Simon Glass wrote:
> > At present minnowmax does not correct set up PCI interrupts. This should be
> > done in U-Boot so that devices work correctly in Linux.
> >
> > Note: This code needs to mak
Hi!
> This series fixes the SPL support on SoCFPGA and cleans up the DDR
> init code such that it is becoming remotely mainlinable. After this
> series, the SPL is capable of booting from both SD/MMC and QSPI NOR.
>
> There is still work to be done, but I'd like to start picking it up
> so it can
Hello folks,
OE-Core is preparing for upgrade to GCC 5.2 as default compiler and
mx28 is failing[1] to build with it.
1. http://errors.yoctoproject.org/Errors/Details/13878/
I am not a linker guy so could someone shed any light on this?
--
Otavio Salvador O.S. Syste
On Tuesday, July 28, 2015 at 03:13:09 PM, Pavel Machek wrote:
> Hi!
>
> > This series fixes the SPL support on SoCFPGA and cleans up the DDR
> > init code such that it is becoming remotely mainlinable. After this
> > series, the SPL is capable of booting from both SD/MMC and QSPI NOR.
> >
> > The
Dear Otavio,
In message
you wrote:
>
> OE-Core is preparing for upgrade to GCC 5.2 as default compiler and
> mx28 is failing[1] to build with it.
>
> 1. http://errors.yoctoproject.org/Errors/Details/13878/
>
> I am not a linker guy so could someone shed any light on this?
Does the same probl
Hi Tom,
please pull these changes to your tree. The most of that changes are DT
related which is simple synchronization DTSes with the kernel where
binding was properly reviewed.
Thanks,
Michal
The following changes since commit 26473945ad6667183296e7edee2a65edf31bb6f7:
Merge branch 'master'
Adding actual Tom's address.
Cheers,
Michal
On 07/28/2015 03:41 PM, Michal Simek wrote:
> Hi Tom,
>
> please pull these changes to your tree. The most of that changes are DT
> related which is simple synchronization DTSes with the kernel where
> binding was properly reviewed.
>
> Thanks,
> Mich
Otavio Salvador writes:
> Hello folks,
>
> OE-Core is preparing for upgrade to GCC 5.2 as default compiler and
> mx28 is failing[1] to build with it.
>
> 1. http://errors.yoctoproject.org/Errors/Details/13878/
>
> I am not a linker guy so could someone shed any light on this?
There are two error
On Tue 2015-07-28 15:30:06, Marek Vasut wrote:
> On Tuesday, July 28, 2015 at 03:13:09 PM, Pavel Machek wrote:
> > Hi!
> >
> > > This series fixes the SPL support on SoCFPGA and cleans up the DDR
> > > init code such that it is becoming remotely mainlinable. After this
> > > series, the SPL is cap
On Mon, Jul 27, 2015 at 09:10:32PM -0600, Stephen Warren wrote:
> On 07/24/2015 07:44 AM, Tom Rini wrote:
> > On Thu, Jul 23, 2015 at 10:17:29PM -0600, Stephen Warren wrote:
> >> On 07/14/2015 09:44 AM, Simon Glass wrote:
> >>> Hi Stephen,
> >>>
> >>> On 13 July 2015 at 22:52, Stephen Warren
> >>
Hi all,
me again. I was wondering, if somebody of you has time to check these
changes? I would appreciate some feedback. Ultimately, it should
also go upstream but my focus here is reviewing the content of
these changes.
Thanks,
Sam
> -Original Message-
> From: Egli, Samuel
> Sent: Frei
On Tue, Jul 28, 2015 at 02:31:42PM +, Egli, Samuel wrote:
> Hi all,
> me again. I was wondering, if somebody of you has time to check these
> changes? I would appreciate some feedback. Ultimately, it should
> also go upstream but my focus here is reviewing the content of
> these changes.
Did
On Mon, Jul 13, 2015 at 8:45 AM, Tim Harvey wrote:
> On Sat, Jul 11, 2015 at 3:11 PM, Marcel Ziswiler wrote:
>> On Fri, 2015-07-10 at 08:47 -0700, Tim Harvey wrote:
>>>
>>> Marcel,
>>>
>>> Could you give an 'acked-by' if you agree with this series? I would
>>> like to see it merged:
>>>
>>> https
Add '\n' for debug msg.
Signed-off-by: Peng Fan
Cc: Tom Rini
Cc: Masahiro Yamada
Cc: Simon Glass
---
common/command.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/command.c b/common/command.c
index 4719f49..381e6a2 100644
--- a/common/command.c
+++ b/common/comma
Hi !
we have a two stage booting system with 2 bootloaders. (1st stage (MLO,
U-boot.img) and 2nd stage(u-Boot.bin) for upgrade purposes). With the
current implementation is it possible to upgrade my bootloader with a FIT
image?
1st stage loads FIT -> 2nd stage should run from FIT and load
The return type of pmic_read and pmic_write is signed int, so
correct variable 'ret' from type unsigned int to int.
Signed-off-by: Peng Fan
Cc: Simon Glass
Cc: Przemyslaw Marczak
---
drivers/power/regulator/max77686.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff
1. Support driver model for pfuze100.
2. Introduce a new Kconfig entry DM_PMIC_PFUZE100 for pfuze100
3. This driver intends to support PF100, PF200 and PF3000, so add
the device id into the udevice_id array.
Signed-off-by: Peng Fan
Cc: Przemyslaw Marczak
Cc: Simon Glass
---
drivers/power/pm
If there is no property named 'regulator-name' for regulators,
choose node name instead, but not directly return failure value.
Signed-off-by: Peng Fan
Cc: Przemyslaw Marczak
Cc: Simon Glass
---
drivers/power/regulator/regulator-uclass.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
This patch set is to support driver model for pfuze100 and implement
regulator driver for pfuze100. Patches has been tested on i.MX7D
validation board.
Here registeres for standby mode are not touched, all operation read/write
register are for NORMAL state. For example, to pfuze100,
sw1volt is for
According to datasheet, SWBST_MODE starts from bit 2 and it occupies 2 bits.
So SWBST_MODE_MASK should be 0xC, and SWBST_MODE_xx should be ([mode] << 2).
Signed-off-by: Peng Fan
Cc: Przemyslaw Marczak
Cc: Stefano Babic
---
include/power/pfuze100_pmic.h | 8
1 file changed, 4 insertion
1. Add new regulator driver pfuze100.
* Introduce struct pfuze100_regulator_desc for mataining info for regulator.
2. Add new Kconfig entry DM_REGULATOR_PFUZE100 for pfuze100.
3. This driver intends to support PF100, PF200 and PF3000.
4. Add related macro definition in pfuze header file.
Signed
If enable DM PMIC and REGULATOR, we should not use original power
framework. So need to comment out the pfuze code for original power
framework, when CONFIG_DM_PMIC_PFUZE100 defined.
Signed-off-by: Peng Fan
Cc: Przemyslaw Marczak
Cc: Simon Glass
Cc: Stefano Babic
---
board/freescale/common/pf
On Thu, Jul 02, 2015 at 12:20:25AM +0200, Paul Kocialkowski wrote:
> Palmas power support is required for OMAP5 devices such as the OMAP5 uEVM,
> that
> need to e.g. enable MMC power at SPL stage.
>
> This is especially important when booting from a peripheral (such as USB,
> UART),
> where the
On Sun, Jul 05, 2015 at 01:56:54AM +0900, Masahiro Yamada wrote:
> Update the files under scripts/kconfig/ to match Linux 4.1.
> Some Kconfig sources have diverged from those in the kernel,
> so commit-base syncing was done not to lose U-Boot specific updates.
>
> The commits cherry-picked from L
On Sun, Jul 05, 2015 at 01:56:55AM +0900, Masahiro Yamada wrote:
> Update some build scripts to match Linux 4.1. Commit-based syncing
> was done so as not to break U-Boot specific changes.
> The previous big sync was from Linux 3.18-rc1 by commit 176d09827725
> (kbuild: sync misc scripts with Lin
On Sun, Jul 05, 2015 at 01:56:56AM +0900, Masahiro Yamada wrote:
> $(always) is added to targets by scripts/Makefile.build.
> Moreover, filechk does not need .*.cmd files.
>
> Adding these two files to targets is redundant.
>
> Signed-off-by: Masahiro Yamada
Applied to u-boot/master, thanks!
On Sun, Jul 05, 2015 at 01:56:57AM +0900, Masahiro Yamada wrote:
> Prior to this commit, it was impossible to use relative path to
> include Makefiles from the top level Makefile because the option
> "--include-dir=$(srctree)" becomes effective when Make enters into
> sub Makefiles.
>
> To use re
On Wed, Jul 08, 2015 at 11:56:01AM -0400, Vitaly Andrianov wrote:
> The MCAST_TFTP support requires that network drivers has mcast functon
> implemented. This commit adds dummy keystone2_eth_bcast_addr() to meet
> the requirement. As far as the driver doesn't use ALE and doesn't filter
> any incom
On Sun, Jul 05, 2015 at 12:54:23PM +0200, re...@wp.pl wrote:
> Mainline kernel will be using this device name as well.
>
> Signed-off-by: Kamil Lulko
Applied to u-boot/master, thanks!
--
Tom
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Description: Digital signature
___
U-Boot
On Mon, Jul 06, 2015 at 01:35:55PM +0200, Stefan Roese wrote:
> Only 2 frequencies are supported. The current driver implementation does
> not always use the 2 last configured blink frequencies. This patch
> fixes this problem. So that the last two entered frequencies are
> active.
>
> Signed-off
On Wed, Jul 08, 2015 at 11:40:14AM -0400, Vitaly Andrianov wrote:
> When core A turning of core B, via tetris DPSC it places the core
> B DPSC into transitional state. The core B has to execute wfi instruction
> to move its DPSC to the OFF state. This patch add such instruction.
>
> Signed-off-by
On Thu, Jul 09, 2015 at 07:58:03PM +0800, haikun.w...@freescale.com wrote:
> In case of enable CONFIG_OF_CONTROL and has a "model" property in the root
> node,
> the board special "checkboard" will not be called.
> Usually we show some useful version information in the function.
> This patch enab
On Wed, Jul 15, 2015 at 08:59:28PM +0900, Masahiro Yamada wrote:
> There are only two SoC-specific headers for this architecture:
> - arch/nds32/include/asm/arch-ag101/ag101.h
> - arch/nds32/include/asm/arch-ag102/ag102.h
>
> Those two have different file names, so there is no advantage to
> in
On Wed, Jul 15, 2015 at 08:59:29PM +0900, Masahiro Yamada wrote:
> The symbolic link to SoC/CPU specific header directory is created
> during the build, while it is only necessary for ARM, AVR32, SPARC,
> x86, and some CPUs of PowerPC. For the other architectures, it just
> results in a broken sy
On Wed, Jul 15, 2015 at 04:02:20PM +0200, Paul Kocialkowski wrote:
> This cleans up the SPL boot devices for omap platforms and introduces support
> for missing boot devices.
>
> Signed-off-by: Paul Kocialkowski
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Jul 15, 2015 at 04:02:19PM +0200, Paul Kocialkowski wrote:
> This introduces OMAP3 support for the common omap boot code, as well as a
> major cleanup of the common omap boot code.
>
> First, the omap_boot_parameters structure becomes platform-specific, since its
> definition differs a bi
On Wed, Jul 15, 2015 at 04:02:21PM +0200, Paul Kocialkowski wrote:
> Now that SPL boot devices are clearly defined, we can use BOOT_DEVICE_QSPI_4
> instead of a hardcoded value.
>
> Signed-off-by: Paul Kocialkowski
Applied to u-boot/master, thanks!
--
Tom
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Description: Digital
On Wed, Jul 15, 2015 at 04:02:22PM +0200, Paul Kocialkowski wrote:
> The config file for the siemens-am33x-common was using OMAP_I2C_STANDARD,
> which
> is defined in a header that is not included in the config header. In most
> cases,
> it was being included by the code using CONFIG_SYS_OMAP24_
On Tuesday, July 28, 2015 at 03:58:34 PM, Pavel Machek wrote:
> On Tue 2015-07-28 15:30:06, Marek Vasut wrote:
> > On Tuesday, July 28, 2015 at 03:13:09 PM, Pavel Machek wrote:
> > > Hi!
> > >
> > > > This series fixes the SPL support on SoCFPGA and cleans up the DDR
> > > > init code such that it
On Wed, Jul 15, 2015 at 04:02:25PM +0200, Paul Kocialkowski wrote:
> This introduces code to read the value of the SYS_BOOT pins on the OMAP4, as
> well as the memory-preferred scheme for the interpretation of each value.
>
> Signed-off-by: Paul Kocialkowski
Applied to u-boot/master, thanks!
-
On Wed, Jul 15, 2015 at 04:02:26PM +0200, Paul Kocialkowski wrote:
> This introduces code to read the value of the SYS_BOOT pins on the OMAP5, as
> well as the memory-preferred scheme for the interpretation of each value.
>
> Signed-off-by: Paul Kocialkowski
Applied to u-boot/master, thanks!
-
On Wed, Jul 15, 2015 at 04:02:23PM +0200, Paul Kocialkowski wrote:
> OMAP devices might boot from peripheral devices, such as UART or USB.
> When that happens, the U-Boot SPL tries to boot the next stage (complete
> U-Boot)
> from that peripheral device, but in most cases, this is not a valid boo
On Thu, Jul 16, 2015 at 03:36:41PM +0200, Paul Kocialkowski wrote:
> All am33xx device tree are using device-tree, so get_board_rev is never
> actually
> called. Thus, we can get rid of it to make the code easier to maintain.
>
> Signed-off-by: Paul Kocialkowski
> Reviewed-by: Tom Rini
Applie
On Wed, Jul 15, 2015 at 04:02:24PM +0200, Paul Kocialkowski wrote:
> This introduces code to read the value of the SYS_BOOT pins on the OMAP3, as
> well as the memory-preferred scheme for the interpretation of each value.
>
> Signed-off-by: Paul Kocialkowski
Applied to u-boot/master, thanks!
-
On Thu, Jul 16, 2015 at 03:10:20PM +0200, Paul Kocialkowski wrote:
> Despite being defined with __weak, this declaration of get_board_rev will
> conflict with the fallback one when ONFIG_REVISION_TAG is not defined.
>
> Signed-off-by: Paul Kocialkowski
> Reviewed-by: Tom Rini
Applied to u-boot
On Sun, Jul 19, 2015 at 10:19:46PM +0800, Antonio Borneo wrote:
> Read device unique ID and set environment variable "serial#".
> Value would then be passed to kernel through DTB.
>
> To read ID from DTB, kernel is required to have commit:
> 3f599875e5202986b350618a617527ab441bf206 (ARM: 8355/1:
On Fri, Jul 17, 2015 at 08:30:28PM +0900, Masahiro Yamada wrote:
> Because the top-level Makefile forces all the source files
> to include include/linux/kconfig.h (see the UBOOTINCLUDE define),
> these includes are redundant.
>
> By the way, there are exceptions for the statement above; host
> pr
On Thu, Jul 16, 2015 at 10:14:49AM -0500, Nishanth Menon wrote:
> Fix up a few typos in documentation.
>
> Signed-off-by: Nishanth Menon
> Reviewed-by: Tom Rini
> Reviewed-by: Murali Karicheri
Applied to u-boot/master, thanks!
--
Tom
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On Sun, Jul 19, 2015 at 10:19:47PM +0800, Antonio Borneo wrote:
> While most stm32f4 run at 168 MHz, stm32f429 can work till 180 MHz.
> Add option to select 180 MHz through macro CONFIG_SYS_CLK_FREQ.
>
> Signed-off-by: Antonio Borneo
> To: Albert Aribaud
> To: Tom Rini
> To: Kamil Lulko
> Cc:
On Sun, Jul 19, 2015 at 10:19:48PM +0800, Antonio Borneo wrote:
> Mainline Linux kernel commit
> 338a6aaabc02fa63b70441dd0e1b70aea64673c6 (ARM: dts: Introduce
> STM32F429 MCU) in arch/arm/boot/dts/stm32f429.dtsi
> requires U-Boot to set system clock to 180 MHz.
>
> Signed-off-by: Antonio Borneo
On Mon, Jul 20, 2015 at 11:50:40AM -0700, Adam YH Lee wrote:
> Gumstix is migrating from ext3 to ext4 file system.
>
> Signed-off-by: Adam YH Lee
> Acked-by: Ash Charles
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Jul 22, 2015 at 06:05:41PM -0500, Nishanth Menon wrote:
> TI armv7 based SoCs are based on two architectures - one based on OMAP
> generation architecture and others based on Keystone architecture.
>
> Many of the options are architecture specific, however a lot are common
> with v7 archi
On Wed, Jul 22, 2015 at 06:05:42PM -0500, Nishanth Menon wrote:
> Commit bd2c4522c26d5 ("ti: armv7: enable EXT support in SPL (using
> ti_armv7_common.h)") enabled thumb mode only for SPL builds, however,
> All TI armv7 platforms do support thumb, and there is no reason why the
> space savings can
On Wed, Jul 22, 2015 at 06:05:45PM -0500, Nishanth Menon wrote:
> Try to maintain as much commonality by conditionally including stuff
> in armv7_common as necessary and removing the common defines from
> keystone2 header.
>
> Note: as part of this change, all keystone2 platforms will now start
>
On Tue, Jul 21, 2015 at 08:10:35PM +0200, Paul Kocialkowski wrote:
> CONFIG_MUSB_HDC should be CONFIG_MUSB_HCD to have any effect.
>
> Signed-off-by: Paul Kocialkowski
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Jul 22, 2015 at 06:05:46PM -0500, Nishanth Menon wrote:
> Use the defaults defined in DEFAULT_LINUX_BOOT_ENV
>
> Reviewed-by: Murali Karicheri
> Reviewed-by: Tom Rini
> Signed-off-by: Nishanth Menon
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Jul 22, 2015 at 06:05:44PM -0500, Nishanth Menon wrote:
> rename the keystone2 common header into an keystone2 architecture
> specific header which can then reuse the common ti_armv7 config headers.
>
> Acked-by: Vitaly Andrianov
> Acked-By: Murali Karicheri
> Reviewed-by: Tom Rini
> Si
On Wed, Jul 22, 2015 at 06:05:47PM -0500, Nishanth Menon wrote:
> Switch to using zImage instead of uImage. and while at it, start using
> bootz as default. While at it, get rid of BOOTIMAGE define and start
> using Linux upstream dtb file names.
>
> Reviewed-by: Murali Karicheri
> Reviewed-by:
On Sun, Jul 26, 2015 at 06:48:15PM +0200, Paul Kocialkowski wrote:
> In order to achieve reproducible builds in U-Boot, timestamps that are defined
> at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH
> environment
> variable allows setting a fixed value for those timestamps.
>
On Sun, Jul 26, 2015 at 03:40:35AM +0900, Masahiro Yamada wrote:
> This is commented out in the Makefile for more than 10 years.
> I assume it is proof that this tool is unused.
>
> Signed-off-by: Masahiro Yamada
> Cc: Pantelis Antoniou
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Jul 22, 2015 at 06:05:48PM -0500, Nishanth Menon wrote:
> using http://git.ti.com/keystone-linux/boot-monitor/trees/master as
> reference (tag K2_BM_15.07) the generated files do not have evm
> extensions by default. So dont use -evm extension.
>
> Reviewed-by: Murali Karicheri
> Reviewe
On Wed, Jul 22, 2015 at 06:05:43PM -0500, Nishanth Menon wrote:
> CONFIG_LINUX_BOOT_PARAM_ADDR is not a valid configuration option. Do
> just like what the rest of the world does.
>
> Acked-by: Vitaly Andrianov
> Acked-By: Murali Karicheri
> Reviewed-by: Tom Rini
> Signed-off-by: Nishanth Meno
On Mon, Jul 27, 2015 at 11:10:58AM +0200, Yegor Yefremov wrote:
> From: Yegor Yefremov
>
> Enable DTS support (CONFIG_OF_LIBFDT) and select
> CONFIG_FIT in defconfig.
>
> Signed-off-by: Yegor Yefremov
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
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Tom,
Please pull u-boot-tegra/master into U-Boot/master. Thanks!
./MAKEALL -s tegra is OK (all 32-bit builds), and ./MAKEALL -a aarch64 is
OK (includes p2571)
The following changes since commit 26473945ad6667183296e7edee2a65edf31bb6f7:
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
On 27 July 2015 at 11:45, Stephen Warren wrote:
> From: Thierry Reding
>
> Most peripherals on Tegra can do DMA only to the lower 32-bit
> address space, even on 64-bit SoCs. This limitation is
> typically overcome by the use of an IOMMU. Since the IOMMU is
> not entirely trivial to set up and se
Hi,
On 27 July 2015 at 11:45, Stephen Warren wrote:
> From: Thierry Reding
>
> For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in
> AArch64 mode so that we don't need the SPL. Non-cached memory is not
> implemented (yet) for 64-bit ARM.
>
> Signed-off-by: Thierry Reding
> Sig
Hi,
On 27 July 2015 at 11:45, Stephen Warren wrote:
> From: Thierry Reding
>
> On 64-bit SoCs the I-cache isn't enabled in early code, so the default
> cache enable functions for 64-bit ARM can be used.
>
> Signed-off-by: Thierry Reding
> Signed-off-by: Tom Warren
> Signed-off-by: Stephen Warr
On Tue, Jul 28, 2015 at 03:41:21PM +0200, Michal Simek wrote:
> Hi Tom,
>
> please pull these changes to your tree. The most of that changes are DT
> related which is simple synchronization DTSes with the kernel where
> binding was properly reviewed.
>
> Thanks,
> Michal
>
> The following chang
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