On 21.01.2015 00:51, Dinh Nguyen wrote:
On 01/14/2015 05:34 PM, Marek Vasut wrote:
On Wednesday, January 14, 2015 at 05:40:41 PM, dingu...@opensource.altera.com
wrote:
From: Dinh Nguyen
Hi!
This adds the code to configure the SDRAM controller that is found in the
SoCFGPA Cyclone5 and Arria
On Wed, Jan 21, 2015 at 10:00:39AM +0800, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Jan 20, 2015 at 10:31 PM, Simon Glass wrote:
> > +Thierry
> >
> > Hi Bin,
> >
> > On 20 January 2015 at 05:59, Bin Meng wrote:
> >> Hi Simon,
> >>
> >> On Tue, Jan 20, 2015 at 11:19 AM, Simon Glass wrote:
> >>> In
remove MACH_TYPE definitions in config file, as they come from
the defconfig.
Signed-off-by: Heiko Schocher
---
include/configs/taurus.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index b61dc2d..2cf4558 100644
--- a/include/configs/
On Wed, 2015-01-21 at 01:23 -0600, Wang Dongsheng-B40534 wrote:
>
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, January 20, 2015 8:33 AM
> > To: Wang Dongsheng-B40534
> > Cc: Sun York-R58495; Li Yang-Leo-R58472; Jin Zhengxiong-R64188; u-
> > b...@lists.denx.de
>
On Wed, Jan 21, 2015 at 10:37:07AM +0800, Bin Meng wrote:
> Hi,
>
> On Wed, Jan 21, 2015 at 3:05 AM, Simon Glass wrote:
> > Hi Sjoerd,
> >
> > On 20 January 2015 at 10:06, Sjoerd Simons
> > wrote:
> >> commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
> >> new fdtdec pci h
Hi Thierry,
On Wed, Jan 21, 2015 at 4:05 PM, Thierry Reding wrote:
> On Wed, Jan 21, 2015 at 10:00:39AM +0800, Bin Meng wrote:
>> Hi Simon,
>>
>> On Tue, Jan 20, 2015 at 10:31 PM, Simon Glass wrote:
>> > +Thierry
>> >
>> > Hi Bin,
>> >
>> > On 20 January 2015 at 05:59, Bin Meng wrote:
>> >> Hi
Hi Heiko,
On 01/21/2015 03:42 PM, Heiko Schocher wrote:
add reset controller status register
Signed-off-by: Heiko Schocher
Acked-by: Bo Shen
---
arch/arm/include/asm/arch-at91/at91_rstc.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h
On Tue, Jan 20, 2015 at 12:05:40PM -0700, Simon Glass wrote:
> Hi Sjoerd,
>
> On 20 January 2015 at 10:06, Sjoerd Simons
> wrote:
> > commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
> > new fdtdec pci helpers. To get the device index of the root port, the
> > "reg" proper
Hi Thierry,
On Wed, Jan 21, 2015 at 4:24 PM, Thierry Reding wrote:
> On Wed, Jan 21, 2015 at 10:37:07AM +0800, Bin Meng wrote:
>> Hi,
>>
>> On Wed, Jan 21, 2015 at 3:05 AM, Simon Glass wrote:
>> > Hi Sjoerd,
>> >
>> > On 20 January 2015 at 10:06, Sjoerd Simons
>> > wrote:
>> >> commit a62e84d7b
[...]
>>> @@ -295,12 +282,77 @@ static int mxc_gpio_probe(struct udevice *dev)
>>> return 0;
>>> }
>>> +#ifdef CONFIG_OF_CONTROL
>>> +static struct gpio_regs *mxc_get_gpio_addr(struct udevice *device)
>>> +{
>>> +fdt_addr_t addr;
>>> +addr = fdtdec_get_addr(gd->fdt_blob, device-
On Wed, 2015-01-21 at 09:24 +0100, Thierry Reding wrote:
> On Wed, Jan 21, 2015 at 10:37:07AM +0800, Bin Meng wrote:
> > Hi,
> >
> > On Wed, Jan 21, 2015 at 3:05 AM, Simon Glass wrote:
> > > Hi Sjoerd,
> > >
> > > On 20 January 2015 at 10:06, Sjoerd Simons
> > > wrote:
> > >> commit a62e84d7b182
Hi Tom,
On 01/15/2015 03:57 PM, Simon Glass wrote:
> On 15 January 2015 at 07:55, Michal Simek wrote:
>> On 01/15/2015 03:25 PM, Simon Glass wrote:
>>> Hi Michal,
>>>
>>> On 15 January 2015 at 01:53, Michal Simek wrote:
Fake option is enabled only when CONFIG_TRACE is
enabled in common
Hi Tom,
please pull these fpga patches to your tree.
Thanks,
Michal
The following changes since commit 92fa7f53f1f3f03296f8ffb14bdf1baefab83368:
Prepare v2015.01 (2015-01-12 09:39:08 -0500)
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.git fpga
for you t
Hi Tom,
please pull these 3 patches to your tree. On patch is fixing gem.
One is fixing ll_temac which you have reported and the last one is for MMC.
I have created special branch just with these changes.
Thanks,
Michal
The following changes since commit 768f6096f9c389b5ed36bee2957bee16b085fc4a
On Wed, Jan 21, 2015 at 04:46:42PM +0800, Bin Meng wrote:
> Hi Thierry,
>
> On Wed, Jan 21, 2015 at 4:05 PM, Thierry Reding wrote:
> > On Wed, Jan 21, 2015 at 10:00:39AM +0800, Bin Meng wrote:
> >> Hi Simon,
> >>
> >> On Tue, Jan 20, 2015 at 10:31 PM, Simon Glass wrote:
> >> > +Thierry
> >> >
>
On Mon, 2015-01-19 at 20:19 -0700, Simon Glass wrote:
> In commit a62e84d the old functionality of obtaining a PCI address from the
> 'reg' property was lost. Add it back, so we can support both a compatible
> string list and a 'reg' property.
>
> This patch fixes PCIe ethernet on Tegra boards.
>
Hi Tom,
please pull these two microblaze fixes to your tree.
Thanks,
Michal
The following changes since commit 768f6096f9c389b5ed36bee2957bee16b085fc4a:
Merge git://git.denx.de/u-boot-arc (2015-01-20 16:41:11 -0500)
are available in the git repository at:
git://www.denx.de/git/u-boot-mic
Hi Tom,
please pull these patches to your tree. I have added there 2 patches
for serial. Zynq is only one platform which is using this driver.
Thanks,
Michal
The following changes since commit 92fa7f53f1f3f03296f8ffb14bdf1baefab83368:
Prepare v2015.01 (2015-01-12 09:39:08 -0500)
are availabl
On Wed, Jan 21, 2015 at 05:15:42PM +0800, Bin Meng wrote:
> Hi Thierry,
>
> On Wed, Jan 21, 2015 at 4:24 PM, Thierry Reding wrote:
> > On Wed, Jan 21, 2015 at 10:37:07AM +0800, Bin Meng wrote:
> >> Hi,
> >>
> >> On Wed, Jan 21, 2015 at 3:05 AM, Simon Glass wrote:
> >> > Hi Sjoerd,
> >> >
> >> >
Signed-off-by: Minghuan Lian
---
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 697d4ca..440a5b4 100644
--- a/arch/
LS1021A's PCIe1 region begins 0x40_; PCIe2 begins
0x48_. In order to access PCIe device, we must create
TLB to map the 40bit physical address to 32bit virtual address.
This patch will enable MMU after DDR is available and creates MMU
table in DRAM to map all 4G space; then, re-use t
The patch adds Freescale Layerscape PCIe driver and provides
up to 4 controllers support.
Signed-off-by: Minghuan Lian
---
drivers/pci/pcie_layerscape.c | 471 +-
1 file changed, 466 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/pcie_layerscape.c
The patch enables and adds PCIe settings for boards LS1021AQDS
and LS1021ATWR.
Signed-off-by: Minghuan Lian
---
include/configs/ls1021aqds.h | 24
include/configs/ls1021atwr.h | 24
2 files changed, 48 insertions(+)
diff --git a/include/configs/
Supports boot up from NAND flash with software ECC eanbled.
And supports boot up from SD/MMC card with FAT file system.
As the boot from SD/MMC card with FAT file system, the BSS
segment is too big to fit into SRAM, so, use the lds to put
it into SDRAM.
Signed-off-by: Bo Shen
---
Changes in v2:
Hi Simon Glass,
On 01/19/2015 02:55 AM, Simon Glass wrote:
At present SPL uses a single stack, either CONFIG_SPL_STACK or
CONFIG_SYS_INIT_SP_ADDR. Since some SPL features (such as MMC and
environment) require a lot of stack, some boards set CONFIG_SPL_STACK to
point into SDRAM. They then set up
On Tue, Jan 20, 2015 at 06:06:53PM +0100, Sjoerd Simons wrote:
> commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
> new fdtdec pci helpers. To get the device index of the root port, the
> "reg" property should be parsed from the dtb (as was previously the
> case).
>
> With
This patch initializes VSC9953 L2 Switch for boards that have
CONFIG_VSC9953 defined in their config file.
Signed-off-by: Codrin Ciubotariu
---
Changes for v2:
- added patch description;
Changes for v3:
- Removed "Change-id" line from comment;
Changes for v4:
- removed
This patch configures and initializes the L2 switch on T1040QDS board.
The L2 switch ports must be initialized according to the SerDes
protocols.
Signed-off-by: Codrin Ciubotariu
---
Changes for v2: None
Changes for v3:
- Removed "Change-id" line from comment;
Changes for v4:
-
This patch configures and initializes the L2 switch on T1040rdb board.
The external L2 switch ports may be connected to PHYs only over
QSGMII, for T1040rdb.
Signed-off-by: Codrin Ciubotariu
---
Changes for v2: None
Changes for v3:
- Removed "Change-id" line from comment;
Changes for v4
On Tue, 2015-01-20 at 15:29 -0800, Suriyan Ramasami wrote:
> Hello Kevin,
>
> On Tue, Jan 20, 2015 at 2:43 PM, Kevin Hilman wrote:
> > Suriyan Ramasami writes:
> I am currently working only on the XU3 (I thought there was no
> interest, so I let it slide). I probably should say that the Exynos
Hi Igor,
On 1/21/2015 5:18 PM, Igor Grinberg wrote:
[...]
@@ -295,12 +282,77 @@ static int mxc_gpio_probe(struct udevice *dev)
return 0;
}
+#ifdef CONFIG_OF_CONTROL
+static struct gpio_regs *mxc_get_gpio_addr(struct udevice *device)
+{
+fdt_addr_t addr;
+addr = fdtdec_get_
Hi Simon,
On Mon, 19 Jan 2015 20:12:30 -0700
Simon Glass wrote:
> diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
> index 1e500fb..7c3ad00 100644
> --- a/common/cmd_i2c.c
> +++ b/common/cmd_i2c.c
> @@ -168,7 +168,7 @@ static int i2c_get_cur_bus_chip(uint chip_addr, struct
> udevice **devp)
update SPL WDT support and use it on the taurus board
- if CONFIG_AT91SAM9_WATCHDOG is set:
- do not disable WDT in SPL
- call hw_watchdog_init()
- make the WDT timeout configurable
- enable it on the taurus board
Heiko Schocher (4):
arm, at91, wdt: do not disable WDT in SPL
common/board_
On Tue, 2015-01-20 at 16:40 -0500, Tom Rini wrote:
In general the change looks good, thanks.
> -#if !defined CONFIG_SPL_BUILD && (defined CONFIG_MACH_SUN7I || \
> - defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I)
> - /* Enable SMP mode for CPU0, by setting bit 6 of Auxilia
Hi Simon,
On Sun, 18 Jan 2015 11:55:36 -0700
Simon Glass wrote:
> At present SPL uses a single stack, either CONFIG_SPL_STACK or
> CONFIG_SYS_INIT_SP_ADDR. Since some SPL features (such as MMC and
> environment) require a lot of stack, some boards set CONFIG_SPL_STACK to
> point into SDRAM. Th
Hello Bo,
Am 21.01.2015 10:45, schrieb Bo Shen:
Supports boot up from NAND flash with software ECC eanbled.
And supports boot up from SD/MMC card with FAT file system.
As the boot from SD/MMC card with FAT file system, the BSS
segment is too big to fit into SRAM, so, use the lds to put
it into
Abstracting dev_get_addr can improve drivers that want to
get device's address.
Signed-off-by: Peng Fan
---
drivers/core/device.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 963b16f..0ba5c76 100644
--- a/drivers/cor
Signed-off-by: Peng Fan
---
include/dm/device.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/dm/device.h b/include/dm/device.h
index 13598a1..ee00c4d 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -322,4 +322,13 @@ int device_find_first_child(struct udevice
This patch set is to add DT support for mxc_gpio driver.
patch 1/4 and 2/4, a new dev_get_addr interface is abstracted to
improve driver who want to get device address.
patch 3/4, add a new bank_index entry in platdata to avoid `plat - mxc_plat`
pointer subtract usage
This patch add DT support for mxc gpio driver.
There are one place using CONFIG_OF_CONTROL macro.
1. The U_BOOT_DEVICES and mxc_plat array are complied out. To DT,
platdata is alloced using calloc, so there is no need to use mxc_plat.
The following situations are tested, and all work fine:
1.
Add a new entry in platdata structure and intialize
bank_index in mxc_plat array.
This new entry can avoid using `plat - mxc_plat` by using
`plat->bank_index`.
Signed-off-by: Peng Fan
---
drivers/gpio/mxc_gpio.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git
Signed-off-by: Graeme Russ
---
arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 1 +
arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c | 13 +++-
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 18 +
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 100 +++-
4 files changed, 12
This series adds support for booting mx28 based boards which do not
include a battery as per Freescale application note AN4199
Patch 2 (which implements booting without a battery) is based on a patch
submitted to the Freescale community forums by Damien Gotfroi (Cc'd)
The patch series adds the fo
Section 4.1.2 of Freescale Application Note AN4199 describes the
configuration required to operate the mx28 from a 5V source without a
battery. This patch implements the changes to the Freescale bootlets
which allow this configuration to properly boot the mx28 processor
Signed-off-by: Graeme Russ
When booting in JTAG mode, there is no way to use soft break-points, and
no way of knowing when SPL has finished executing (so the user can issue
a 'halt' command to load u-boot.bin for example)
Add a debug output and simple loop to stop execution at the completion of
the SPL initialisation as a p
mxs_power_clock2pll() does not actually switch the CPU clock to the PLL.
All it does is power-up the PLL and set the CLKCTRL_CLKSEQ_BYPASS_CPU bit
(which was already set by mxs_power_clock2xtal() anyway)
spl_mem_init.c sets up the fractional divisor (which is required to run
the CPU from the PLL)
Signed-off-by: Graeme Russ
---
arch/arm/Kconfig | 13 ++
board/reachtech/g2c1/Kconfig | 15 ++
board/reachtech/g2c1/MAINTAINERS | 9 +
board/reachtech/g2c1/Makefile| 12 ++
board/reachtech/g2c1/README | 58 +
board/reachtech/g2c1/g2c1.c | 79 +++
On 01/21/15 13:09, Peng Fan wrote:
> Abstracting dev_get_addr can improve drivers that want to
> get device's address.
>
> Signed-off-by: Peng Fan
Acked-by: Igor Grinberg
--
Regards,
Igor.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.d
On 01/21/15 13:09, Peng Fan wrote:
> Signed-off-by: Peng Fan
I think this should be a part of the first patch, anyway:
Acked-by: Igor Grinberg
> ---
> include/dm/device.h | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/include/dm/device.h b/include/dm/device.h
> index 1359
On 01/21/15 13:09, Peng Fan wrote:
> Add a new entry in platdata structure and intialize
> bank_index in mxc_plat array.
> This new entry can avoid using `plat - mxc_plat` by using
> `plat->bank_index`.
>
> Signed-off-by: Peng Fan
Acked-by: Igor Grinberg
--
Regards,
Igor.
_
Hi Guys,
@@ -868,6 +962,44 @@ static void mxs_power_configure_power_source(void)
mxs_src_power_init();
+#ifdef CONFIG_SYS_MXS_VDD5V_ONLY
+ /*
+* device configured for no source to DCDC_BATT input (5V only power
+* source). This boot option doesn't waste time loo
Hello (and a belated happy new year to all),
I am working on a custom hardware platform where I need to pull the Linux
kernel from a Spansion SPI NOR flash device connected to a 600MHz TI AM3354
processor. The McSPI is configured to run at its maximum speed with a 48MHz
clock and the datasheet fo
Heiko,
On Wed, Jan 21, 2015 at 08:38:22AM +0100, Heiko Schocher wrote:
[...]
> diff --git a/README b/README
> index fefa71c..5cce4c2 100644
> --- a/README
> +++ b/README
> @@ -1257,6 +1257,9 @@ The following options need to be configured:
> SoC, then define this variable and provide
Hello Jeremiah,
Am 21.01.2015 13:35, schrieb Jeremiah Mahler:
Heiko,
On Wed, Jan 21, 2015 at 08:38:22AM +0100, Heiko Schocher wrote:
[...]
diff --git a/README b/README
index fefa71c..5cce4c2 100644
--- a/README
+++ b/README
@@ -1257,6 +1257,9 @@ The following options need to be configured:
Heiko,
On Wed, Jan 21, 2015 at 01:38:47PM +0100, Heiko Schocher wrote:
[...]
>
> Thanks! (Sorry for my bad denglish ...)
>
No need to apologize.
Ich spreche nicht so gut Deutsch. :-)
> bye,
> Heiko
> --
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munic
The following changes since commit 768f6096f9c389b5ed36bee2957bee16b085fc4a:
Merge git://git.denx.de/u-boot-arc (2015-01-20 16:41:11 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-mips.git master
for you to fetch changes up to e520023882c7187a7cbaecfea0726ea158440ae
Hi,
On 20-01-15 22:40, Tom Rini wrote:
All of the code in arch/arm/cpu/armv7/sunxi/board.c was under a check
for CONFIG_SPL_BUILD so instead only build for SPL.
That is not true, the #ifdef SPL block ends at the end of board_init_f
as things currently stand in master, and even that is only the
On Wed, Jan 21, 2015 at 02:18:12PM +0100, Hans de Goede wrote:
> Hi,
>
> On 20-01-15 22:40, Tom Rini wrote:
> >All of the code in arch/arm/cpu/armv7/sunxi/board.c was under a check
> >for CONFIG_SPL_BUILD so instead only build for SPL.
>
> That is not true, the #ifdef SPL block ends at the end of
Hello Simon,
Am 19.01.2015 07:46, schrieb Heiko Schocher:
Hello Simon,
added Bo Shen to cc, as he currently try to set BSS (and stack) into
SDRAM for at91 based boards ... Bo, could you try this aproach?
Am 18.01.2015 19:55, schrieb Simon Glass:
At present SPL uses a single stack, either CONF
2 recent sunxi changes have removed the usage of lowlevel_init by moving some
code around and then setting CONFIG_SKIP_LOWLEVEL_INIT.
This is problematic for 2 reasons:
1) It does not just stop s_init from being called, it also stops
cpu_init_cp15 from getting called, which is undesirable.
2) We
On 21 January 2015 at 00:38, Heiko Schocher wrote:
> call hw_watchdog_init() also if CONFIG_AT91SAM9_WATCHDOG
> is used.
>
> Signed-off-by: Heiko Schocher
> ---
>
> common/board_f.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Simon Glass
_
On 21.01.2015 12:55, Graeme Russ wrote:
When booting in JTAG mode, there is no way to use soft break-points, and
no way of knowing when SPL has finished executing (so the user can issue
a 'halt' command to load u-boot.bin for example)
Add a debug output and simple loop to stop execution at the c
On Wed, Jan 21, 2015 at 04:24:05PM +0100, Hans de Goede wrote:
> 2 recent sunxi changes have removed the usage of lowlevel_init by moving some
> code around and then setting CONFIG_SKIP_LOWLEVEL_INIT.
> This is problematic for 2 reasons:
>
> 1) It does not just stop s_init from being called, it a
Hello Heiko
Here the second patch you want. This needs to be applied
prior the real bug fix, becouse it solves the warning as
you mention as well.
>From fd0a1377825638d15bc66b5f07a05beb14fe747c Mon Sep 17 00:00:00 2001
From: Anton Habegger
Date: Wed, 21 Jan 2015 16:20:36 +0100
Subject: [PATCH]
Hello Heiko
here the second part with the real fix and better
commit message.
From 66cdf8324f5e9be1422818cb51c5810b54feef93 Mon Sep 17 00:00:00 2001
From: Anton Habegger
Date: Wed, 21 Jan 2015 16:23:02 +0100
Subject: [PATCH] ubifs: Enable journal replay during mount
Enable ubifs_replay_journa
+Tom
Hi Tom,
On Mon, Jan 19, 2015 at 9:32 PM, Bin Meng wrote:
> Remove the additional ',' and '\n' from the gettime command help.
>
> Signed-off-by: Bin Meng
> ---
>
> common/cmd_gettime.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/common/cmd_gettime.c b/commo
The qt840a is one of the many tv-boxes using the "i12" A20 pcb, but it
populates only one of the 2 places for a 16 bit dram ic, thus reducing
the buswidth to 16 bits, and the amount of ram to 512M, which is why we
had a separate config for it.
This commit switches the generic i12-tvbox_defconfig o
On 20 January 2015 at 22:16, Joonyoung Shim wrote:
> The dwc3_set_mode function is used only in
> drivers/usb/host/xhci-exynos5.c so make it to static.
>
> Signed-off-by: Joonyoung Shim
> ---
> drivers/usb/host/xhci-exynos5.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by:
On 19 January 2015 at 20:25, Bin Meng wrote:
> Various minor code format issues are fixed in start16.S:
> - U-boot -> U-Boot
> - 32bit -> 32-bit
> - Use TAB instead of SPACE to indent
> - Move the indention location of the GDT comment block
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/star
Hi Thierry,
On Wed, Jan 21, 2015 at 5:40 PM, Thierry Reding wrote:
> On Wed, Jan 21, 2015 at 05:15:42PM +0800, Bin Meng wrote:
>> Hi Thierry,
>>
>> On Wed, Jan 21, 2015 at 4:24 PM, Thierry Reding wrote:
>> > On Wed, Jan 21, 2015 at 10:37:07AM +0800, Bin Meng wrote:
>> >> Hi,
>> >>
>> >> On Wed,
On 19 January 2015 at 22:01, Bin Meng wrote:
> arch/x86/cpu/mtrr.c has access to the U-Boot global data thus
> DECLARE_GLOBAL_DATA_PTR is needed.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/mtrr.c | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Simon Glass
__
On 19 January 2015 at 22:01, Bin Meng wrote:
> CPUID (EAX 01H) returns MTRR support flag in EDX bit 12. Probe this
> flag in x86_cpu_init_f() and save it in global data.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/cpu.c | 7 +++
> arch/x86/include/asm/global_data.h | 3
Hi Bin,
On 19 January 2015 at 22:01, Bin Meng wrote:
> On some x86 processors (like Intel Quark) the MTRR registers are not
> supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
> Accessing the MTRR registers on such processors will cause #GP so we
> must test the support flag bef
Hi Thierry,
On Wed, Jan 21, 2015 at 5:50 PM, Thierry Reding wrote:
> On Tue, Jan 20, 2015 at 06:06:53PM +0100, Sjoerd Simons wrote:
>> commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
>> new fdtdec pci helpers. To get the device index of the root port, the
>> "reg" propert
Hi Bin,
On 21 January 2015 at 03:45, Masahiro Yamada wrote:
> Hi Simon,
>
>
>
> On Mon, 19 Jan 2015 20:12:30 -0700
> Simon Glass wrote:
>
>
>> diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
>> index 1e500fb..7c3ad00 100644
>> --- a/common/cmd_i2c.c
>> +++ b/common/cmd_i2c.c
>> @@ -168,7 +168,7
Hi Simon,
On Thu, Jan 22, 2015 at 12:05 AM, Simon Glass wrote:
> On 19 January 2015 at 22:01, Bin Meng wrote:
>> CPUID (EAX 01H) returns MTRR support flag in EDX bit 12. Probe this
>> flag in x86_cpu_init_f() and save it in global data.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/cpu/c
HI Hans,
On 21 January 2015 at 06:18, Hans de Goede wrote:
> Hi,
>
> On 20-01-15 22:40, Tom Rini wrote:
>>
>> All of the code in arch/arm/cpu/armv7/sunxi/board.c was under a check
>> for CONFIG_SPL_BUILD so instead only build for SPL.
>
>
> That is not true, the #ifdef SPL block ends at the end o
Hi Simon,
On Thu, Jan 22, 2015 at 12:06 AM, Simon Glass wrote:
> Hi Bin,
>
> On 19 January 2015 at 22:01, Bin Meng wrote:
>> On some x86 processors (like Intel Quark) the MTRR registers are not
>> supported. This is reflected by the CPUID (EAX 01H) result EDX[12].
>> Accessing the MTRR registers
Hi Bin,
On 21 January 2015 at 09:19, Bin Meng wrote:
> Hi Simon,
>
> On Thu, Jan 22, 2015 at 12:06 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 19 January 2015 at 22:01, Bin Meng wrote:
>>> On some x86 processors (like Intel Quark) the MTRR registers are not
>>> supported. This is reflected by th
Hello Heiko,
I'll try the patch today. Thank you very much!
Regards,
Konstantyn
-Original Message-
From: Heiko Schocher [mailto:h...@denx.de]
Sent: Wednesday, January 21, 2015 12:57 AM
To: Konstantyn Prokopenko
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] Problem Mounting/Unmounting
Hi Masahiro,
On 21 January 2015 at 03:51, Masahiro Yamada wrote:
> Hi Simon,
>
>
>
> On Sun, 18 Jan 2015 11:55:36 -0700
> Simon Glass wrote:
>
>> At present SPL uses a single stack, either CONFIG_SPL_STACK or
>> CONFIG_SYS_INIT_SP_ADDR. Since some SPL features (such as MMC and
>> environment) re
I'm trying to load a linux kernel + dtb from the hardware partition boot0 off
an emmc memory.
With the "mmc part" and "mmc dev 1 1" commands i can access the
boot0/boot1/rpmg partitions.
The partitions have been software-partitioned and formatted with fat16
filesystem under linux , kernel and d
Hi Simon,
> Yes agreed. I can do that. It seems like the concept is agreed at least.
>
> So how about this:
>
> CONFIG_SPL_STACK_R - bool
> CONFIG_SPL_STACK_R _SIZE - hex
Do you need the size of stack? Or the base address?
> But for your particular case, I certainly would like the UART to
Hi Masahiro,
On 21 January 2015 at 10:12, Masahiro YAMADA wrote:
> Hi Simon,
>
>
>
>> Yes agreed. I can do that. It seems like the concept is agreed at least.
>>
>> So how about this:
>>
>> CONFIG_SPL_STACK_R - bool
>> CONFIG_SPL_STACK_R _SIZE - hex
>
>
> Do you need the size of stack? Or the ba
On Wed, Jan 21, 2015 at 11:54:08PM +0800, Bin Meng wrote:
> +Tom
>
> Hi Tom,
>
> On Mon, Jan 19, 2015 at 9:32 PM, Bin Meng wrote:
> > Remove the additional ',' and '\n' from the gettime command help.
> >
> > Signed-off-by: Bin Meng
> > ---
> >
> > common/cmd_gettime.c | 4 ++--
> > 1 file chan
Hi Simon,
2015-01-22 1:12 GMT+09:00 Simon Glass :
> Hi Bin,
>
> On 21 January 2015 at 03:45, Masahiro Yamada
> wrote:
>> Hi Simon,
>>
>>
>>
>> On Mon, 19 Jan 2015 20:12:30 -0700
>> Simon Glass wrote:
>>
>>
>>> diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
>>> index 1e500fb..7c3ad00 100644
>
Suriyan Ramasami writes:
> Hello Kevin,
>
> On Tue, Jan 20, 2015 at 3:29 PM, Suriyan Ramasami wrote:
>> Hello Kevin,
>>
>> On Tue, Jan 20, 2015 at 2:43 PM, Kevin Hilman wrote:
>>> Suriyan Ramasami writes:
>>>
Hello Kevin,
These are the changes that would be necessary in uboot main
Currently we've separate detailed dram settings for all sun7i boards, this
moves them over to using auto dram configuration so that we can get rid of
all the per board dram_foo.c files.
This has been tested on a A20-Olinuxino-Lime, A20-Olinuxino_MICRO, Bananapi,
Bananapro, Cubieboard2, Cubietruck,
Replace our current DIY solution for setting the Cortex A7 ACTLR.SMP bit
with using the new soc_init hook and cpu_init_cortex_a7 helper function.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/Makefile| 1 +
arch/arm/cpu/armv7/sunxi/board.c | 8
arch/arm/cpu
On some SoCs / ARMv7 CPU cores we need to do some setup before enabling the
icache, etc. Add a soc_init hook with a weak default which just calls
cpu_init_cp15.
This way different implementations can be provided to do some extra work
before or after cpu_init_cp15, or completely replacing cpu_init_
Helper function for SoCs which use Cortex A7 cpu cores, this should be called
by the SoC's soc_init function to properly setup the cpu core before calling
cpu_init_cp15.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/start.S | 17 +
1 file changed, 17 insertions(+)
diff --g
On Wed, Jan 21, 2015 at 9:55 AM, Graeme Russ wrote:
> Signed-off-by: Graeme Russ
In the subject I guess you meant 'mxs' instead of mx29.
Also, if you send a v2, please keep Marek on Cc.
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On Wed, Jan 21, 2015 at 9:55 AM, Graeme Russ wrote:
> Signed-off-by: Graeme Russ
It would be nice to have a commit log with the text you put in the
help section that describes the board.
> --- /dev/null
> +++ b/board/reachtech/g2c1/README
> @@ -0,0 +1,58 @@
> +ReachTech G2C1
> +
On Wed, Jan 21, 2015 at 10:03 AM, Graeme Russ wrote:
> Never make simple, last minute changes without testing them...
>
> This should be RTC_PERSISTENT1_GENERAL_USB_BOOT_PLAYER
>
> I'll fix it in the next version
This looks great, Graeme! Thanks for working on upstream this.
Regards,
Fabio Est
On 21 Jan 2015, hdego...@redhat.com wrote:
> On some SoCs / ARMv7 CPU cores we need to do some setup before
> enabling the icache, etc. Add a soc_init hook with a weak default
> which just calls cpu_init_cp15.
>
> This way different implementations can be provided to do some extra
> work before or
On Wednesday, January 21, 2015 at 09:53:30 PM, Fabio Estevam wrote:
> On Wed, Jan 21, 2015 at 9:55 AM, Graeme Russ
wrote:
> > Signed-off-by: Graeme Russ
>
> It would be nice to have a commit log with the text you put in the
> help section that describes the board.
Also, the subject should cont
On Wednesday, January 21, 2015 at 12:55:18 PM, Graeme Russ wrote:
> Signed-off-by: Graeme Russ
Commit message again ;-)
[...]
> diff --git a/board/reachtech/g2c1/g2c1.c b/board/reachtech/g2c1/g2c1.c
> new file mode 100644
> index 000..5bf437d
> --- /dev/null
> +++ b/board/reachtech/g2c1/g2c
On Wednesday, January 21, 2015 at 12:55:17 PM, Graeme Russ wrote:
> mxs_power_clock2pll() does not actually switch the CPU clock to the PLL.
> All it does is power-up the PLL and set the CLKCTRL_CLKSEQ_BYPASS_CPU bit
> (which was already set by mxs_power_clock2xtal() anyway)
>
> spl_mem_init.c set
On Wednesday, January 21, 2015 at 12:55:15 PM, Graeme Russ wrote:
> Section 4.1.2 of Freescale Application Note AN4199 describes the
> configuration required to operate the mx28 from a 5V source without a
> battery. This patch implements the changes to the Freescale bootlets
> which allow this conf
On Wednesday, January 21, 2015 at 12:55:14 PM, Graeme Russ wrote:
> Signed-off-by: Graeme Russ
Hi!
- Commit message is missing.
- Some of the debug outputs are missing newline (\n) character
- You can use __func__ and __LINE__ in the debug output to better
specify where the debug spit happened
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