Hi Simon,
On Wed, Nov 12, 2014 at 8:18 AM, Simon Glass wrote:
> Add code to set up the SATA interfaces on boot.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/ivybridge/Makefile | 1 +
> arch/x86/cpu/ivybridge/bd82x6x.c | 20 +++
> arch/x86/cpu/ivybridge/sat
Hi Nikita,
On 29/10/2014 18:28, Nikita Kiryanov wrote:
> The bmode command forces the SoC to use a specific boot device
> by writing its boot mode into SRC_GPR9, and notifying the SoC of
> the change using SRC_GPR10[28] bit: if the bit is on, bootROM
> uses the value in SRC_GPR9 instead of SRC_SMB
On 10/11/2014 13:34, Fabio Estevam wrote:
> Adjust the text to mention that rev C of the board is also supported.
>
> Signed-off-by: Fabio Estevam
> ---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
=
DENX S
Signed-off-by: Scott Jiang
---
drivers/i2c/Makefile |2 +-
drivers/i2c/{bfin-twi_i2c.c => adi_i2c.c} |7 +++
include/configs/bct-brettl2.h |2 +-
include/configs/bf518f-ezbrd.h|2 +-
include/configs/bf526-ezbrd.h |2
Signed-off-by: Scott Jiang
---
drivers/i2c/adi_i2c.c | 202 +++
include/configs/bct-brettl2.h |2 +-
include/configs/bf518f-ezbrd.h |2 +-
include/configs/bf526-ezbrd.h |2 +-
include/configs/bf527-ad7160-eval.h |2 +-
Signed-off-by: Scott Jiang
---
drivers/i2c/adi_i2c.c | 145 ++---
1 file changed, 77 insertions(+), 68 deletions(-)
diff --git a/drivers/i2c/adi_i2c.c b/drivers/i2c/adi_i2c.c
index cb74062..71077c5 100644
--- a/drivers/i2c/adi_i2c.c
+++ b/drivers/i2c/
Dear Simon,
In message <1415751501-23407-11-git-send-email-...@chromium.org> you wrote:
> If the RTC needs to be cleared, write the U-Boot build date to it. In any
> case make sure the settings are correct.
Is this really a good idea? Why writing the build date? It is as
wrong as any other arbi
Hi Simon,
On Wed, Nov 12, 2014 at 8:18 AM, Simon Glass wrote:
> Add code to set up the Local Advanced Peripheral Interrupt Controller.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/Makefile| 1 +
> arch/x86/cpu/lapic.c | 68
> arch/x86/include
Hi Fabio,
On 10/11/2014 20:38, Fabio Estevam wrote:
> From: Fabio Estevam
>
> Since kernel 3.15 there are two dtb's for the imx53-qsb board:
>
> imx53-qsb.dtb - For the boards with DA9053 PMIC
> imx53-qsrb.dtb - For the boards with MC34708 PMIC
>
> Change the 'fdt_file' dynamically, so that th
Hi John,
On 12/11/2014 01:15, John Tobias wrote:
> Hi Otavio,
>
> In iMX6DQ data sheet the stack address is 0x0093FFB8 (page 383).
> While, in iMX6SDL datasheet (page 393) is 0x0091FFB8.
>
I admit that I should take a coffe, and after that maybe I can realize
what you are saying. Anyway,
B4860, B4440, B4420 and B4220 have MAPLE, so enable law creation
for them only
Remove static LAW creation for MAPLE
Signed-off-by: Shaveta Leekha
Signed-off-by: Sandeep Singh
Change-Id: I1d1d6e414617bb45ade5e5ab9134f0464763c034
Reviewed-on: http://git.am.freescale.net:8181/23351
Tested-by: Revie
Hello Vikas,
On Tue, 2 Sep 2014 15:04:48 -0700, Vikas Manocha
wrote:
> stv0991 architecture support added. It contains the support for
> following blocks
> - Timer
> - uart
>
> Signed-off-by: Vikas Manocha
> ---
Please add MAINTAINER information and rebase series above current
u-boot/master.
Hi Tom,
On 11/10/2014 10:29 PM, Tom Rini wrote:
> Hey all,
>
> I've pushed v2015.01-rc1 out to the repository and tarballs should exist
> soon.
>
> The merge window is now closed. Per both the min-summit and the follow
> up emails, I'm going to try and get into the every 2 week RC tagging
> gro
Hello Ian,
On Mon, 29 Sep 2014 11:24:32 +0100, Ian Campbell
wrote:
> From: Ian Campbell
>
> Signed-off-by: Ian Campbell
> ---
> include/configs/arndale.h | 38 +-
> 1 file changed, 29 insertions(+), 9 deletions(-)
This one does not apply cleanly any more.
Hi John,
On 11/11/2014 18:15, John Tobias wrote:
You add a new entry point here (spl_board_mmc_init), but why cannot you
do this in the functions already supplied by SPL ? Why not in board_init_f
?
>>>
>>> When the spl_mmc_load_image function being called, it call
>>> mmc_initiali
Add the support of newly added LC VCO SerDes protocols
for configuration of IDT and VSC crossbar
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal
Change-Id: I16ad23e2cbea3b0a232a153984d5126bc79ddd26
Reviewed-on: http://git.am.freescale.net:8181/23354
Tested-by: Yusong Sun
Reviewed-by
Addded Alternate options with LC VCO for following protocols:
0x02 --> 0x01
0x08 --> 0x07
0x18 --> 0x17
0x1E --> 0x1D
0x49 --> 0x48
0x6F --> 0x6E
0x9A --> 0x99
0x9E --> 0x9D
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal i
Change-Id: Iefe14012ee897095f0198453d50f31096ca020e2
Reviewed
Hello Simon,
On 11/06/2014 11:34 PM, Simon Glass wrote:
Hi,
On 20 October 2014 09:51, Przemyslaw Marczak wrote:
Hello,
... snip ...
Thank you again.
I'm going to check the i2c-working tree and maybe rebase the dm-pmic onto
it.
Is it good idea?
Sounds good. Once I get the main DM pat
- Enable SGMII support for 0x8d Serdes 2 protocol.
- Correct Phy address for DTSECx for 0x8d/0xb2 Serdes 2 protocol.
- Updated debug statement
- Add Alternate LC VCO protocols(0x8d-->0x8c, 0xb2-->0xb1)
- Rename onboard PHY address defines for more readability
- Add these new
Addded Alternate options with LC VCO for following protocols:
0x02 --> 0x01
0x08 --> 0x07
0x18 --> 0x17
0x1E --> 0x1D
0x49 --> 0x48
0x6F --> 0x6E
0x9A --> 0x99
0x9E --> 0x9D
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal
Change-Id: Iefe14012ee897095f0198453d50f31096ca020e2
Reviewed-
Addded Alternate options with LC VCO for following protocols:
0x02 --> 0x01
0x08 --> 0x07
0x18 --> 0x17
0x1E --> 0x1D
0x49 --> 0x48
0x6F --> 0x6E
0x9A --> 0x99
0x9E --> 0x9D
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal i
Change-Id: Iefe14012ee897095f0198453d50f31096ca020e2
Reviewed
Add the support of newly added LC VCO SerDes protocols
for configuration of IDT and VSC crossbar
Signed-off-by: Shaveta Leekha
Signed-off-by: Poonam Aggrwal
Change-Id: I16ad23e2cbea3b0a232a153984d5126bc79ddd26
Reviewed-on: http://git.am.freescale.net:8181/23354
Tested-by: Yusong Sun
Reviewed-by
- Enable SGMII support for 0x8d Serdes 2 protocol.
- Correct Phy address for DTSECx for 0x8d/0xb2 Serdes 2 protocol.
- Updated debug statement
- Add Alternate LC VCO protocols(0x8d-->0x8c, 0xb2-->0xb1)
- Rename onboard PHY address defines for more readability
- Add these new
On Wed, 2014-11-12 at 10:18 +0100, Albert ARIBAUD wrote:
> Hello Ian,
>
> On Mon, 29 Sep 2014 11:24:32 +0100, Ian Campbell
> wrote:
> > From: Ian Campbell
> >
> > Signed-off-by: Ian Campbell
> > ---
> > include/configs/arndale.h | 38 +-
> > 1 file changed,
Testing showed a small perfomance gain by using this ready pin to
detect the NAND chip state. Here the values tested on Draco with
Hynix 4GBit NAND:
Without NAND ready pin:
U-Boot# time nand read 8040 0 40
NAND read: device 0 offset 0x0, size 0x40
4194304 bytes read: OK
time: 2.947
By defining CONFIG_SYS_NAND_USE_READY the GPMC NAND driver makes
use of the ready pin / signal for busy / ready detection. This function
is already available but currently only used in SPL. I don't see a reason
to not use it in the main U-Boot as well. As it increases the NAND
performance.
I'm mak
Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
Otherwise the SPL boot IF can't handle this device correctly.
Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
Draco leads to this boot-device passed to SPL from the BootROM.
With this change, Draco boots just fine into main U-B
On Wed, Nov 12, 2014 at 4:02 AM, Ye.Li wrote:
> The i.MX6Q/DL sabreauto board has one NAND socket, set the
> CONFIG_NAND_MXS and relevant NAND configurations to enable the
> MXS NAND flash driver.
> Add board level codes to set IOMUX and clock for GPMI-NAND and
> BCH module.
>
> Signed-off-by: Ye.
Except the first loop, init_sata() should return 0 instead of 1
in the others.
This patch fix the issue of the 2nd sata port not workable on pci-sata card.
Signed-off-by: Pengbo Li
---
drivers/block/sata_sil.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/block/sat
Some filesystems have a UUID stored in its superblock. To
allow using root=UUID=... for the kernel command line we
need a way to read-out the filesystem UUID.
changes rfc -> v1:
- make the environment variable an option parameter. If not
given, the UUID is printed out. If given, it is stored i
Some filesystems have a UUID stored in its superblock. To
allow using root=UUID=... for the kernel command line we
need a way to read-out the filesystem UUID.
changes rfc -> v1:
- make the environment variable an option parameter. If not
given, the UUID is printed out. If given, it is stored i
Hi Wolfgang,
> Dear Stephen,
>
> In message <545d40e1.2030...@wwwdotorg.org> you wrote:
> >
> > > My gut feeling is that there might be some USB driver error
> > > involved here.
> >
> > Where I've seen this is writing to an SD card in a USB-based SD
> > card reader.
> >
> > I have a fairly reg
Hi Hyungwon,
> This patch adds support for Odroid-XU3.
>
> Signed-off-by: Hyungwon Hwang
> Cc: Minkyu Kang
> Cc: Lukasz Majewski
> ---
> Changes for v3:
> - Remove unnecessary node from DT file
> - Remove unnecessary features from config file
> - Remove unnecessary macros from board-specific h
Hi Scott,
2014-11-12 12:06 GMT+09:00 Scott Wood :
> On Tue, 2014-11-11 at 22:05 +0900, Masahiro Yamada wrote:
>> + /*
>> + * If CONFIG_SYS_NAND_SELF_INIT is defined, each driver is responsible
>> + * for instantiating struct nand_chip, while drivers/mtd/nand/nand.c
>> + * still
Hi Tom,
Could you apply this too?
http://lists.denx.de/pipermail/u-boot/2014-October/193497.html
This is the last patch of the Kbuild updates series,
but it was not listed on Patchwork because of no code-diff in it.
2014-10-30 11:06 GMT+09:00 Masahiro Yamada :
> The Makefiles call the respe
Hi,
On 27 October 2014 12:50, Simon Glass wrote:
> Hi Tom,
>
> On 27 October 2014 08:24, Tom Rini wrote:
>> On Fri, Oct 24, 2014 at 02:04:00PM -0600, Simon Glass wrote:
>>> Hi Tom,
>>>
>>> On 24 October 2014 12:49, Tom Rini wrote:
>>> > On Thu, Oct 23, 2014 at 06:58:50PM -0600, Simon Glass wrot
Hi Bin,
On 11 November 2014 18:16, Bin Meng wrote:
> Hi Simon,
>
> On Wed, Nov 12, 2014 at 12:10 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 11 November 2014 01:25, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Tue, Nov 11, 2014 at 2:54 AM, Simon Glass wrote:
Hi Bin,
On 9 November 201
Hi Bin,
On 12 November 2014 01:03, Bin Meng wrote:
> Hi Simon,
>
> On Wed, Nov 12, 2014 at 8:18 AM, Simon Glass wrote:
>> Add code to set up the SATA interfaces on boot.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> arch/x86/cpu/ivybridge/Makefile | 1 +
>> arch/x86/cpu/ivybrid
Hi Wolfgang,
On 12 November 2014 01:12, Wolfgang Denk wrote:
> Dear Simon,
>
> In message <1415751501-23407-11-git-send-email-...@chromium.org> you wrote:
>> If the RTC needs to be cleared, write the U-Boot build date to it. In any
>> case make sure the settings are correct.
>
> Is this really a
Hi Prezemyslaw,
On 12 November 2014 03:29, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 11/06/2014 11:34 PM, Simon Glass wrote:
>>
>> Hi,
>>
>>
>> On 20 October 2014 09:51, Przemyslaw Marczak
>> wrote:
>>>
>>>
>>> Hello,
>>>
>>> ... snip ...
>
>
>
> Thank you again.
> I'
Hi Hyungwon,
> This patch fixes wrong GPIO information such as GPIO bank, table which
> is used to convert GPIO name to index, bank base address, and etc.
Please check if you sent your patches as a plain text.
To apply your patches without problems I had to use "mbox" from
patchwork.
(e.g. http:
Hi Stephen,
On 24 October 2014 13:11, Stephen Warren wrote:
> On 08/26/2014 09:34 AM, Thierry Reding wrote:
>>
>> From: Thierry Reding
>>
>> Implement an API that can be used by drivers to allocate memory from a
>> pool that is mapped uncached. This is useful if drivers would otherwise
>> need t
Hi Stefano,
On Wed, Nov 12, 2014 at 6:19 AM, Stefano Babic wrote:
> Generally, I do not find a good idea to overwrite the environment in
> code. A user (I mean, a developer) becomes crazy if the environment he
> has previously set with "setenv" and "saveenv" has no worth, because
> some part of
Hi Hyungwon,
> This patch adds documentation for Odroid-XU3. This documentation is
> based on that of Odroid (doc/README-odroid) made by Przemyslaw
> Marczak. The documentation includes basic information about boot
> media layout, environment, partition layout, and the instruction to
> burn the u-
> On 12/11/2014 01:15, John Tobias wrote:
>> In iMX6DQ data sheet the stack address is 0x0093FFB8 (page 383).
>> While, in iMX6SDL datasheet (page 393) is 0x0091FFB8.
On 12 Nov 2014, sba...@denx.de wrote:
> I admit that I should take a coffe, and after that maybe I can realize
> what you are sa
Hi Stefano,
That's fine.. I'll fix it.
Regards,
john
On Wed, Nov 12, 2014 at 2:13 AM, Stefano Babic wrote:
> Hi John,
>
> On 11/11/2014 18:15, John Tobias wrote:
>
> You add a new entry point here (spl_board_mmc_init), but why cannot you
> do this in the functions already supplied by S
On 22 August 2014 03:15, Thierry Reding wrote:
> On Wed, Aug 20, 2014 at 01:29:57PM -0600, Stephen Warren wrote:
>> On 08/18/2014 02:00 AM, Thierry Reding wrote:
>> >From: Thierry Reding
>> >
>> >RX and TX descriptor rings should be aligned to 256 byte boundaries. Use
>> >the DEFINE_ALIGN_BUFFER(
Dear Lukasz,
In message <20141112152949.1fe6ce3c@amdc2363> you wrote:
>
> > But this is a bug. Papering over is not a good idea. It should be
> > analyzed, reported, and finally fixed.
>
> I've debugged the script with strace.
Thanks a lot for that!
> The problem is with umount() syscall:
..
On Wed, Nov 12, 2014 at 10:12:30AM +0100, Andreas Bießmann wrote:
> Hi Tom,
>
> On 11/10/2014 10:29 PM, Tom Rini wrote:
> > Hey all,
> >
> > I've pushed v2015.01-rc1 out to the repository and tarballs should exist
> > soon.
> >
> > The merge window is now closed. Per both the min-summit and the
add SUPPORT_SPL feature for iMX6 SabreSD. It need to use
mx6sabresd_spl_defconfig to compile it.
Signed-off-by: John Tobias
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 22eb2d5..ab0d284 100644
--- a/arch/arm/Kconfig
+++ b/arch
It's a trim version of mx6q_4x_mt41j128.cfg. It just removed
the related settings for DDR
Signed-off-by: John Tobias
---
board/freescale/mx6sabresd/mx6sabresd_spl.cfg | 58 +++
1 file changed, 58 insertions(+)
create mode 100644 board/freescale/mx6sabresd/mx6sabresd_spl.
add the spl info in the header file.
Also, added a macro statement in m6sabre_common.h to avoid compiler
warning.
Signed-off-by: John Tobias
---
include/configs/mx6sabre_common.h | 2 ++
include/configs/mx6sabresd.h | 6 ++
2 files changed, 8 insertions(+)
diff --git a/include/configs/
This patch is for SPL support for iMX6 SabreSD. The said
patches has been tested to work on SD2 and SD3 port of the
said board.
After applying the following patches, it will produces
SPL and u-boot.img binary images. You should run the
two commands below to store it in your SD or eMMC.
sudo dd if
add a build configuration file for mx6sabresd with spl support
Signed-off-by: John Tobias
---
configs/mx6sabresd_spl_defconfig | 5 +
1 file changed, 5 insertions(+)
create mode 100644 configs/mx6sabresd_spl_defconfig
diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_d
This patch will enable the support for SPL on iMX6 SabreSD.
It tested on SD2 and SD3 mmc port.
It uses mx6dq_dram_iocfg and mx6_dram_cfg for ddr configuration.
Signed-off-by: John Tobias
---
board/freescale/mx6sabresd/mx6sabresd.c | 186 +++-
1 file changed, 184 inse
On Fri 2014-11-07 13:50:29, Stefan Roese wrote:
> This function will be needed by the upcoming Designware master SPI
> driver.
>
> Signed-off-by: Stefan Roese
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Vince Bridgers
> Cc: Marek Vasut
Acked-by: Pavel Machek
--
(english) http://www.livej
On Fri 2014-11-07 13:50:30, Stefan Roese wrote:
> This function will be needed by the upcoming Designware master SPI
> driver. As the SPI master controller is held in reset by the current
> Preloader implementation. So we need to release the reset for the
> driver to communicate with the controller
On Fri 2014-11-07 13:50:32, Stefan Roese wrote:
> Signed-off-by: Stefan Roese
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Vince Bridgers
> Cc: Marek Vasut
Acked-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/
Hi!
You tripped my spell-checker, sorry.
> This patch adds the driver for the Designware master SPI controller. This
> IP core is integrated on the Altera SoCFPGA. This implementation is a
> driver model (DM) implementation. So multiple SPI drivers can be used.
> Thats necessary, since SoCFPGA al
On Fri 2014-11-07 13:50:33, Stefan Roese wrote:
> Without this alias, DM based probing does not work. So lets add this
> alias to get the bus numbering correct for the Designware SPI
> controllers.
>
> Signed-off-by: Stefan Roese
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Vince Bridgers
> Cc
On Fri 2014-11-07 13:50:34, Stefan Roese wrote:
> Enable support for the DW master SPI controller in the config header
> for the SoCFPGA. This controller can only be enabled, if DT support
> is enabled.
>
> Signed-off-by: Stefan Roese
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Vince Bridgers
On Fri 2014-11-07 14:10:41, Stefan Roese wrote:
> This patch includes the latest DT sources for socfpga from the current
> Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
> "socfpga_socrates" (the EBV SoCrates board) to make use of this new DT
> support.
>
> Until this patch,
On 11/12/2014 09:45 AM, Wolfgang Denk wrote:
Dear Lukasz,
In message <20141112152949.1fe6ce3c@amdc2363> you wrote:
But this is a bug. Papering over is not a good idea. It should be
analyzed, reported, and finally fixed.
I've debugged the script with strace.
Thanks a lot for that!
The
Hi John,
On Wed, Nov 12, 2014 at 3:14 PM, John Tobias wrote:
> This patch is for SPL support for iMX6 SabreSD. The said
> patches has been tested to work on SD2 and SD3 port of the
> said board.
>
> After applying the following patches, it will produces
> SPL and u-boot.img binary images. You sho
Hi Tom,
On 11/10/2014 11:29 PM, Tom Rini wrote:
Hey all,
I've pushed v2015.01-rc1 out to the repository and tarballs should exist
soon.
The merge window is now closed. Per both the min-summit and the follow
up emails, I'm going to try and get into the every 2 week RC tagging
groove. And, I'm
Hi Fabio,
Thanks for the info.
Regards,
john
On Wed, Nov 12, 2014 at 10:19 AM, Fabio Estevam wrote:
> Hi John,
>
> On Wed, Nov 12, 2014 at 3:14 PM, John Tobias wrote:
>> This patch is for SPL support for iMX6 SabreSD. The said
>> patches has been tested to work on SD2 and SD3 port of the
>> s
On Wed, Nov 12, 2014 at 08:24:47PM +0200, Nikita Kiryanov wrote:
> Hi Tom,
>
> On 11/10/2014 11:29 PM, Tom Rini wrote:
> >Hey all,
> >
> >I've pushed v2015.01-rc1 out to the repository and tarballs should exist
> >soon.
> >
> >The merge window is now closed. Per both the min-summit and the follow
On 11/11/2014 12:04 PM, Simon Glass wrote:
From: Allen Martin
Norrin (PM370) is a Tegra124 clamshell board that is very similar to
venice2, but it has a different panel, the sdcard cd and wp sense are
flipped, and it has a different revision of the AS3722 PMIC. This
board is also refered to as
On 11/11/2014 12:04 PM, Simon Glass wrote:
From: Allen Martin
Norrin (PM370) is a Tegra124 clamshell board that is very similar to
venice2, but it has a different panel, the sdcard cd and wp sense are
flipped, and it has a different revision of the AS3722 PMIC. This
board is also refered to as
Hi Stephen,
On 12 November 2014 11:59, Stephen Warren wrote:
> On 11/11/2014 12:04 PM, Simon Glass wrote:
>>
>> From: Allen Martin
>>
>> Norrin (PM370) is a Tegra124 clamshell board that is very similar to
>> venice2, but it has a different panel, the sdcard cd and wp sense are
>> flipped, and i
Hi Stephen,
On 12 November 2014 11:57, Stephen Warren wrote:
> On 11/11/2014 12:04 PM, Simon Glass wrote:
>>
>> From: Allen Martin
>>
>> Norrin (PM370) is a Tegra124 clamshell board that is very similar to
>> venice2, but it has a different panel, the sdcard cd and wp sense are
>> flipped, and i
Hi John,
On 11/12/2014 07:14 PM, John Tobias wrote:
This patch is for SPL support for iMX6 SabreSD. The said
patches has been tested to work on SD2 and SD3 port of the
said board.
After applying the following patches, it will produces
SPL and u-boot.img binary images.
Is it still possible to
On Wed, Nov 12, 2014 at 6:42 PM, Nikolay Dimitrov wrote:
> Hi John,
>
> On 11/12/2014 07:14 PM, John Tobias wrote:
>>
>> This patch is for SPL support for iMX6 SabreSD. The said
>> patches has been tested to work on SD2 and SD3 port of the
>> said board.
>>
>> After applying the following patches,
On Wed, 2014-11-12 at 11:53 +0100, Stefan Roese wrote:
> By defining CONFIG_SYS_NAND_USE_READY the GPMC NAND driver makes
> use of the ready pin / signal for busy / ready detection. This function
> is already available but currently only used in SPL. I don't see a reason
> to not use it in the main
Hi Fabio,
On 11/12/2014 10:45 PM, Fabio Estevam wrote:
On Wed, Nov 12, 2014 at 6:42 PM, Nikolay Dimitrov wrote:
Hi John,
On 11/12/2014 07:14 PM, John Tobias wrote:
This patch is for SPL support for iMX6 SabreSD. The said
patches has been tested to work on SD2 and SD3 port of the
said board.
On Wed, Nov 12, 2014 at 12:04:39PM -0500, Tom Rini wrote:
> On Wed, Nov 12, 2014 at 10:12:30AM +0100, Andreas Bießmann wrote:
> > Hi Tom,
> >
> > On 11/10/2014 10:29 PM, Tom Rini wrote:
> > > Hey all,
> > >
> > > I've pushed v2015.01-rc1 out to the repository and tarballs should exist
> > > soon.
Hi John,
On Wed, Nov 12, 2014 at 4:19 PM, Fabio Estevam wrote:
> Hi John,
>
> On Wed, Nov 12, 2014 at 3:14 PM, John Tobias wrote:
>> This patch is for SPL support for iMX6 SabreSD. The said
>> patches has been tested to work on SD2 and SD3 port of the
>> said board.
>>
>> After applying the foll
Hi Fabio,
Thanks for catching it.
Regards,
john
On Wed, Nov 12, 2014 at 1:14 PM, Fabio Estevam wrote:
> Hi John,
>
> On Wed, Nov 12, 2014 at 4:19 PM, Fabio Estevam wrote:
>> Hi John,
>>
>> On Wed, Nov 12, 2014 at 3:14 PM, John Tobias
>> wrote:
>>> This patch is for SPL support for iMX6 Sabr
On Wed, Nov 12, 2014 at 11:53:11AM +0100, Stefan Roese wrote:
> By defining CONFIG_SYS_NAND_USE_READY the GPMC NAND driver makes
> use of the ready pin / signal for busy / ready detection. This function
> is already available but currently only used in SPL. I don't see a reason
> to not use it in
On Mon, Oct 27, 2014 at 12:50:39PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On 27 October 2014 08:24, Tom Rini wrote:
> > On Fri, Oct 24, 2014 at 02:04:00PM -0600, Simon Glass wrote:
> >> Hi Tom,
> >>
> >> On 24 October 2014 12:49, Tom Rini wrote:
> >> > On Thu, Oct 23, 2014 at 06:58:50PM -0600,
Hi Scott,
Sorry for the late response, Can you add the driver to dm-spi.
Please see any info to doc/driver-model/spi-howto.txt
Let me know for any inputs/questions.
On 25 September 2014 14:55, Scott Jiang wrote:
> SPI3 controller is not only used on BF609 platform. So we add a common
> contro
On Wed, 12 Nov 2014 11:11:33 -0700
Stephen Warren wrote:
> On 11/12/2014 09:45 AM, Wolfgang Denk wrote:
> > Dear Lukasz,
> >
> > In message <20141112152949.1fe6ce3c@amdc2363> you wrote:
> >>
> >>> But this is a bug. Papering over is not a good idea. It should
> >>> be analyzed, reported, and fi
Hi Tom,
On 12 November 2014 14:42, Tom Rini wrote:
> On Mon, Oct 27, 2014 at 12:50:39PM -0600, Simon Glass wrote:
>> Hi Tom,
>>
>> On 27 October 2014 08:24, Tom Rini wrote:
>> > On Fri, Oct 24, 2014 at 02:04:00PM -0600, Simon Glass wrote:
>> >> Hi Tom,
>> >>
>> >> On 24 October 2014 12:49, Tom
On Wednesday, November 12, 2014 at 01:19:02 AM, Jagan Teki wrote:
> On 12 November 2014 04:26, Marek Vasut wrote:
> > On Tuesday, November 11, 2014 at 10:37:33 PM, Jagan Teki wrote:
> >> On 12 November 2014 02:52, Marek Vasut wrote:
> >> > On Tuesday, November 11, 2014 at 09:50:35 PM, Jagannadha
On Wed, Nov 12, 2014 at 04:10:06PM -0500, Tom Rini wrote:
> On Wed, Nov 12, 2014 at 12:04:39PM -0500, Tom Rini wrote:
> > On Wed, Nov 12, 2014 at 10:12:30AM +0100, Andreas Bießmann wrote:
> > > Hi Tom,
> > >
> > > On 11/10/2014 10:29 PM, Tom Rini wrote:
> > > > Hey all,
> > > >
> > > > I've pushe
It's a trim version of mx6q_4x_mt41j128.cfg. It just removed
the related settings for DDR
Signed-off-by: John Tobias
---
board/freescale/mx6sabresd/mx6sabresd_spl.cfg | 58 +++
1 file changed, 58 insertions(+)
create mode 100644 board/freescale/mx6sabresd/mx6sabresd_spl.
This patch is for SPL support for iMX6 SabreSD. The said
patches has been tested to work on SD2 and SD3 port of the
said board. It tested the non-spl version of uboot as well.
After applying the following patches, it will produces
SPL and u-boot.img binary images. You should run the
two commands b
add a build configuration file for mx6sabresd with spl support
Signed-off-by: John Tobias
---
configs/mx6sabresd_spl_defconfig | 5 +
1 file changed, 5 insertions(+)
create mode 100644 configs/mx6sabresd_spl_defconfig
diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_d
This patch will enable the support for SPL on iMX6 SabreSD.
It tested on SD2 and SD3 mmc port (Switch 1 or 2 of SW6)
Signed-off-by: John Tobias
---
board/freescale/mx6sabresd/mx6sabresd.c | 186 +++-
1 file changed, 184 insertions(+), 2 deletions(-)
diff --git a/boar
add SUPPORT_SPL feature for iMX6 SabreSD. It need to use
mx6sabresd_spl_defconfig to compile it.
Signed-off-by: John Tobias
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 22eb2d5..ab0d284 100644
--- a/arch/arm/Kconfig
+++ b/arch
add the spl info in the header file.
Also, added a macro statement in m6sabre_common.h to avoid compiler
warning.
Signed-off-by: John Tobias
---
include/configs/mx6sabre_common.h | 2 ++
include/configs/mx6sabresd.h | 6 ++
2 files changed, 8 insertions(+)
diff --git a/include/configs/
On Wed, Nov 12, 2014 at 8:27 PM, John Tobias wrote:
> This patch is for SPL support for iMX6 SabreSD. The said
> patches has been tested to work on SD2 and SD3 port of the
> said board. It tested the non-spl version of uboot as well.
>
> After applying the following patches, it will produces
> SPL
Hi,
I tested on sh7785lcr board with this patch.
This worked without any problems. Thanks.
2014-08-27 0:34 GMT+09:00 Thierry Reding :
> From: Thierry Reding
>
> RX and TX descriptor rings should be aligned to 256 byte boundaries. Use
> the DEFINE_ALIGN_BUFFER() macro to define the buffers so tha
Hi!
I comment to latest patch.
Best regards,
Nobuhiro
2014-11-13 1:23 GMT+09:00 Simon Glass :
> On 22 August 2014 03:15, Thierry Reding wrote:
>> On Wed, Aug 20, 2014 at 01:29:57PM -0600, Stephen Warren wrote:
>>> On 08/18/2014 02:00 AM, Thierry Reding wrote:
>>> >From: Thierry Reding
>>> >
From: Thierry Reding nvidia.com>
(Commit message updated by Simon Glass who is sending
this series originally created by Thierry)
This series adds PCIe support for Tegra20, Tegra30 and Tegra124. The size is
mostly due to the large number of infrastructure that's added (Tegra-
specific drivers r
Hi Nobuhiro,
On 12 November 2014 16:38, Nobuhiro Iwamatsu wrote:
> Hi!
>
> I comment to latest patch.
>
> Best regards,
> Nobuhiro
For me this one gives a warning, but I suppose the warning is correct.
>
> 2014-11-13 1:23 GMT+09:00 Simon Glass :
>> On 22 August 2014 03:15, Thierry Reding wro
From: Thierry Reding
When enumerating devices, honour the pci_skip_dev() function. This can
be used by PCI controller drivers to restrict which devices will be
probed.
This is required by the NVIDIA Tegra PCIe controller driver, which will
fail with a data abort exception if an access is attempt
From: Thierry Reding
When listing the devices on a PCI bus, the current code will blindly try
to access all devices. Internally this causes pci_bus_to_hose() to be
repeatedly called and output an error message every time. Prevent this
by calling pci_bus_to_hose() once and abort early if no bus wa
From: Thierry Reding
This macro can be overridden in source files (before including common.h)
and can be used to specify a prefix for debug and error messages. An
example of how to use this is shown below:
#define pr_fmt(fmt) "foo: " fmt
#include
...
debug("bar
From: Thierry Reding
Provide a new modifier to vsprintf() to print phys_addr_t variables to
avoid having to cast or #ifdef when printing them out. The %pa modifier
is used for this purpose, so phys_addr_t variables need to be passed by
reference, like so:
phys_addr_t start = 0;
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