test: py: CVE-2020-29651 Regular expression deinal of service in py

Hi Tom FYI, there is a CVE from the following file in U-Boot, CVE-2020-29651 Regular expression deinal of service in py. test/py/requirements.txt Regards Ley Foon

RE: [v1 17/17] arm: socfpga: Enable Intel N5X device build

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 16/17] include: configs: Add Intel N5X device CONFIGs

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 15/17] arm: dts: Add base dtsi and devkit dts for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 14/17] board: intel: Add socdk board support for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 13/17] arm: socfpga: Add SPL for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 12/17] ddr: altera: Add SDRAM driver for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 10/17] arm: socfpga: Add SDRAM driver helper function for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 11/17] ddr: socfpga: Enable memory test on memory size less than 1GB

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan

RE: [v1 09/17] arm: socfpga: Changed misc_s10.c to misc_soc64.c

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 08/17] arm: socfpga: Add clock manager for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

[GIT PULL] SoCFPGA changes for v2021.07-rc1

Hi Tom Please pull the SoCFPGA changes for v2021.07. Regards Ley Foon The following changes since commit e9c99db7787e3b5c2ef05701177c43ed1c023c27: Merge branch '2021-04-07-CI-improvements' (2021-04-07 15:54:07 -0400) are available in the Git repository at: https://github.com/lftan/u-boot

RE: [v1 07/17] arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 05/17] arm: socfpga: Get clock manager base address for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 06/17] drivers: clk: Add memory clock driver for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 04/17] drivers: clk: Add clock driver for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 03/17] arm: socfpga: Add handoff data support for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 02/17] arm: socfpga: Add base address for Intel N5X device

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 01/17] arm: socfpga: Changed base_addr_s10.h to base_addr_soc64.h

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 31, 2021 10:39 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [PATCH] arm: socfpga: Enable FIT signature with crc32 for SOC64 devices

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 11:57 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2 5/5] arm: socfpga: Restructure Stratix10 and Agilex handoff code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 1:12 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v3 1/2] arm: socfpga: Move Stratix10 and Agilex clock manager common code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 5:17 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [PATCH] arm: socfpga: smc: Add function to get usercode

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, March 25, 2021 2:08 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2 2/2] arm: socfpga: Changed to store QSPI reference clock in kHz

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 2:20 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 1/2] arm: socfpga: Move Stratix10 and Agilex clock manager common code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 1:25 PM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Ga

RE: [v1 5/5] arm: socfpga: Restructure Stratix10 and Agilex handoff code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, March 24, 2021 11:02 AM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Ga

RE: [v1 2/2] arm: socfpga: Changed to store QSPI reference clock in kHz

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 10:37 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 1/2] arm: socfpga: Move Stratix10 and Agilex clock manager common code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 10:37 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 5/5] arm: socfpga: Restructure Stratix10 and Agilex handoff code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 5:43 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v1 4/5] arm: socfpga: Rearrange sequence of macros in handoff_soc64.h

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 5:43 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v1 3/5] arm: socfpga: Changed system_manager_s10.c to system_manager_soc64.c

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 5:43 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v1 2/5] arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 5:43 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v1 1/5] arm: socfpga: Rename Stratix10 and Agilex handoff common macros

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 5:43 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [PATCH] arm: socfpga: Move Stratix10 and Agilex SPL common code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 15, 2021 3:59 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

[GIT PULL] SoCFPGA changes for v2021.04-rc5

Hi Tom Please pull one fix for v2021.04-rc5. Thanks. Regards Ley Foon The following changes since commit 1f9c3f13f6ad8595a0fb5ab2cb830583cdc0b60a: Merge tag 'efi-2021-04-rc5-2' of https://source.denx.de/u-boot/custodians/u-boot-efi (2021-03-20 08:55:18 -0400) are available in the Git repos

RE: [PATCH] arm: socfpga: Only do 'is OS booted from FIT' checking when VAB is enabled

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 22, 2021 6:05 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [PATCH] arm: socfpga: smc: Remove unused SMC function ID

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Friday, March 12, 2021 5:51 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

[GIT PULL] SoCFPGA changes for v2021.04-rc4

Hi Tom Please pull these changes for v2021.04-rc4. Thanks. Regards Ley Foon The following changes since commit e4dba4ba6f61e8128be0b4200ca2d8cebf62180b: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq (2021-03-06 07:25:04 -0500) are available in the Git repository at: ht

RE: [v5 2/7] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 1, 2021 8:04 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [v4 2/7] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, March 1, 2021 2:43 PM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, >

RE: [RESEND v4 7/7] Makefile: socfpga: Add target to generate hex output for combined spl and dtb

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Saturday, February 27, 2021 12:58 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ;

RE: [v4 2/7] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Saturday, February 27, 2021 12:11 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ;

RE: [v3 3/6] arm: socfpga: cmd: Support 'vab' command

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Friday, February 5, 2021 6:52 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v3 2/6] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Friday, February 5, 2021 6:52 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2] Makefile: socfpga: Add target to generate hex output for combined spl and dtb

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, February 24, 2021 9:54 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ;

RE: [v2 2/6] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, January 18, 2021 4:03 PM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, &g

RE: [v2 6/6] configs: socfpga: Add defconfig for Agilex with VAB support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Monday, January 18, 2021 4:07 PM > To: Tan, Ley Foon ; u-boot@lists.denx.de > Cc: Marek Vasut ; See, Chin Liang > ; Simon Goldschmidt > ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, &g

RE: [v2 6/6] configs: socfpga: Add defconfig for Agilex with VAB support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, January 7, 2021 6:04 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2 5/6] configs: socfpga: soc64: Move CONFIG_BOOTCOMMAND to defconfig

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, January 7, 2021 6:04 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2 2/6] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, January 7, 2021 6:04 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v2 1/6] arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, January 7, 2021 6:04 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

[GIT PULL] SoCFPGA changes for v2021.04-rc1

Hi Tom Please pull the SoCFPGA changes for v2021.04. Regards Ley Foon The following changes since commit ab1a425524a79eeca61e7b67fdf382c7a499346f: Merge tag 'u-boot-stm32-20210113' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2021-01-13 15:00:53 -0500) are available in the Git re

RE: [v7 07/18] arm: socfpga: Add secure register access helper functions for SoC 64bits

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, December 24, 2020 6:21 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v6 10/18] net: designware: socfpga: Add ATF support for MAC driver

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, December 23, 2020 10:56 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ;

RE: [v6 07/18] arm: socfpga: Add secure register access helper functions for SoC 64bits

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Wednesday, December 23, 2020 10:56 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ;

RE: [v5 17/18] arm: socfpga: soc64: Enable FIT image generation using binman

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 16/18] arm: socfpga: dts: soc64: Add binman node of FIT image with ATF support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 10/18] net: designware: socfpga: Add ATF support for MAC driver

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 09/18] mmc: dwmmc: socfpga: Add ATF support for MMC driver

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 08/18] mmc: dwmmc: Change designware MMC 'clksel' callback function to return status

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v5 07/18] arm: socfpga: Add secure register access helper functions for SoC 64bits

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, December 22, 2020 12:50 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v4 07/17] arm: socfpga: Add secure register access helper functions for SoC 64bits

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Friday, December 18, 2020 11:29 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 5/5] configs: socfpga: Add defconfig for Agilex and Diamond Mesa with VAB support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 3:05 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 4/5] configs: socfpga: soc64: Remove 'run linux_qspi_enable' from bootcommand

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 3:05 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 3/5] arm: socfpga: dts: soc64: Update filename in binman node of FIT image with VAB support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 3:05 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 2/5] arm: socfpga: cmd: Support 'vab' command

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 3:05 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v1 1/5] arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 3:05 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 22/22] arm: socfpga: dm: Enable Intel Diamond Mesa build

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:45 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 21/22] configs: dm: Add Diamond Mesa CONFIGs

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:45 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 20/22] arm: dts: dm: Add base dtsi and devkit dts for Diamond Mesa

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:45 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 19/22] board: intel: dm: Add socdk board support for Diamond Mesa

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:45 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 18/22] arm: socfpga: dm: Add SPL for Diamond Mesa

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:45 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 17/22] arm: socfpga: Move Stratix10 and Agilex SPL common code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:45 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 16/22] ddr: altera: dm: Add SDRAM driver for Diamond Mesa

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:45 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 15/22] arm: socfpga: dm: Add clock manager for Diamond Mesa

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:45 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 14/22] arm: socfpga: Changed to store QSPI reference clock in kHz

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:45 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 13/22] arm: socfpga: Move Stratix10 and Agilex clock manager common code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:45 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 12/22] drivers: clk: dm: Add memory clock driver for Diamond Mesa

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 10/22] drivers: clk: dm: Add clock driver for Diamond Mesa

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 09/22] arm: socfpga: Add handoff data support for Diamond Mesa

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 08/22] arm: socfpga: Restructure Stratix10 and Agilex handoff code

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 07/22] arm: socfpga: Rearrange sequence of macros in handoff_soc64.h

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 06/22] arm: socfpga: Changed system_manager_s10.c to system_manager_soc64.c

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 05/22] arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 04/22] arm: socfpga: Rename Stratix10 and Agilex handoff common macros

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 03/22] arm: socfpga: dm: Add firewall support for Agilex and Diamond Mesa

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 02/22] arm: socfpga: dm: Add base address for Intel Diamond Mesa

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [RESEND v2 01/22] arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan,

RE: [v3 16/16] configs: socfpga: Add defconfig for Agilex and Stratix 10 with ATF support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, October 15, 2020 8:30 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; A

RE: [v3 15/16] arm: socfpga: soc64: Enable FIT image generation using binman

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, October 15, 2020 8:30 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Lim,

RE: [v3 14/16] arm: socfpga: dts: soc64: Add binman node of FIT image with ATF support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, October 15, 2020 8:30 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Lim,

RE: [v3 09/16] arm: socfpga: soc64: Add ATF support for Reset Manager driver

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, October 15, 2020 8:30 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; A

RE: [v3 08/16] net: designware: socfpga: Add ATF support for MAC driver

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, October 15, 2020 8:30 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; A

RE: [v3 07/16] mmc: dwmmc: socfpga: Add ATF support for MMC driver

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, October 15, 2020 8:30 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; A

RE: [v3 02/16] arm: socfpga: soc64: Load FIT image with ATF support

> -Original Message- > From: Lim, Elly Siew Chin > Sent: Thursday, October 15, 2020 8:30 PM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; A

RE: [PATCH 2/5] spl: mmc: extend spl_mmc_boot_mode() to take mmc argument

s.com; u-boot@lists.denx.de; Stefano Babic > ; Fabio Estevam ; NXP i . MX U- > Boot Team ; Lokesh Vutla ; > Philipp Tomsich ; Kever Yang > ; Marek Vasut ; Simon > Goldschmidt ; Tan, Ley Foon > ; Patrick Delaunay ; > Patrice Chotard ; Andre Przywara > > Subject: [PATCH

RE: [PATCH] lib: zlib: Use post-increment only in inffast.c

> -Original Message- > From: Tom Rini > Sent: Friday, October 23, 2020 9:52 AM > To: Tan, Ley Foon > Cc: Ley Foon Tan ; ZY - u-boot b...@lists.denx.de>; See, Chin Liang > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > On Fri,

RE: [PATCH] lib: zlib: Use post-increment only in inffast.c

> -Original Message- > From: Tom Rini > Sent: Thursday, October 22, 2020 9:24 PM > To: Tan, Ley Foon > Cc: Ley Foon Tan ; ZY - u-boot b...@lists.denx.de>; See, Chin Liang > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > On Wed,

[GIT PULL] SoCFPGA fix for v2021.01

Hi Tom Please pull one fix for 2021.01. Travis CI build: https://travis-ci.org/github/lftan/u-boot/builds/737650124 Regards Ley Foon The following changes since commit 7ec87e4192215815b658c3f8b34e4be010103149: Merge tag 'u-boot-atmel-2021.01-b' of https://gitlab.denx.de/u-boot/custodians/u

RE: [PATCH] lib: zlib: Use post-increment only in inffast.c

> -Original Message- > From: Tom Rini > Sent: Friday, October 16, 2020 8:37 PM > To: Ley Foon Tan > Cc: Tan, Ley Foon ; ZY - u-boot b...@lists.denx.de>; See, Chin Liang > Subject: Re: [PATCH] lib: zlib: Use post-increment only in inffast.c > > On Fri,

  1   2   3   >