This commit provides definition and declaration of GPT verification
functions - namely gpt_verify_headers() and gpt_verify_partitions().
The former is used to only check CRC32 of GPT's header and PTEs.
The latter examines each partition entry and compare attributes such as:
name, start offset and s
This commit adds support for "gpt verify" command, which verifies
correctness of on-board stored GPT partition table.
As the optional parameter one can provide '$partitons' environment variable
to check if partition data (size, offset, name) is correct.
This command should be regarded as complemen
Exactly the same check is performed in set_gpt_info() function executed
just after this check.
Signed-off-by: Lukasz Majewski
Reviewed-by: Tom Rini
---
Changes for v2:
- None
---
common/cmd_gpt.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/common/cmd_gpt.c b/common/cmd_gpt.c
index e3
./doc/README.gpt entry has been updated to explain usage of "gpt verify"
command.
Signed-off-by: Lukasz Majewski
Reviewed-by: Tom Rini
---
Changes for v2:
- Adjust README.gpt changes to the newest mainline
---
doc/README.gpt | 27 ++-
1 file changed, 26 insertions(+), 1
we can use this config to disable rockchip serial driver in SPL stage,
since some rockchip soc sram size is small(rk3036 etc), so we don't
want rockchip serial driver build in SPL, but we still want use common
debug driver in SPL.
Signed-off-by: Lin Huang
---
arch/arm/mach-rockchip/Kconfig | 3
enable this config so we use common uart function in SPL stage
Signed-off-by: Lin Huang
---
arch/arm/mach-rockchip/rk3036-board-spl.c | 6 ++
configs/evb-rk3036_defconfig | 5 +
include/configs/rk3036_common.h | 1 +
3 files changed, 8 insertions(+), 4 deletions(-)
Hi Tom,
On 19.11.2015 23:11, Tom Rini wrote:
On Thu, Nov 19, 2015 at 12:46:58PM +0100, Stefan Roese wrote:
On 19.11.2015 12:19, Nikita Kiryanov wrote:
Hi Tom,
On Wed, Nov 18, 2015 at 05:33:20PM -0500, Tom Rini wrote:
On Sun, Nov 08, 2015 at 05:11:51PM +0200, Nikita Kiryanov wrote:
Introduc
Jagan
On Thursday 19 November 2015 03:40 PM, Jagan Teki wrote:
> On 19 November 2015 at 12:35, Mugunthan V N wrote:
>> Add compatible for spansion 32MiB spi flash s25fl256s1.
>>
>> Signed-off-by: Mugunthan V N
>> ---
>> drivers/mtd/spi/sf_probe.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> d
Hi Ted, Stephen,
On Tuesday, November 17, 2015 12:48 PM, Ted wrote:
Hi Stephen,
I am investigating how to modify this driver by Marek's comments, and will send
you new patch ASAP.
Thanks~
BRs
Ted
Just wanted to share why this device is failed to
Hi Marek,
On 19 November 2015 at 16:42, Marek Vasut wrote:
> On Thursday, November 19, 2015 at 11:58:26 AM, Anand Moon wrote:
> > Hi Ted, Stephen,
> >
> >
> >
> >
> >
> > On Tuesday, November 17, 2015 12:48 PM, Ted wrote:
> > Hi Stephen,
> >
> > I am investigating how to modify this driver by M
Hi Ted/Stephen,
On Tuesday, November 17, 2015 12:48 PM, Ted wrote:
Hi Stephen,
I am investigating how to modify this driver by Marek's comments, and will send
you new patch ASAP.
Thanks~
BRs
Ted
從: Stephen Warren [swar...@wwwdotorg.org]
寄件日期: 2015年1
On 17.11.2015 13:56, Nathan Rossi wrote:
> This patch series adds support for the 'zynqimage' type to mkimage for
> the Xilinx Zynq platform. As well as adding make targets to generate
> the boot.bin image file containing SPL by default.
>
> Changes in v2:
> * Remove test code
>
> Nathan Rossi (
The 3.4 kernel from the Allwinner SDK is clocking AHB1 at 200MHz
on Allwinner H3 and using PLL6 as the clock source (PLL6/3).
This can be verified by reading the value of the AHB1_APB1_CFG_REG
register via /dev/mem. It always reads as 0x3180 regardless of
the current cpufreq operating point. So thi
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Hi Simon,
On Fri, Nov 20, 2015 at 11:09 AM, Simon Glass wrote:
> Hi,
>
> I'm wondering what might come next for U-Boot x86 support.
>
> The PCI conversion to driver model is coming along nicely. The ACPI
> support is only partially there but it is a good start.
>
> What else? More platforms? Othe
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Hi Albert,
On 13 November 2015 at 19:35, Simon Glass wrote:
> On 9 November 2015 at 14:36, Albert ARIBAUD wrote:
>> Hello Simon,
>>
>> On Mon, 9 Nov 2015 12:24:55 -0800, Simon Glass wrote:
>>> On 9 November 2015 at 06:19, Albert ARIBAUD
>>> wrote:
>>> > A patman series with a 'Series-notes' s
This function looks up the controller and returns a pointer to each region
type.
Signed-off-by: Simon Glass
Acked-by: Stephen Warren
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/pci/pci-uclass.c | 30 ++
include/pci.h
Move this option to Kconfig and fix up all users.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4:
- Fix Kconig typo in commit message
Changes in v3: None
Changes in v2: None
configs/apalis_t30_defconfig | 1 +
configs/beaver_defconfig | 1 +
configs/cardhu_defconfig
A PCI bus may be a bridge device where the controller is the bridge's
parent. Add a function to return the controller device, given a PCI device.
Signed-off-by: Simon Glass
Acked-by: Stephen Warren
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Use the device_i
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SDRAM doesn't always start at 0. Adjust the region mapping so that it works
on platforms where SDRAM is somewhere else.
This needs testing on other platforms.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Rename 'addr' to 'size'
- Co
Adjust the Tegra PCI driver to support driver model and move all boards over
at the same time. This can make use of some generic driver model code, such
as the range-decoding logic.
Signed-off-by: Simon Glass
---
Changes in v5:
- Squash in Stephen's fixes from https://patchwork.ozlabs.org/patch/
Provide a few functions to support using 32-bit access to emulate 8- and
16-bit access.
Signed-off-by: Simon Glass
Reviewed-by: Stephen Warren
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/pci/pci-uclass.c | 39
At present we add a new resource entry for every range entry. But some range
entries refer to configuration regions. To make this work, avoid adding two
regions of the same type. The later ranges will overwrite the earlier
(configuration) ones.
There does not seem to be a way to distinguish the co
This is not supported with driver model, so print a message instead of
generating a build error. Rescanning PCI is not yet implemented.
This function will be implemented later once some additional PCI driver
model improvements are merged. It was confirmed on the mailing list
that no one on the teg
This series converts all Tegra boards to use driver model for PCI. The net
effect should be no change in functionality.
A few additional features are added to make this possible:
- Helper functions to support accessing 8- and 16-bit values within a 32-bit
word
- Fixing a build error for CONFIG_C
Hi,
I'm wondering what might come next for U-Boot x86 support.
The PCI conversion to driver model is coming along nicely. The ACPI
support is only partially there but it is a good start.
What else? More platforms? Other features? Better support for existing
platforms?
Regards,
Simon
___
Hi Simon,
On 19/11/15 22:24, Simon Glass wrote:
+Tom
Hi Lin,
On 18 November 2015 at 22:49, hl wrote:
Hi Simon,
On 19/11/15 12:44, Simon Glass wrote:
Hi Lin,
On 17 November 2015 at 18:19, hl wrote:
Hi Simon,
On 18/11/15 01:38, Simon Glass wrote:
Hi Lin,
On 16 November 2015 at 23:
Hi Bin,
On 19 November 2015 at 19:48, Bin Meng wrote:
> Hi Simon,
>
> On Fri, Nov 20, 2015 at 10:34 AM, Simon Glass wrote:
>> Hi,
>>
>> I haven't been able to connect for quite a few hours. Is anyone else
>> having a problem?
>>
>
> Just tried, and I am able to connect patchwork.
Yes it is back
Hi Simon,
On Fri, Nov 20, 2015 at 10:34 AM, Simon Glass wrote:
> Hi,
>
> I haven't been able to connect for quite a few hours. Is anyone else
> having a problem?
>
Just tried, and I am able to connect patchwork.
Regards,
Bin
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Hi,
I haven't been able to connect for quite a few hours. Is anyone else
having a problem?
Regards,
Simon
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On 11/19/2015 04:45 PM, Marek Vasut wrote:
> On Thursday, November 19, 2015 at 10:35:47 PM, dingu...@opensource.altera.com
> wrote:
>> From: Dinh Nguyen
>>
>> Update Makefile to build Arria 10.
>>
>> Signed-off-by: Dinh Nguyen
>> ---
>> arch/arm/mach-socfpga/Makefile | 7 +--
>> arc
On Thursday, November 19, 2015 at 10:35:42 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Add miscellaneous functions(arch_early_init_r, print_cpuinfo,
> overwrite_console, enable_caches, and cpu_mmc_init). Also, the Arria10
> has a firewall protection around the SDRAM and OCR
On Thursday, November 19, 2015 at 10:35:43 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Add config for the Arria10 SoC Development Kit.
>
> Signed-off-by: Dinh Nguyen
> ---
> include/configs/socfpga_arria10_socdk.h | 292
> 1 file changed,
On Thursday, November 19, 2015 at 10:35:47 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Update Makefile to build Arria 10.
>
> Signed-off-by: Dinh Nguyen
> ---
> arch/arm/mach-socfpga/Makefile | 7 +--
> arch/arm/mach-socfpga/arria10/Makefile | 7 +++
> 2
On Thursday, November 19, 2015 at 10:35:38 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Add the base address map for Arria10.
>
> Signed-off-by: Dinh Nguyen
> ---
> .../include/mach/socfpga_a10_base_addrs.h | 45
Reviewed-by: Marek Vasut
btw. it'd be nice if we
On Thursday, November 19, 2015 at 10:35:40 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Add the defines for the reset manager and some basic reset functionality.
>
> Signed-off-by: Dinh Nguyen
> ---
> arch/arm/mach-socfpga/arria10/reset_manager_a10.c | 83 +++
>
On Thursday, November 19, 2015 at 10:35:39 PM, dingu...@opensource.altera.com
wrote:
Hi!
[...]
> +/* Input buffer enable */
> +#define INPUT_BUF_DISABLE(0)
> +#define INPUT_BUF_1P8V (1)
> +#define INPUT_BUF_2P5V3V (2)
You can drop those parenthesis around the number
> +/
From: Dinh Nguyen
Hi,
This patchset adds the foundation support for Arria10. The series builds for
the Altera Arria10 SoCDK, but is not entirely functional on the hardware yet.
This series really just add the defines, build and Kconfig layout for Arria10.
There are few TODO after this series:
-
From: Dinh Nguyen
Add the defines for the reset manager and some basic reset functionality.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/arria10/reset_manager_a10.c | 83 +++
.../mach-socfpga/include/mach/reset_manager_a10.h | 162 +
2 files changed, 245
On Thu, Nov 19, 2015 at 12:46:58PM +0100, Stefan Roese wrote:
> On 19.11.2015 12:19, Nikita Kiryanov wrote:
> >Hi Tom,
> >
> >On Wed, Nov 18, 2015 at 05:33:20PM -0500, Tom Rini wrote:
> >>On Sun, Nov 08, 2015 at 05:11:51PM +0200, Nikita Kiryanov wrote:
> >>
> >>>Introduce spl_boot_list array, which
On Thu, Nov 19, 2015 at 01:19:39PM +0200, Nikita Kiryanov wrote:
> Hi Tom,
>
> On Wed, Nov 18, 2015 at 05:33:20PM -0500, Tom Rini wrote:
> > On Sun, Nov 08, 2015 at 05:11:51PM +0200, Nikita Kiryanov wrote:
> >
> > > Introduce spl_boot_list array, which defines a list of boot devices
> > > that SP
On Mon, Nov 16, 2015 at 08:15:50AM -0300, Ariel D'Alessandro wrote:
> No UART driver was specified in defconfig, thus
> DEBUG_UART_ALTERA_JTAGUART was incorrectly selected by default since
> commit 220e8021af96741bd7149ca9895e1f0c8a38d0bb added a new Altera UART
> driver.
>
> Signed-off-by: Ariel
On Thu, Nov 19, 2015 at 11:16:40PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull this PR.
>
> thanks!
> Jagan.
>
> The following changes since commit 3d4825446e4258192e1f2302d691a8c0c82a0975:
>
> Prepare v2016.01-rc1 (2015-11-16 20:29:51 -0500)
>
> are available in the git repository a
On Thu, Nov 19, 2015 at 03:09:59PM +0100, Michal Simek wrote:
> Hi Tom,
>
> please pull these changes to your tree. Network patches have been Ack by
> Joe. mkimage, mii patches were reviewed by you.
>
> There is one problem with U-Boot SPL for Zynq because one patch break it
> (not compilation)
On Thu, Nov 19, 2015 at 01:21:29PM +0100, Michal Simek wrote:
> Hi,
>
> please pull these patches to your tree. I have added there 3 dm patches
> which were Acked-by Simon which fixing manual relocation which is used
> by Microblaze (others are probably without DM now).
>
> Thanks,
> Michal
>
>
On Thu, Nov 19, 2015 at 01:05:25PM -0700, Simon Glass wrote:
> Hi Tom,
>
> On 19 November 2015 at 09:28, Tom Rini wrote:
> > On Thu, Nov 19, 2015 at 07:24:45AM -0700, Simon Glass wrote:
> >> +Tom
> >>
> >> Hi Lin,
> >>
> >> On 18 November 2015 at 22:49, hl wrote:
> >> > Hi Simon,
> >> >
> >> >
>
On Thu, Nov 19, 2015 at 07:37:07AM +0100, Heiko Schocher wrote:
> Hello Tom,
>
> please pull from u-boot-ubi master
>
> The following changes since commit 736d1746fb7b8f7cd70657a4a72db2b6bd8de40e:
>
> itest: add missing break statements to evalexp() (2015-11-18 15:29:00 -0500)
>
> are availa
From: Dinh Nguyen
For now, sdram_a10.c will only have sdram_init() function, but this
will get populated in the near future with more functionality.
Also add the structures for the SDRAM controller on Arria10.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/arria10/sdram_a10.c | 15
From: Dinh Nguyen
Update Makefile to build Arria 10.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/Makefile | 7 +--
arch/arm/mach-socfpga/arria10/Makefile | 7 +++
2 files changed, 12 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mach-socfpga/arria10/Makefi
From: Dinh Nguyen
Add minimal support for the Arria10 SoCDK.
Signed-off-by: Dinh Nguyen
---
board/altera/arria10-socdk/Kconfig | 18 ++
board/altera/arria10-socdk/Makefile | 9 +
board/altera/arria10-socdk/socfpga.c | 24
3 files changed, 51
From: Dinh Nguyen
Add config for the Arria10 SoC Development Kit.
Signed-off-by: Dinh Nguyen
---
include/configs/socfpga_arria10_socdk.h | 292
1 file changed, 292 insertions(+)
create mode 100644 include/configs/socfpga_arria10_socdk.h
diff --git a/include/c
From: Dinh Nguyen
Signed-off-by: Dinh Nguyen
---
arch/arm/Kconfig | 4 ++--
arch/arm/mach-socfpga/Kconfig | 10 ++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5ab0254..1d78e40 100644
--- a/arch/arm/Kconfig
+++ b
From: Dinh Nguyen
Add a defconfig file for Arria10, which does not include enabling SPL.
Signed-off-by: Dinh Nguyen
---
configs/socfpga_arria10_defconfig | 11 +++
1 file changed, 11 insertions(+)
create mode 100644 configs/socfpga_arria10_defconfig
diff --git a/configs/socfpga_arria
From: Dinh Nguyen
Add system manager defines for Arria10.
Signed-off-by: Dinh Nguyen
---
.../mach-socfpga/include/mach/system_manager_a10.h | 157 +
1 file changed, 157 insertions(+)
create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_a10.h
diff --git a/a
From: Dinh Nguyen
Add the base address map for Arria10.
Signed-off-by: Dinh Nguyen
---
.../include/mach/socfpga_a10_base_addrs.h | 45 ++
1 file changed, 45 insertions(+)
create mode 100644 arch/arm/mach-socfpga/include/mach/socfpga_a10_base_addrs.h
diff --git a/
On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> We should also take MX6D option in consideration when defining
> imx_iomux_v3_setup_pad().
>
> Signed-off-by: Otavio Salvador
Reviewed-by: Fabio Estevam
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On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> Add MMC and SPI DFU support.
>
> Signed-off-by: Otavio Salvador
Reviewed-by: Fabio Estevam
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On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> Congatec has several MX6 boards based on quad, dual, dual-lite and solo.
>
> Add SPL support so that all the variants can be supported
>
> Signed-off-by: Otavio Salvador
Reviewed-by: Fabio Estevam
On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> Tested basic fastboot commands, such as:
>
> On the U-boot prompt:
>
> => fastboot 0
>
> On the host PC:
>
> $ fastboot getvar bootloader-version -i 0x0525
> bootloader-version: U-Boot 2015.10-rc2-09654-g8f41d27
> finished. total time: 0.00
On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> Add SPI NOR support:
>
> => sf probe
> SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4
> MiB
>
> Signed-off-by: Otavio Salvador
Reviewed-by: Fabio Estevam
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On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> Congatec boards boot from SPI NOR, so it makes more sense to use
> SPI NOR to store the environment variables.
>
> Signed-off-by: Otavio Salvador
Reviewed-by: Fabio Estevam
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Add MMC and SPI DFU support.
Signed-off-by: Otavio Salvador
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
include/configs/cgtqmx6eval.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index 79fc0f6.
Tested basic fastboot commands, such as:
On the U-boot prompt:
=> fastboot 0
On the host PC:
$ fastboot getvar bootloader-version -i 0x0525
bootloader-version: U-Boot 2015.10-rc2-09654-g8f41d27
finished. total time: 0.000s
$ fastboot reboot -i 0x0525 --> board reboots fine.
Signed-off-by: Ota
We should also take MX6D option in consideration when defining
imx_iomux_v3_setup_pad().
Signed-off-by: Otavio Salvador
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
arch/arm/include/asm/imx-common/iomux-v3.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Congatec boards boot from SPI NOR, so it makes more sense to use
SPI NOR to store the environment variables.
Signed-off-by: Otavio Salvador
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
include/configs/cgtqmx6eval.h | 18 ++
1 file changed, 14 insertions(+), 4
Add SPI NOR support:
=> sf probe
SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB
Signed-off-by: Otavio Salvador
---
Changes in v6:
- use ifdef CONFIG_MXC_SPI (Jagan)
Changes in v5: None
Changes in v4: None
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 29 +++
Congatec has several MX6 boards based on quad, dual, dual-lite and solo.
Add SPL support so that all the variants can be supported
Signed-off-by: Otavio Salvador
---
Changes in v6: None
Changes in v5:
- Add missing CONFIG_BOARD_LATE_INIT
- Fix checkpatch error
- Use erase/write as update seems
Hello Stephane,
On Thu, 19 Nov 2015 08:41:44 -0500
Stephane Ayotte wrote:
...
> Does this patch have a chance to get to the release even if it has missed
> RC1?
yes, I've queued it in my tree.
Thanks,
Anatolij
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On Tue, 3 Nov 2015 11:14:49 -0500
sayotte.t...@gmail.com wrote:
> From: Stephane Ayotte
>
> This patch adds an option to skip the registration of LCD stdio ouput for
> boards that want to show different text on LCD than on serial output (or
> the active stdout selected by the environment variab
On 19 November 2015 at 06:48, Thomas Chou wrote:
> Add generic binding to unify ns16550 drivers. There are
> several drivers using almost the same code, such as serial_dw,
> serial_keystone, serial_omap, serial_ppc, serial_rockchip,
> serial_tegra.c, and serial_x86. But each is platform specific.
On 19 November 2015 at 06:48, Thomas Chou wrote:
> Since commit 220e8021af96 ("nios2: convert altera_jtag_uart to
> driver model"), the default debug uart was changed. Most people
> use ns16550 UART, so restore it as default.
>
> Signed-off-by: Thomas Chou
> Reported-by: Ezequiel Garcia
> Report
On 19 November 2015 at 06:48, Thomas Chou wrote:
> Change map_sysmem() to map_physmem(,,MAP_NOCACHE). Though map_sysmem()
> can be used to map system memory, it might be wrong to use it for I/O
> ports. The map_physmem() serves the same purpose to translate physical
> address to virtual address w
Hi Tom,
On 19 November 2015 at 09:28, Tom Rini wrote:
> On Thu, Nov 19, 2015 at 07:24:45AM -0700, Simon Glass wrote:
>> +Tom
>>
>> Hi Lin,
>>
>> On 18 November 2015 at 22:49, hl wrote:
>> > Hi Simon,
>> >
>> >
>> >
>> > On 19/11/15 12:44, Simon Glass wrote:
>> >>
>> >> Hi Lin,
>> >>
>> >>
>> >>
On 19 November 2015 at 09:40, Stephen Warren wrote:
> On 11/18/2015 07:05 AM, Marcel Ziswiler wrote:
>>
>> The address range check may overflow if the memory region is located at
>> the top of the 32-bit address space. This can e.g. be seen on TK1 if
>> using the E1000 gigabit Ethernet driver wher
On 11/19/2015 10:00 AM, Stephen Warren wrote:
On 11/19/2015 07:45 AM, Simon Glass wrote:
Hi Stephen,
On 14 November 2015 at 23:53, Stephen Warren
wrote:
This tool aims to test U-Boot by executing U-Boot shell commands
using the
console interface. A single top-level script exists to execute or
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