Hello!
I'm working on a product that has two different NAND devices, each with
different timings. I'd like to have the products with the faster NAND keep
the faster timings, while still supporting the slower NAND.
I'm currently using x-loader instead of U-Boot's spl, so
omap3/spl_id_nand.c is not
On Fri, 2014-06-27 at 21:06 +0200, Luka Perkov wrote:
> Hi Stefan,
>
> It's great to see you working on adding support for Marvell's new SoCs :)
>
> Since now kwboot is going to support more SoCs except kirkwood it makes
> sense to rename it to mvboot. I've sent this patch long ago, dunno if it
>
On 06/28/2014 01:37 AM, Stephen Warren wrote:
On 06/27/2014 05:16 PM, Jörg Krause wrote:
On 06/27/2014 11:55 PM, Stephen Warren wrote:
On 06/27/2014 03:37 PM, Jörg Krause wrote:
I added the last series of patches beginning from 2014-06-10 for testing
purposes. The patches from 2014-05-29 were
On 06/28/2014 01:37 AM, Stephen Warren wrote:
On 06/27/2014 05:16 PM, Jörg Krause wrote:
On 06/27/2014 11:55 PM, Stephen Warren wrote:
On 06/27/2014 03:37 PM, Jörg Krause wrote:
I added the last series of patches beginning from 2014-06-10 for testing
purposes. The patches from 2014-05-29 were
On 06/27/2014 05:16 PM, Jörg Krause wrote:
>
> On 06/27/2014 11:55 PM, Stephen Warren wrote:
>> On 06/27/2014 03:37 PM, Jörg Krause wrote:
>>> I added the last series of patches beginning from 2014-06-10 for testing
>>> purposes. The patches from 2014-05-29 were already applied.
>>>
>>> First seri
I applied this series of patches on top of a patch from Stephen Warren
from 2014-06-23: [PATCH] usb: ci_udc: fix interaction with
CONFIG_USB_ETH_CDC.
Now my USB Ethernet driver does not work anymore. I am using tfpd for
downloading files over USB Ethernet Gadget from my notebook to an
Freesca
On 06/27/2014 11:56 PM, Stephen Warren wrote:
On 06/27/2014 03:52 PM, Jörg Krause wrote:
I have tested a little bit more.
It does NOT help waiting some seconds before running tftp again.
Sometimes it just works running tfpd immediately after a previous tfpd.
Sometimes waiting even a minute end
On 06/27/2014 11:55 PM, Stephen Warren wrote:
On 06/27/2014 03:37 PM, Jörg Krause wrote:
I added the last series of patches beginning from 2014-06-10 for testing
purposes. The patches from 2014-05-29 were already applied.
First series of patches:
Applying: usb: ci_udc: call udc_disconnec
On 06/27/2014 03:52 PM, Jörg Krause wrote:
> I have tested a little bit more.
>
> It does NOT help waiting some seconds before running tftp again.
> Sometimes it just works running tfpd immediately after a previous tfpd.
> Sometimes waiting even a minute ends up in the described error.
>
> Odd, v
On 06/27/2014 03:37 PM, Jörg Krause wrote:
> I added the last series of patches beginning from 2014-06-10 for testing
> purposes. The patches from 2014-05-29 were already applied.
>
> First series of patches:
>
> Applying: usb: ci_udc: call udc_disconnect() from ci_pullup()
> Applying: us
I have tested a little bit more.
It does NOT help waiting some seconds before running tftp again.
Sometimes it just works running tfpd immediately after a previous tfpd.
Sometimes waiting even a minute ends up in the described error.
Odd, very odd, sorry :-)
On 06/27/2014 11:37 PM, Jörg Kra
I added the last series of patches beginning from 2014-06-10 for testing
purposes. The patches from 2014-05-29 were already applied.
First series of patches:
Applying: usb: ci_udc: call udc_disconnect() from ci_pullup()
Applying: usb: ci_udc: fix freeing of ep0 req
Applying: usb: ci_ud
Hello Przemyslaw,
On 27-06-14 13:34, Przemyslaw Marczak wrote:
On 06/27/2014 11:40 AM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
On an Odroid U3 board, the SOC is unable to reset the eMMC card
in the DWMMC mode by the cpu software reset. Manual r
* This is done by limiting the ARM's bandwidth and setting DSS priority in
the EMIF controller to ensure underflows do not occur.
---
arch/arm/cpu/armv7/am33xx/ddr.c| 12
arch/arm/include/asm/arch-am33xx/cpu.h | 23 ++-
arch/arm/include/asm/arch-am33x
From: "Franklin S. Cooper Jr"
* Boot failures have been discovered due to a combination of routing issues and
non optimal ddr3 timings in the EMIF
* Since ddr3 timings are different after significant board layout changes
different timings are required for alpha, beta and production boards.
S
Hi Stefan,
It's great to see you working on adding support for Marvell's new SoCs :)
Since now kwboot is going to support more SoCs except kirkwood it makes
sense to rename it to mvboot. I've sent this patch long ago, dunno if it
still applies:
http://patchwork.ozlabs.org/patch/219741/
Also, I'
Dear Tom,
In message <1403874230-31939-1-git-send-email-tr...@ti.com> you wrote:
> Make it clear that we need to load a legacy-formatted (aka uImage)
> kernel into memory as well as the DT if used before using "spl export".
Can this not also be a FIT image (or even a zImage)?
Best regards,
Wolf
From: Arnab Basu
Remove trailing UL from CONFIG_SYS_SDRAM_BASE to be used from assembly.
Fix CPU_RELEASE_ADDR to use the beginning of SDRAM.
Signed-off-by: Arnab Basu
Signed-off-by: York Sun
---
This set depends on this bundle
http://patchwork.ozlabs.org/bundle/yorksun/armv8_fsl-lsch3/
incl
When booting with SP, RCW resides at the beginning of IFC NOR flash.
Signed-off-by: York Sun
---
This set depends on this bundle
http://patchwork.ozlabs.org/bundle/yorksun/armv8_fsl-lsch3/
include/configs/ls2085a_common.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/i
Secondary cores need to be released from holdoff by boot release
registers. With GPP bootrom, they can boot from main memory
directly. Individual spin table is used for each core. If a single
release address is needed, defining macro CONFIG_FSL_SMP_RELEASE_ALL
will use the CPU_RELEASE_ADDR. Spin ta
Spin table is at the very beginning of boot page. All cores are released
by the first entry address. If individual entry address is needed,
undef CONFIG_FSL_SMP_RELEASE_ALL. FDT fixup is called to update spin
table address.
Signed-off-by: York Sun
---
This set depends on this bundle
http://patch
On Tue, Jun 24, 2014 at 11:45:29AM +0900, Alexandre Courbot wrote:
> From: Bryan Wu
>
> On Tegra114 and Tegra124 platforms, certain display-related registers cannot
> be accessed unless the VPR registers are programmed. For bootloader, we
> probably don't care about VPR, so we disable it (which
On Fri, Jun 27, 2014 at 09:11:39AM -0700, York Sun wrote:
> Dear Albert, Wolfgang, Tom,
>
> I have seen some patches for PSCI. We don't have PSCI enabled on
> Freescale ARMv8 SoCs. Will spin-table patches be acceptable?
Baring some technical reasons why no, you can't do that, yes, lets see
the p
On Fri, Jun 27, 2014 at 12:24:49PM -0400, Tom Rini wrote:
> On Fri, May 30, 2014 at 05:03:36PM +0200, Enric Balletbo Serra wrote:
> > Hi all,
> >
> > Should the command 'run something"' return the value that returns
> > "something" or just return "true" if can execute something and "false"
> > if
On Fri, May 30, 2014 at 05:03:36PM +0200, Enric Balletbo Serra wrote:
> Hi all,
>
> Should the command 'run something"' return the value that returns
> "something" or just return "true" if can execute something and "false"
> if it can't ?
>
> I'll explain. Imagine you have a variable that loads a
Dear Albert, Wolfgang, Tom,
I have seen some patches for PSCI. We don't have PSCI enabled on Freescale ARMv8
SoCs. Will spin-table patches be acceptable?
York
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
On Fri, Jun 27, 2014 at 10:27:30AM -0500, Dan Murphy wrote:
> Hi
>
> On 06/23/2014 04:25 PM, Felipe Balbi wrote:
> > some boards won't work if the PHY isn't explicitly
> > powered up.
> >
> > Signed-off-by: Felipe Balbi
> > ---
> > drivers/usb/host/xhci-omap.c | 1 +
> > 1 file changed, 1 insert
On 06/27/2014 10:36 AM, Felipe Balbi wrote:
> On Fri, Jun 27, 2014 at 10:27:30AM -0500, Dan Murphy wrote:
>> Hi
>>
>> On 06/23/2014 04:25 PM, Felipe Balbi wrote:
>>> some boards won't work if the PHY isn't explicitly
>>> powered up.
>>>
>>> Signed-off-by: Felipe Balbi
>>> ---
>>> drivers/usb/host
Hi
On 06/23/2014 04:25 PM, Felipe Balbi wrote:
> some boards won't work if the PHY isn't explicitly
> powered up.
>
> Signed-off-by: Felipe Balbi
> ---
> drivers/usb/host/xhci-omap.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-oma
Make it clear that we need to load a legacy-formatted (aka uImage)
kernel into memory as well as the DT if used before using "spl export".
Cc: Yebio Mesfin
Signed-off-by: Tom Rini
---
doc/README.falcon |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/doc/README.falc
hello Jaehoon,
On 06/27/2014 11:45 AM, Jaehoon Chung wrote:
On 06/27/2014 06:40 PM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
It is possible to boot device using a micro SD or eMMC slots.
In this situation, boot device should be registered as a b
On 06/27/2014 11:40 AM, Minkyu Kang wrote:
On 26/06/14 23:15, Przemyslaw Marczak wrote:
This change adds declaration of functions:
- set_board_type() - called at checkboard()
- get_board_type() - called at checkboard()
- get_board_name()
For supporting multiple board types in a one config - it
On 06/27/2014 11:40 AM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
It is possible to boot device using a micro SD or eMMC slots.
In this situation, boot device should be registered as a block
device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV
On 06/27/2014 11:40 AM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
On an Odroid U3 board, the SOC is unable to reset the eMMC card
in the DWMMC mode by the cpu software reset. Manual reset of the card
by switching proper gpio pin - fixes this issue.
Dear Minkyu,
On 06/27/2014 11:40 AM, Minkyu Kang wrote:
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
It is possible to boot from a few media devices, especially
using a micro SD or eMMC slots. In this situation depends on
a boot device - some setup can be changeg.
Thi
Hi Przemyslaw,
> Robert Baldyga will now take care of this board.
>
> Signed-off-by: Przemyslaw Marczak
> Cc: Robert Baldyga
> Cc: Minkyu Kang
> ---
> boards.cfg | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/boards.cfg b/boards.cfg
> index 1527ebe..673e599 100644
>
Robert Baldyga will now take care of this board.
Signed-off-by: Przemyslaw Marczak
Cc: Robert Baldyga
Cc: Minkyu Kang
---
boards.cfg | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boards.cfg b/boards.cfg
index 1527ebe..673e599 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -3
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: 27 June 2014 15:25
> To: u-boot@lists.denx.de
> Cc: Prafulla Wadaskar; tr...@ti.com
> Subject: [PATCH v1 0/25] Add Marvell Armada XP MV78460
> SoC support
>
>
> This patch series adds support for the Marvell Armada
Grazie per il tuo messaggio.
Sono fuori azienda con accesso limitato alle mail fino al 3 Luglio.
Thank you for your message
I am out of office and will be back on Thursday the third of July.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists
Grazie per il tuo messaggio.
Sono fuori azienda con accesso limitato alle mail fino al 3 Luglio.
Thank you for your message
I am out of office and will be back on Thursday the third of July.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists
Add target to build it automatically upon "make" / MAKEALL. This can/should
be set by board / cpu specific headers if a special U-Boot image is
required for this SoC / board.
E.g. used by Marvell Armada XP to automatically build the u-boot.kwb
target.
Signed-off-by: Stefan Roese
Cc: Masahiro Yam
This basic support for the Marvell Armada XP is base on the existing kirkwood
support. Which has been generatized by moving some common files into
common marvell locations.
This is in preparation for the upcoming Armada XP MV78460 support.
Signed-off-by: Stefan Roese
---
Makefile
Signed-off-by: Stefan Roese
Cc: Jagannadha Sutradharudu Teki
---
drivers/spi/kirkwood_spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 449e9f8..7d1c1f9 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/sp
Compile the pin multiplexing only on Kirkwood platforms. As the
Armada XP doesn't need it.
Signed-off-by: Stefan Roese
Cc: Jagannadha Sutradharudu Teki
---
drivers/spi/kirkwood_spi.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwo
This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c| 2 +-
arch/arm/cpu/arm926ejs/kirkwood/mpp.c| 2 +-
arch/arm/includ
To support the Armada XP SoC, we just need to include the correct header.
Signed-off-by: Stefan Roese
Cc: Heiko Schocher
---
drivers/i2c/mvtwsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index 4a49291..7cbf109 100644
--- a/
This move makes it possible to use this kirkwood SPI driver from other
MVEBU platforms as well. This will be used by the upcoming Armada XP
support.
Signed-off-by: Stefan Roese
---
arch/arm/include/asm/{arch-kirkwood => arch-mvebu}/spi.h | 0
drivers/spi/kirkwood_spi.c
The Marvell MV78460 eval board DB-78460-BP seems to need a longer
PHY autonegotiation timeout than the "standard" 4 seconds. So lets
make this timeout configurable. If not defined in the board config
header the original 4000ms is used.
Signed-off-by: Stefan Roese
Cc: Joe Hershberger
---
includ
This patch adds support for the NETA ethernet controller which is integrated
in the Marvell Armada XP SoC's. This port is based on the Linux driver which
has been stripped of the in U-Boot unused portions.
Tested on the Marvell MV78460 eval board db-78460-bp.
Signed-off-by: Stefan Roese
Cc: Joe
This patch does the following:
- Rename defines and registers to not use kirkwood
- Remove unused defines
- Use clrsetbits() accessor functions
- Coding style cleanup
- Clear 25MHZ bit in timer controller register init for Armada XP
There is no functional change for kirkwood. At least not intentio
Add ID for this Numonix / STMicro chip.
Tested on Marvell DB-78460-BP board.
Signed-off-by: Stefan Roese
Cc: Jagannadha Sutradharudu Teki
---
drivers/mtd/spi/sf_params.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index ac886fd
The barebox version of the kwboot tool has evolved a bit. To support
Armada XP and Dove. Additionally a few minor fixes have been applied.
So lets sync with the latest barebox version.
Please note that the main difference between both versions now is, that
the U-Boot version still supports the -p
All those functions removed with this patch are not accessed at all. So lets
remove them.
Signed-off-by: Stefan Roese
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 55 ---
1 file changed, 55 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
b/arch/a
This makes is possible to use this SPI driver from other MVEBU SoC's as well.
As the upcoming Armada XP support will do.
Signed-off-by: Stefan Roese
Cc: Jagannadha Sutradharudu Teki
---
arch/arm/include/asm/arch-kirkwood/soc.h | 2 +-
drivers/spi/kirkwood_spi.c | 3 ++-
2 files c
This makes is possible to use those gpio functions from other MVEBU SoC's as
well.
Signed-off-by: Stefan Roese
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 17 --
arch/arm/include/asm/arch-kirkwood/cpu.h| 2 +-
arch/arm/include/asm/arch-kirkwood/gpio.h | 16
Signed-off-by: Stefan Roese
---
tools/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/Makefile b/tools/Makefile
index 61b2048..9aab9da 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -139,6 +139,7 @@ ubsha1-objs := os_support.o ubsha1.o lib/sha1.o
HOSTCFLAGS_ubsha1.o := -
This patch introduces the clrsetbits_le32() accessor functions in the
kirkwood SPI driver. Note that it also includes a fix:
-writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl);
+writel(KWSPI_SMEMRDY, &spireg->ctrl);
Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. In
Now that the new common mvebu mbus API is available, lets use it
on kirkwood as well. This includes a small change in the kirkwood
EHCI driver. Making it more similar to the Linux driver from which
it is ported.
Signed-off-by: Stefan Roese
---
arch/arm/cpu/arm926ejs/kirkwood/cpu.c| 102
Signed-off-by: Stefan Roese
Cc: Jagannadha Sutradharudu Teki
---
drivers/spi/kirkwood_spi.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 7d1c1f9..3d58bcc 100644
--- a/drivers/spi/kirkwood_spi.c
+
Additionally the SDRAM address decoding register address is not hard coded
in the C code any more. A define is introduced for this base address.
This makes is possible to use those gpio functions from other MVEBU SoC's
as well.
Signed-off-by: Stefan Roese
---
arch/arm/include/asm/arch-kirkwood
By moving some kirkwood files into a Marvell common directory, those files
can be used by other Marvell platforms as well. The name mvebu is taken
from the Linux kernel source tree. It has been chosen there to represent
the SoC's from the Marvell EBU (Engineering Business Unit). Those SoC's
current
These mbus functions are ported from Barebox. The Barebox version is
ported from Linux. These functions will be first used by the upcoming
Armada XP support. Later other Marvell SoC's will be adopted to use
these functions as well (Kirkwood, Orion).
Signed-off-by: Stefan Roese
---
arch/arm/mveb
This patch series adds support for the Marvell Armada XP SoC's. Specifically
the MV78460.
Basic support for the db-78460-bp evaluation board is added. Supporting the
following interfaces:
- UART
- SPI (including SPI NOR flash)
- I2C
- Ethernet (neta)
While doing this port, I tried to consolidate
Signed-off-by: Stefan Roese
Cc: Jagannadha Sutradharudu Teki
---
arch/arm/include/asm/arch-kirkwood/spi.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h
b/arch/arm/include/asm/arch-kirkwood/spi.h
index b1cf614..e512dce 10064
This patch adds basic support for the Marvell DB-78460-BP evaulation
board. This is the first board that uses the recently created
Armada XP 78460 SoC support.
Signed-off-by: Stefan Roese
---
board/Marvell/db-78460-bp/Makefile | 7 ++
board/Marvell/db-78460-bp/db-78460-bp.c | 120 +++
This patch integrates the Barebox version of this kwbimage.c file into
U-Boot. As this version supports the image version 1 type for the
Armada XP / 370 SoCs.
It was easier to integrate the existing and known to be working Barebox
source than to update the current U-Boot version to support this
v1
On 06/27/2014 06:40 PM, Minkyu Kang wrote:
> Dear Przemyslaw Marczak,
>
> On 26/06/14 23:15, Przemyslaw Marczak wrote:
>> It is possible to boot device using a micro SD or eMMC slots.
>> In this situation, boot device should be registered as a block
>> device 0 in the MMC framework, because CONFIG
On 26/06/14 23:15, Przemyslaw Marczak wrote:
> This change adds declaration of functions:
> - set_board_type() - called at checkboard()
> - get_board_type() - called at checkboard()
> - get_board_name()
>
> For supporting multiple board types in a one config - it is welcome
> to display the curren
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
> It is possible to boot device using a micro SD or eMMC slots.
> In this situation, boot device should be registered as a block
> device 0 in the MMC framework, because CONFIG_SYS_MMC_ENV_DEV
> is usually set to "0" in the most
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
> It is possible to boot from a few media devices, especially
> using a micro SD or eMMC slots. In this situation depends on
> a boot device - some setup can be changeg.
>
> This change adds function:
> boot_device() - which re
Dear Przemyslaw Marczak,
On 26/06/14 23:15, Przemyslaw Marczak wrote:
> On an Odroid U3 board, the SOC is unable to reset the eMMC card
> in the DWMMC mode by the cpu software reset. Manual reset of the card
> by switching proper gpio pin - fixes this issue.
>
> Such solution needs to add a call
Hi Eli,
On Jun 12, 2014, at 12:41 PM, Eli Billauer wrote:
> The current wait loop just reads the status 1 times, which makes the
> actual timeout period platform-dependent. The udelay() call within the loop
> makes the new timeout ~100 ms.
>
> Signed-off-by: Eli Billauer
> ---
> drivers/mmc
Hi Steve,
>
>
> On 14-06-26 06:20 AM, Rob Herring wrote:
> > On Wed, Jun 25, 2014 at 7:16 PM, Steve Rae
> > wrote:
> >> Rob,
> >>
> >>
> >> On 14-06-25 06:59 AM, Rob Herring wrote:
> >>>
> >>> On Mon, Jun 23, 2014 at 1:37 PM, Steve Rae
> >>> wrote:
>
> Rob & Sebastian
>
> I
Hi Rob,
> On Wed, Jun 25, 2014 at 7:16 PM, Steve Rae wrote:
> > Rob,
> >
> >
> > On 14-06-25 06:59 AM, Rob Herring wrote:
> >>
> >> On Mon, Jun 23, 2014 at 1:37 PM, Steve Rae
> >> wrote:
> >>>
> >>> Rob & Sebastian
> >>>
> >>> I would appreciate your comments on this issue; I suspect that
> >>>
Hi Rob,
> On Mon, Jun 23, 2014 at 1:37 PM, Steve Rae wrote:
> > Rob & Sebastian
> >
> > I would appreciate your comments on this issue; I suspect that you
> > had some ideas regarding the implementation of the fastboot "flash"
> > and "erase" commands
>
> I agree with Lukasz's and Marek's co
On 26.06.2014 09:38, Ian Campbell wrote:
(re-adding Hans whose CC I seem to have dropped somehow, sorry)
On Wed, 2014-06-25 at 20:57 +0100, Ian Campbell wrote:
Hi Albert,
Any comments on these sunxi series from Hans and myself?
I wonder if Hans and I should be applying for a u-boot-sunxi.git
From: Shaohui Xie
T4240 has 4 serdes, each serdes has 4k memory space, two PLLs.
We use PLL1CR0 to check the serdes reference clock.
Signed-off-by: Shaohui Xie
---
arch/powerpc/include/asm/immap_85xx.h | 6 ++
board/freescale/t4qds/t4240qds.c | 10 ++
2 files changed, 12 inse
77 matches
Mail list logo